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gigaset: correct clearing of at_state strings on RING
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / mac_esp.c
blob4a90eaf7cb63ac5a7e8f874ca9868f596924567a
1 /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
2 *
3 * Adapted from jazz_esp.c and the old mac_esp.c.
4 *
5 * The pseudo DMA algorithm is based on the one used in NetBSD.
6 * See sys/arch/mac68k/obio/esp.c for some background information.
7 *
8 * Copyright (C) 2007-2008 Finn Thain
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/scatterlist.h>
19 #include <linux/delay.h>
20 #include <linux/io.h>
21 #include <linux/nubus.h>
22
23 #include <asm/irq.h>
24 #include <asm/dma.h>
25 #include <asm/macints.h>
26 #include <asm/macintosh.h>
27
28 #include <scsi/scsi_host.h>
29
30 #include "esp_scsi.h"
31
32 #define DRV_MODULE_NAME "mac_esp"
33 #define PFX DRV_MODULE_NAME ": "
34 #define DRV_VERSION "1.000"
35 #define DRV_MODULE_RELDATE "Sept 15, 2007"
36
37 #define MAC_ESP_IO_BASE 0x50F00000
38 #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
39 #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
40 #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
41 #define MAC_ESP_REGS_SPACING 0x402
42 #define MAC_ESP_PDMA_REG 0xF9800024
43 #define MAC_ESP_PDMA_REG_SPACING 0x4
44 #define MAC_ESP_PDMA_IO_OFFSET 0x100
45
46 #define esp_read8(REG) mac_esp_read8(esp, REG)
47 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
48
49 struct mac_esp_priv {
50 struct esp *esp;
51 void __iomem *pdma_regs;
52 void __iomem *pdma_io;
53 int error;
54 };
55 static struct esp *esp_chips[2];
56
57 #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
58 platform_get_drvdata((struct platform_device *) \
59 (esp->dev)))
60
61 static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
62 {
63 nubus_writeb(val, esp->regs + reg * 16);
64 }
65
66 static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
67 {
68 return nubus_readb(esp->regs + reg * 16);
69 }
70
71 /* For pseudo DMA and PIO we need the virtual address
72 * so this address mapping is the identity mapping.
73 */
74
75 static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
76 size_t sz, int dir)
77 {
78 return (dma_addr_t)buf;
79 }
80
81 static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
82 int num_sg, int dir)
83 {
84 int i;
85
86 for (i = 0; i < num_sg; i++)
87 sg[i].dma_address = (u32)sg_virt(&sg[i]);
88 return num_sg;
89 }
90
91 static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
92 size_t sz, int dir)
93 {
94 /* Nothing to do. */
95 }
96
97 static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
98 int num_sg, int dir)
99 {
100 /* Nothing to do. */
101 }
102
103 static void mac_esp_reset_dma(struct esp *esp)
104 {
105 /* Nothing to do. */
106 }
107
108 static void mac_esp_dma_drain(struct esp *esp)
109 {
110 /* Nothing to do. */
111 }
112
113 static void mac_esp_dma_invalidate(struct esp *esp)
114 {
115 /* Nothing to do. */
116 }
117
118 static int mac_esp_dma_error(struct esp *esp)
119 {
120 return MAC_ESP_GET_PRIV(esp)->error;
121 }
122
123 static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
124 {
125 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
126 int i = 500000;
127
128 do {
129 if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
130 return 0;
131
132 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
133 return 1;
134
135 udelay(2);
136 } while (--i);
137
138 printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
139 esp_read8(ESP_STATUS));
140 mep->error = 1;
141 return 1;
142 }
143
144 static inline int mac_esp_wait_for_dreq(struct esp *esp)
145 {
146 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
147 int i = 500000;
148
149 do {
150 if (mep->pdma_regs == NULL) {
151 if (mac_irq_pending(IRQ_MAC_SCSIDRQ))
152 return 0;
153 } else {
154 if (nubus_readl(mep->pdma_regs) & 0x200)
155 return 0;
156 }
157
158 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
159 return 1;
160
161 udelay(2);
162 } while (--i);
163
164 printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
165 esp_read8(ESP_STATUS));
166 mep->error = 1;
167 return 1;
168 }
169
170 #define MAC_ESP_PDMA_LOOP(operands) \
171 asm volatile ( \
172 " tstw %1 \n" \
173 " jbeq 20f \n" \
174 "1: movew " operands " \n" \
175 "2: movew " operands " \n" \
176 "3: movew " operands " \n" \
177 "4: movew " operands " \n" \
178 "5: movew " operands " \n" \
179 "6: movew " operands " \n" \
180 "7: movew " operands " \n" \
181 "8: movew " operands " \n" \
182 "9: movew " operands " \n" \
183 "10: movew " operands " \n" \
184 "11: movew " operands " \n" \
185 "12: movew " operands " \n" \
186 "13: movew " operands " \n" \
187 "14: movew " operands " \n" \
188 "15: movew " operands " \n" \
189 "16: movew " operands " \n" \
190 " subqw #1,%1 \n" \
191 " jbne 1b \n" \
192 "20: tstw %2 \n" \
193 " jbeq 30f \n" \
194 "21: movew " operands " \n" \
195 " subqw #1,%2 \n" \
196 " jbne 21b \n" \
197 "30: tstw %3 \n" \
198 " jbeq 40f \n" \
199 "31: moveb " operands " \n" \
200 "32: nop \n" \
201 "40: \n" \
202 " \n" \
203 " .section __ex_table,\"a\" \n" \
204 " .align 4 \n" \
205 " .long 1b,40b \n" \
206 " .long 2b,40b \n" \
207 " .long 3b,40b \n" \
208 " .long 4b,40b \n" \
209 " .long 5b,40b \n" \
210 " .long 6b,40b \n" \
211 " .long 7b,40b \n" \
212 " .long 8b,40b \n" \
213 " .long 9b,40b \n" \
214 " .long 10b,40b \n" \
215 " .long 11b,40b \n" \
216 " .long 12b,40b \n" \
217 " .long 13b,40b \n" \
218 " .long 14b,40b \n" \
219 " .long 15b,40b \n" \
220 " .long 16b,40b \n" \
221 " .long 21b,40b \n" \
222 " .long 31b,40b \n" \
223 " .long 32b,40b \n" \
224 " .previous \n" \
225 : "+a" (addr), "+r" (count32), "+r" (count2) \
226 : "g" (count1), "a" (mep->pdma_io))
227
228 static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
229 u32 dma_count, int write, u8 cmd)
230 {
231 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
232 unsigned long flags;
233
234 local_irq_save(flags);
235
236 mep->error = 0;
237
238 if (!write)
239 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
240
241 esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
242 esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
243
244 scsi_esp_cmd(esp, cmd);
245
246 do {
247 unsigned int count32 = esp_count >> 5;
248 unsigned int count2 = (esp_count & 0x1F) >> 1;
249 unsigned int count1 = esp_count & 1;
250 unsigned int start_addr = addr;
251
252 if (mac_esp_wait_for_dreq(esp))
253 break;
254
255 if (write) {
256 MAC_ESP_PDMA_LOOP("%4@,%0@+");
257
258 esp_count -= addr - start_addr;
259 } else {
260 unsigned int n;
261
262 MAC_ESP_PDMA_LOOP("%0@+,%4@");
263
264 if (mac_esp_wait_for_empty_fifo(esp))
265 break;
266
267 n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
268 addr = start_addr + esp_count - n;
269 esp_count = n;
270 }
271 } while (esp_count);
272
273 local_irq_restore(flags);
274 }
275
276 /*
277 * Programmed IO routines follow.
278 */
279
280 static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
281 {
282 int i = 500000;
283
284 do {
285 unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
286
287 if (fbytes)
288 return fbytes;
289
290 udelay(2);
291 } while (--i);
292
293 printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
294 esp_read8(ESP_STATUS));
295 return 0;
296 }
297
298 static inline int mac_esp_wait_for_intr(struct esp *esp)
299 {
300 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
301 int i = 500000;
302
303 do {
304 esp->sreg = esp_read8(ESP_STATUS);
305 if (esp->sreg & ESP_STAT_INTR)
306 return 0;
307
308 udelay(2);
309 } while (--i);
310
311 printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
312 mep->error = 1;
313 return 1;
314 }
315
316 #define MAC_ESP_PIO_LOOP(operands, reg1) \
317 asm volatile ( \
318 "1: moveb " operands " \n" \
319 " subqw #1,%1 \n" \
320 " jbne 1b \n" \
321 : "+a" (addr), "+r" (reg1) \
322 : "a" (fifo))
323
324 #define MAC_ESP_PIO_FILL(operands, reg1) \
325 asm volatile ( \
326 " moveb " operands " \n" \
327 " moveb " operands " \n" \
328 " moveb " operands " \n" \
329 " moveb " operands " \n" \
330 " moveb " operands " \n" \
331 " moveb " operands " \n" \
332 " moveb " operands " \n" \
333 " moveb " operands " \n" \
334 " moveb " operands " \n" \
335 " moveb " operands " \n" \
336 " moveb " operands " \n" \
337 " moveb " operands " \n" \
338 " moveb " operands " \n" \
339 " moveb " operands " \n" \
340 " moveb " operands " \n" \
341 " moveb " operands " \n" \
342 " subqw #8,%1 \n" \
343 " subqw #8,%1 \n" \
344 : "+a" (addr), "+r" (reg1) \
345 : "a" (fifo))
346
347 #define MAC_ESP_FIFO_SIZE 16
348
349 static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
350 u32 dma_count, int write, u8 cmd)
351 {
352 struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
353 u8 *fifo = esp->regs + ESP_FDATA * 16;
354
355 disable_irq(esp->host->irq);
356
357 cmd &= ~ESP_CMD_DMA;
358 mep->error = 0;
359
360 if (write) {
361 scsi_esp_cmd(esp, cmd);
362
363 while (1) {
364 unsigned int n;
365
366 n = mac_esp_wait_for_fifo(esp);
367 if (!n)
368 break;
369
370 if (n > esp_count)
371 n = esp_count;
372 esp_count -= n;
373
374 MAC_ESP_PIO_LOOP("%2@,%0@+", n);
375
376 if (!esp_count)
377 break;
378
379 if (mac_esp_wait_for_intr(esp))
380 break;
381
382 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
383 ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
384 break;
385
386 esp->ireg = esp_read8(ESP_INTRPT);
387 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
388 ESP_INTR_BSERV)
389 break;
390
391 scsi_esp_cmd(esp, ESP_CMD_TI);
392 }
393 } else {
394 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
395
396 if (esp_count >= MAC_ESP_FIFO_SIZE)
397 MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
398 else
399 MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
400
401 scsi_esp_cmd(esp, cmd);
402
403 while (esp_count) {
404 unsigned int n;
405
406 if (mac_esp_wait_for_intr(esp))
407 break;
408
409 if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
410 ((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
411 break;
412
413 esp->ireg = esp_read8(ESP_INTRPT);
414 if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
415 ESP_INTR_BSERV)
416 break;
417
418 n = MAC_ESP_FIFO_SIZE -
419 (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
420 if (n > esp_count)
421 n = esp_count;
422
423 if (n == MAC_ESP_FIFO_SIZE) {
424 MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
425 } else {
426 esp_count -= n;
427 MAC_ESP_PIO_LOOP("%0@+,%2@", n);
428 }
429
430 scsi_esp_cmd(esp, ESP_CMD_TI);
431 }
432 }
433
434 enable_irq(esp->host->irq);
435 }
436
437 static int mac_esp_irq_pending(struct esp *esp)
438 {
439 if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
440 return 1;
441 return 0;
442 }
443
444 static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
445 {
446 return dma_len > 0xFFFF ? 0xFFFF : dma_len;
447 }
448
449 static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
450 {
451 int got_intr;
452
453 /*
454 * This is an edge triggered IRQ, so we have to be careful to
455 * avoid missing a transition when it is shared by two ESP devices.
456 */
457
458 do {
459 got_intr = 0;
460 if (esp_chips[0] &&
461 (mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
462 (void)scsi_esp_intr(irq, esp_chips[0]);
463 got_intr = 1;
464 }
465 if (esp_chips[1] &&
466 (mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
467 (void)scsi_esp_intr(irq, esp_chips[1]);
468 got_intr = 1;
469 }
470 } while (got_intr);
471
472 return IRQ_HANDLED;
473 }
474
475 static struct esp_driver_ops mac_esp_ops = {
476 .esp_write8 = mac_esp_write8,
477 .esp_read8 = mac_esp_read8,
478 .map_single = mac_esp_map_single,
479 .map_sg = mac_esp_map_sg,
480 .unmap_single = mac_esp_unmap_single,
481 .unmap_sg = mac_esp_unmap_sg,
482 .irq_pending = mac_esp_irq_pending,
483 .dma_length_limit = mac_esp_dma_length_limit,
484 .reset_dma = mac_esp_reset_dma,
485 .dma_drain = mac_esp_dma_drain,
486 .dma_invalidate = mac_esp_dma_invalidate,
487 .send_dma_cmd = mac_esp_send_pdma_cmd,
488 .dma_error = mac_esp_dma_error,
489 };
490
491 static int __devinit esp_mac_probe(struct platform_device *dev)
492 {
493 struct scsi_host_template *tpnt = &scsi_esp_template;
494 struct Scsi_Host *host;
495 struct esp *esp;
496 int err;
497 struct mac_esp_priv *mep;
498
499 if (!MACH_IS_MAC)
500 return -ENODEV;
501
502 if (dev->id > 1)
503 return -ENODEV;
504
505 host = scsi_host_alloc(tpnt, sizeof(struct esp));
506
507 err = -ENOMEM;
508 if (!host)
509 goto fail;
510
511 host->max_id = 8;
512 host->use_clustering = DISABLE_CLUSTERING;
513 esp = shost_priv(host);
514
515 esp->host = host;
516 esp->dev = dev;
517
518 esp->command_block = kzalloc(16, GFP_KERNEL);
519 if (!esp->command_block)
520 goto fail_unlink;
521 esp->command_block_dma = (dma_addr_t)esp->command_block;
522
523 esp->scsi_id = 7;
524 host->this_id = esp->scsi_id;
525 esp->scsi_id_mask = 1 << esp->scsi_id;
526
527 mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
528 if (!mep)
529 goto fail_free_command_block;
530 mep->esp = esp;
531 platform_set_drvdata(dev, mep);
532
533 switch (macintosh_config->scsi_type) {
534 case MAC_SCSI_QUADRA:
535 esp->cfreq = 16500000;
536 esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
537 mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
538 mep->pdma_regs = NULL;
539 break;
540 case MAC_SCSI_QUADRA2:
541 esp->cfreq = 25000000;
542 esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
543 dev->id * MAC_ESP_REGS_SPACING);
544 mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
545 mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
546 dev->id * MAC_ESP_PDMA_REG_SPACING);
547 nubus_writel(0x1d1, mep->pdma_regs);
548 break;
549 case MAC_SCSI_QUADRA3:
550 /* These quadras have a real DMA controller (the PSC) but we
551 * don't know how to drive it so we must use PIO instead.
552 */
553 esp->cfreq = 25000000;
554 esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
555 mep->pdma_io = NULL;
556 mep->pdma_regs = NULL;
557 break;
558 }
559
560 esp->ops = &mac_esp_ops;
561 if (mep->pdma_io == NULL) {
562 printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
563 esp_write8(0, ESP_TCLOW);
564 esp_write8(0, ESP_TCMED);
565 esp->flags = ESP_FLAG_DISABLE_SYNC;
566 mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
567 } else {
568 printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
569 }
570
571 host->irq = IRQ_MAC_SCSI;
572 esp_chips[dev->id] = esp;
573 mb();
574 if (esp_chips[!dev->id] == NULL) {
575 err = request_irq(host->irq, mac_scsi_esp_intr, 0,
576 "Mac ESP", NULL);
577 if (err < 0) {
578 esp_chips[dev->id] = NULL;
579 goto fail_free_priv;
580 }
581 }
582
583 err = scsi_esp_register(esp, &dev->dev);
584 if (err)
585 goto fail_free_irq;
586
587 return 0;
588
589 fail_free_irq:
590 if (esp_chips[!dev->id] == NULL)
591 free_irq(host->irq, esp);
592 fail_free_priv:
593 kfree(mep);
594 fail_free_command_block:
595 kfree(esp->command_block);
596 fail_unlink:
597 scsi_host_put(host);
598 fail:
599 return err;
600 }
601
602 static int __devexit esp_mac_remove(struct platform_device *dev)
603 {
604 struct mac_esp_priv *mep = platform_get_drvdata(dev);
605 struct esp *esp = mep->esp;
606 unsigned int irq = esp->host->irq;
607
608 scsi_esp_unregister(esp);
609
610 esp_chips[dev->id] = NULL;
611 if (!(esp_chips[0] || esp_chips[1]))
612 free_irq(irq, NULL);
613
614 kfree(mep);
615
616 kfree(esp->command_block);
617
618 scsi_host_put(esp->host);
619
620 return 0;
621 }
622
623 static struct platform_driver esp_mac_driver = {
624 .probe = esp_mac_probe,
625 .remove = __devexit_p(esp_mac_remove),
626 .driver = {
627 .name = DRV_MODULE_NAME,
628 .owner = THIS_MODULE,
629 },
630 };
631
632 static int __init mac_esp_init(void)
633 {
634 return platform_driver_register(&esp_mac_driver);
635 }
636
637 static void __exit mac_esp_exit(void)
638 {
639 platform_driver_unregister(&esp_mac_driver);
640 }
641
642 MODULE_DESCRIPTION("Mac ESP SCSI driver");
643 MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
644 MODULE_LICENSE("GPL v2");
645 MODULE_VERSION(DRV_VERSION);
646 MODULE_ALIAS("platform:" DRV_MODULE_NAME);
647
648 module_init(mac_esp_init);
649 module_exit(mac_esp_exit);
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