2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
51 #include <linux/stackprotector.h>
58 #include <asm/trampoline.h>
61 #include <asm/pgtable.h>
62 #include <asm/tlbflush.h>
66 #include <asm/setup.h>
67 #include <asm/uv/uv.h>
68 #include <linux/mc146818rtc.h>
70 #include <asm/smpboot_hooks.h>
73 u8 apicid_2_node
[MAX_APICID
];
74 static int low_mappings
;
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 static struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
94 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
98 /* Number of siblings per CPU package */
99 int smp_num_siblings
= 1;
100 EXPORT_SYMBOL(smp_num_siblings
);
102 /* Last level cache ID of each logical CPU */
103 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
105 /* representing HT siblings of each logical CPU */
106 DEFINE_PER_CPU(cpumask_var_t
, cpu_sibling_map
);
107 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
109 /* representing HT and core siblings of each logical CPU */
110 DEFINE_PER_CPU(cpumask_var_t
, cpu_core_map
);
111 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
113 /* Per CPU bogomips and other parameters */
114 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
115 EXPORT_PER_CPU_SYMBOL(cpu_info
);
117 atomic_t init_deasserted
;
119 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
120 /* which node each logical CPU is on */
121 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
122 EXPORT_SYMBOL(cpu_to_node_map
);
124 /* set up a mapping between cpu and node. */
125 static void map_cpu_to_node(int cpu
, int node
)
127 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
128 cpumask_set_cpu(cpu
, node_to_cpumask_map
[node
]);
129 cpu_to_node_map
[cpu
] = node
;
132 /* undo a mapping between cpu and node. */
133 static void unmap_cpu_to_node(int cpu
)
137 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
138 for (node
= 0; node
< MAX_NUMNODES
; node
++)
139 cpumask_clear_cpu(cpu
, node_to_cpumask_map
[node
]);
140 cpu_to_node_map
[cpu
] = 0;
142 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
143 #define map_cpu_to_node(cpu, node) ({})
144 #define unmap_cpu_to_node(cpu) ({})
148 static int boot_cpu_logical_apicid
;
150 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
151 { [0 ... NR_CPUS
-1] = BAD_APICID
};
153 static void map_cpu_to_logical_apicid(void)
155 int cpu
= smp_processor_id();
156 int apicid
= logical_smp_processor_id();
157 int node
= apic
->apicid_to_node(apicid
);
159 if (!node_online(node
))
160 node
= first_online_node
;
162 cpu_2_logical_apicid
[cpu
] = apicid
;
163 map_cpu_to_node(cpu
, node
);
166 void numa_remove_cpu(int cpu
)
168 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
169 unmap_cpu_to_node(cpu
);
172 #define map_cpu_to_logical_apicid() do {} while (0)
176 * Report back to the Boot Processor.
179 static void __cpuinit
smp_callin(void)
182 unsigned long timeout
;
185 * If waken up by an INIT in an 82489DX configuration
186 * we may get here before an INIT-deassert IPI reaches
187 * our local APIC. We have to wait for the IPI or we'll
188 * lock up on an APIC access.
190 if (apic
->wait_for_init_deassert
)
191 apic
->wait_for_init_deassert(&init_deasserted
);
194 * (This works even if the APIC is not enabled.)
196 phys_id
= read_apic_id();
197 cpuid
= smp_processor_id();
198 if (cpumask_test_cpu(cpuid
, cpu_callin_mask
)) {
199 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
202 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
205 * STARTUP IPIs are fragile beasts as they might sometimes
206 * trigger some glue motherboard logic. Complete APIC bus
207 * silence for 1 second, this overestimates the time the
208 * boot CPU is spending to send the up to 2 STARTUP IPIs
209 * by a factor of two. This should be enough.
213 * Waiting 2s total for startup (udelay is not yet working)
215 timeout
= jiffies
+ 2*HZ
;
216 while (time_before(jiffies
, timeout
)) {
218 * Has the boot CPU finished it's STARTUP sequence?
220 if (cpumask_test_cpu(cpuid
, cpu_callout_mask
))
225 if (!time_before(jiffies
, timeout
)) {
226 panic("%s: CPU%d started up but did not get a callout!\n",
231 * the boot CPU has finished the init stage and is spinning
232 * on callin_map until we finish. We are free to set up this
233 * CPU, first the APIC. (this is probably redundant on most
237 pr_debug("CALLIN, before setup_local_APIC().\n");
238 if (apic
->smp_callin_clear_local_apic
)
239 apic
->smp_callin_clear_local_apic();
241 end_local_APIC_setup();
242 map_cpu_to_logical_apicid();
244 notify_cpu_starting(cpuid
);
248 * Need to enable IRQs because it can take longer and then
249 * the NMI watchdog might kill us.
254 pr_debug("Stack at about %p\n", &cpuid
);
257 * Save our processor parameters
259 smp_store_cpu_info(cpuid
);
262 * Allow the master to continue.
264 cpumask_set_cpu(cpuid
, cpu_callin_mask
);
268 * Activate a secondary processor.
270 notrace
static void __cpuinit
start_secondary(void *unused
)
273 * Don't put *anything* before cpu_init(), SMP booting is too
274 * fragile that we want to limit the things done here to the
275 * most necessary things.
282 /* otherwise gcc will move up smp_processor_id before the cpu_init */
285 * Check TSC synchronization with the BP:
287 check_tsc_sync_target();
289 if (nmi_watchdog
== NMI_IO_APIC
) {
290 disable_8259A_irq(0);
291 enable_NMI_through_LVT0();
301 /* This must be done before setting cpu_online_mask */
302 set_cpu_sibling_map(raw_smp_processor_id());
306 * We need to hold call_lock, so there is no inconsistency
307 * between the time smp_call_function() determines number of
308 * IPI recipients, and the time when the determination is made
309 * for which cpus receive the IPI. Holding this
310 * lock helps us to not include this cpu in a currently in progress
311 * smp_call_function().
313 * We need to hold vector_lock so there the set of online cpus
314 * does not change while we are assigning vectors to cpus. Holding
315 * this lock ensures we don't half assign or remove an irq from a cpu.
319 __setup_vector_irq(smp_processor_id());
320 set_cpu_online(smp_processor_id(), true);
321 unlock_vector_lock();
323 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
325 /* enable local interrupts */
328 /* to prevent fake stack check failure in clock setup */
329 boot_init_stack_canary();
331 x86_cpuinit
.setup_percpu_clockev();
337 #ifdef CONFIG_CPUMASK_OFFSTACK
338 /* In this case, llc_shared_map is a pointer to a cpumask. */
339 static inline void copy_cpuinfo_x86(struct cpuinfo_x86
*dst
,
340 const struct cpuinfo_x86
*src
)
342 struct cpumask
*llc
= dst
->llc_shared_map
;
344 dst
->llc_shared_map
= llc
;
347 static inline void copy_cpuinfo_x86(struct cpuinfo_x86
*dst
,
348 const struct cpuinfo_x86
*src
)
352 #endif /* CONFIG_CPUMASK_OFFSTACK */
355 * The bootstrap kernel entry code has set these up. Save them for
359 void __cpuinit
smp_store_cpu_info(int id
)
361 struct cpuinfo_x86
*c
= &cpu_data(id
);
363 copy_cpuinfo_x86(c
, &boot_cpu_data
);
366 identify_secondary_cpu(c
);
370 void __cpuinit
set_cpu_sibling_map(int cpu
)
373 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
375 cpumask_set_cpu(cpu
, cpu_sibling_setup_mask
);
377 if (smp_num_siblings
> 1) {
378 for_each_cpu(i
, cpu_sibling_setup_mask
) {
379 struct cpuinfo_x86
*o
= &cpu_data(i
);
381 if (c
->phys_proc_id
== o
->phys_proc_id
&&
382 c
->cpu_core_id
== o
->cpu_core_id
) {
383 cpumask_set_cpu(i
, cpu_sibling_mask(cpu
));
384 cpumask_set_cpu(cpu
, cpu_sibling_mask(i
));
385 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
386 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
387 cpumask_set_cpu(i
, c
->llc_shared_map
);
388 cpumask_set_cpu(cpu
, o
->llc_shared_map
);
392 cpumask_set_cpu(cpu
, cpu_sibling_mask(cpu
));
395 cpumask_set_cpu(cpu
, c
->llc_shared_map
);
397 if (current_cpu_data
.x86_max_cores
== 1) {
398 cpumask_copy(cpu_core_mask(cpu
), cpu_sibling_mask(cpu
));
403 for_each_cpu(i
, cpu_sibling_setup_mask
) {
404 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
405 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
406 cpumask_set_cpu(i
, c
->llc_shared_map
);
407 cpumask_set_cpu(cpu
, cpu_data(i
).llc_shared_map
);
409 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
410 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
411 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
413 * Does this new cpu bringup a new core?
415 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1) {
417 * for each core in package, increment
418 * the booted_cores for this new cpu
420 if (cpumask_first(cpu_sibling_mask(i
)) == i
)
423 * increment the core count for all
424 * the other cpus in this package
427 cpu_data(i
).booted_cores
++;
428 } else if (i
!= cpu
&& !c
->booted_cores
)
429 c
->booted_cores
= cpu_data(i
).booted_cores
;
434 /* maps the cpu to the sched domain representing multi-core */
435 const struct cpumask
*cpu_coregroup_mask(int cpu
)
437 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
439 * For perf, we return last level cache shared map.
440 * And for power savings, we return cpu_core_map
442 if ((sched_mc_power_savings
|| sched_smt_power_savings
) &&
443 !(cpu_has(c
, X86_FEATURE_AMD_DCM
)))
444 return cpu_core_mask(cpu
);
446 return c
->llc_shared_map
;
449 static void impress_friends(void)
452 unsigned long bogosum
= 0;
454 * Allow the user to impress friends.
456 pr_debug("Before bogomips.\n");
457 for_each_possible_cpu(cpu
)
458 if (cpumask_test_cpu(cpu
, cpu_callout_mask
))
459 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
461 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
464 (bogosum
/(5000/HZ
))%100);
466 pr_debug("Before bogocount - setting activated=1.\n");
469 void __inquire_remote_apic(int apicid
)
471 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
472 char *names
[] = { "ID", "VERSION", "SPIV" };
476 printk(KERN_INFO
"Inquiring remote APIC 0x%x...\n", apicid
);
478 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
479 printk(KERN_INFO
"... APIC 0x%x %s: ", apicid
, names
[i
]);
484 status
= safe_apic_wait_icr_idle();
487 "a previous APIC delivery may have failed\n");
489 apic_icr_write(APIC_DM_REMRD
| regs
[i
], apicid
);
494 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
495 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
498 case APIC_ICR_RR_VALID
:
499 status
= apic_read(APIC_RRR
);
500 printk(KERN_CONT
"%08x\n", status
);
503 printk(KERN_CONT
"failed\n");
509 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
510 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
511 * won't ... remember to clear down the APIC, etc later.
514 wakeup_secondary_cpu_via_nmi(int logical_apicid
, unsigned long start_eip
)
516 unsigned long send_status
, accept_status
= 0;
520 /* Boot on the stack */
521 /* Kick the second */
522 apic_icr_write(APIC_DM_NMI
| apic
->dest_logical
, logical_apicid
);
524 pr_debug("Waiting for send to finish...\n");
525 send_status
= safe_apic_wait_icr_idle();
528 * Give the other CPU some time to accept the IPI.
531 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
532 maxlvt
= lapic_get_maxlvt();
533 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
534 apic_write(APIC_ESR
, 0);
535 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
537 pr_debug("NMI sent.\n");
540 printk(KERN_ERR
"APIC never delivered???\n");
542 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
544 return (send_status
| accept_status
);
548 wakeup_secondary_cpu_via_init(int phys_apicid
, unsigned long start_eip
)
550 unsigned long send_status
, accept_status
= 0;
551 int maxlvt
, num_starts
, j
;
553 maxlvt
= lapic_get_maxlvt();
556 * Be paranoid about clearing APIC errors.
558 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
559 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
560 apic_write(APIC_ESR
, 0);
564 pr_debug("Asserting INIT.\n");
567 * Turn INIT on target chip
572 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
,
575 pr_debug("Waiting for send to finish...\n");
576 send_status
= safe_apic_wait_icr_idle();
580 pr_debug("Deasserting INIT.\n");
584 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_DM_INIT
, phys_apicid
);
586 pr_debug("Waiting for send to finish...\n");
587 send_status
= safe_apic_wait_icr_idle();
590 atomic_set(&init_deasserted
, 1);
593 * Should we send STARTUP IPIs ?
595 * Determine this based on the APIC version.
596 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
598 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
604 * Paravirt / VMI wants a startup IPI hook here to set up the
605 * target processor state.
607 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
608 (unsigned long)stack_start
.sp
);
611 * Run STARTUP IPI loop.
613 pr_debug("#startup loops: %d.\n", num_starts
);
615 for (j
= 1; j
<= num_starts
; j
++) {
616 pr_debug("Sending STARTUP #%d.\n", j
);
617 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
618 apic_write(APIC_ESR
, 0);
620 pr_debug("After apic_write.\n");
627 /* Boot on the stack */
628 /* Kick the second */
629 apic_icr_write(APIC_DM_STARTUP
| (start_eip
>> 12),
633 * Give the other CPU some time to accept the IPI.
637 pr_debug("Startup point 1.\n");
639 pr_debug("Waiting for send to finish...\n");
640 send_status
= safe_apic_wait_icr_idle();
643 * Give the other CPU some time to accept the IPI.
646 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
647 apic_write(APIC_ESR
, 0);
648 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
649 if (send_status
|| accept_status
)
652 pr_debug("After Startup.\n");
655 printk(KERN_ERR
"APIC never delivered???\n");
657 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
659 return (send_status
| accept_status
);
663 struct work_struct work
;
664 struct task_struct
*idle
;
665 struct completion done
;
669 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
671 struct create_idle
*c_idle
=
672 container_of(work
, struct create_idle
, work
);
674 c_idle
->idle
= fork_idle(c_idle
->cpu
);
675 complete(&c_idle
->done
);
678 /* reduce the number of lines printed when booting a large cpu count system */
679 static void __cpuinit
announce_cpu(int cpu
, int apicid
)
681 static int current_node
= -1;
682 int node
= cpu_to_node(cpu
);
684 if (system_state
== SYSTEM_BOOTING
) {
685 if (node
!= current_node
) {
686 if (current_node
> (-1))
689 pr_info("Booting Node %3d, Processors ", node
);
691 pr_cont(" #%d%s", cpu
, cpu
== (nr_cpu_ids
- 1) ? " Ok.\n" : "");
694 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
699 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
700 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
701 * Returns zero if CPU booted OK, else error code from
702 * ->wakeup_secondary_cpu.
704 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
706 unsigned long boot_error
= 0;
707 unsigned long start_ip
;
709 struct create_idle c_idle
= {
711 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
714 INIT_WORK_ON_STACK(&c_idle
.work
, do_fork_idle
);
716 alternatives_smp_switch(1);
718 c_idle
.idle
= get_idle_for_cpu(cpu
);
721 * We can't use kernel_thread since we must avoid to
722 * reschedule the child.
725 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
726 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
727 init_idle(c_idle
.idle
, cpu
);
731 if (!keventd_up() || current_is_keventd())
732 c_idle
.work
.func(&c_idle
.work
);
734 schedule_work(&c_idle
.work
);
735 wait_for_completion(&c_idle
.done
);
738 if (IS_ERR(c_idle
.idle
)) {
739 printk("failed fork for CPU %d\n", cpu
);
740 destroy_work_on_stack(&c_idle
.work
);
741 return PTR_ERR(c_idle
.idle
);
744 set_idle_for_cpu(cpu
, c_idle
.idle
);
746 per_cpu(current_task
, cpu
) = c_idle
.idle
;
748 /* Stack for startup_32 can be just as for start_secondary onwards */
751 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
752 initial_gs
= per_cpu_offset(cpu
);
753 per_cpu(kernel_stack
, cpu
) =
754 (unsigned long)task_stack_page(c_idle
.idle
) -
755 KERNEL_STACK_OFFSET
+ THREAD_SIZE
;
757 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
758 initial_code
= (unsigned long)start_secondary
;
759 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
761 /* start_ip had better be page-aligned! */
762 start_ip
= setup_trampoline();
764 /* So we see what's up */
765 announce_cpu(cpu
, apicid
);
768 * This grunge runs the startup process for
769 * the targeted processor.
772 atomic_set(&init_deasserted
, 0);
774 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
776 pr_debug("Setting warm reset code and vector.\n");
778 smpboot_setup_warm_reset_vector(start_ip
);
780 * Be paranoid about clearing APIC errors.
782 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
783 apic_write(APIC_ESR
, 0);
789 * Kick the secondary CPU. Use the method in the APIC driver
790 * if it's defined - or use an INIT boot APIC message otherwise:
792 if (apic
->wakeup_secondary_cpu
)
793 boot_error
= apic
->wakeup_secondary_cpu(apicid
, start_ip
);
795 boot_error
= wakeup_secondary_cpu_via_init(apicid
, start_ip
);
799 * allow APs to start initializing.
801 pr_debug("Before Callout %d.\n", cpu
);
802 cpumask_set_cpu(cpu
, cpu_callout_mask
);
803 pr_debug("After Callout %d.\n", cpu
);
806 * Wait 5s total for a response
808 for (timeout
= 0; timeout
< 50000; timeout
++) {
809 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
810 break; /* It has booted */
814 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
815 pr_debug("CPU%d: has booted.\n", cpu
);
818 if (*((volatile unsigned char *)trampoline_base
)
820 /* trampoline started but...? */
821 pr_err("CPU%d: Stuck ??\n", cpu
);
823 /* trampoline code not run */
824 pr_err("CPU%d: Not responding.\n", cpu
);
825 if (apic
->inquire_remote_apic
)
826 apic
->inquire_remote_apic(apicid
);
831 /* Try to put things back the way they were before ... */
832 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
834 /* was set by do_boot_cpu() */
835 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
837 /* was set by cpu_init() */
838 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
840 set_cpu_present(cpu
, false);
841 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
844 /* mark "stuck" area as not stuck */
845 *((volatile unsigned long *)trampoline_base
) = 0;
847 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
849 * Cleanup possible dangling ends...
851 smpboot_restore_warm_reset_vector();
854 destroy_work_on_stack(&c_idle
.work
);
858 int __cpuinit
native_cpu_up(unsigned int cpu
)
860 int apicid
= apic
->cpu_present_to_apicid(cpu
);
864 WARN_ON(irqs_disabled());
866 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
868 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
869 !physid_isset(apicid
, phys_cpu_present_map
)) {
870 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
875 * Already booted CPU?
877 if (cpumask_test_cpu(cpu
, cpu_callin_mask
)) {
878 pr_debug("do_boot_cpu %d Already started\n", cpu
);
883 * Save current MTRR state in case it was changed since early boot
884 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
888 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
891 /* init low mem mapping */
892 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
893 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
897 err
= do_boot_cpu(apicid
, cpu
);
899 zap_low_mappings(false);
902 err
= do_boot_cpu(apicid
, cpu
);
905 pr_debug("do_boot_cpu failed %d\n", err
);
910 * Check TSC synchronization with the AP (keep irqs disabled
913 local_irq_save(flags
);
914 check_tsc_sync_source(cpu
);
915 local_irq_restore(flags
);
917 while (!cpu_online(cpu
)) {
919 touch_nmi_watchdog();
926 * Fall back to non SMP mode after errors.
928 * RED-PEN audit/test this more. I bet there is more state messed up here.
930 static __init
void disable_smp(void)
932 init_cpu_present(cpumask_of(0));
933 init_cpu_possible(cpumask_of(0));
934 smpboot_clear_io_apic_irqs();
936 if (smp_found_config
)
937 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
939 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
940 map_cpu_to_logical_apicid();
941 cpumask_set_cpu(0, cpu_sibling_mask(0));
942 cpumask_set_cpu(0, cpu_core_mask(0));
946 * Various sanity checks.
948 static int __init
smp_sanity_check(unsigned max_cpus
)
952 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
953 if (def_to_bigsmp
&& nr_cpu_ids
> 8) {
958 "More than 8 CPUs detected - skipping them.\n"
959 "Use CONFIG_X86_BIGSMP.\n");
962 for_each_present_cpu(cpu
) {
964 set_cpu_present(cpu
, false);
969 for_each_possible_cpu(cpu
) {
971 set_cpu_possible(cpu
, false);
979 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
981 "weird, boot CPU (#%d) not listed by the BIOS.\n",
982 hard_smp_processor_id());
984 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
988 * If we couldn't find an SMP configuration at boot time,
989 * get out of here now!
991 if (!smp_found_config
&& !acpi_lapic
) {
993 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
995 if (APIC_init_uniprocessor())
996 printk(KERN_NOTICE
"Local APIC not detected."
997 " Using dummy APIC emulation.\n");
1002 * Should not be necessary because the MP table should list the boot
1003 * CPU too, but we do it for the sake of robustness anyway.
1005 if (!apic
->check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1007 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1008 boot_cpu_physical_apicid
);
1009 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1014 * If we couldn't find a local APIC, then get out of here now!
1016 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1018 if (!disable_apic
) {
1019 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1020 boot_cpu_physical_apicid
);
1021 pr_err("... forcing use of dummy APIC emulation."
1022 "(tell your hw vendor)\n");
1024 smpboot_clear_io_apic();
1025 arch_disable_smp_support();
1029 verify_local_APIC();
1032 * If SMP should be disabled, then really disable it!
1035 printk(KERN_INFO
"SMP mode deactivated.\n");
1036 smpboot_clear_io_apic();
1038 localise_nmi_watchdog();
1042 end_local_APIC_setup();
1049 static void __init
smp_cpu_index_default(void)
1052 struct cpuinfo_x86
*c
;
1054 for_each_possible_cpu(i
) {
1056 /* mark all to hotplug */
1057 c
->cpu_index
= nr_cpu_ids
;
1062 * Prepare for SMP bootup. The MP table or ACPI has been read
1063 * earlier. Just do some sanity checking here and enable APIC mode.
1065 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1070 smp_cpu_index_default();
1071 current_cpu_data
= boot_cpu_data
;
1072 cpumask_copy(cpu_callin_mask
, cpumask_of(0));
1075 * Setup boot CPU information
1077 smp_store_cpu_info(0); /* Final full version of the data */
1078 #ifdef CONFIG_X86_32
1079 boot_cpu_logical_apicid
= logical_smp_processor_id();
1081 current_thread_info()->cpu
= 0; /* needed? */
1082 for_each_possible_cpu(i
) {
1083 zalloc_cpumask_var(&per_cpu(cpu_sibling_map
, i
), GFP_KERNEL
);
1084 zalloc_cpumask_var(&per_cpu(cpu_core_map
, i
), GFP_KERNEL
);
1085 zalloc_cpumask_var(&cpu_data(i
).llc_shared_map
, GFP_KERNEL
);
1087 set_cpu_sibling_map(0);
1090 default_setup_apic_routing();
1092 if (smp_sanity_check(max_cpus
) < 0) {
1093 printk(KERN_INFO
"SMP disabled\n");
1099 if (read_apic_id() != boot_cpu_physical_apicid
) {
1100 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1101 read_apic_id(), boot_cpu_physical_apicid
);
1102 /* Or can we switch back to PIC here? */
1109 * Switch from PIC to APIC mode.
1114 * Enable IO APIC before setting up error vector
1116 if (!skip_ioapic_setup
&& nr_ioapics
)
1119 end_local_APIC_setup();
1121 map_cpu_to_logical_apicid();
1123 if (apic
->setup_portio_remap
)
1124 apic
->setup_portio_remap();
1126 smpboot_setup_io_apic();
1128 * Set up local APIC timer on boot CPU.
1131 printk(KERN_INFO
"CPU%d: ", 0);
1132 print_cpu_info(&cpu_data(0));
1133 x86_init
.timers
.setup_percpu_clockev();
1138 set_mtrr_aps_delayed_init();
1143 void arch_enable_nonboot_cpus_begin(void)
1145 set_mtrr_aps_delayed_init();
1148 void arch_enable_nonboot_cpus_end(void)
1154 * Early setup to make printk work.
1156 void __init
native_smp_prepare_boot_cpu(void)
1158 int me
= smp_processor_id();
1159 switch_to_new_gdt(me
);
1160 /* already set me in cpu_online_mask in boot_cpu_init() */
1161 cpumask_set_cpu(me
, cpu_callout_mask
);
1162 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1165 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1167 pr_debug("Boot done.\n");
1170 #ifdef CONFIG_X86_IO_APIC
1171 setup_ioapic_dest();
1173 check_nmi_watchdog();
1177 static int __initdata setup_possible_cpus
= -1;
1178 static int __init
_setup_possible_cpus(char *str
)
1180 get_option(&str
, &setup_possible_cpus
);
1183 early_param("possible_cpus", _setup_possible_cpus
);
1187 * cpu_possible_mask should be static, it cannot change as cpu's
1188 * are onlined, or offlined. The reason is per-cpu data-structures
1189 * are allocated by some modules at init time, and dont expect to
1190 * do this dynamically on cpu arrival/departure.
1191 * cpu_present_mask on the other hand can change dynamically.
1192 * In case when cpu_hotplug is not compiled, then we resort to current
1193 * behaviour, which is cpu_possible == cpu_present.
1196 * Three ways to find out the number of additional hotplug CPUs:
1197 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1198 * - The user can overwrite it with possible_cpus=NUM
1199 * - Otherwise don't reserve additional CPUs.
1200 * We do this because additional CPUs waste a lot of memory.
1203 __init
void prefill_possible_map(void)
1207 /* no processor from mptable or madt */
1208 if (!num_processors
)
1211 if (setup_possible_cpus
== -1)
1212 possible
= num_processors
+ disabled_cpus
;
1214 possible
= setup_possible_cpus
;
1216 total_cpus
= max_t(int, possible
, num_processors
+ disabled_cpus
);
1218 if (possible
> CONFIG_NR_CPUS
) {
1220 "%d Processors exceeds NR_CPUS limit of %d\n",
1221 possible
, CONFIG_NR_CPUS
);
1222 possible
= CONFIG_NR_CPUS
;
1225 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1226 possible
, max_t(int, possible
- num_processors
, 0));
1228 for (i
= 0; i
< possible
; i
++)
1229 set_cpu_possible(i
, true);
1231 nr_cpu_ids
= possible
;
1234 #ifdef CONFIG_HOTPLUG_CPU
1236 static void remove_siblinginfo(int cpu
)
1239 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1241 for_each_cpu(sibling
, cpu_core_mask(cpu
)) {
1242 cpumask_clear_cpu(cpu
, cpu_core_mask(sibling
));
1244 * last thread sibling in this cpu core going down
1246 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1)
1247 cpu_data(sibling
).booted_cores
--;
1250 for_each_cpu(sibling
, cpu_sibling_mask(cpu
))
1251 cpumask_clear_cpu(cpu
, cpu_sibling_mask(sibling
));
1252 cpumask_clear(cpu_sibling_mask(cpu
));
1253 cpumask_clear(cpu_core_mask(cpu
));
1254 c
->phys_proc_id
= 0;
1256 cpumask_clear_cpu(cpu
, cpu_sibling_setup_mask
);
1259 static void __ref
remove_cpu_from_maps(int cpu
)
1261 set_cpu_online(cpu
, false);
1262 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
1263 cpumask_clear_cpu(cpu
, cpu_callin_mask
);
1264 /* was set by cpu_init() */
1265 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
1266 numa_remove_cpu(cpu
);
1269 void cpu_disable_common(void)
1271 int cpu
= smp_processor_id();
1273 remove_siblinginfo(cpu
);
1275 /* It's now safe to remove this processor from the online map */
1277 remove_cpu_from_maps(cpu
);
1278 unlock_vector_lock();
1282 int native_cpu_disable(void)
1284 int cpu
= smp_processor_id();
1287 * Perhaps use cpufreq to drop frequency, but that could go
1288 * into generic code.
1290 * We won't take down the boot processor on i386 due to some
1291 * interrupts only being able to be serviced by the BSP.
1292 * Especially so if we're not using an IOAPIC -zwane
1297 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1298 stop_apic_nmi_watchdog(NULL
);
1301 cpu_disable_common();
1305 void native_cpu_die(unsigned int cpu
)
1307 /* We don't do anything here: idle task is faking death itself. */
1310 for (i
= 0; i
< 10; i
++) {
1311 /* They ack this in play_dead by setting CPU_DEAD */
1312 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1313 if (system_state
== SYSTEM_RUNNING
)
1314 pr_info("CPU %u is now offline\n", cpu
);
1316 if (1 == num_online_cpus())
1317 alternatives_smp_switch(0);
1322 pr_err("CPU %u didn't die...\n", cpu
);
1325 void play_dead_common(void)
1328 reset_lazy_tlbstate();
1329 irq_ctx_exit(raw_smp_processor_id());
1330 c1e_remove_cpu(raw_smp_processor_id());
1334 __get_cpu_var(cpu_state
) = CPU_DEAD
;
1337 * With physical CPU hotplug, we should halt the cpu
1339 local_irq_disable();
1342 void native_play_dead(void)
1345 tboot_shutdown(TB_SHUTDOWN_WFS
);
1349 #else /* ... !CONFIG_HOTPLUG_CPU */
1350 int native_cpu_disable(void)
1355 void native_cpu_die(unsigned int cpu
)
1357 /* We said "no" in __cpu_disable */
1361 void native_play_dead(void)