drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24
  25 #include "xhci.h"
  26
  27 /* Device for a quirk */
  28 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  29 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  30
  31 #define PCI_VENDOR_ID_ETRON             0x1b6f
  32 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
  33
  34 static const char hcd_name[] = "xhci_hcd";
  35
  36 /* called after powerup, by probe or system-pm "wakeup" */
  37 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  38 {
  39         /*
  40          * TODO: Implement finding debug ports later.
  41          * TODO: see if there are any quirks that need to be added to handle
  42          * new extended capabilities.
  43          */
  44
  45         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  46         if (!pci_set_mwi(pdev))
  47                 xhci_dbg(xhci, "MWI active\n");
  48
  49         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  50         return 0;
  51 }
  52
  53 /* called during probe() after chip reset completes */
  54 static int xhci_pci_setup(struct usb_hcd *hcd)
  55 {
  56         struct xhci_hcd         *xhci;
  57         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
  58         int                     retval;
  59         u32                     temp;
  60
  61         hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
  62
  63         if (usb_hcd_is_primary_hcd(hcd)) {
  64                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
  65                 if (!xhci)
  66                         return -ENOMEM;
  67                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
  68                 xhci->main_hcd = hcd;
  69                 /* Mark the first roothub as being USB 2.0.
  70                  * The xHCI driver will register the USB 3.0 roothub.
  71                  */
  72                 hcd->speed = HCD_USB2;
  73                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
  74                 /*
  75                  * USB 2.0 roothub under xHCI has an integrated TT,
  76                  * (rate matching hub) as opposed to having an OHCI/UHCI
  77                  * companion controller.
  78                  */
  79                 hcd->has_tt = 1;
  80         } else {
  81                 /* xHCI private pointer was set in xhci_pci_probe for the second
  82                  * registered roothub.
  83                  */
  84                 xhci = hcd_to_xhci(hcd);
  85                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
  86                 if (HCC_64BIT_ADDR(temp)) {
  87                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
  88                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
  89                 } else {
  90                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
  91                 }
  92                 return 0;
  93         }
  94
  95         xhci->cap_regs = hcd->regs;
  96         xhci->op_regs = hcd->regs +
  97                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
  98         xhci->run_regs = hcd->regs +
  99                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
 100         /* Cache read-only capability registers */
 101         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
 102         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
 103         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
 104         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
 105         xhci->hci_version = HC_VERSION(xhci->hcc_params);
 106         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
 107         xhci_print_registers(xhci);
 108
 109         /* Look for vendor-specific quirks */
 110         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 111                         pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
 112                 if (pdev->revision == 0x0) {
 113                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
 114                         xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
 115                                         " endpoint cmd after reset endpoint\n");
 116                 }
 117                 /* Fresco Logic confirms: all revisions of this chip do not
 118                  * support MSI, even though some of them claim to in their PCI
 119                  * capabilities.
 120                  */
 121                 xhci->quirks |= XHCI_BROKEN_MSI;
 122                 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
 123                                 "has broken MSI implementation\n",
 124                                 pdev->revision);
 125         }
 126         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 127                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
 128                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 129                 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
 130         }
 131
 132         if (pdev->vendor == PCI_VENDOR_ID_NEC)
 133                 xhci->quirks |= XHCI_NEC_HOST;
 134
 135         /* AMD PLL quirk */
 136         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 137                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 138
 139         /* Make sure the HC is halted. */
 140         retval = xhci_halt(xhci);
 141         if (retval)
 142                 goto error;
 143
 144         xhci_dbg(xhci, "Resetting HCD\n");
 145         /* Reset the internal HC memory state and registers. */
 146         retval = xhci_reset(xhci);
 147         if (retval)
 148                 goto error;
 149         xhci_dbg(xhci, "Reset complete\n");
 150
 151         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
 152         if (HCC_64BIT_ADDR(temp)) {
 153                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
 154                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
 155         } else {
 156                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
 157         }
 158
 159         xhci_dbg(xhci, "Calling HCD init\n");
 160         /* Initialize HCD and host controller data structures. */
 161         retval = xhci_init(hcd);
 162         if (retval)
 163                 goto error;
 164         xhci_dbg(xhci, "Called HCD init\n");
 165
 166         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 167         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 168
 169         /* Find any debug ports */
 170         retval = xhci_pci_reinit(xhci, pdev);
 171         if (!retval)
 172                 return retval;
 173
 174 error:
 175         kfree(xhci);
 176         return retval;
 177 }
 178
 179 /*
 180  * We need to register our own PCI probe function (instead of the USB core's
 181  * function) in order to create a second roothub under xHCI.
 182  */
 183 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 184 {
 185         int retval;
 186         struct xhci_hcd *xhci;
 187         struct hc_driver *driver;
 188         struct usb_hcd *hcd;
 189
 190         driver = (struct hc_driver *)id->driver_data;
 191         /* Register the USB 2.0 roothub.
 192          * FIXME: USB core must know to register the USB 2.0 roothub first.
 193          * This is sort of silly, because we could just set the HCD driver flags
 194          * to say USB 2.0, but I'm not sure what the implications would be in
 195          * the other parts of the HCD code.
 196          */
 197         retval = usb_hcd_pci_probe(dev, id);
 198
 199         if (retval)
 200                 return retval;
 201
 202         /* USB 2.0 roothub is stored in the PCI device now. */
 203         hcd = dev_get_drvdata(&dev->dev);
 204         xhci = hcd_to_xhci(hcd);
 205         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 206                                 pci_name(dev), hcd);
 207         if (!xhci->shared_hcd) {
 208                 retval = -ENOMEM;
 209                 goto dealloc_usb2_hcd;
 210         }
 211
 212         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 213          * is called by usb_add_hcd().
 214          */
 215         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 216
 217         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 218                         IRQF_DISABLED | IRQF_SHARED);
 219         if (retval)
 220                 goto put_usb3_hcd;
 221         /* Roothub already marked as USB 3.0 speed */
 222         return 0;
 223
 224 put_usb3_hcd:
 225         usb_put_hcd(xhci->shared_hcd);
 226 dealloc_usb2_hcd:
 227         usb_hcd_pci_remove(dev);
 228         return retval;
 229 }
 230
 231 static void xhci_pci_remove(struct pci_dev *dev)
 232 {
 233         struct xhci_hcd *xhci;
 234
 235         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 236         if (xhci->shared_hcd) {
 237                 usb_remove_hcd(xhci->shared_hcd);
 238                 usb_put_hcd(xhci->shared_hcd);
 239         }
 240         usb_hcd_pci_remove(dev);
 241         kfree(xhci);
 242 }
 243
 244 #ifdef CONFIG_PM
 245 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 246 {
 247         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 248         int     retval = 0;
 249
 250         if (hcd->state != HC_STATE_SUSPENDED ||
 251                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
 252                 return -EINVAL;
 253
 254         retval = xhci_suspend(xhci);
 255
 256         return retval;
 257 }
 258
 259 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 260 {
 261         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 262         int                     retval = 0;
 263
 264         retval = xhci_resume(xhci, hibernated);
 265         return retval;
 266 }
 267 #endif /* CONFIG_PM */
 268
 269 static const struct hc_driver xhci_pci_hc_driver = {
 270         .description =          hcd_name,
 271         .product_desc =         "xHCI Host Controller",
 272         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 273
 274         /*
 275          * generic hardware linkage
 276          */
 277         .irq =                  xhci_irq,
 278         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 279
 280         /*
 281          * basic lifecycle operations
 282          */
 283         .reset =                xhci_pci_setup,
 284         .start =                xhci_run,
 285 #ifdef CONFIG_PM
 286         .pci_suspend =          xhci_pci_suspend,
 287         .pci_resume =           xhci_pci_resume,
 288 #endif
 289         .stop =                 xhci_stop,
 290         .shutdown =             xhci_shutdown,
 291
 292         /*
 293          * managing i/o requests and associated device resources
 294          */
 295         .urb_enqueue =          xhci_urb_enqueue,
 296         .urb_dequeue =          xhci_urb_dequeue,
 297         .alloc_dev =            xhci_alloc_dev,
 298         .free_dev =             xhci_free_dev,
 299         .alloc_streams =        xhci_alloc_streams,
 300         .free_streams =         xhci_free_streams,
 301         .add_endpoint =         xhci_add_endpoint,
 302         .drop_endpoint =        xhci_drop_endpoint,
 303         .endpoint_reset =       xhci_endpoint_reset,
 304         .check_bandwidth =      xhci_check_bandwidth,
 305         .reset_bandwidth =      xhci_reset_bandwidth,
 306         .address_device =       xhci_address_device,
 307         .update_hub_device =    xhci_update_hub_device,
 308         .reset_device =         xhci_discover_or_reset_device,
 309
 310         /*
 311          * scheduling support
 312          */
 313         .get_frame_number =     xhci_get_frame,
 314
 315         /* Root hub support */
 316         .hub_control =          xhci_hub_control,
 317         .hub_status_data =      xhci_hub_status_data,
 318         .bus_suspend =          xhci_bus_suspend,
 319         .bus_resume =           xhci_bus_resume,
 320 };
 321
 322 /*-------------------------------------------------------------------------*/
 323
 324 /* PCI driver selection metadata; PCI hotplugging uses this */
 325 static const struct pci_device_id pci_ids[] = { {
 326         /* handle any USB 3.0 xHCI controller */
 327         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 328         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 329         },
 330         { /* end: all zeroes */ }
 331 };
 332 MODULE_DEVICE_TABLE(pci, pci_ids);
 333
 334 /* pci driver glue; this is a "new style" PCI driver module */
 335 static struct pci_driver xhci_pci_driver = {
 336         .name =         (char *) hcd_name,
 337         .id_table =     pci_ids,
 338
 339         .probe =        xhci_pci_probe,
 340         .remove =       xhci_pci_remove,
 341         /* suspend and resume implemented later */
 342
 343         .shutdown =     usb_hcd_pci_shutdown,
 344 #ifdef CONFIG_PM_SLEEP
 345         .driver = {
 346                 .pm = &usb_hcd_pci_pm_ops
 347         },
 348 #endif
 349 };
 350
 351 int xhci_register_pci(void)
 352 {
 353         return pci_register_driver(&xhci_pci_driver);
 354 }
 355
 356 void xhci_unregister_pci(void)
 357 {
 358         pci_unregister_driver(&xhci_pci_driver);
 359 }