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Staging: rtl8192su: remove dead code
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / rtl8192su / r8192U_core.c
blob1de487bed38b5945b65e3d29c9cb0b6f76123b6c
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
27 #ifndef CONFIG_FORCE_HARD_FLOAT
28 double __floatsidf (int i) { return i; }
29 unsigned int __fixunsdfsi (double d) { return d; }
30 double __adddf3(double a, double b) { return a+b; }
31 double __addsf3(float a, float b) { return a+b; }
32 double __subdf3(double a, double b) { return a-b; }
33 double __extendsfdf2(float a) {return a;}
34 #endif
35
36 #undef LOOP_TEST
37 #undef DUMP_RX
38 #undef DUMP_TX
39 #undef DEBUG_TX_DESC2
40 #undef RX_DONT_PASS_UL
41 #undef DEBUG_EPROM
42 #undef DEBUG_RX_VERBOSE
43 #undef DUMMY_RX
44 #undef DEBUG_ZERO_RX
45 #undef DEBUG_RX_SKB
46 #undef DEBUG_TX_FRAG
47 #undef DEBUG_RX_FRAG
48 #undef DEBUG_TX_FILLDESC
49 #undef DEBUG_TX
50 #undef DEBUG_IRQ
51 #undef DEBUG_RX
52 #undef DEBUG_RXALLOC
53 #undef DEBUG_REGISTERS
54 #undef DEBUG_RING
55 #undef DEBUG_IRQ_TASKLET
56 #undef DEBUG_TX_ALLOC
57 #undef DEBUG_TX_DESC
58
59 #define CONFIG_RTL8192_IO_MAP
60
61 #include <asm/uaccess.h>
62 #include "r8192U.h"
63 //#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
64 #include "r8180_93cx6.h" /* Card EEPROM */
65 #include "r8192U_wx.h"
66
67 #include "r8192S_rtl8225.h"
68 #include "r8192S_hw.h"
69 #include "r8192S_phy.h"
70 #include "r8192S_phyreg.h"
71 #include "r8192S_Efuse.h"
72
73 #include "r819xU_cmdpkt.h"
74 #include "r8192U_dm.h"
75 //#include "r8192xU_phyreg.h"
76 #include <linux/usb.h>
77
78 #include "r8192U_pm.h"
79
80 #include "ieee80211/dot11d.h"
81
82
83
84 u32 rt_global_debug_component = \
85 // COMP_TRACE |
86 // COMP_DBG |
87 // COMP_INIT |
88 // COMP_RECV |
89 // COMP_SEND |
90 // COMP_IO |
91 COMP_POWER |
92 // COMP_EPROM |
93 COMP_SWBW |
94 COMP_POWER_TRACKING |
95 COMP_TURBO |
96 COMP_QOS |
97 // COMP_RATE |
98 // COMP_RM |
99 COMP_DIG |
100 // COMP_EFUSE |
101 // COMP_CH |
102 // COMP_TXAGC |
103 COMP_HIPWR |
104 // COMP_HALDM |
105 COMP_SEC |
106 COMP_LED |
107 // COMP_RF |
108 // COMP_RXDESC |
109 COMP_FIRMWARE |
110 COMP_HT |
111 COMP_AMSDU |
112 COMP_SCAN |
113 // COMP_CMD |
114 COMP_DOWN |
115 COMP_RESET |
116 COMP_ERR; //always open err flags on
117
118 #define TOTAL_CAM_ENTRY 32
119 #define CAM_CONTENT_COUNT 8
120
121 static struct usb_device_id rtl8192_usb_id_tbl[] = {
122 /* Realtek */
123 {USB_DEVICE(0x0bda, 0x8192)},
124 {USB_DEVICE(0x0bda, 0x8709)},
125 /* Corega */
126 {USB_DEVICE(0x07aa, 0x0043)},
127 /* Belkin */
128 {USB_DEVICE(0x050d, 0x805E)},
129 /* Sitecom */
130 {USB_DEVICE(0x0df6, 0x0031)},
131 /* EnGenius */
132 {USB_DEVICE(0x1740, 0x9201)},
133 /* Dlink */
134 {USB_DEVICE(0x2001, 0x3301)},
135 /* Zinwell */
136 {USB_DEVICE(0x5a57, 0x0290)},
137 //92SU
138 {USB_DEVICE(0x0bda, 0x8172)},
139 {}
140 };
141
142 MODULE_LICENSE("GPL");
143 MODULE_VERSION("V 1.1");
144 MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
145 MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
146
147 static char* ifname = "wlan%d";
148 static int hwwep = 1; //default use hw. set 0 to use software security
149 static int channels = 0x3fff;
150
151
152
153 module_param(ifname, charp, S_IRUGO|S_IWUSR );
154 //module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
155 module_param(hwwep,int, S_IRUGO|S_IWUSR);
156 module_param(channels,int, S_IRUGO|S_IWUSR);
157
158 MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
159 //MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
160 MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
161 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
162
163 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
164 const struct usb_device_id *id);
165 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
166
167 static struct usb_driver rtl8192_usb_driver = {
168 .name = RTL819xU_MODULE_NAME, /* Driver name */
169 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
170 .probe = rtl8192_usb_probe, /* probe fn */
171 .disconnect = rtl8192_usb_disconnect, /* remove fn */
172 .suspend = rtl8192U_suspend, /* PM suspend fn */
173 .resume = rtl8192U_resume, /* PM resume fn */
174 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
175 };
176
177
178 static void rtl8192SU_read_eeprom_info(struct net_device *dev);
179 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
180 void rtl8192SU_rx_nomal(struct sk_buff* skb);
181 void rtl8192SU_rx_cmd(struct sk_buff *skb);
182 bool rtl8192SU_adapter_start(struct net_device *dev);
183 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
184 void rtl8192SU_link_change(struct net_device *dev);
185 void InitialGain8192S(struct net_device *dev,u8 Operation);
186 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
187
188 struct rtl819x_ops rtl8192su_ops = {
189 .nic_type = NIC_8192SU,
190 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
191 .rtl819x_tx = rtl8192SU_tx,
192 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
193 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
194 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
195 .rtl819x_adapter_start = rtl8192SU_adapter_start,
196 .rtl819x_link_change = rtl8192SU_link_change,
197 .rtl819x_initial_gain = InitialGain8192S,
198 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
199 };
200
201
202 typedef struct _CHANNEL_LIST
203 {
204 u8 Channel[32];
205 u8 Len;
206 }CHANNEL_LIST, *PCHANNEL_LIST;
207
208 static CHANNEL_LIST ChannelPlan[] = {
209 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
210 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
214 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
215 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
216 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
217 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
218 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
219 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
220 };
221
222 static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
223 {
224 int i, max_chan=-1, min_chan=-1;
225 struct ieee80211_device* ieee = priv->ieee80211;
226 switch (channel_plan)
227 {
228 case COUNTRY_CODE_FCC:
229 case COUNTRY_CODE_IC:
230 case COUNTRY_CODE_ETSI:
231 case COUNTRY_CODE_SPAIN:
232 case COUNTRY_CODE_FRANCE:
233 case COUNTRY_CODE_MKK:
234 case COUNTRY_CODE_MKK1:
235 case COUNTRY_CODE_ISRAEL:
236 case COUNTRY_CODE_TELEC:
237 case COUNTRY_CODE_MIC:
238 {
239 Dot11d_Init(ieee);
240 ieee->bGlobalDomain = false;
241 //acturally 8225 & 8256 rf chip only support B,G,24N mode
242 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
243 {
244 min_chan = 1;
245 max_chan = 14;
246 }
247 else
248 {
249 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
250 }
251 if (ChannelPlan[channel_plan].Len != 0){
252 // Clear old channel map
253 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
254 // Set new channel map
255 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
256 {
257 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
258 break;
259 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
260 }
261 }
262 break;
263 }
264 case COUNTRY_CODE_GLOBAL_DOMAIN:
265 {
266 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
267 Dot11d_Reset(ieee);
268 ieee->bGlobalDomain = true;
269 break;
270 }
271 default:
272 break;
273 }
274 return;
275 }
276
277 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
278
279 #define rx_hal_is_cck_rate(_pDesc)\
280 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
281 _pDesc->RxMCS == DESC92S_RATE2M ||\
282 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
283 _pDesc->RxMCS == DESC92S_RATE11M) &&\
284 !_pDesc->RxHT)
285
286 #define tx_hal_is_cck_rate(_DataRate)\
287 ( _DataRate == MGN_1M ||\
288 _DataRate == MGN_2M ||\
289 _DataRate == MGN_5_5M ||\
290 _DataRate == MGN_11M )
291
292
293
294
295 void CamResetAllEntry(struct net_device *dev)
296 {
297 #if 1
298 u32 ulcommand = 0;
299 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
300 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
301 // In this condition, Cam can not be reset because upper layer will not set this static key again.
302 //if(Adapter->EncAlgorithm == WEP_Encryption)
303 // return;
304 //debug
305 //DbgPrint("========================================\n");
306 //DbgPrint(" Call ResetAllEntry \n");
307 //DbgPrint("========================================\n\n");
308 ulcommand |= BIT31|BIT30;
309 write_nic_dword(dev, RWCAM, ulcommand);
310 #else
311 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
312 CAM_mark_invalid(dev, ucIndex);
313 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
314 CAM_empty_entry(dev, ucIndex);
315 #endif
316
317 }
318
319
320 void write_cam(struct net_device *dev, u8 addr, u32 data)
321 {
322 write_nic_dword(dev, WCAMI, data);
323 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
324 }
325
326 u32 read_cam(struct net_device *dev, u8 addr)
327 {
328 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
329 return read_nic_dword(dev, 0xa8);
330 }
331
332 void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
333 {
334 int status;
335 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
336 struct usb_device *udev = priv->udev;
337
338 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
339 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
340 indx|0xfe00, 0, &data, 1, HZ / 2);
341
342 if (status < 0)
343 {
344 printk("write_nic_byte_E TimeOut! status:%d\n", status);
345 }
346 }
347
348 u8 read_nic_byte_E(struct net_device *dev, int indx)
349 {
350 int status;
351 u8 data;
352 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
353 struct usb_device *udev = priv->udev;
354
355 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
356 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
357 indx|0xfe00, 0, &data, 1, HZ / 2);
358
359 if (status < 0)
360 {
361 printk("read_nic_byte_E TimeOut! status:%d\n", status);
362 }
363
364 return data;
365 }
366 //as 92U has extend page from 4 to 16, so modify functions below.
367 void write_nic_byte(struct net_device *dev, int indx, u8 data)
368 {
369 int status;
370
371 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
372 struct usb_device *udev = priv->udev;
373
374 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
375 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
376 indx, 0, &data, 1, HZ / 2);
377
378 if (status < 0)
379 {
380 printk("write_nic_byte TimeOut! status:%d\n", status);
381 }
382
383
384 }
385
386
387 void write_nic_word(struct net_device *dev, int indx, u16 data)
388 {
389
390 int status;
391
392 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
393 struct usb_device *udev = priv->udev;
394
395 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
396 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
397 indx, 0, &data, 2, HZ / 2);
398
399 if (status < 0)
400 {
401 printk("write_nic_word TimeOut! status:%d\n", status);
402 }
403
404 }
405
406
407 void write_nic_dword(struct net_device *dev, int indx, u32 data)
408 {
409
410 int status;
411
412 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
413 struct usb_device *udev = priv->udev;
414
415 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
416 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
417 indx, 0, &data, 4, HZ / 2);
418
419
420 if (status < 0)
421 {
422 printk("write_nic_dword TimeOut! status:%d\n", status);
423 }
424
425 }
426
427
428
429 u8 read_nic_byte(struct net_device *dev, int indx)
430 {
431 u8 data;
432 int status;
433 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
434 struct usb_device *udev = priv->udev;
435
436 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
437 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
438 indx, 0, &data, 1, HZ / 2);
439
440 if (status < 0)
441 {
442 printk("read_nic_byte TimeOut! status:%d\n", status);
443 }
444
445 return data;
446 }
447
448
449
450 u16 read_nic_word(struct net_device *dev, int indx)
451 {
452 u16 data;
453 int status;
454 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
455 struct usb_device *udev = priv->udev;
456
457 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
458 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
459 indx, 0, &data, 2, HZ / 2);
460
461 if (status < 0)
462 {
463 printk("read_nic_word TimeOut! status:%d\n", status);
464 }
465
466
467 return data;
468 }
469
470 u16 read_nic_word_E(struct net_device *dev, int indx)
471 {
472 u16 data;
473 int status;
474 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
475 struct usb_device *udev = priv->udev;
476
477 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
478 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
479 indx|0xfe00, 0, &data, 2, HZ / 2);
480
481 if (status < 0)
482 {
483 printk("read_nic_word TimeOut! status:%d\n", status);
484 }
485
486
487 return data;
488 }
489
490 u32 read_nic_dword(struct net_device *dev, int indx)
491 {
492 u32 data;
493 int status;
494 // int result;
495
496 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
497 struct usb_device *udev = priv->udev;
498
499 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
500 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
501 indx, 0, &data, 4, HZ / 2);
502 // if(0 != result) {
503 // printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
504 // }
505
506 if (status < 0)
507 {
508 printk("read_nic_dword TimeOut! status:%d\n", status);
509 if(status == -ENODEV) {
510 priv->usb_error = true;
511 }
512 }
513
514
515
516 return data;
517 }
518
519
520 //u8 read_phy_cck(struct net_device *dev, u8 adr);
521 //u8 read_phy_ofdm(struct net_device *dev, u8 adr);
522 /* this might still called in what was the PHY rtl8185/rtl8192 common code
523 * plans are to possibilty turn it again in one common code...
524 */
525 inline void force_pci_posting(struct net_device *dev)
526 {
527 }
528
529
530 static struct net_device_stats *rtl8192_stats(struct net_device *dev);
531 void rtl8192_commit(struct net_device *dev);
532 //void rtl8192_restart(struct net_device *dev);
533 void rtl8192_restart(struct work_struct *work);
534 //void rtl8192_rq_tx_ack(struct work_struct *work);
535
536 void watch_dog_timer_callback(unsigned long data);
537
538 /****************************************************************************
539 -----------------------------PROCFS STUFF-------------------------
540 *****************************************************************************/
541
542 static struct proc_dir_entry *rtl8192_proc = NULL;
543
544
545
546 static int proc_get_stats_ap(char *page, char **start,
547 off_t offset, int count,
548 int *eof, void *data)
549 {
550 struct net_device *dev = data;
551 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
552 struct ieee80211_device *ieee = priv->ieee80211;
553 struct ieee80211_network *target;
554
555 int len = 0;
556
557 list_for_each_entry(target, &ieee->network_list, list) {
558
559 len += snprintf(page + len, count - len,
560 "%s ", target->ssid);
561
562 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
563 len += snprintf(page + len, count - len,
564 "WPA\n");
565 }
566 else{
567 len += snprintf(page + len, count - len,
568 "non_WPA\n");
569 }
570
571 }
572
573 *eof = 1;
574 return len;
575 }
576
577 static int proc_get_registers(char *page, char **start,
578 off_t offset, int count,
579 int *eof, void *data)
580 {
581 struct net_device *dev = data;
582 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
583
584 int len = 0;
585 int i,n,page0,page1,page2;
586
587 int max=0xff;
588 page0 = 0x000;
589 page1 = 0x100;
590 page2 = 0x800;
591
592 /* This dump the current register page */
593 if(!IS_BB_REG_OFFSET_92S(page0)){
594 len += snprintf(page + len, count - len,
595 "\n####################page %x##################\n ", (page0>>8));
596 for(n=0;n<=max;)
597 {
598 len += snprintf(page + len, count - len,
599 "\nD: %2x > ",n);
600 for(i=0;i<16 && n<=max;i++,n++)
601 len += snprintf(page + len, count - len,
602 "%2.2x ",read_nic_byte(dev,(page0|n)));
603 }
604 }else{
605 len += snprintf(page + len, count - len,
606 "\n####################page %x##################\n ", (page0>>8));
607 for(n=0;n<=max;)
608 {
609 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
610 for(i=0;i<4 && n<=max;n+=4,i++)
611 len += snprintf(page + len, count - len,
612 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
613 }
614 }
615 len += snprintf(page + len, count - len,"\n");
616 *eof = 1;
617 return len;
618
619 }
620 static int proc_get_registers_1(char *page, char **start,
621 off_t offset, int count,
622 int *eof, void *data)
623 {
624 struct net_device *dev = data;
625 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
626
627 int len = 0;
628 int i,n,page0;
629
630 int max=0xff;
631 page0 = 0x100;
632
633 /* This dump the current register page */
634 len += snprintf(page + len, count - len,
635 "\n####################page %x##################\n ", (page0>>8));
636 for(n=0;n<=max;)
637 {
638 len += snprintf(page + len, count - len,
639 "\nD: %2x > ",n);
640 for(i=0;i<16 && n<=max;i++,n++)
641 len += snprintf(page + len, count - len,
642 "%2.2x ",read_nic_byte(dev,(page0|n)));
643 }
644 len += snprintf(page + len, count - len,"\n");
645 *eof = 1;
646 return len;
647
648 }
649 static int proc_get_registers_2(char *page, char **start,
650 off_t offset, int count,
651 int *eof, void *data)
652 {
653 struct net_device *dev = data;
654 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
655
656 int len = 0;
657 int i,n,page0;
658
659 int max=0xff;
660 page0 = 0x200;
661
662 /* This dump the current register page */
663 len += snprintf(page + len, count - len,
664 "\n####################page %x##################\n ", (page0>>8));
665 for(n=0;n<=max;)
666 {
667 len += snprintf(page + len, count - len,
668 "\nD: %2x > ",n);
669 for(i=0;i<16 && n<=max;i++,n++)
670 len += snprintf(page + len, count - len,
671 "%2.2x ",read_nic_byte(dev,(page0|n)));
672 }
673 len += snprintf(page + len, count - len,"\n");
674 *eof = 1;
675 return len;
676
677 }
678 static int proc_get_registers_8(char *page, char **start,
679 off_t offset, int count,
680 int *eof, void *data)
681 {
682 struct net_device *dev = data;
683
684 int len = 0;
685 int i,n,page0;
686
687 int max=0xff;
688 page0 = 0x800;
689
690 /* This dump the current register page */
691 len += snprintf(page + len, count - len,
692 "\n####################page %x##################\n ", (page0>>8));
693 for(n=0;n<=max;)
694 {
695 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
696 for(i=0;i<4 && n<=max;n+=4,i++)
697 len += snprintf(page + len, count - len,
698 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
699 }
700 len += snprintf(page + len, count - len,"\n");
701 *eof = 1;
702 return len;
703
704 }
705 static int proc_get_registers_9(char *page, char **start,
706 off_t offset, int count,
707 int *eof, void *data)
708 {
709 struct net_device *dev = data;
710 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
711
712 int len = 0;
713 int i,n,page0;
714
715 int max=0xff;
716 page0 = 0x900;
717
718 /* This dump the current register page */
719 len += snprintf(page + len, count - len,
720 "\n####################page %x##################\n ", (page0>>8));
721 for(n=0;n<=max;)
722 {
723 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
724 for(i=0;i<4 && n<=max;n+=4,i++)
725 len += snprintf(page + len, count - len,
726 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
727 }
728 len += snprintf(page + len, count - len,"\n");
729 *eof = 1;
730 return len;
731 }
732 static int proc_get_registers_a(char *page, char **start,
733 off_t offset, int count,
734 int *eof, void *data)
735 {
736 struct net_device *dev = data;
737 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
738
739 int len = 0;
740 int i,n,page0;
741
742 int max=0xff;
743 page0 = 0xa00;
744
745 /* This dump the current register page */
746 len += snprintf(page + len, count - len,
747 "\n####################page %x##################\n ", (page0>>8));
748 for(n=0;n<=max;)
749 {
750 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
751 for(i=0;i<4 && n<=max;n+=4,i++)
752 len += snprintf(page + len, count - len,
753 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
754 }
755 len += snprintf(page + len, count - len,"\n");
756 *eof = 1;
757 return len;
758 }
759 static int proc_get_registers_b(char *page, char **start,
760 off_t offset, int count,
761 int *eof, void *data)
762 {
763 struct net_device *dev = data;
764 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
765
766 int len = 0;
767 int i,n,page0;
768
769 int max=0xff;
770 page0 = 0xb00;
771
772 /* This dump the current register page */
773 len += snprintf(page + len, count - len,
774 "\n####################page %x##################\n ", (page0>>8));
775 for(n=0;n<=max;)
776 {
777 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
778 for(i=0;i<4 && n<=max;n+=4,i++)
779 len += snprintf(page + len, count - len,
780 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
781 }
782 len += snprintf(page + len, count - len,"\n");
783 *eof = 1;
784 return len;
785 }
786 static int proc_get_registers_c(char *page, char **start,
787 off_t offset, int count,
788 int *eof, void *data)
789 {
790 struct net_device *dev = data;
791 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
792
793 int len = 0;
794 int i,n,page0;
795
796 int max=0xff;
797 page0 = 0xc00;
798
799 /* This dump the current register page */
800 len += snprintf(page + len, count - len,
801 "\n####################page %x##################\n ", (page0>>8));
802 for(n=0;n<=max;)
803 {
804 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
805 for(i=0;i<4 && n<=max;n+=4,i++)
806 len += snprintf(page + len, count - len,
807 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
808 }
809 len += snprintf(page + len, count - len,"\n");
810 *eof = 1;
811 return len;
812 }
813 static int proc_get_registers_d(char *page, char **start,
814 off_t offset, int count,
815 int *eof, void *data)
816 {
817 struct net_device *dev = data;
818 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
819
820 int len = 0;
821 int i,n,page0;
822
823 int max=0xff;
824 page0 = 0xd00;
825
826 /* This dump the current register page */
827 len += snprintf(page + len, count - len,
828 "\n####################page %x##################\n ", (page0>>8));
829 for(n=0;n<=max;)
830 {
831 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
832 for(i=0;i<4 && n<=max;n+=4,i++)
833 len += snprintf(page + len, count - len,
834 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
835 }
836 len += snprintf(page + len, count - len,"\n");
837 *eof = 1;
838 return len;
839 }
840 static int proc_get_registers_e(char *page, char **start,
841 off_t offset, int count,
842 int *eof, void *data)
843 {
844 struct net_device *dev = data;
845 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
846
847 int len = 0;
848 int i,n,page0;
849
850 int max=0xff;
851 page0 = 0xe00;
852
853 /* This dump the current register page */
854 len += snprintf(page + len, count - len,
855 "\n####################page %x##################\n ", (page0>>8));
856 for(n=0;n<=max;)
857 {
858 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
859 for(i=0;i<4 && n<=max;n+=4,i++)
860 len += snprintf(page + len, count - len,
861 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
862 }
863 len += snprintf(page + len, count - len,"\n");
864 *eof = 1;
865 return len;
866 }
867
868 static int proc_get_stats_tx(char *page, char **start,
869 off_t offset, int count,
870 int *eof, void *data)
871 {
872 struct net_device *dev = data;
873 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
874
875 int len = 0;
876
877 len += snprintf(page + len, count - len,
878 "TX VI priority ok int: %lu\n"
879 "TX VI priority error int: %lu\n"
880 "TX VO priority ok int: %lu\n"
881 "TX VO priority error int: %lu\n"
882 "TX BE priority ok int: %lu\n"
883 "TX BE priority error int: %lu\n"
884 "TX BK priority ok int: %lu\n"
885 "TX BK priority error int: %lu\n"
886 "TX MANAGE priority ok int: %lu\n"
887 "TX MANAGE priority error int: %lu\n"
888 "TX BEACON priority ok int: %lu\n"
889 "TX BEACON priority error int: %lu\n"
890 // "TX high priority ok int: %lu\n"
891 // "TX high priority failed error int: %lu\n"
892 "TX queue resume: %lu\n"
893 "TX queue stopped?: %d\n"
894 "TX fifo overflow: %lu\n"
895 // "TX beacon: %lu\n"
896 "TX VI queue: %d\n"
897 "TX VO queue: %d\n"
898 "TX BE queue: %d\n"
899 "TX BK queue: %d\n"
900 // "TX HW queue: %d\n"
901 "TX VI dropped: %lu\n"
902 "TX VO dropped: %lu\n"
903 "TX BE dropped: %lu\n"
904 "TX BK dropped: %lu\n"
905 "TX total data packets %lu\n",
906 // "TX beacon aborted: %lu\n",
907 priv->stats.txviokint,
908 priv->stats.txvierr,
909 priv->stats.txvookint,
910 priv->stats.txvoerr,
911 priv->stats.txbeokint,
912 priv->stats.txbeerr,
913 priv->stats.txbkokint,
914 priv->stats.txbkerr,
915 priv->stats.txmanageokint,
916 priv->stats.txmanageerr,
917 priv->stats.txbeaconokint,
918 priv->stats.txbeaconerr,
919 // priv->stats.txhpokint,
920 // priv->stats.txhperr,
921 priv->stats.txresumed,
922 netif_queue_stopped(dev),
923 priv->stats.txoverflow,
924 // priv->stats.txbeacon,
925 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
926 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
927 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
928 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
929 // read_nic_byte(dev, TXFIFOCOUNT),
930 priv->stats.txvidrop,
931 priv->stats.txvodrop,
932 priv->stats.txbedrop,
933 priv->stats.txbkdrop,
934 priv->stats.txdatapkt
935 // priv->stats.txbeaconerr
936 );
937
938 *eof = 1;
939 return len;
940 }
941
942
943
944 static int proc_get_stats_rx(char *page, char **start,
945 off_t offset, int count,
946 int *eof, void *data)
947 {
948 struct net_device *dev = data;
949 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
950
951 int len = 0;
952
953 len += snprintf(page + len, count - len,
954 "RX packets: %lu\n"
955 "RX urb status error: %lu\n"
956 "RX invalid urb error: %lu\n",
957 priv->stats.rxoktotal,
958 priv->stats.rxstaterr,
959 priv->stats.rxurberr);
960
961 *eof = 1;
962 return len;
963 }
964
965 void rtl8192_proc_module_init(void)
966 {
967 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
968 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
969 }
970
971
972 void rtl8192_proc_module_remove(void)
973 {
974 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
975 }
976
977
978 void rtl8192_proc_remove_one(struct net_device *dev)
979 {
980 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
981
982
983 if (priv->dir_dev) {
984 // remove_proc_entry("stats-hw", priv->dir_dev);
985 remove_proc_entry("stats-tx", priv->dir_dev);
986 remove_proc_entry("stats-rx", priv->dir_dev);
987 // remove_proc_entry("stats-ieee", priv->dir_dev);
988 remove_proc_entry("stats-ap", priv->dir_dev);
989 remove_proc_entry("registers", priv->dir_dev);
990 remove_proc_entry("registers-1", priv->dir_dev);
991 remove_proc_entry("registers-2", priv->dir_dev);
992 remove_proc_entry("registers-8", priv->dir_dev);
993 remove_proc_entry("registers-9", priv->dir_dev);
994 remove_proc_entry("registers-a", priv->dir_dev);
995 remove_proc_entry("registers-b", priv->dir_dev);
996 remove_proc_entry("registers-c", priv->dir_dev);
997 remove_proc_entry("registers-d", priv->dir_dev);
998 remove_proc_entry("registers-e", priv->dir_dev);
999 // remove_proc_entry("cck-registers",priv->dir_dev);
1000 // remove_proc_entry("ofdm-registers",priv->dir_dev);
1001 //remove_proc_entry(dev->name, rtl8192_proc);
1002 remove_proc_entry("wlan0", rtl8192_proc);
1003 priv->dir_dev = NULL;
1004 }
1005 }
1006
1007
1008 void rtl8192_proc_init_one(struct net_device *dev)
1009 {
1010 struct proc_dir_entry *e;
1011 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1012 priv->dir_dev = create_proc_entry(dev->name,
1013 S_IFDIR | S_IRUGO | S_IXUGO,
1014 rtl8192_proc);
1015 if (!priv->dir_dev) {
1016 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1017 dev->name);
1018 return;
1019 }
1020 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1021 priv->dir_dev, proc_get_stats_rx, dev);
1022
1023 if (!e) {
1024 RT_TRACE(COMP_ERR,"Unable to initialize "
1025 "/proc/net/rtl8192/%s/stats-rx\n",
1026 dev->name);
1027 }
1028
1029
1030 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1031 priv->dir_dev, proc_get_stats_tx, dev);
1032
1033 if (!e) {
1034 RT_TRACE(COMP_ERR, "Unable to initialize "
1035 "/proc/net/rtl8192/%s/stats-tx\n",
1036 dev->name);
1037 }
1038
1039 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1040 priv->dir_dev, proc_get_stats_ap, dev);
1041
1042 if (!e) {
1043 RT_TRACE(COMP_ERR, "Unable to initialize "
1044 "/proc/net/rtl8192/%s/stats-ap\n",
1045 dev->name);
1046 }
1047
1048 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1049 priv->dir_dev, proc_get_registers, dev);
1050 if (!e) {
1051 RT_TRACE(COMP_ERR, "Unable to initialize "
1052 "/proc/net/rtl8192/%s/registers\n",
1053 dev->name);
1054 }
1055 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1056 priv->dir_dev, proc_get_registers_1, dev);
1057 if (!e) {
1058 RT_TRACE(COMP_ERR, "Unable to initialize "
1059 "/proc/net/rtl8192/%s/registers-1\n",
1060 dev->name);
1061 }
1062 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1063 priv->dir_dev, proc_get_registers_2, dev);
1064 if (!e) {
1065 RT_TRACE(COMP_ERR, "Unable to initialize "
1066 "/proc/net/rtl8192/%s/registers-2\n",
1067 dev->name);
1068 }
1069 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1070 priv->dir_dev, proc_get_registers_8, dev);
1071 if (!e) {
1072 RT_TRACE(COMP_ERR, "Unable to initialize "
1073 "/proc/net/rtl8192/%s/registers-8\n",
1074 dev->name);
1075 }
1076 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1077 priv->dir_dev, proc_get_registers_9, dev);
1078 if (!e) {
1079 RT_TRACE(COMP_ERR, "Unable to initialize "
1080 "/proc/net/rtl8192/%s/registers-9\n",
1081 dev->name);
1082 }
1083 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1084 priv->dir_dev, proc_get_registers_a, dev);
1085 if (!e) {
1086 RT_TRACE(COMP_ERR, "Unable to initialize "
1087 "/proc/net/rtl8192/%s/registers-a\n",
1088 dev->name);
1089 }
1090 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1091 priv->dir_dev, proc_get_registers_b, dev);
1092 if (!e) {
1093 RT_TRACE(COMP_ERR, "Unable to initialize "
1094 "/proc/net/rtl8192/%s/registers-b\n",
1095 dev->name);
1096 }
1097 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1098 priv->dir_dev, proc_get_registers_c, dev);
1099 if (!e) {
1100 RT_TRACE(COMP_ERR, "Unable to initialize "
1101 "/proc/net/rtl8192/%s/registers-c\n",
1102 dev->name);
1103 }
1104 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1105 priv->dir_dev, proc_get_registers_d, dev);
1106 if (!e) {
1107 RT_TRACE(COMP_ERR, "Unable to initialize "
1108 "/proc/net/rtl8192/%s/registers-d\n",
1109 dev->name);
1110 }
1111 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1112 priv->dir_dev, proc_get_registers_e, dev);
1113 if (!e) {
1114 RT_TRACE(COMP_ERR, "Unable to initialize "
1115 "/proc/net/rtl8192/%s/registers-e\n",
1116 dev->name);
1117 }
1118 }
1119 /****************************************************************************
1120 -----------------------------MISC STUFF-------------------------
1121 *****************************************************************************/
1122
1123 /* this is only for debugging */
1124 void print_buffer(u32 *buffer, int len)
1125 {
1126 int i;
1127 u8 *buf =(u8*)buffer;
1128
1129 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1130
1131 for(i=0;i<len;i++)
1132 printk("%c",buf[i]);
1133
1134 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1135
1136 for(i=0;i<len;i++)
1137 printk("%x",buf[i]);
1138
1139 printk("\n");
1140 }
1141
1142 //short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1143 short check_nic_enough_desc(struct net_device *dev,int queue_index)
1144 {
1145 struct r8192_priv *priv = ieee80211_priv(dev);
1146 int used = atomic_read(&priv->tx_pending[queue_index]);
1147
1148 return (used < MAX_TX_URB);
1149 }
1150
1151 void tx_timeout(struct net_device *dev)
1152 {
1153 struct r8192_priv *priv = ieee80211_priv(dev);
1154 //rtl8192_commit(dev);
1155
1156 schedule_work(&priv->reset_wq);
1157 //DMESG("TXTIMEOUT");
1158 }
1159
1160
1161 /* this is only for debug */
1162 void dump_eprom(struct net_device *dev)
1163 {
1164 int i;
1165 for(i=0; i<63; i++)
1166 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1167 }
1168
1169 /* this is only for debug */
1170 void rtl8192_dump_reg(struct net_device *dev)
1171 {
1172 int i;
1173 int n;
1174 int max=0x1ff;
1175
1176 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1177
1178 for(n=0;n<=max;)
1179 {
1180 printk( "\nD: %2x> ", n);
1181 for(i=0;i<16 && n<=max;i++,n++)
1182 printk("%2x ",read_nic_byte(dev,n));
1183 }
1184 printk("\n");
1185 }
1186
1187 /****************************************************************************
1188 ------------------------------HW STUFF---------------------------
1189 *****************************************************************************/
1190
1191 void rtl8192_set_mode(struct net_device *dev,int mode)
1192 {
1193 u8 ecmd;
1194 ecmd=read_nic_byte(dev, EPROM_CMD);
1195 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1196 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1197 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1198 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1199 write_nic_byte(dev, EPROM_CMD, ecmd);
1200 }
1201
1202
1203 void rtl8192_update_msr(struct net_device *dev)
1204 {
1205 struct r8192_priv *priv = ieee80211_priv(dev);
1206 u8 msr;
1207
1208 msr = read_nic_byte(dev, MSR);
1209 msr &= ~ MSR_LINK_MASK;
1210
1211 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1212 * msr must be updated if the state is ASSOCIATING.
1213 * this is intentional and make sense for ad-hoc and
1214 * master (see the create BSS/IBSS func)
1215 */
1216 if (priv->ieee80211->state == IEEE80211_LINKED){
1217
1218 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1219 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1220 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1221 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1222 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1223 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1224
1225 }else
1226 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1227
1228 write_nic_byte(dev, MSR, msr);
1229 }
1230
1231 void rtl8192_set_chan(struct net_device *dev,short ch)
1232 {
1233 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1234 // u32 tx;
1235 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1236 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1237 priv->chan=ch;
1238
1239 /* this hack should avoid frame TX during channel setting*/
1240
1241
1242 // tx = read_nic_dword(dev,TX_CONF);
1243 // tx &= ~TX_LOOPBACK_MASK;
1244
1245 #ifndef LOOP_TEST
1246 // write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1247
1248 //need to implement rf set channel here WB
1249
1250 if (priv->rf_set_chan)
1251 priv->rf_set_chan(dev,priv->chan);
1252 mdelay(10);
1253 // write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1254 #endif
1255 }
1256
1257 static void rtl8192_rx_isr(struct urb *urb);
1258
1259 u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1260 {
1261
1262 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1263 + pstats->RxBufShift);
1264
1265 }
1266 static int rtl8192_rx_initiate(struct net_device*dev)
1267 {
1268 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1269 struct urb *entry;
1270 struct sk_buff *skb;
1271 struct rtl8192_rx_info *info;
1272
1273 /* nomal packet rx procedure */
1274 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1275 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1276 if (!skb)
1277 break;
1278 entry = usb_alloc_urb(0, GFP_KERNEL);
1279 if (!entry) {
1280 kfree_skb(skb);
1281 break;
1282 }
1283 // printk("nomal packet IN request!\n");
1284 usb_fill_bulk_urb(entry, priv->udev,
1285 usb_rcvbulkpipe(priv->udev, 3), skb->tail,
1286 RX_URB_SIZE, rtl8192_rx_isr, skb);
1287 info = (struct rtl8192_rx_info *) skb->cb;
1288 info->urb = entry;
1289 info->dev = dev;
1290 info->out_pipe = 3; //denote rx normal packet queue
1291 skb_queue_tail(&priv->rx_queue, skb);
1292 usb_submit_urb(entry, GFP_KERNEL);
1293 }
1294
1295 /* command packet rx procedure */
1296 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1297 // printk("command packet IN request!\n");
1298 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1299 if (!skb)
1300 break;
1301 entry = usb_alloc_urb(0, GFP_KERNEL);
1302 if (!entry) {
1303 kfree_skb(skb);
1304 break;
1305 }
1306 usb_fill_bulk_urb(entry, priv->udev,
1307 usb_rcvbulkpipe(priv->udev, 9), skb->tail,
1308 RX_URB_SIZE, rtl8192_rx_isr, skb);
1309 info = (struct rtl8192_rx_info *) skb->cb;
1310 info->urb = entry;
1311 info->dev = dev;
1312 info->out_pipe = 9; //denote rx cmd packet queue
1313 skb_queue_tail(&priv->rx_queue, skb);
1314 usb_submit_urb(entry, GFP_KERNEL);
1315 }
1316
1317 return 0;
1318 }
1319
1320 void rtl8192_set_rxconf(struct net_device *dev)
1321 {
1322 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1323 u32 rxconf;
1324
1325 rxconf=read_nic_dword(dev,RCR);
1326 rxconf = rxconf &~ MAC_FILTER_MASK;
1327 rxconf = rxconf | RCR_AMF;
1328 rxconf = rxconf | RCR_ADF;
1329 rxconf = rxconf | RCR_AB;
1330 rxconf = rxconf | RCR_AM;
1331 //rxconf = rxconf | RCR_ACF;
1332
1333 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1334
1335 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1336 dev->flags & IFF_PROMISC){
1337 rxconf = rxconf | RCR_AAP;
1338 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1339 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1340 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1341 }*/else{
1342 rxconf = rxconf | RCR_APM;
1343 rxconf = rxconf | RCR_CBSSID;
1344 }
1345
1346
1347 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1348 rxconf = rxconf | RCR_AICV;
1349 rxconf = rxconf | RCR_APWRMGT;
1350 }
1351
1352 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1353 rxconf = rxconf | RCR_ACRC32;
1354
1355
1356 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1357 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1358 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1359 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1360
1361 // rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1362 rxconf = rxconf | RCR_ONLYERLPKT;
1363
1364 // rxconf = rxconf &~ RCR_CS_MASK;
1365 // rxconf = rxconf | (1<<RCR_CS_SHIFT);
1366
1367 write_nic_dword(dev, RCR, rxconf);
1368
1369 #ifdef DEBUG_RX
1370 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1371 #endif
1372 }
1373 //wait to be removed
1374 void rtl8192_rx_enable(struct net_device *dev)
1375 {
1376 //u8 cmd;
1377
1378 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1379
1380 rtl8192_rx_initiate(dev);
1381
1382 // rtl8192_set_rxconf(dev);
1383 }
1384
1385
1386 void rtl8192_tx_enable(struct net_device *dev)
1387 {
1388 }
1389
1390 void rtl8192_rtx_disable(struct net_device *dev)
1391 {
1392 u8 cmd;
1393 struct r8192_priv *priv = ieee80211_priv(dev);
1394 struct sk_buff *skb;
1395 struct rtl8192_rx_info *info;
1396
1397 cmd=read_nic_byte(dev,CMDR);
1398 write_nic_byte(dev, CMDR, cmd &~ \
1399 (CR_TE|CR_RE));
1400 force_pci_posting(dev);
1401 mdelay(10);
1402
1403 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1404 info = (struct rtl8192_rx_info *) skb->cb;
1405 if (!info->urb)
1406 continue;
1407
1408 usb_kill_urb(info->urb);
1409 kfree_skb(skb);
1410 }
1411
1412 if (skb_queue_len(&priv->skb_queue)) {
1413 printk(KERN_WARNING "skb_queue not empty\n");
1414 }
1415
1416 skb_queue_purge(&priv->skb_queue);
1417 return;
1418 }
1419
1420
1421 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1422 {
1423 return 0;
1424 }
1425
1426 inline u16 ieeerate2rtlrate(int rate)
1427 {
1428 switch(rate){
1429 case 10:
1430 return 0;
1431 case 20:
1432 return 1;
1433 case 55:
1434 return 2;
1435 case 110:
1436 return 3;
1437 case 60:
1438 return 4;
1439 case 90:
1440 return 5;
1441 case 120:
1442 return 6;
1443 case 180:
1444 return 7;
1445 case 240:
1446 return 8;
1447 case 360:
1448 return 9;
1449 case 480:
1450 return 10;
1451 case 540:
1452 return 11;
1453 default:
1454 return 3;
1455
1456 }
1457 }
1458 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1459 inline u16 rtl8192_rate2rate(short rate)
1460 {
1461 if (rate >11) return 0;
1462 return rtl_rate[rate];
1463 }
1464
1465 static void rtl8192_rx_isr(struct urb *urb)
1466 {
1467 struct sk_buff *skb = (struct sk_buff *) urb->context;
1468 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1469 struct net_device *dev = info->dev;
1470 struct r8192_priv *priv = ieee80211_priv(dev);
1471 int out_pipe = info->out_pipe;
1472 int err;
1473 if(!priv->up)
1474 return;
1475 if (unlikely(urb->status)) {
1476 info->urb = NULL;
1477 priv->stats.rxstaterr++;
1478 priv->ieee80211->stats.rx_errors++;
1479 usb_free_urb(urb);
1480 // printk("%s():rx status err\n",__FUNCTION__);
1481 return;
1482 }
1483
1484 skb_unlink(skb, &priv->rx_queue);
1485 skb_put(skb, urb->actual_length);
1486
1487 skb_queue_tail(&priv->skb_queue, skb);
1488 tasklet_schedule(&priv->irq_rx_tasklet);
1489
1490 skb = dev_alloc_skb(RX_URB_SIZE);
1491 if (unlikely(!skb)) {
1492 usb_free_urb(urb);
1493 printk("%s():can,t alloc skb\n",__FUNCTION__);
1494 /* TODO check rx queue length and refill *somewhere* */
1495 return;
1496 }
1497
1498 usb_fill_bulk_urb(urb, priv->udev,
1499 usb_rcvbulkpipe(priv->udev, out_pipe), skb->tail,
1500 RX_URB_SIZE, rtl8192_rx_isr, skb);
1501
1502 info = (struct rtl8192_rx_info *) skb->cb;
1503 info->urb = urb;
1504 info->dev = dev;
1505 info->out_pipe = out_pipe;
1506
1507 urb->transfer_buffer = skb->tail;
1508 urb->context = skb;
1509 skb_queue_tail(&priv->rx_queue, skb);
1510 err = usb_submit_urb(urb, GFP_ATOMIC);
1511 if(err && err != EPERM)
1512 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1513 }
1514
1515 u32
1516 rtl819xusb_rx_command_packet(
1517 struct net_device *dev,
1518 struct ieee80211_rx_stats *pstats
1519 )
1520 {
1521 u32 status;
1522
1523 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1524
1525 status = cmpk_message_handle_rx(dev, pstats);
1526 if (status)
1527 {
1528 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1529 }
1530 else
1531 {
1532 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1533 }
1534
1535 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1536 return status;
1537 }
1538
1539 void rtl8192_data_hard_stop(struct net_device *dev)
1540 {
1541 //FIXME !!
1542 }
1543
1544
1545 void rtl8192_data_hard_resume(struct net_device *dev)
1546 {
1547 // FIXME !!
1548 }
1549
1550 /* this function TX data frames when the ieee80211 stack requires this.
1551 * It checks also if we need to stop the ieee tx queue, eventually do it
1552 */
1553 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1554 {
1555 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1556 int ret;
1557 unsigned long flags;
1558 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1559 u8 queue_index = tcb_desc->queue_index;
1560
1561 /* shall not be referred by command packet */
1562 assert(queue_index != TXCMD_QUEUE);
1563
1564 spin_lock_irqsave(&priv->tx_lock,flags);
1565
1566 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1567 // tcb_desc->RATRIndex = 7;
1568 // tcb_desc->bTxDisableRateFallBack = 1;
1569 // tcb_desc->bTxUseDriverAssingedRate = 1;
1570 tcb_desc->bTxEnableFwCalcDur = 1;
1571 skb_push(skb, priv->ieee80211->tx_headroom);
1572 ret = priv->ops->rtl819x_tx(dev, skb);
1573
1574 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1575 //priv->ieee80211->stats.tx_packets++;
1576
1577 spin_unlock_irqrestore(&priv->tx_lock,flags);
1578
1579 // return ret;
1580 return;
1581 }
1582
1583 /* This is a rough attempt to TX a frame
1584 * This is called by the ieee 80211 stack to TX management frames.
1585 * If the ring is full packet are dropped (for data frame the queue
1586 * is stopped before this can happen).
1587 */
1588 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1589 {
1590 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1591 int ret;
1592 unsigned long flags;
1593 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1594 u8 queue_index = tcb_desc->queue_index;
1595
1596
1597 spin_lock_irqsave(&priv->tx_lock,flags);
1598
1599 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1600 if(queue_index == TXCMD_QUEUE) {
1601 skb_push(skb, USB_HWDESC_HEADER_LEN);
1602 priv->ops->rtl819x_tx_cmd(dev, skb);
1603 ret = 1;
1604 spin_unlock_irqrestore(&priv->tx_lock,flags);
1605 return ret;
1606 } else {
1607 skb_push(skb, priv->ieee80211->tx_headroom);
1608 ret = priv->ops->rtl819x_tx(dev, skb);
1609 }
1610
1611 spin_unlock_irqrestore(&priv->tx_lock,flags);
1612
1613 return ret;
1614 }
1615
1616
1617 void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1618
1619
1620 static void rtl8192_tx_isr(struct urb *tx_urb)
1621 {
1622 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1623 struct net_device *dev = NULL;
1624 struct r8192_priv *priv = NULL;
1625 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1626 u8 queue_index = tcb_desc->queue_index;
1627 // bool bToSend0Byte;
1628 // u16 BufLen = skb->len;
1629
1630 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1631 priv = ieee80211_priv(dev);
1632
1633 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1634 if(tx_urb->status == 0) {
1635 // dev->trans_start = jiffies;
1636 // As act as station mode, destion shall be unicast address.
1637 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1638 //priv->ieee80211->stats.tx_packets++;
1639 priv->stats.txoktotal++;
1640 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1641 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1642 } else {
1643 priv->ieee80211->stats.tx_errors++;
1644 //priv->stats.txmanageerr++;
1645 /* TODO */
1646 }
1647 }
1648
1649 /* free skb and tx_urb */
1650 if(skb != NULL) {
1651 dev_kfree_skb_any(skb);
1652 usb_free_urb(tx_urb);
1653 atomic_dec(&priv->tx_pending[queue_index]);
1654 }
1655
1656 {
1657 //
1658 // Handle HW Beacon:
1659 // We had transfer our beacon frame to host controler at this moment.
1660 //
1661 //
1662 // Caution:
1663 // Handling the wait queue of command packets.
1664 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1665 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1666 //
1667 if (queue_index == MGNT_QUEUE){
1668 if (priv->ieee80211->ack_tx_to_ieee){
1669 if (rtl8192_is_tx_queue_empty(dev)){
1670 priv->ieee80211->ack_tx_to_ieee = 0;
1671 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1672 }
1673 }
1674 }
1675 /* Handle MPDU in wait queue. */
1676 if(queue_index != BEACON_QUEUE) {
1677 /* Don't send data frame during scanning.*/
1678 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1679 (!(priv->ieee80211->queue_stop))) {
1680 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1681 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1682
1683 return; //modified by david to avoid further processing AMSDU
1684 }
1685 }
1686 }
1687 }
1688
1689 void rtl8192_beacon_stop(struct net_device *dev)
1690 {
1691 u8 msr, msrm, msr2;
1692 struct r8192_priv *priv = ieee80211_priv(dev);
1693
1694 msr = read_nic_byte(dev, MSR);
1695 msrm = msr & MSR_LINK_MASK;
1696 msr2 = msr & ~MSR_LINK_MASK;
1697
1698 if(NIC_8192U == priv->card_8192) {
1699 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1700 }
1701 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1702 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1703 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1704 write_nic_byte(dev, MSR, msr);
1705 }
1706 }
1707
1708 void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1709 {
1710 struct r8192_priv *priv = ieee80211_priv(dev);
1711 struct ieee80211_network *net;
1712 u8 i=0, basic_rate = 0;
1713 net = & priv->ieee80211->current_network;
1714
1715 for (i=0; i<net->rates_len; i++)
1716 {
1717 basic_rate = net->rates[i]&0x7f;
1718 switch(basic_rate)
1719 {
1720 case MGN_1M: *rate_config |= RRSR_1M; break;
1721 case MGN_2M: *rate_config |= RRSR_2M; break;
1722 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1723 case MGN_11M: *rate_config |= RRSR_11M; break;
1724 case MGN_6M: *rate_config |= RRSR_6M; break;
1725 case MGN_9M: *rate_config |= RRSR_9M; break;
1726 case MGN_12M: *rate_config |= RRSR_12M; break;
1727 case MGN_18M: *rate_config |= RRSR_18M; break;
1728 case MGN_24M: *rate_config |= RRSR_24M; break;
1729 case MGN_36M: *rate_config |= RRSR_36M; break;
1730 case MGN_48M: *rate_config |= RRSR_48M; break;
1731 case MGN_54M: *rate_config |= RRSR_54M; break;
1732 }
1733 }
1734 for (i=0; i<net->rates_ex_len; i++)
1735 {
1736 basic_rate = net->rates_ex[i]&0x7f;
1737 switch(basic_rate)
1738 {
1739 case MGN_1M: *rate_config |= RRSR_1M; break;
1740 case MGN_2M: *rate_config |= RRSR_2M; break;
1741 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1742 case MGN_11M: *rate_config |= RRSR_11M; break;
1743 case MGN_6M: *rate_config |= RRSR_6M; break;
1744 case MGN_9M: *rate_config |= RRSR_9M; break;
1745 case MGN_12M: *rate_config |= RRSR_12M; break;
1746 case MGN_18M: *rate_config |= RRSR_18M; break;
1747 case MGN_24M: *rate_config |= RRSR_24M; break;
1748 case MGN_36M: *rate_config |= RRSR_36M; break;
1749 case MGN_48M: *rate_config |= RRSR_48M; break;
1750 case MGN_54M: *rate_config |= RRSR_54M; break;
1751 }
1752 }
1753 }
1754
1755
1756 #define SHORT_SLOT_TIME 9
1757 #define NON_SHORT_SLOT_TIME 20
1758
1759 void rtl8192_update_cap(struct net_device* dev, u16 cap)
1760 {
1761 //u32 tmp = 0;
1762 struct r8192_priv *priv = ieee80211_priv(dev);
1763 struct ieee80211_network *net = &priv->ieee80211->current_network;
1764 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1765
1766 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
1767 if(0)
1768 {
1769 u8 tmp = 0;
1770 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1771 if (priv->short_preamble)
1772 tmp |= 0x80;
1773 write_nic_byte(dev, RRSR+2, tmp);
1774 }
1775
1776 if (net->mode & (IEEE_G|IEEE_N_24G))
1777 {
1778 u8 slot_time = 0;
1779 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1780 {//short slot time
1781 slot_time = SHORT_SLOT_TIME;
1782 }
1783 else //long slot time
1784 slot_time = NON_SHORT_SLOT_TIME;
1785 priv->slot_time = slot_time;
1786 write_nic_byte(dev, SLOT_TIME, slot_time);
1787 }
1788
1789 }
1790 void rtl8192_net_update(struct net_device *dev)
1791 {
1792
1793 struct r8192_priv *priv = ieee80211_priv(dev);
1794 struct ieee80211_network *net;
1795 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1796 u16 rate_config = 0;
1797 net = & priv->ieee80211->current_network;
1798
1799 rtl8192_config_rate(dev, &rate_config);
1800 priv->basic_rate = rate_config &= 0x15f;
1801
1802 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1803 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1804 //for(i=0;i<ETH_ALEN;i++)
1805 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1806
1807 rtl8192_update_msr(dev);
1808 // rtl8192_update_cap(dev, net->capability);
1809 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1810 {
1811 write_nic_word(dev, ATIMWND, 2);
1812 write_nic_word(dev, BCN_DMATIME, 1023);
1813 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1814 // write_nic_word(dev, BcnIntTime, 100);
1815 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1816 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1817 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1818 // TODO: BcnIFS may required to be changed on ASIC
1819 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1820
1821 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1822 }
1823
1824
1825
1826 }
1827
1828 //temporary hw beacon is not used any more.
1829 //open it when necessary
1830 #if 1
1831 void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1832 {
1833 }
1834 #endif
1835 inline u8 rtl8192_IsWirelessBMode(u16 rate)
1836 {
1837 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1838 return 1;
1839 else return 0;
1840 }
1841
1842 u16 N_DBPSOfRate(u16 DataRate);
1843
1844 u16 ComputeTxTime(
1845 u16 FrameLength,
1846 u16 DataRate,
1847 u8 bManagementFrame,
1848 u8 bShortPreamble
1849 )
1850 {
1851 u16 FrameTime;
1852 u16 N_DBPS;
1853 u16 Ceiling;
1854
1855 if( rtl8192_IsWirelessBMode(DataRate) )
1856 {
1857 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1858 { // long preamble
1859 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1860 }
1861 else
1862 { // Short preamble
1863 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1864 }
1865 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1866 FrameTime ++;
1867 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1868 N_DBPS = N_DBPSOfRate(DataRate);
1869 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1870 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1871 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1872 }
1873 return FrameTime;
1874 }
1875
1876 u16 N_DBPSOfRate(u16 DataRate)
1877 {
1878 u16 N_DBPS = 24;
1879
1880 switch(DataRate)
1881 {
1882 case 60:
1883 N_DBPS = 24;
1884 break;
1885
1886 case 90:
1887 N_DBPS = 36;
1888 break;
1889
1890 case 120:
1891 N_DBPS = 48;
1892 break;
1893
1894 case 180:
1895 N_DBPS = 72;
1896 break;
1897
1898 case 240:
1899 N_DBPS = 96;
1900 break;
1901
1902 case 360:
1903 N_DBPS = 144;
1904 break;
1905
1906 case 480:
1907 N_DBPS = 192;
1908 break;
1909
1910 case 540:
1911 N_DBPS = 216;
1912 break;
1913
1914 default:
1915 break;
1916 }
1917
1918 return N_DBPS;
1919 }
1920
1921 void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1922 {
1923 usb_free_urb(tx_cmd_urb);
1924 }
1925
1926 unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1927
1928 if(tx_queue >= 9)
1929 {
1930 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1931 return 0x04;
1932 }
1933 return priv->txqueue_to_outpipemap[tx_queue];
1934 }
1935
1936 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1937 {
1938 struct r8192_priv *priv = ieee80211_priv(dev);
1939 int status;
1940 struct urb *tx_urb;
1941 unsigned int idx_pipe;
1942 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1943 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1944 u8 queue_index = tcb_desc->queue_index;
1945 u32 PktSize = 0;
1946
1947 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1948 atomic_inc(&priv->tx_pending[queue_index]);
1949
1950 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
1951 if(!tx_urb){
1952 dev_kfree_skb(skb);
1953 return -ENOMEM;
1954 }
1955
1956 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1957
1958 /* Tx descriptor ought to be set according to the skb->cb */
1959 pdesc->LINIP = tcb_desc->bLastIniPkt;
1960 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1961 pdesc->PktSize = PktSize;
1962 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1963 //----------------------------------------------------------------------------
1964 // Fill up USB_OUT_CONTEXT.
1965 //----------------------------------------------------------------------------
1966 // Get index to out pipe from specified QueueID.
1967 idx_pipe = txqueue2outpipe(priv,queue_index);
1968 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1969
1970 #ifdef JOHN_DUMP_TXDESC
1971 int i;
1972 printk("Len = %d\n", skb->len);
1973 for (i = 0; i < 8; i++)
1974 printk("%2.2x ", *((u8*)skb->data+i));
1975 printk("\n");
1976 #endif
1977
1978 usb_fill_bulk_urb(tx_urb,
1979 priv->udev,
1980 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1981 skb->data,
1982 skb->len,
1983 rtl8192_tx_isr,
1984 skb);
1985
1986 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
1987 if (!status){
1988 return 0;
1989 }else{
1990 printk("Error TX CMD URB, error %d",
1991 status);
1992 return -1;
1993 }
1994 }
1995
1996 /*
1997 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1998 * in TxFwInfo data structure
1999 * 2006.10.30 by Emily
2000 *
2001 * \param QUEUEID Software Queue
2002 */
2003 u8 MapHwQueueToFirmwareQueue(u8 QueueID)
2004 {
2005 u8 QueueSelect = 0x0; //defualt set to
2006
2007 switch(QueueID) {
2008 case BE_QUEUE:
2009 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
2010 break;
2011
2012 case BK_QUEUE:
2013 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2014 break;
2015
2016 case VO_QUEUE:
2017 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2018 break;
2019
2020 case VI_QUEUE:
2021 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2022 break;
2023 case MGNT_QUEUE:
2024 QueueSelect = QSLT_MGNT;
2025 break;
2026
2027 case BEACON_QUEUE:
2028 QueueSelect = QSLT_BEACON;
2029 break;
2030
2031 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2032 // TODO: Remove Assertions
2033 //#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2034 case TXCMD_QUEUE:
2035 QueueSelect = QSLT_CMD;
2036 break;
2037 //#endif
2038 case HIGH_QUEUE:
2039 QueueSelect = QSLT_HIGH;
2040 break;
2041
2042 default:
2043 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2044 break;
2045 }
2046 return QueueSelect;
2047 }
2048
2049 u8 MRateToHwRate8190Pci(u8 rate)
2050 {
2051 u8 ret = DESC92S_RATE1M;
2052
2053 switch(rate)
2054 {
2055 // CCK and OFDM non-HT rates
2056 case MGN_1M: ret = DESC92S_RATE1M; break;
2057 case MGN_2M: ret = DESC92S_RATE2M; break;
2058 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2059 case MGN_11M: ret = DESC92S_RATE11M; break;
2060 case MGN_6M: ret = DESC92S_RATE6M; break;
2061 case MGN_9M: ret = DESC92S_RATE9M; break;
2062 case MGN_12M: ret = DESC92S_RATE12M; break;
2063 case MGN_18M: ret = DESC92S_RATE18M; break;
2064 case MGN_24M: ret = DESC92S_RATE24M; break;
2065 case MGN_36M: ret = DESC92S_RATE36M; break;
2066 case MGN_48M: ret = DESC92S_RATE48M; break;
2067 case MGN_54M: ret = DESC92S_RATE54M; break;
2068
2069 // HT rates since here
2070 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2071 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2072 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2073 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2074 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2075 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2076 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2077 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2078 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2079 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2080 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2081 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2082 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2083 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2084 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2085 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2086
2087 // Set the highest SG rate
2088 case MGN_MCS0_SG:
2089 case MGN_MCS1_SG:
2090 case MGN_MCS2_SG:
2091 case MGN_MCS3_SG:
2092 case MGN_MCS4_SG:
2093 case MGN_MCS5_SG:
2094 case MGN_MCS6_SG:
2095 case MGN_MCS7_SG:
2096 case MGN_MCS8_SG:
2097 case MGN_MCS9_SG:
2098 case MGN_MCS10_SG:
2099 case MGN_MCS11_SG:
2100 case MGN_MCS12_SG:
2101 case MGN_MCS13_SG:
2102 case MGN_MCS14_SG:
2103 case MGN_MCS15_SG:
2104 {
2105 ret = DESC92S_RATEMCS15_SG;
2106 break;
2107 }
2108
2109 default: break;
2110 }
2111 return ret;
2112 }
2113
2114 u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2115 {
2116 u8 tmp_Short;
2117
2118 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2119
2120 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2121 tmp_Short = 0;
2122
2123 return tmp_Short;
2124 }
2125
2126 static void tx_zero_isr(struct urb *tx_urb)
2127 {
2128 return;
2129 }
2130
2131
2132 /*
2133 * The tx procedure is just as following, skb->cb will contain all the following
2134 *information: * priority, morefrag, rate, &dev.
2135 * */
2136 // <Note> Buffer format for 8192S Usb bulk out:
2137 //
2138 // --------------------------------------------------
2139 // | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2140 // --------------------------------------------------
2141 // | 32 bytes | 24 bytes |0-2318 bytes|
2142 // --------------------------------------------------
2143 // |<------------ BufferLen ------------------------->|
2144
2145 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2146 {
2147 struct r8192_priv *priv = ieee80211_priv(dev);
2148 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2149 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2150 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2151 struct usb_device *udev = priv->udev;
2152 int pend;
2153 int status;
2154 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2155 //int urb_len;
2156 unsigned int idx_pipe;
2157 u16 MPDUOverhead = 0;
2158 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2159
2160 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2161 /* we are locked here so the two atomic_read and inc are executed
2162 * without interleaves * !!! For debug purpose */
2163 if( pend > MAX_TX_URB){
2164 switch (tcb_desc->queue_index) {
2165 case VO_PRIORITY:
2166 priv->stats.txvodrop++;
2167 break;
2168 case VI_PRIORITY:
2169 priv->stats.txvidrop++;
2170 break;
2171 case BE_PRIORITY:
2172 priv->stats.txbedrop++;
2173 break;
2174 default://BK_PRIORITY
2175 priv->stats.txbkdrop++;
2176 break;
2177 }
2178 printk("To discard skb packet!\n");
2179 dev_kfree_skb_any(skb);
2180 return -1;
2181 }
2182
2183 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2184 if(!tx_urb){
2185 dev_kfree_skb_any(skb);
2186 return -ENOMEM;
2187 }
2188
2189 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2190
2191
2192 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
2193
2194 /* Fill Tx descriptor */
2195 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2196
2197 // This part can just fill to the first descriptor of the frame.
2198 /* DWORD 0 */
2199 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2200
2201
2202 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2203 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2204 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2205
2206
2207 // Aggregation related
2208 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2209 tx_desc->AllowAggregation = 1;
2210 /* DWORD 1 */
2211 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2212 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2213 } else {
2214 tx_desc->AllowAggregation = 0;
2215 /* DWORD 1 */
2216 //tx_fwinfo->RxMF = 0;
2217 //tx_fwinfo->RxAMD = 0;
2218 }
2219
2220 //
2221 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2222 // FW according as this SSN to do necessary packet retry.
2223 // 2008.06.06.
2224 //
2225 {
2226 u8 *pSeq;
2227 u16 Temp;
2228 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2229 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2230 Temp = pSeq[0];
2231 Temp <<= 12;
2232 Temp |= (*(u16 *)pSeq)>>4;
2233 tx_desc->Seq = Temp;
2234 }
2235
2236 /* Protection mode related */
2237 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2238 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2239 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2240 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2241 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2242 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2243 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2244 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2245 (tcb_desc->bRTSUseShortGI?1:0);
2246 //LZM 090219
2247 tx_desc->DisRTSFB = 0;
2248 tx_desc->RTSRateFBLmt = 0xf;
2249
2250 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2251 //tx_desc->DisRTSFB = 0x01;
2252
2253 /* Set Bandwidth and sub-channel settings. */
2254 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2255 {
2256 if(tcb_desc->bPacketBW) {
2257 tx_desc->TxBandwidth = 1;
2258 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2259 } else {
2260 tx_desc->TxBandwidth = 0;
2261 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2262 }
2263 } else {
2264 tx_desc->TxBandwidth = 0;
2265 tx_desc->TxSubCarrier = 0;
2266 }
2267
2268
2269 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2270 /* DWORD 0 */
2271 tx_desc->LINIP = 0;
2272 //tx_desc->CmdInit = 1; //92su del
2273 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2274
2275 {
2276 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2277 }
2278
2279 /*DWORD 1*/
2280 //tx_desc->SecCAMID= 0;//92su del
2281 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2282 //#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
2283
2284 {
2285 MPDUOverhead = 0;
2286 //tx_desc->NoEnc = 1;//92su del
2287 }
2288
2289 tx_desc->SecType = 0x0;
2290
2291 if (tcb_desc->bHwSec)
2292 {
2293 switch (priv->ieee80211->pairwise_key_type)
2294 {
2295 case KEY_TYPE_WEP40:
2296 case KEY_TYPE_WEP104:
2297 tx_desc->SecType = 0x1;
2298 //tx_desc->NoEnc = 0;//92su del
2299 break;
2300 case KEY_TYPE_TKIP:
2301 tx_desc->SecType = 0x2;
2302 //tx_desc->NoEnc = 0;//92su del
2303 break;
2304 case KEY_TYPE_CCMP:
2305 tx_desc->SecType = 0x3;
2306 //tx_desc->NoEnc = 0;//92su del
2307 break;
2308 case KEY_TYPE_NA:
2309 tx_desc->SecType = 0x0;
2310 //tx_desc->NoEnc = 1;//92su del
2311 break;
2312 default:
2313 tx_desc->SecType = 0x0;
2314 //tx_desc->NoEnc = 1;//92su del
2315 break;
2316 }
2317 }
2318
2319 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2320
2321
2322 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2323 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2324 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2325
2326 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2327
2328
2329 /* Fill fields that are required to be initialized in all of the descriptors */
2330 //DWORD 0
2331 tx_desc->FirstSeg = 1;
2332 tx_desc->LastSeg = 1;
2333 tx_desc->OWN = 1;
2334
2335 {
2336 //DWORD 2
2337 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2338 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2339 }
2340
2341 /* Get index to out pipe from specified QueueID */
2342 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2343 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2344
2345 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2346 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2347
2348 /* To submit bulk urb */
2349 usb_fill_bulk_urb(tx_urb,
2350 udev,
2351 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2352 skb->data,
2353 skb->len, rtl8192_tx_isr, skb);
2354
2355 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2356 if (!status){
2357 //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2358 bool bSend0Byte = false;
2359 u8 zero = 0;
2360 if(udev->speed == USB_SPEED_HIGH)
2361 {
2362 if (skb->len > 0 && skb->len % 512 == 0)
2363 bSend0Byte = true;
2364 }
2365 else
2366 {
2367 if (skb->len > 0 && skb->len % 64 == 0)
2368 bSend0Byte = true;
2369 }
2370 if (bSend0Byte)
2371 {
2372 #if 1
2373 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
2374 if(!tx_urb_zero){
2375 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2376 return -ENOMEM;
2377 }
2378 usb_fill_bulk_urb(tx_urb_zero,udev,
2379 usb_sndbulkpipe(udev,idx_pipe), &zero,
2380 0, tx_zero_isr, dev);
2381 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
2382 if (status){
2383 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2384 return -1;
2385 }
2386 #endif
2387 }
2388 dev->trans_start = jiffies;
2389 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2390 return 0;
2391 }else{
2392 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2393 status);
2394 return -1;
2395 }
2396 }
2397
2398 void rtl8192SU_net_update(struct net_device *dev)
2399 {
2400
2401 struct r8192_priv *priv = ieee80211_priv(dev);
2402 struct ieee80211_device* ieee = priv->ieee80211;
2403 struct ieee80211_network *net = &priv->ieee80211->current_network;
2404 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2405 u16 rate_config = 0;
2406 u32 regTmp = 0;
2407 u8 rateIndex = 0;
2408 u8 retrylimit = 0x30;
2409 u16 cap = net->capability;
2410
2411 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2412
2413 //HW_VAR_BASIC_RATE
2414 //update Basic rate: RR, BRSR
2415 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2416
2417 priv->basic_rate = rate_config = rate_config & 0x15f;
2418
2419 // Set RRSR rate table.
2420 write_nic_byte(dev, RRSR, rate_config&0xff);
2421 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2422
2423 // Set RTS initial rate
2424 while(rate_config > 0x1)
2425 {
2426 rate_config = (rate_config>> 1);
2427 rateIndex++;
2428 }
2429 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2430 //HW_VAR_BASIC_RATE
2431
2432 //set ack preample
2433 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2434 if (priv->short_preamble)
2435 regTmp |= 0x80;
2436 write_nic_byte(dev, RRSR+2, regTmp);
2437
2438 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2439 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2440
2441 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2442 //2008.10.24 added by tynli for beacon changed.
2443 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2444
2445 rtl8192_update_cap(dev, cap);
2446
2447 if (ieee->iw_mode == IW_MODE_ADHOC){
2448 retrylimit = 7;
2449 //we should enable ibss interrupt here, but disable it temporarily
2450 if (0){
2451 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2452 //rtl8192_irq_disable(dev);
2453 //rtl8192_irq_enable(dev);
2454 }
2455 }
2456 else{
2457 if (0){
2458 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2459 //rtl8192_irq_disable(dev);
2460 //rtl8192_irq_enable(dev);
2461 }
2462 }
2463
2464 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2465
2466 write_nic_word(dev, RETRY_LIMIT,
2467 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2468 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2469 }
2470
2471 void rtl8192SU_update_ratr_table(struct net_device* dev)
2472 {
2473 struct r8192_priv* priv = ieee80211_priv(dev);
2474 struct ieee80211_device* ieee = priv->ieee80211;
2475 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2476 //struct ieee80211_network *net = &ieee->current_network;
2477 u32 ratr_value = 0;
2478
2479 u8 rate_index = 0;
2480 int WirelessMode = ieee->mode;
2481 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2482
2483 u8 bNMode = 0;
2484
2485 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2486 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2487
2488 //switch (ieee->mode)
2489 switch (WirelessMode)
2490 {
2491 case IEEE_A:
2492 ratr_value &= 0x00000FF0;
2493 break;
2494 case IEEE_B:
2495 ratr_value &= 0x0000000D;
2496 break;
2497 case IEEE_G:
2498 ratr_value &= 0x00000FF5;
2499 break;
2500 case IEEE_N_24G:
2501 case IEEE_N_5G:
2502 {
2503 bNMode = 1;
2504
2505 if (MimoPs == 0) //MIMO_PS_STATIC
2506 {
2507 ratr_value &= 0x0007F005;
2508 }
2509 else
2510 { // MCS rate only => for 11N mode.
2511 u32 ratr_mask;
2512
2513 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2514 if ( priv->rf_type == RF_1T2R ||
2515 priv->rf_type == RF_1T1R ||
2516 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2517 ratr_mask = 0x000ff005;
2518 else
2519 ratr_mask = 0x0f0ff005;
2520
2521 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2522 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2523 ratr_mask |= 0x00000010; // Set 6MBps
2524
2525 // Select rates for rate adaptive mechanism.
2526 ratr_value &= ratr_mask;
2527 }
2528 }
2529 break;
2530 default:
2531 if(0)
2532 {
2533 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2534 {
2535 ratr_value &= 0x000ff0f5;
2536 }
2537 else
2538 {
2539 ratr_value &= 0x0f0ff0f5;
2540 }
2541 }
2542 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2543 break;
2544 }
2545
2546 ratr_value &= 0x0FFFFFFF;
2547
2548 // Get MAX MCS available.
2549 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2550 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2551 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2552 {
2553 u8 shortGI_rate = 0;
2554 u32 tmp_ratr_value = 0;
2555 ratr_value |= 0x10000000;//???
2556 tmp_ratr_value = (ratr_value>>12);
2557 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2558 {
2559 if((1<<shortGI_rate) & tmp_ratr_value)
2560 break;
2561 }
2562 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2563 write_nic_byte(dev, SG_RATE, shortGI_rate);
2564 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2565 }
2566 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2567 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2568
2569 //2 UFWP
2570 if (ratr_value & 0xfffff000){
2571 //printk("===>set to N mode\n");
2572 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2573 }
2574 else {
2575 //printk("===>set to B/G mode\n");
2576 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2577 }
2578 }
2579
2580 void rtl8192SU_link_change(struct net_device *dev)
2581 {
2582 struct r8192_priv *priv = ieee80211_priv(dev);
2583 struct ieee80211_device* ieee = priv->ieee80211;
2584 //unsigned long flags;
2585 u32 reg = 0;
2586
2587 printk("=====>%s 1\n", __func__);
2588 reg = read_nic_dword(dev, RCR);
2589
2590 if (ieee->state == IEEE80211_LINKED)
2591 {
2592
2593 rtl8192SU_net_update(dev);
2594 rtl8192SU_update_ratr_table(dev);
2595 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2596 priv->ReceiveConfig = reg |= RCR_CBSSID;
2597
2598 }else{
2599 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2600
2601 }
2602
2603 write_nic_dword(dev, RCR, reg);
2604 rtl8192_update_msr(dev);
2605
2606 printk("<=====%s 2\n", __func__);
2607 }
2608
2609 static struct ieee80211_qos_parameters def_qos_parameters = {
2610 {3,3,3,3},/* cw_min */
2611 {7,7,7,7},/* cw_max */
2612 {2,2,2,2},/* aifs */
2613 {0,0,0,0},/* flags */
2614 {0,0,0,0} /* tx_op_limit */
2615 };
2616
2617
2618 void rtl8192_update_beacon(struct work_struct * work)
2619 {
2620 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2621 struct net_device *dev = priv->ieee80211->dev;
2622 struct ieee80211_device* ieee = priv->ieee80211;
2623 struct ieee80211_network* net = &ieee->current_network;
2624
2625 if (ieee->pHTInfo->bCurrentHTSupport)
2626 HTUpdateSelfAndPeerSetting(ieee, net);
2627 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2628 // Joseph test for turbo mode with AP
2629 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2630 rtl8192_update_cap(dev, net->capability);
2631 }
2632 /*
2633 * background support to run QoS activate functionality
2634 */
2635 int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
2636
2637 void rtl8192_qos_activate(struct work_struct * work)
2638 {
2639 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2640 struct net_device *dev = priv->ieee80211->dev;
2641 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2642 u8 mode = priv->ieee80211->current_network.mode;
2643 //u32 size = sizeof(struct ieee80211_qos_parameters);
2644 u8 u1bAIFS;
2645 u32 u4bAcParam;
2646 int i;
2647
2648 if (priv == NULL)
2649 return;
2650
2651 mutex_lock(&priv->mutex);
2652
2653 if(priv->ieee80211->state != IEEE80211_LINKED)
2654 goto success;
2655 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2656 /* It better set slot time at first */
2657 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2658 /* update the ac parameter to related registers */
2659 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2660 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2661 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2662 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2663 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2664 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2665 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2666
2667 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2668 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2669 }
2670
2671 success:
2672 mutex_unlock(&priv->mutex);
2673 }
2674
2675 static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2676 int active_network,
2677 struct ieee80211_network *network)
2678 {
2679 int ret = 0;
2680 u32 size = sizeof(struct ieee80211_qos_parameters);
2681
2682 if(priv->ieee80211->state !=IEEE80211_LINKED)
2683 return ret;
2684
2685 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2686 return ret;
2687
2688 if (network->flags & NETWORK_HAS_QOS_MASK) {
2689 if (active_network &&
2690 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2691 network->qos_data.active = network->qos_data.supported;
2692
2693 if ((network->qos_data.active == 1) && (active_network == 1) &&
2694 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2695 (network->qos_data.old_param_count !=
2696 network->qos_data.param_count)) {
2697 network->qos_data.old_param_count =
2698 network->qos_data.param_count;
2699 queue_work(priv->priv_wq, &priv->qos_activate);
2700 RT_TRACE (COMP_QOS, "QoS parameters change call "
2701 "qos_activate\n");
2702 }
2703 } else {
2704 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2705 &def_qos_parameters, size);
2706
2707 if ((network->qos_data.active == 1) && (active_network == 1)) {
2708 queue_work(priv->priv_wq, &priv->qos_activate);
2709 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2710 }
2711 network->qos_data.active = 0;
2712 network->qos_data.supported = 0;
2713 }
2714
2715 return 0;
2716 }
2717
2718 /* handle manage frame frame beacon and probe response */
2719 static int rtl8192_handle_beacon(struct net_device * dev,
2720 struct ieee80211_beacon * beacon,
2721 struct ieee80211_network * network)
2722 {
2723 struct r8192_priv *priv = ieee80211_priv(dev);
2724
2725 rtl8192_qos_handle_probe_response(priv,1,network);
2726 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
2727
2728 return 0;
2729
2730 }
2731
2732 /*
2733 * handling the beaconing responses. if we get different QoS setting
2734 * off the network from the associated setting, adjust the QoS
2735 * setting
2736 */
2737 static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2738 struct ieee80211_network *network)
2739 {
2740 int ret = 0;
2741 unsigned long flags;
2742 u32 size = sizeof(struct ieee80211_qos_parameters);
2743 int set_qos_param = 0;
2744
2745 if ((priv == NULL) || (network == NULL))
2746 return ret;
2747
2748 if(priv->ieee80211->state !=IEEE80211_LINKED)
2749 return ret;
2750
2751 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2752 return ret;
2753
2754 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2755 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2756 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2757 &network->qos_data.parameters,\
2758 sizeof(struct ieee80211_qos_parameters));
2759 priv->ieee80211->current_network.qos_data.active = 1;
2760 {
2761 set_qos_param = 1;
2762 /* update qos parameter for current network */
2763 priv->ieee80211->current_network.qos_data.old_param_count = \
2764 priv->ieee80211->current_network.qos_data.param_count;
2765 priv->ieee80211->current_network.qos_data.param_count = \
2766 network->qos_data.param_count;
2767 }
2768 } else {
2769 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2770 &def_qos_parameters, size);
2771 priv->ieee80211->current_network.qos_data.active = 0;
2772 priv->ieee80211->current_network.qos_data.supported = 0;
2773 set_qos_param = 1;
2774 }
2775
2776 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2777
2778 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2779 if (set_qos_param == 1)
2780 queue_work(priv->priv_wq, &priv->qos_activate);
2781
2782 return ret;
2783 }
2784
2785
2786 static int rtl8192_handle_assoc_response(struct net_device *dev,
2787 struct ieee80211_assoc_response_frame *resp,
2788 struct ieee80211_network *network)
2789 {
2790 struct r8192_priv *priv = ieee80211_priv(dev);
2791 rtl8192_qos_association_resp(priv, network);
2792 return 0;
2793 }
2794
2795
2796 void rtl8192_update_ratr_table(struct net_device* dev)
2797 // POCTET_STRING posLegacyRate,
2798 // u8* pMcsRate)
2799 // PRT_WLAN_STA pEntry)
2800 {
2801 struct r8192_priv* priv = ieee80211_priv(dev);
2802 struct ieee80211_device* ieee = priv->ieee80211;
2803 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2804 //struct ieee80211_network *net = &ieee->current_network;
2805 u32 ratr_value = 0;
2806 u8 rate_index = 0;
2807 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2808 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2809 // switch (net->mode)
2810 switch (ieee->mode)
2811 {
2812 case IEEE_A:
2813 ratr_value &= 0x00000FF0;
2814 break;
2815 case IEEE_B:
2816 ratr_value &= 0x0000000F;
2817 break;
2818 case IEEE_G:
2819 ratr_value &= 0x00000FF7;
2820 break;
2821 case IEEE_N_24G:
2822 case IEEE_N_5G:
2823 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2824 ratr_value &= 0x0007F007;
2825 else{
2826 if (priv->rf_type == RF_1T2R)
2827 ratr_value &= 0x000FF007;
2828 else
2829 ratr_value &= 0x0F81F007;
2830 }
2831 break;
2832 default:
2833 break;
2834 }
2835 ratr_value &= 0x0FFFFFFF;
2836 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2837 ratr_value |= 0x80000000;
2838 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2839 ratr_value |= 0x80000000;
2840 }
2841 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2842 write_nic_byte(dev, UFWP, 1);
2843 }
2844
2845 static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2846 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2847 bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2848 {
2849 #if 1
2850 struct r8192_priv* priv = ieee80211_priv(dev);
2851 struct ieee80211_device* ieee = priv->ieee80211;
2852 struct ieee80211_network * network = &ieee->current_network;
2853 int wpa_ie_len= ieee->wpa_ie_len;
2854 struct ieee80211_crypt_data* crypt;
2855 int encrypt;
2856 return TRUE;
2857
2858 crypt = ieee->crypt[ieee->tx_keyidx];
2859 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2860 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2861
2862 /* simply judge */
2863 if(encrypt && (wpa_ie_len == 0)) {
2864 /* wep encryption, no N mode setting */
2865 return false;
2866 // } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2867 } else if((wpa_ie_len != 0)) {
2868 /* parse pairwise key type */
2869 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2870 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2871 return true;
2872 else
2873 return false;
2874 } else {
2875 return true;
2876 }
2877
2878 return true;
2879 #endif
2880 }
2881
2882 bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2883 {
2884 bool Reval;
2885 struct r8192_priv* priv = ieee80211_priv(dev);
2886 struct ieee80211_device* ieee = priv->ieee80211;
2887
2888 // Added by Roger, 2008.08.29.
2889 return false;
2890
2891 if(ieee->bHalfWirelessN24GMode == true)
2892 Reval = true;
2893 else
2894 Reval = false;
2895
2896 return Reval;
2897 }
2898
2899 void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2900 {
2901 struct ieee80211_device* ieee = priv->ieee80211;
2902 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2903 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2904 {
2905 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2906 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2907 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2908 }
2909 else
2910 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2911 return;
2912 }
2913
2914 u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2915 {
2916 struct r8192_priv *priv = ieee80211_priv(dev);
2917 u8 ret = 0;
2918 switch(priv->rf_chip)
2919 {
2920 case RF_8225:
2921 case RF_8256:
2922 case RF_PSEUDO_11N:
2923 case RF_6052:
2924 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2925 break;
2926 case RF_8258:
2927 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2928 break;
2929 default:
2930 ret = WIRELESS_MODE_B;
2931 break;
2932 }
2933 return ret;
2934 }
2935 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2936 {
2937 struct r8192_priv *priv = ieee80211_priv(dev);
2938 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2939
2940 #if 1
2941 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2942 {
2943 if(bSupportMode & WIRELESS_MODE_N_24G)
2944 {
2945 wireless_mode = WIRELESS_MODE_N_24G;
2946 }
2947 else if(bSupportMode & WIRELESS_MODE_N_5G)
2948 {
2949 wireless_mode = WIRELESS_MODE_N_5G;
2950 }
2951 else if((bSupportMode & WIRELESS_MODE_A))
2952 {
2953 wireless_mode = WIRELESS_MODE_A;
2954 }
2955 else if((bSupportMode & WIRELESS_MODE_G))
2956 {
2957 wireless_mode = WIRELESS_MODE_G;
2958 }
2959 else if((bSupportMode & WIRELESS_MODE_B))
2960 {
2961 wireless_mode = WIRELESS_MODE_B;
2962 }
2963 else{
2964 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2965 wireless_mode = WIRELESS_MODE_B;
2966 }
2967 }
2968 #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
2969 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2970 #endif
2971 //LZM 090306 usb crash here, mark it temp
2972 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
2973 priv->ieee80211->mode = wireless_mode;
2974
2975 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2976 priv->ieee80211->pHTInfo->bEnableHT = 1;
2977 else
2978 priv->ieee80211->pHTInfo->bEnableHT = 0;
2979 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2980 rtl8192_refresh_supportrate(priv);
2981 #endif
2982
2983 }
2984
2985
2986 short rtl8192_is_tx_queue_empty(struct net_device *dev)
2987 {
2988 int i=0;
2989 struct r8192_priv *priv = ieee80211_priv(dev);
2990 //struct ieee80211_device* ieee = priv->ieee80211;
2991 for (i=0; i<=MGNT_QUEUE; i++)
2992 {
2993 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
2994 continue;
2995 if (atomic_read(&priv->tx_pending[i]))
2996 {
2997 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
2998 return 0;
2999 }
3000 }
3001 return 1;
3002 }
3003
3004 void rtl8192_hw_sleep_down(struct net_device *dev)
3005 {
3006 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
3007 #ifdef TODO
3008 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3009 #endif
3010 }
3011
3012 void rtl8192_hw_sleep_wq (struct work_struct *work)
3013 {
3014 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3015 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3016 // container_of(work, struct ieee80211_device, watch_dog_wq);
3017 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3018 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3019 struct net_device *dev = ieee->dev;
3020
3021 //printk("=========>%s()\n", __FUNCTION__);
3022 rtl8192_hw_sleep_down(dev);
3023 }
3024 // printk("dev is %d\n",dev);
3025 // printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3026 void rtl8192_hw_wakeup(struct net_device* dev)
3027 {
3028 // u32 flags = 0;
3029
3030 // spin_lock_irqsave(&priv->ps_lock,flags);
3031 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3032 #ifdef TODO
3033 // MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3034 #endif
3035 //FIXME: will we send package stored while nic is sleep?
3036 // spin_unlock_irqrestore(&priv->ps_lock,flags);
3037 }
3038
3039 void rtl8192_hw_wakeup_wq (struct work_struct *work)
3040 {
3041 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3042 // struct ieee80211_device * ieee = (struct ieee80211_device*)
3043 // container_of(work, struct ieee80211_device, watch_dog_wq);
3044 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3045 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3046 struct net_device *dev = ieee->dev;
3047
3048 rtl8192_hw_wakeup(dev);
3049 }
3050
3051 #define MIN_SLEEP_TIME 50
3052 #define MAX_SLEEP_TIME 10000
3053 void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3054 {
3055
3056 struct r8192_priv *priv = ieee80211_priv(dev);
3057
3058 u32 rb = jiffies;
3059 unsigned long flags;
3060
3061 spin_lock_irqsave(&priv->ps_lock,flags);
3062
3063 /* Writing HW register with 0 equals to disable
3064 * the timer, that is not really what we want
3065 */
3066 tl -= MSECS(4+16+7);
3067
3068 //if(tl == 0) tl = 1;
3069
3070 /* FIXME HACK FIXME HACK */
3071 // force_pci_posting(dev);
3072 //mdelay(1);
3073
3074 // rb = read_nic_dword(dev, TSFTR);
3075
3076 /* If the interval in witch we are requested to sleep is too
3077 * short then give up and remain awake
3078 */
3079 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3080 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3081 spin_unlock_irqrestore(&priv->ps_lock,flags);
3082 printk("too short to sleep\n");
3083 return;
3084 }
3085
3086 // write_nic_dword(dev, TimerInt, tl);
3087 // rb = read_nic_dword(dev, TSFTR);
3088 {
3089 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3090 // if (tl<rb)
3091
3092 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3093 }
3094 /* if we suspect the TimerInt is gone beyond tl
3095 * while setting it, then give up
3096 */
3097 #if 1
3098 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3099 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3100 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3101 spin_unlock_irqrestore(&priv->ps_lock,flags);
3102 return;
3103 }
3104 #endif
3105 // if(priv->rf_sleep)
3106 // priv->rf_sleep(dev);
3107
3108 //printk("<=========%s()\n", __FUNCTION__);
3109 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
3110
3111 spin_unlock_irqrestore(&priv->ps_lock,flags);
3112 }
3113 //init priv variables here. only non_zero value should be initialized here.
3114 static void rtl8192_init_priv_variable(struct net_device* dev)
3115 {
3116 struct r8192_priv *priv = ieee80211_priv(dev);
3117 u8 i;
3118 priv->card_8192 = NIC_8192U;
3119 priv->chan = 1; //set to channel 1
3120 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3121 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3122 priv->ieee80211->ieee_up=0;
3123 priv->retry_rts = DEFAULT_RETRY_RTS;
3124 priv->retry_data = DEFAULT_RETRY_DATA;
3125 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3126 priv->ieee80211->rate = 110; //11 mbps
3127 priv->ieee80211->short_slot = 1;
3128 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3129 priv->CckPwEnl = 6;
3130 //for silent reset
3131 priv->IrpPendingCount = 1;
3132 priv->ResetProgress = RESET_TYPE_NORESET;
3133 priv->bForcedSilentReset = 0;
3134 priv->bDisableNormalResetCheck = false;
3135 priv->force_reset = false;
3136
3137 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3138 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3139 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3140 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3141 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3142 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3143 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3144
3145 priv->ieee80211->active_scan = 1;
3146 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3147 priv->ieee80211->host_encrypt = 1;
3148 priv->ieee80211->host_decrypt = 1;
3149 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3150 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3151 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3152 priv->ieee80211->set_chan = rtl8192_set_chan;
3153 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3154 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3155 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3156 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3157 priv->ieee80211->init_wmmparam_flag = 0;
3158 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3159 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3160 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3161 priv->ieee80211->qos_support = 1;
3162
3163 //added by WB
3164 // priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3165 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3166 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3167 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3168 //for LPS
3169 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3170 // priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3171 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3172 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3173 //added by david
3174 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3175 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3176 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3177 //added by amy
3178 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3179 priv->card_type = USB;
3180
3181 //1 RTL8192SU/
3182 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3183 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3184 priv->bRFSiOrPi = 0;//o=si,1=pi;
3185 //lzm add
3186 priv->bInHctTest = false;
3187
3188 priv->MidHighPwrTHR_L1 = 0x3B;
3189 priv->MidHighPwrTHR_L2 = 0x40;
3190
3191 if(priv->bInHctTest)
3192 {
3193 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3194 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3195 }
3196 else
3197 {
3198 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3199 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3200 }
3201
3202 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3203 priv->CurrentFwCmdIO = 0;
3204
3205 priv->MinSpaceCfg = 0;
3206
3207 priv->EarlyRxThreshold = 7;
3208 priv->enable_gpio0 = 0;
3209 priv->TransmitConfig =
3210 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3211 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3212 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3213 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3214 if(priv->bInHctTest)
3215 priv->ReceiveConfig = //priv->CSMethod |
3216 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3217 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3218 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3219 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3220 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3221 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3222 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3223 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3224 else
3225 priv->ReceiveConfig = //priv->CSMethod |
3226 RCR_AMF | RCR_ADF | RCR_AB |
3227 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3228 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3229 RCR_APP_MIC | RCR_APPFCS;
3230
3231 // <Roger_EXP> 2008.06.16.
3232 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3233 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3234 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3235 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3236
3237 //1 End
3238
3239
3240 priv->AcmControl = 0;
3241 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3242 if (priv->pFirmware)
3243 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3244
3245 /* rx related queue */
3246 skb_queue_head_init(&priv->rx_queue);
3247 skb_queue_head_init(&priv->skb_queue);
3248
3249 /* Tx related queue */
3250 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3251 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3252 }
3253 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3254 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3255 }
3256 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3257 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3258 }
3259 priv->rf_set_chan = rtl8192_phy_SwChnl;
3260 }
3261
3262 //init lock here
3263 static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3264 {
3265 spin_lock_init(&priv->tx_lock);
3266 spin_lock_init(&priv->irq_lock);//added by thomas
3267 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3268 sema_init(&priv->wx_sem,1);
3269 sema_init(&priv->rf_sem,1);
3270 spin_lock_init(&priv->ps_lock);
3271 mutex_init(&priv->mutex);
3272 }
3273
3274 extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
3275
3276 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3277 //init tasklet and wait_queue here. only 2.6 above kernel is considered
3278 #define DRV_NAME "wlan0"
3279 static void rtl8192_init_priv_task(struct net_device* dev)
3280 {
3281 struct r8192_priv *priv = ieee80211_priv(dev);
3282
3283 #ifdef PF_SYNCTHREAD
3284 priv->priv_wq = create_workqueue(DRV_NAME,0);
3285 #else
3286 priv->priv_wq = create_workqueue(DRV_NAME);
3287 #endif
3288
3289 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3290
3291 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3292 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3293 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3294 // INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3295 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3296 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3297 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3298 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3299 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3300 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3301 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3302 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3303
3304 tasklet_init(&priv->irq_rx_tasklet,
3305 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3306 (unsigned long)priv);
3307 }
3308
3309 static void rtl8192_get_eeprom_size(struct net_device* dev)
3310 {
3311 u16 curCR = 0;
3312 struct r8192_priv *priv = ieee80211_priv(dev);
3313 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3314 curCR = read_nic_word_E(dev,EPROM_CMD);
3315 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3316 //whether need I consider BIT5?
3317 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3318 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3319 }
3320
3321 //used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3322 static inline u16 endian_swap(u16* data)
3323 {
3324 u16 tmp = *data;
3325 *data = (tmp >> 8) | (tmp << 8);
3326 return *data;
3327 }
3328
3329 u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3330 {
3331 u8 nEndPoint = 0;
3332 switch(UsbOption)
3333 {
3334 case 0:
3335 nEndPoint = 6;
3336 break;
3337 case 1:
3338 nEndPoint = 11;
3339 break;
3340 case 2:
3341 nEndPoint = 4;
3342 break;
3343 default:
3344 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3345 break;
3346 }
3347 return nEndPoint;
3348 }
3349
3350 u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3351 {
3352 u8 RFtype = RF_1T2R;
3353
3354 switch(Boardtype)
3355 {
3356 case 0:
3357 RFtype = RF_1T1R;
3358 break;
3359 case 1:
3360 RFtype = RF_1T2R;
3361 break;
3362 case 2:
3363 RFtype = RF_2T2R;
3364 break;
3365 case 3:
3366 RFtype = RF_2T2R_GREEN;
3367 break;
3368 default:
3369 break;
3370 }
3371
3372 return RFtype;
3373 }
3374
3375 //
3376 // Description:
3377 // Config HW adapter information into initial value.
3378 //
3379 // Assumption:
3380 // 1. After Auto load fail(i.e, check CR9346 fail)
3381 //
3382 // Created by Roger, 2008.10.21.
3383 //
3384 void
3385 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3386 {
3387 struct r8192_priv *priv = ieee80211_priv(dev);
3388 //u16 i,usValue;
3389 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3390 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3391 int i;
3392
3393 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3394
3395 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3396 //PlatformStallExecution(10000);
3397 mdelay(10);
3398 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3399
3400 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3401
3402 // Initialize IC Version && Channel Plan
3403 priv->eeprom_vid = 0;
3404 priv->eeprom_pid = 0;
3405 priv->card_8192_version = 0;
3406 priv->eeprom_ChannelPlan = 0;
3407 priv->eeprom_CustomerID = 0;
3408 priv->eeprom_SubCustomerID = 0;
3409 priv->bIgnoreDiffRateTxPowerOffset = false;
3410
3411 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3412 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3413 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3414 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3415 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3416 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3417
3418
3419
3420 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3421 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3422
3423 for(i=0; i<5; i++)
3424 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
3425
3426 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
3427
3428 {
3429 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
3430 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3431 u8 i;
3432
3433 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
3434
3435 for(i = 0; i < 6; i++)
3436 dev->dev_addr[i] = sMacAddr[i];
3437 }
3438 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3439 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3440 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3441
3442 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3443 dev->dev_addr[0], dev->dev_addr[1],
3444 dev->dev_addr[2], dev->dev_addr[3],
3445 dev->dev_addr[4], dev->dev_addr[5]);
3446
3447 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3448 priv->rf_type = RF_1T2R; //RF_2T2R
3449 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3450 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3451 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3452 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3453 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3454 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3455 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
3456
3457
3458
3459 for (rf_path = 0; rf_path < 2; rf_path++)
3460 {
3461 for (i = 0; i < 3; i++)
3462 {
3463 // Read CCK RF A & B Tx power
3464 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3465 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3466 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3467 (u8)(EEPROM_Default_TxPower & 0xff);
3468 }
3469 }
3470
3471 for (i = 0; i < 3; i++)
3472 {
3473 //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3474 //priv->RfCckChnlAreaTxPwr[rf_path][i]);
3475 //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3476 //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3477 //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3478 //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3479 }
3480
3481 // Assign dedicated channel tx power
3482 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3483 {
3484 if (i < 3) // Cjanel 1-3
3485 index = 0;
3486 else if (i < 9) // Channel 4-9
3487 index = 1;
3488 else // Channel 10-14
3489 index = 2;
3490
3491 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3492 priv->RfTxPwrLevelCck[rf_path][i] =
3493 priv->RfCckChnlAreaTxPwr[rf_path][index];
3494 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3495 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3496 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3497 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3498 }
3499
3500 for(i=0; i<14; i++)
3501 {
3502 //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3503 //rf_path, i, priv->RfTxPwrLevelCck[0][i],
3504 //priv->RfTxPwrLevelOfdm1T[0][i] ,
3505 //priv->RfTxPwrLevelOfdm2T[0][i] );
3506 }
3507
3508 //
3509 // Update remained HAL variables.
3510 //
3511 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3512 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3513 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3514 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3515 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3516 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3517 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
3518 priv->LedStrategy = SW_LED_MODE0;
3519
3520 init_rate_adaptive(dev);
3521
3522 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
3523
3524 }
3525
3526 //
3527 // Description:
3528 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3529 //
3530 // Assumption:
3531 // 1. CR9346 regiser has verified.
3532 // 2. PASSIVE_LEVEL (USB interface)
3533 //
3534 // Created by Roger, 2008.10.21.
3535 //
3536 void
3537 rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3538 {
3539 struct r8192_priv *priv = ieee80211_priv(dev);
3540 u16 i,usValue;
3541 u8 tmpU1b, tempval;
3542 u16 EEPROMId;
3543 u8 hwinfo[HWSET_MAX_SIZE_92S];
3544 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3545
3546
3547 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3548
3549 //
3550 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
3551 // 2008.11.25.
3552 //
3553 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3554 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3555 //PlatformStallExecution(1000);
3556 mdelay(10);
3557 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3558
3559 // Retrieve Chip version.
3560 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3561 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3562
3563 switch(priv->card_8192_version)
3564 {
3565 case 0:
3566 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3567 break;
3568 case 1:
3569 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3570 break;
3571 case 2:
3572 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3573 break;
3574 default:
3575 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3576 priv->card_8192_version = VERSION_8192S_BCUT;
3577 break;
3578 }
3579
3580 //if (IS_BOOT_FROM_EEPROM(Adapter))
3581 if(priv->EepromOrEfuse)
3582 { // Read frin EEPROM
3583 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3584 //PlatformStallExecution(10000);
3585 mdelay(10);
3586 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3587 // Read all Content from EEPROM or EFUSE.
3588 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3589 {
3590 usValue = eprom_read(dev, (u16) (i>>1));
3591 *((u16*)(&hwinfo[i])) = usValue;
3592 }
3593 }
3594 else if (!(priv->EepromOrEfuse))
3595 { // Read from EFUSE
3596
3597 //
3598 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3599 // from suspend mode.
3600 // 2008.10.21.
3601 //
3602 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3603 //PlatformStallExecution(10000);
3604 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3605 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3606
3607 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3608 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3609 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3610 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3611
3612 // Read EFUSE real map to shadow.
3613 EFUSE_ShadowMapUpdate(dev);
3614 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3615 }
3616 else
3617 {
3618 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3619 }
3620
3621 //YJ,test,090106
3622 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3623 //
3624 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3625 //
3626 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3627
3628 //
3629 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3630 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3631 // 2008.10.21.
3632 //
3633 EEPROMId = *((u16 *)&hwinfo[0]);
3634
3635 if( EEPROMId != RTL8190_EEPROM_ID )
3636 {
3637 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3638 priv->bTXPowerDataReadFromEEPORM = FALSE;
3639 priv->AutoloadFailFlag=TRUE;
3640 }
3641 else
3642 {
3643 priv->AutoloadFailFlag=FALSE;
3644 priv->bTXPowerDataReadFromEEPORM = TRUE;
3645 }
3646 // Read IC Version && Channel Plan
3647 if(!priv->AutoloadFailFlag)
3648 {
3649 // VID, PID
3650 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3651 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3652 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3653
3654
3655 // EEPROM Version ID, Channel plan
3656 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3657 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3658
3659 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3660 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3661 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3662 }
3663 else
3664 {
3665 //priv->eeprom_vid = 0;
3666 //priv->eeprom_pid = 0;
3667 //priv->EEPROMVersion = 0;
3668 //priv->eeprom_ChannelPlan = 0;
3669 //priv->eeprom_CustomerID = 0;
3670 //priv->eeprom_SubCustomerID = 0;
3671
3672 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3673 return;
3674 }
3675
3676
3677 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3678 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3679 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3680 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3681 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3682 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3683 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3684 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3685
3686
3687 // Read USB optional function.
3688 if(!priv->AutoloadFailFlag)
3689 {
3690 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3691 }
3692 else
3693 {
3694 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3695 }
3696
3697
3698 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3699
3700 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3701 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3702
3703 #ifdef TO_DO_LIST
3704 //
3705 // Decide CustomerID according to VID/DID or EEPROM
3706 //
3707 switch(pHalData->EEPROMCustomerID)
3708 {
3709 case EEPROM_CID_ALPHA:
3710 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3711 break;
3712
3713 case EEPROM_CID_CAMEO:
3714 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3715 break;
3716
3717 case EEPROM_CID_SITECOM:
3718 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3719 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3720
3721 break;
3722
3723 case EEPROM_CID_WHQL:
3724 Adapter->bInHctTest = TRUE;
3725
3726 pMgntInfo->bSupportTurboMode = FALSE;
3727 pMgntInfo->bAutoTurboBy8186 = FALSE;
3728
3729 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3730 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3731 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3732 pMgntInfo->keepAliveLevel = 0;
3733 break;
3734
3735 default:
3736 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3737 break;
3738
3739 }
3740
3741 //
3742 // Led mode
3743 //
3744 switch(pMgntInfo->CustomerID)
3745 {
3746 case RT_CID_DEFAULT:
3747 case RT_CID_819x_ALPHA:
3748 pHalData->LedStrategy = SW_LED_MODE1;
3749 pHalData->bRegUseLed = TRUE;
3750 pHalData->SwLed1.bLedOn = TRUE;
3751 break;
3752 case RT_CID_819x_CAMEO:
3753 pHalData->LedStrategy = SW_LED_MODE1;
3754 pHalData->bRegUseLed = TRUE;
3755 break;
3756
3757 case RT_CID_819x_Sitecom:
3758 pHalData->LedStrategy = SW_LED_MODE2;
3759 pHalData->bRegUseLed = TRUE;
3760 break;
3761
3762 default:
3763 pHalData->LedStrategy = SW_LED_MODE0;
3764 break;
3765 }
3766 #endif
3767
3768 // Read USB PHY parameters.
3769 for(i=0; i<5; i++)
3770 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3771
3772 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3773
3774
3775 //Read Permanent MAC address
3776 for(i=0; i<6; i++)
3777 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3778
3779 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3780 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3781 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3782
3783 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
3784 dev->dev_addr[0], dev->dev_addr[1],
3785 dev->dev_addr[2], dev->dev_addr[3],
3786 dev->dev_addr[4], dev->dev_addr[5]);
3787
3788 //
3789 // Get CustomerID(Boad Type)
3790 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3791 // Others: Reserved. Default is 0x2: RTL8192SU.
3792 //
3793 //if(!priv->AutoloadFailFlag)
3794 //{
3795 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3796 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3797 //}
3798 //else
3799 //{
3800 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3801 // priv->rf_type = RF_1T2R;
3802 //}
3803
3804 priv->rf_chip = RF_6052;
3805
3806 priv->rf_chip = RF_6052;//lzm test
3807 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3808 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3809
3810 //
3811 // Read antenna tx power offset of B/C/D to A from EEPROM
3812 // and read ThermalMeter from EEPROM
3813 //
3814 //if(!priv->AutoloadFailFlag)
3815 {
3816 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3817 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3818 }
3819 //else
3820 //{
3821 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3822 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3823 //}
3824
3825 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3826 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3827
3828 //
3829 // Read Tx Power gain offset of legacy OFDM to HT rate.
3830 // Read CrystalCap from EEPROM
3831 //
3832 //if(!priv->AutoloadFailFlag)
3833 {
3834 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3835 }
3836 //else
3837 //{
3838 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3839 //}
3840
3841 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3842
3843 //
3844 // Get Tx Power Base.
3845 //
3846 //if(!priv->AutoloadFailFlag)
3847 {
3848 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3849 }
3850 //else
3851 //{
3852 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3853 //}
3854
3855 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3856
3857
3858 //
3859 // Get TSSI value for each path.
3860 //
3861 //if(!priv->AutoloadFailFlag)
3862 {
3863 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3864 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3865 }
3866 //else
3867 //{ // Default setting for Empty EEPROM
3868 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3869 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3870 //}
3871
3872 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3873
3874 //
3875 // Get Tx Power tracking mode.
3876 //
3877 //if(!priv->AutoloadFailFlag)
3878 {
3879 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3880 }
3881
3882 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3883
3884
3885 {
3886 //
3887 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3888 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3889 //
3890
3891 //
3892 // Get Tx Power Level by Channel
3893 //
3894 //if(!priv->AutoloadFailFlag)
3895 {
3896 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3897 // 92S suupport RF A & B
3898 for (rf_path = 0; rf_path < 2; rf_path++)
3899 {
3900 for (i = 0; i < 3; i++)
3901 {
3902 // Read CCK RF A & B Tx power
3903 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3904 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3905
3906 // Read OFDM RF A & B Tx power for 1T
3907 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3908 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3909
3910 // Read OFDM RF A & B Tx power for 2T
3911 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3912 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3913 }
3914 }
3915
3916 }
3917 //
3918 // Update Tx Power HAL variables.
3919 //
3920 for (rf_path = 0; rf_path < 2; rf_path++)
3921 {
3922 for (i = 0; i < 3; i++)
3923 {
3924 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3925 priv->RfCckChnlAreaTxPwr[rf_path][i]);
3926 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
3927 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3928 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3929 }
3930
3931 // Assign dedicated channel tx power
3932 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3933 {
3934 if (i < 3) // Cjanel 1-3
3935 index = 0;
3936 else if (i < 9) // Channel 4-9
3937 index = 1;
3938 else // Channel 10-14
3939 index = 2;
3940
3941 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
3942 priv->RfTxPwrLevelCck[rf_path][i] =
3943 priv->RfCckChnlAreaTxPwr[rf_path][index];
3944 priv->RfTxPwrLevelOfdm1T[rf_path][i] =
3945 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3946 priv->RfTxPwrLevelOfdm2T[rf_path][i] =
3947 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3948 if (rf_path == 0)
3949 {
3950 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3951 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3952 }
3953 }
3954
3955 for(i=0; i<14; i++)
3956 {
3957 RT_TRACE((COMP_INIT),
3958 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3959 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3960 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3961 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3962 }
3963 }
3964 }
3965
3966 //
3967 // 2009/02/09 Cosa add for new EEPROM format
3968 //
3969 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3970 {
3971 // Read tx power difference between HT OFDM 20/40 MHZ
3972 if (i < 3) // Cjanel 1-3
3973 index = 0;
3974 else if (i < 9) // Channel 4-9
3975 index = 1;
3976 else // Channel 10-14
3977 index = 2;
3978
3979 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3980 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3981 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3982
3983 // Read OFDM<->HT tx power diff
3984 if (i < 3) // Cjanel 1-3
3985 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3986 else if (i < 9) // Channel 4-9
3987 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3988 else // Channel 10-14
3989 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3990
3991 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3992 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3993 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3994
3995 //
3996 // Read Band Edge tx power offset and check if user enable the ability
3997 //
3998 // HT 40 band edge channel
3999 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
4000 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4001 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4002 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
4003 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4004 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4005 // HT 20 band edge channel
4006 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
4007 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4008 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4009 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
4010 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4011 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4012 // OFDM band edge channel
4013 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
4014 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
4015 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
4016 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
4017 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
4018 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
4019
4020 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
4021 }
4022
4023 for(i=0; i<14; i++)
4024 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
4025 for(i=0; i<14; i++)
4026 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
4027 for(i=0; i<14; i++)
4028 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
4029 for(i=0; i<14; i++)
4030 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
4031 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4032 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
4033 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
4034 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4035 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
4036 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
4037
4038 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4039 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
4040 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
4041 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4042 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
4043 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
4044
4045 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4046 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
4047 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4048 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4049 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4050 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4051 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
4052
4053 //
4054 // Update remained HAL variables.
4055 //
4056 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4057 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4058 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4059 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4060 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4061 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4062 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4063 priv->LedStrategy = SW_LED_MODE0;
4064
4065 init_rate_adaptive(dev);
4066
4067 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4068
4069 //return RT_STATUS_SUCCESS;
4070 }
4071
4072
4073 //
4074 // Description:
4075 // Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4076 //
4077 // Assumption:
4078 // 1. CR9346 regiser has verified.
4079 // 2. PASSIVE_LEVEL (USB interface)
4080 //
4081 // Created by Roger, 2008.10.21.
4082 //
4083 static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4084 {
4085 struct r8192_priv *priv = ieee80211_priv(dev);
4086 u8 tmpU1b;
4087
4088 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4089
4090 // Retrieve Chip version.
4091 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4092 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4093
4094 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4095
4096 // To check system boot selection.
4097 if (tmpU1b & CmdEERPOMSEL)
4098 {
4099 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4100 priv->EepromOrEfuse = TRUE;
4101 }
4102 else
4103 {
4104 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4105 priv->EepromOrEfuse = FALSE;
4106 }
4107
4108 // To check autoload success or not.
4109 if (tmpU1b & CmdEEPROM_En)
4110 {
4111 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4112 priv->AutoloadFailFlag=FALSE;
4113 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4114 }
4115 else
4116 { // Auto load fail.
4117 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4118 priv->AutoloadFailFlag=TRUE;
4119 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4120
4121 //if (IS_BOOT_FROM_EFUSE(Adapter))
4122 if(!priv->EepromOrEfuse)
4123 {
4124 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4125 EFUSE_ShadowMapUpdate(dev);
4126 }
4127 }
4128 #ifdef TO_DO_LIST
4129 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4130 {
4131 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4132 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4133 }
4134 else
4135 {
4136 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4137 }
4138
4139 switch(pMgntInfo->ChannelPlan)
4140 {
4141 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4142 {
4143 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4144
4145 pDot11dInfo->bEnabled = TRUE;
4146 }
4147 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4148 break;
4149 }
4150
4151 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4152 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4153
4154 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4155 #endif
4156
4157 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4158
4159 //return RT_STATUS_SUCCESS;
4160 }
4161
4162 short rtl8192_get_channel_map(struct net_device * dev)
4163 {
4164 struct r8192_priv *priv = ieee80211_priv(dev);
4165 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4166 printk("rtl8180_init:Error channel plan! Set to default.\n");
4167 priv->ChannelPlan= 0;
4168 }
4169 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
4170
4171 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4172 return 0;
4173 }
4174
4175 short rtl8192_init(struct net_device *dev)
4176 {
4177
4178 struct r8192_priv *priv = ieee80211_priv(dev);
4179
4180 rtl8192_init_priv_variable(dev);
4181 rtl8192_init_priv_lock(priv);
4182 rtl8192_init_priv_task(dev);
4183 rtl8192_get_eeprom_size(dev);
4184 priv->ops->rtl819x_read_eeprom_info(dev);
4185 rtl8192_get_channel_map(dev);
4186 init_hal_dm(dev);
4187 init_timer(&priv->watch_dog_timer);
4188 priv->watch_dog_timer.data = (unsigned long)dev;
4189 priv->watch_dog_timer.function = watch_dog_timer_callback;
4190
4191 //rtl8192_adapter_start(dev);
4192 #ifdef DEBUG_EPROM
4193 dump_eprom(dev);
4194 #endif
4195 return 0;
4196 }
4197
4198 /******************************************************************************
4199 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4200 * not to do all the hw config as its name says
4201 * input: net_device dev
4202 * output: none
4203 * return: none
4204 * notice: This part need to modified according to the rate set we filtered
4205 * ****************************************************************************/
4206 void rtl8192_hwconfig(struct net_device* dev)
4207 {
4208 u32 regRATR = 0, regRRSR = 0;
4209 u8 regBwOpMode = 0, regTmp = 0;
4210 struct r8192_priv *priv = ieee80211_priv(dev);
4211
4212 // Set RRSR, RATR, and BW_OPMODE registers
4213 //
4214 switch(priv->ieee80211->mode)
4215 {
4216 case WIRELESS_MODE_B:
4217 regBwOpMode = BW_OPMODE_20MHZ;
4218 regRATR = RATE_ALL_CCK;
4219 regRRSR = RATE_ALL_CCK;
4220 break;
4221 case WIRELESS_MODE_A:
4222 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4223 regRATR = RATE_ALL_OFDM_AG;
4224 regRRSR = RATE_ALL_OFDM_AG;
4225 break;
4226 case WIRELESS_MODE_G:
4227 regBwOpMode = BW_OPMODE_20MHZ;
4228 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4229 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4230 break;
4231 case WIRELESS_MODE_AUTO:
4232 #ifdef TO_DO_LIST
4233 if (Adapter->bInHctTest)
4234 {
4235 regBwOpMode = BW_OPMODE_20MHZ;
4236 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4237 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4238 }
4239 else
4240 #endif
4241 {
4242 regBwOpMode = BW_OPMODE_20MHZ;
4243 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4244 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4245 }
4246 break;
4247 case WIRELESS_MODE_N_24G:
4248 // It support CCK rate by default.
4249 // CCK rate will be filtered out only when associated AP does not support it.
4250 regBwOpMode = BW_OPMODE_20MHZ;
4251 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4252 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4253 break;
4254 case WIRELESS_MODE_N_5G:
4255 regBwOpMode = BW_OPMODE_5G;
4256 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4257 regRRSR = RATE_ALL_OFDM_AG;
4258 break;
4259 }
4260
4261 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4262 {
4263 u32 ratr_value = 0;
4264 ratr_value = regRATR;
4265 if (priv->rf_type == RF_1T2R)
4266 {
4267 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4268 }
4269 write_nic_dword(dev, RATR0, ratr_value);
4270 write_nic_byte(dev, UFWP, 1);
4271 }
4272 regTmp = read_nic_byte(dev, 0x313);
4273 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4274 write_nic_dword(dev, RRSR, regRRSR);
4275
4276 //
4277 // Set Retry Limit here
4278 //
4279 write_nic_word(dev, RETRY_LIMIT,
4280 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4281 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4282 // Set Contention Window here
4283
4284 // Set Tx AGC
4285
4286 // Set Tx Antenna including Feedback control
4287
4288 // Set Auto Rate fallback control
4289
4290
4291 }
4292
4293
4294 //
4295 // Description:
4296 // Initial HW relted registers.
4297 //
4298 // Assumption:
4299 // Config RTL8192S USB MAC, we should config MAC before download FW.
4300 //
4301 // 2008.09.03, Added by Roger.
4302 //
4303 static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4304 {
4305 u8 tmpU1b;// i;
4306 // u16 tmpU2b;
4307 // u32 tmpU4b;
4308 u8 PollingCnt = 20;
4309
4310 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4311
4312 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4313
4314 //
4315 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4316 // MAC I/O to solve FW download fail when system from resume sate.
4317 // 2008.11.04.
4318 //
4319 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4320 if(tmpU1b & 0x80)
4321 {
4322 tmpU1b &= 0x3f;
4323 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4324 }
4325 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4326 write_nic_byte(dev, RPWM, 0x0);
4327
4328 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4329 tmpU1b &= 0x73;
4330 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4331 udelay(1000);
4332
4333 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4334 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4335 write_nic_byte(dev, SPS0_CTRL, 0x57);
4336
4337 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4338 tmpU1b = read_nic_byte(dev, AFE_MISC);
4339 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4340
4341 //Enable PLL Power (LDOA15V)
4342 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4343 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4344
4345 //Enable LDOV12D block
4346 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4347 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4348
4349 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4350 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4351
4352 //PlatformSleepUs(2000);
4353
4354 //Enable Switch Regulator Block
4355 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4356 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4357
4358 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4359
4360 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4361 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4362
4363 //Engineer Packet CP test Enable
4364 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4365 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4366
4367 //Support 64k IMEM, suggested by SD1 Alex.
4368 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4369 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4370
4371 //Enable AFE clock
4372 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4373 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4374
4375 //Enable AFE PLL Macro Block
4376 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4377 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4378
4379 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4380 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4381 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4382
4383 // Switch to 40M clock
4384 write_nic_byte(dev, SYS_CLKR, 0x00);
4385
4386 //SSC Disable
4387 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4388 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4389 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4390
4391 //Enable MAC clock
4392 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4393 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4394
4395 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4396 write_nic_byte(dev, PMC_FSM, 0x02);
4397
4398 //Enable Core digital and enable IOREG R/W
4399 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4400 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4401
4402 //Enable REG_EN
4403 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4404 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4405
4406 //Switch the control path to FW
4407 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4408 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4409
4410 write_nic_byte(dev, CMDR, 0xFC);
4411 write_nic_byte(dev, CMDR+1, 0x37);
4412
4413 //Fix the RX FIFO issue(usb error), 970410
4414 tmpU1b = read_nic_byte_E(dev, 0x5c);
4415 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4416
4417 //For power save, used this in the bit file after 970621
4418 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4419 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4420
4421 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4422 write_nic_byte_E(dev, 0x1c, 0x80);
4423
4424 //
4425 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4426 // We should reset TxDMA if IMEM RPT was not ready.
4427 // Suggested by SD1 Alex. 2008.10.23.
4428 //
4429 do
4430 {
4431 tmpU1b = read_nic_byte(dev, TCR);
4432 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4433 break;
4434 //PlatformStallExecution(5);
4435 udelay(5);
4436 }while(PollingCnt--); // Delay 1ms
4437
4438 if(PollingCnt <= 0 )
4439 {
4440 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4441 tmpU1b = read_nic_byte(dev, CMDR);
4442 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4443 udelay(2);
4444 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4445 }
4446
4447
4448 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4449 }
4450
4451 //
4452 // Description:
4453 // Initial HW relted registers.
4454 //
4455 // Assumption:
4456 // 1. This function is only invoked at driver intialization once.
4457 // 2. PASSIVE LEVEL.
4458 //
4459 // 2008.06.10, Added by Roger.
4460 //
4461 static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4462 {
4463 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4464 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4465 //u8 tmpU1b, RxPageCfg, i;
4466 u16 tmpU2b;
4467 u8 tmpU1b;//, i;
4468
4469
4470 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4471
4472 // Enable Tx/Rx
4473 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4474 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4475 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4476 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4477
4478 // Loopback mode or not
4479 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4480 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4481 tmpU1b = LBK_NORMAL;
4482 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4483 tmpU1b = LBK_MAC_DLB;
4484 else
4485 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4486
4487 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4488 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4489
4490 // Set RCR
4491 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4492 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4493
4494
4495 // Set RQPN
4496 //
4497 // <Roger_Notes> 2008.08.18.
4498 // 6 endpoints:
4499 // (1) Page number on CMDQ is 0x03.
4500 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4501 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4502 // (4) Page number on PUBQ is 0xdd
4503 //
4504 // 11 endpoints:
4505 // (1) Page number on CMDQ is 0x00.
4506 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4507 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4508 // (4) Page number on PUBQ is 0xd8
4509 //
4510 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4511 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
4512
4513 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4514 tmpU1b = read_nic_byte_E(dev, 0x5C);
4515 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4516
4517 // For EFUSE init configuration.
4518 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4519 if (priv->bBootFromEfuse)
4520 {
4521 u8 tempval;
4522
4523 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4524 tempval &= 0xFE;
4525 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4526
4527 // Enable LDO 2.5V for write action
4528 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4529 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4530
4531 // Change Efuse Clock for write action
4532 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4533
4534 // Change Program timing
4535 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4536 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4537 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4538 }
4539
4540
4541 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4542 }
4543
4544 void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4545 {
4546
4547 struct r8192_priv *priv = ieee80211_priv(dev);
4548 u8 regBwOpMode = 0;
4549 u32 regRATR = 0, regRRSR = 0;
4550 u8 regTmp = 0;
4551 u32 i = 0;
4552
4553 //1 This part need to modified according to the rate set we filtered!!
4554 //
4555 // Set RRSR, RATR, and BW_OPMODE registers
4556 //
4557 switch(priv->ieee80211->mode)
4558 {
4559 case WIRELESS_MODE_B:
4560 regBwOpMode = BW_OPMODE_20MHZ;
4561 regRATR = RATE_ALL_CCK;
4562 regRRSR = RATE_ALL_CCK;
4563 break;
4564 case WIRELESS_MODE_A:
4565 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4566 regRATR = RATE_ALL_OFDM_AG;
4567 regRRSR = RATE_ALL_OFDM_AG;
4568 break;
4569 case WIRELESS_MODE_G:
4570 regBwOpMode = BW_OPMODE_20MHZ;
4571 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4572 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4573 break;
4574 case WIRELESS_MODE_AUTO:
4575 if (priv->bInHctTest)
4576 {
4577 regBwOpMode = BW_OPMODE_20MHZ;
4578 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4579 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4580 }
4581 else
4582 {
4583 regBwOpMode = BW_OPMODE_20MHZ;
4584 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4585 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4586 }
4587 break;
4588 case WIRELESS_MODE_N_24G:
4589 // It support CCK rate by default.
4590 // CCK rate will be filtered out only when associated AP does not support it.
4591 regBwOpMode = BW_OPMODE_20MHZ;
4592 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4593 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4594 break;
4595 case WIRELESS_MODE_N_5G:
4596 regBwOpMode = BW_OPMODE_5G;
4597 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4598 regRRSR = RATE_ALL_OFDM_AG;
4599 break;
4600 }
4601
4602 //
4603 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4604 // 2008.09.23.
4605 //
4606 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
4607 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
4608
4609 //
4610 // Update SIFS timing.
4611 //
4612 //priv->SifsTime = 0x0e0e0a0a;
4613 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4614 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4615 // SIFS for CCK Data ACK
4616 write_nic_byte(dev, SIFS_CCK, val[0]);
4617 // SIFS for CCK consecutive tx like CTS data!
4618 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4619
4620 // SIFS for OFDM Data ACK
4621 write_nic_byte(dev, SIFS_OFDM, val[2]);
4622 // SIFS for OFDM consecutive tx like CTS data!
4623 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4624 }
4625
4626 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4627 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4628
4629 //
4630 // Suggested by SD1 Alex, 2008-06-14.
4631 //
4632 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4633
4634 //
4635 // Set Data Auto Rate Fallback Retry Count register.
4636 //
4637 write_nic_dword(dev, DARFRC, 0x02010000);
4638 write_nic_dword(dev, DARFRC+4, 0x06050403);
4639 write_nic_dword(dev, RARFRC, 0x02010000);
4640 write_nic_dword(dev, RARFRC+4, 0x06050403);
4641
4642 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4643 for (i = 0; i < 8; i++)
4644 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
4645
4646 //
4647 // Aggregation length limit. Revised by Roger. 2008.09.22.
4648 //
4649 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4650 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4651 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4652
4653 // Set NAV protection length
4654 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4655
4656 // Set TXOP stall control for several queue/HI/BCN/MGT/
4657 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4658
4659 // Set MSDU lifetime.
4660 write_nic_byte(dev, MLT, 0x8f);
4661
4662 // Set CCK/OFDM SIFS
4663 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4664 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4665
4666 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4667
4668 // CF-END Threshold
4669 write_nic_byte(dev, CFEND_TH, 0xFF);
4670
4671 //
4672 // For Min Spacing configuration.
4673 //
4674 switch(priv->rf_type)
4675 {
4676 case RF_1T2R:
4677 case RF_1T1R:
4678 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4679 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4680 break;
4681 case RF_2T2R:
4682 case RF_2T2R_GREEN:
4683 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4684 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4685 break;
4686 }
4687 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4688
4689 //LZM 090219
4690 //
4691 // For Min Spacing configuration.
4692 //
4693 //priv->MinSpaceCfg = 0x00;
4694 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4695 }
4696
4697
4698 // Description: Initial HW relted registers.
4699 //
4700 // Assumption: This function is only invoked at driver intialization once.
4701 //
4702 // 2008.06.10, Added by Roger.
4703 bool rtl8192SU_adapter_start(struct net_device *dev)
4704 {
4705 struct r8192_priv *priv = ieee80211_priv(dev);
4706 //u32 dwRegRead = 0;
4707 //bool init_status = true;
4708 //u32 ulRegRead;
4709 bool rtStatus = true;
4710 //u8 PipeIndex;
4711 //u8 eRFPath, tmpU1b;
4712 u8 fw_download_times = 1;
4713
4714
4715 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4716
4717 //pHalData->bGPIOChangeRF = FALSE;
4718
4719
4720 //
4721 // <Roger_Notes> 2008.06.15.
4722 //
4723 // Initialization Steps on RTL8192SU:
4724 // a. MAC initialization prior to sending down firmware code.
4725 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4726 // c. MAC configuration after firmware has been download successfully.
4727 // d. Initialize BB related configurations.
4728 // e. Initialize RF related configurations.
4729 // f. Start to BulkIn transfer.
4730 //
4731
4732 //
4733 //a. MAC initialization prior to send down firmware code.
4734 //
4735 start:
4736 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4737
4738 //
4739 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4740 //
4741 rtStatus = FirmwareDownload92S(dev);
4742 if(rtStatus != true)
4743 {
4744 if(fw_download_times == 1){
4745 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4746 fw_download_times = fw_download_times + 1;
4747 goto start;
4748 }else{
4749 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4750 goto end;
4751 }
4752 }
4753 //
4754 //c. MAC configuration after firmware has been download successfully.
4755 //
4756 rtl8192SU_MacConfigAfterFwDownload(dev);
4757
4758 //priv->bLbusEnable = TRUE;
4759 //if(priv->RegRfOff == TRUE)
4760 // priv->eRFPowerState = eRfOff;
4761
4762 // Save target channel
4763 // <Roger_Notes> Current Channel will be updated again later.
4764 //priv->CurrentChannel = Channel;
4765 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4766 if(rtStatus != true)
4767 {
4768 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4769 goto end;
4770 }
4771 if (1){
4772 int i;
4773 for (i=0; i<4; i++)
4774 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4775 write_nic_byte(dev,AcmHwCtrl, 0x01);
4776 }
4777
4778
4779 //
4780 //d. Initialize BB related configurations.
4781 //
4782
4783 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4784 if(rtStatus != true)
4785 {
4786 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4787 goto end;
4788 }
4789
4790 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4791
4792 //
4793 // e. Initialize RF related configurations.
4794 //
4795 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4796 priv->Rf_Mode = RF_OP_By_SW_3wire;
4797
4798 // For RF test only from Scott's suggestion
4799 //write_nic_byte(dev, 0x27, 0xDB);
4800 //write_nic_byte(dev, 0x1B, 0x07);
4801
4802
4803 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4804
4805 // <Roger_Notes> The following IOs are configured for each RF modules.
4806 // Enable RF module and reset RF and SDM module. 2008.11.17.
4807 if(priv->card_8192_version == VERSION_8192S_ACUT)
4808 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4809 else
4810 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4811
4812 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4813 if(rtStatus != true)
4814 {
4815 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4816 goto end;
4817 }
4818
4819
4820 // Set CCK and OFDM Block "ON"
4821 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4822 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4823
4824 //
4825 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4826 // Revised by Roger, 2008.12.18.
4827 //
4828 if(priv->rf_type == RF_1T1R)
4829 {
4830 // This is needed for PHY_REG after 20081219
4831 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4832 // This is needed for PHY_REG before 20081219
4833 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4834 }
4835
4836
4837 //LZM 090219
4838 // Set CCK and OFDM Block "ON"
4839 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4840 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4841
4842
4843 //3//Get hardware version, do it in read eeprom?
4844 //GetHardwareVersion819xUsb(Adapter);
4845
4846 //3//
4847 //3 //Set Hardware
4848 //3//
4849 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4850
4851 //
4852 // <Roger_Notes> We set MAC address here if autoload was failed before,
4853 // otherwise IDR0 will NOT contain any value.
4854 //
4855 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4856 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4857 if(!priv->bInHctTest)
4858 {
4859 if(priv->ResetProgress == RESET_TYPE_NORESET)
4860 {
4861 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4862 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4863 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4864 }
4865 }
4866 else
4867 {
4868 priv->ieee80211->mode = WIRELESS_MODE_G;
4869 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4870 }
4871
4872 //Security related.
4873 //-----------------------------------------------------------------------------
4874 // Set up security related. 070106, by rcnjko:
4875 // 1. Clear all H/W keys.
4876 // 2. Enable H/W encryption/decryption.
4877 //-----------------------------------------------------------------------------
4878 //CamResetAllEntry(Adapter);
4879 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4880
4881 //SecClearAllKeys(Adapter);
4882 CamResetAllEntry(dev);
4883 //SecInit(Adapter);
4884 {
4885 u8 SECR_value = 0x0;
4886 SECR_value |= SCR_TxEncEnable;
4887 SECR_value |= SCR_RxDecEnable;
4888 SECR_value |= SCR_NoSKMC;
4889 write_nic_byte(dev, SECR, SECR_value);
4890 }
4891
4892 #ifdef TO_DO_LIST
4893
4894 //PHY_UpdateInitialGain(dev);
4895
4896 if(priv->RegRfOff == true)
4897 { // User disable RF via registry.
4898 u8 eRFPath = 0;
4899
4900 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4901 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4902 // Those action will be discard in MgntActSet_RF_State because off the same state
4903 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4904 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4905 }
4906 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4907 { // H/W or S/W RF OFF before sleep.
4908 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4909 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4910 }
4911 else
4912 {
4913 priv->eRFPowerState = eRfOn;
4914 priv->RfOffReason = 0;
4915 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4916 }
4917
4918 #endif
4919
4920
4921 //
4922 // f. Start to BulkIn transfer.
4923 //
4924 #ifdef TO_DO_LIST
4925
4926 #ifndef UNDER_VISTA
4927 {
4928 u8 i;
4929 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4930
4931 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4932 {
4933 if (PipeIndex == 0)
4934 {
4935 for(i=0; i<32; i++)
4936 HalUsbInMpdu(Adapter, PipeIndex);
4937 }
4938 else
4939 {
4940 //HalUsbInMpdu(Adapter, PipeIndex);
4941 //HalUsbInMpdu(Adapter, PipeIndex);
4942 //HalUsbInMpdu(Adapter, PipeIndex);
4943 }
4944 }
4945 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4946 }
4947 #else
4948 // Joseph add to 819X code base for Vista USB platform.
4949 // This part may need to be add to Hal819xU code base. too.
4950 PlatformUsbEnableInPipes(Adapter);
4951 #endif
4952
4953 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4954
4955 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4956
4957 //
4958 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4959 // 2008.07.10.
4960 //
4961
4962 #endif
4963
4964 //
4965 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4966 // TX power index for different rate set.
4967 //
4968 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4969 {
4970 // Get original hw reg values
4971 PHY_GetHWRegOriginalValue(dev);
4972
4973 // Write correct tx power index//FIXLZM
4974 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4975 }
4976
4977 {
4978 u8 tmpU1b = 0;
4979 // EEPROM R/W workaround
4980 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4981 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4982 }
4983
4984 //
4985 //<Roger_Notes> 2008.08.19.
4986 // We return status here for temporal FPGA verification, 2008.08.19.
4987
4988 #ifdef RTL8192SU_FW_IQK
4989 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4990 ChkFwCmdIoDone(dev);
4991 #endif
4992
4993 //
4994 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4995 // 2008.11.27.
4996 //
4997 write_nic_dword(dev, WFM5, FW_RA_RESET);
4998 ChkFwCmdIoDone(dev);
4999 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
5000 ChkFwCmdIoDone(dev);
5001 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
5002 ChkFwCmdIoDone(dev);
5003 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
5004
5005 // <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
5006 //
5007
5008 end:
5009 return rtStatus;
5010 }
5011
5012 /***************************************************************************
5013 -------------------------------NET STUFF---------------------------
5014 ***************************************************************************/
5015
5016 static struct net_device_stats *rtl8192_stats(struct net_device *dev)
5017 {
5018 struct r8192_priv *priv = ieee80211_priv(dev);
5019
5020 return &priv->ieee80211->stats;
5021 }
5022
5023 bool
5024 HalTxCheckStuck819xUsb(
5025 struct net_device *dev
5026 )
5027 {
5028 struct r8192_priv *priv = ieee80211_priv(dev);
5029 u16 RegTxCounter = read_nic_word(dev, 0x128);
5030 bool bStuck = FALSE;
5031 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
5032 if(priv->TxCounter==RegTxCounter)
5033 bStuck = TRUE;
5034
5035 priv->TxCounter = RegTxCounter;
5036
5037 return bStuck;
5038 }
5039
5040 /*
5041 * <Assumption: RT_TX_SPINLOCK is acquired.>
5042 * First added: 2006.11.19 by emily
5043 */
5044 RESET_TYPE
5045 TxCheckStuck(struct net_device *dev)
5046 {
5047 struct r8192_priv *priv = ieee80211_priv(dev);
5048 u8 QueueID;
5049 // PRT_TCB pTcb;
5050 // u8 ResetThreshold;
5051 bool bCheckFwTxCnt = false;
5052 //unsigned long flags;
5053
5054 //
5055 // Decide Stuch threshold according to current power save mode
5056 //
5057
5058 // RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5059 // PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5060 // spin_lock_irqsave(&priv->ieee80211->lock,flags);
5061 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5062 {
5063 if(QueueID == TXCMD_QUEUE)
5064 continue;
5065 #if 1
5066 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5067 continue;
5068 #endif
5069
5070 bCheckFwTxCnt = true;
5071 }
5072 // PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5073 // spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5074 // RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5075 #if 1
5076 if(bCheckFwTxCnt)
5077 {
5078 if(HalTxCheckStuck819xUsb(dev))
5079 {
5080 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5081 return RESET_TYPE_SILENT;
5082 }
5083 }
5084 #endif
5085 return RESET_TYPE_NORESET;
5086 }
5087
5088 bool
5089 HalRxCheckStuck819xUsb(struct net_device *dev)
5090 {
5091 u16 RegRxCounter = read_nic_word(dev, 0x130);
5092 struct r8192_priv *priv = ieee80211_priv(dev);
5093 bool bStuck = FALSE;
5094 //#ifdef RTL8192SU
5095
5096 //#else
5097 static u8 rx_chk_cnt = 0;
5098 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5099 // If rssi is small, we should check rx for long time because of bad rx.
5100 // or maybe it will continuous silent reset every 2 seconds.
5101 rx_chk_cnt++;
5102 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5103 {
5104 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5105 }
5106 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5107 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5108 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5109 {
5110 if(rx_chk_cnt < 2)
5111 {
5112 return bStuck;
5113 }
5114 else
5115 {
5116 rx_chk_cnt = 0;
5117 }
5118 }
5119 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5120 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5121 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5122 {
5123 if(rx_chk_cnt < 4)
5124 {
5125 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5126 return bStuck;
5127 }
5128 else
5129 {
5130 rx_chk_cnt = 0;
5131 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5132 }
5133 }
5134 else
5135 {
5136 if(rx_chk_cnt < 8)
5137 {
5138 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5139 return bStuck;
5140 }
5141 else
5142 {
5143 rx_chk_cnt = 0;
5144 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5145 }
5146 }
5147 //#endif
5148
5149 if(priv->RxCounter==RegRxCounter)
5150 bStuck = TRUE;
5151
5152 priv->RxCounter = RegRxCounter;
5153
5154 return bStuck;
5155 }
5156
5157 RESET_TYPE
5158 RxCheckStuck(struct net_device *dev)
5159 {
5160 struct r8192_priv *priv = ieee80211_priv(dev);
5161 //int i;
5162 bool bRxCheck = FALSE;
5163
5164 // RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5165 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5166
5167 if(priv->IrpPendingCount > 1)
5168 bRxCheck = TRUE;
5169 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5170
5171 // RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5172 if(bRxCheck)
5173 {
5174 if(HalRxCheckStuck819xUsb(dev))
5175 {
5176 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5177 return RESET_TYPE_SILENT;
5178 }
5179 }
5180 return RESET_TYPE_NORESET;
5181 }
5182
5183
5184 /**
5185 * This function is called by Checkforhang to check whether we should ask OS to reset driver
5186 *
5187 * \param pAdapter The adapter context for this miniport
5188 *
5189 * Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5190 * to judge whether there is tx stuck.
5191 * Note: This function may be required to be rewrite for Vista OS.
5192 * <<<Assumption: Tx spinlock has been acquired >>>
5193 *
5194 * 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5195 */
5196 RESET_TYPE
5197 rtl819x_ifcheck_resetornot(struct net_device *dev)
5198 {
5199 struct r8192_priv *priv = ieee80211_priv(dev);
5200 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5201 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5202 RT_RF_POWER_STATE rfState;
5203
5204 return RESET_TYPE_NORESET;
5205
5206 rfState = priv->ieee80211->eRFPowerState;
5207
5208 TxResetType = TxCheckStuck(dev);
5209 #if 1
5210 if( rfState != eRfOff ||
5211 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5212 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5213 {
5214 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5215 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5216 // if driver is in firmware download failure status, driver should initialize RF in the following
5217 // silent reset procedure Emily, 2008.01.21
5218
5219 // Driver should not check RX stuck in IBSS mode because it is required to
5220 // set Check BSSID in order to send beacon, however, if check BSSID is
5221 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5222 RxResetType = RxCheckStuck(dev);
5223 }
5224 #endif
5225 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5226 return RESET_TYPE_NORMAL;
5227 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5228 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5229 return RESET_TYPE_SILENT;
5230 }
5231 else
5232 return RESET_TYPE_NORESET;
5233
5234 }
5235
5236 void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5237 int _rtl8192_up(struct net_device *dev);
5238 int rtl8192_close(struct net_device *dev);
5239
5240
5241
5242 void
5243 CamRestoreAllEntry( struct net_device *dev)
5244 {
5245 u8 EntryId = 0;
5246 struct r8192_priv *priv = ieee80211_priv(dev);
5247 u8* MacAddr = priv->ieee80211->current_network.bssid;
5248
5249 static u8 CAM_CONST_ADDR[4][6] = {
5250 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5251 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5252 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5253 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5254 static u8 CAM_CONST_BROAD[] =
5255 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5256
5257 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5258
5259
5260 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5261 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5262 {
5263
5264 for(EntryId=0; EntryId<4; EntryId++)
5265 {
5266 {
5267 MacAddr = CAM_CONST_ADDR[EntryId];
5268 setKey(dev,
5269 EntryId ,
5270 EntryId,
5271 priv->ieee80211->pairwise_key_type,
5272 MacAddr,
5273 0,
5274 NULL);
5275 }
5276 }
5277
5278 }
5279 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5280 {
5281
5282 {
5283 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5284 setKey(dev,
5285 4,
5286 0,
5287 priv->ieee80211->pairwise_key_type,
5288 (u8*)dev->dev_addr,
5289 0,
5290 NULL);
5291 else
5292 setKey(dev,
5293 4,
5294 0,
5295 priv->ieee80211->pairwise_key_type,
5296 MacAddr,
5297 0,
5298 NULL);
5299 }
5300 }
5301 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5302 {
5303
5304 {
5305 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5306 setKey(dev,
5307 4,
5308 0,
5309 priv->ieee80211->pairwise_key_type,
5310 (u8*)dev->dev_addr,
5311 0,
5312 NULL);
5313 else
5314 setKey(dev,
5315 4,
5316 0,
5317 priv->ieee80211->pairwise_key_type,
5318 MacAddr,
5319 0,
5320 NULL);
5321 }
5322 }
5323
5324
5325
5326 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5327 {
5328 MacAddr = CAM_CONST_BROAD;
5329 for(EntryId=1 ; EntryId<4 ; EntryId++)
5330 {
5331 {
5332 setKey(dev,
5333 EntryId,
5334 EntryId,
5335 priv->ieee80211->group_key_type,
5336 MacAddr,
5337 0,
5338 NULL);
5339 }
5340 }
5341 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5342 setKey(dev,
5343 0,
5344 0,
5345 priv->ieee80211->group_key_type,
5346 CAM_CONST_ADDR[0],
5347 0,
5348 NULL);
5349 }
5350 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5351 {
5352 MacAddr = CAM_CONST_BROAD;
5353 for(EntryId=1; EntryId<4 ; EntryId++)
5354 {
5355 {
5356 setKey(dev,
5357 EntryId ,
5358 EntryId,
5359 priv->ieee80211->group_key_type,
5360 MacAddr,
5361 0,
5362 NULL);
5363 }
5364 }
5365
5366 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5367 setKey(dev,
5368 0 ,
5369 0,
5370 priv->ieee80211->group_key_type,
5371 CAM_CONST_ADDR[0],
5372 0,
5373 NULL);
5374 }
5375 }
5376 //////////////////////////////////////////////////////////////
5377 // This function is used to fix Tx/Rx stop bug temporarily.
5378 // This function will do "system reset" to NIC when Tx or Rx is stuck.
5379 // The method checking Tx/Rx stuck of this function is supported by FW,
5380 // which reports Tx and Rx counter to register 0x128 and 0x130.
5381 //////////////////////////////////////////////////////////////
5382 void
5383 rtl819x_ifsilentreset(struct net_device *dev)
5384 {
5385 //OCTET_STRING asocpdu;
5386 struct r8192_priv *priv = ieee80211_priv(dev);
5387 u8 reset_times = 0;
5388 int reset_status = 0;
5389 struct ieee80211_device *ieee = priv->ieee80211;
5390
5391
5392 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5393 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5394
5395 if(priv->ResetProgress==RESET_TYPE_NORESET)
5396 {
5397 RESET_START:
5398
5399 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5400
5401 // Set the variable for reset.
5402 priv->ResetProgress = RESET_TYPE_SILENT;
5403 // rtl8192_close(dev);
5404 #if 1
5405 down(&priv->wx_sem);
5406 if(priv->up == 0)
5407 {
5408 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5409 up(&priv->wx_sem);
5410 return ;
5411 }
5412 priv->up = 0;
5413 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5414 // if(!netif_queue_stopped(dev))
5415 // netif_stop_queue(dev);
5416
5417 rtl8192_rtx_disable(dev);
5418 rtl8192_cancel_deferred_work(priv);
5419 deinit_hal_dm(dev);
5420 del_timer_sync(&priv->watch_dog_timer);
5421
5422 ieee->sync_scan_hurryup = 1;
5423 if(ieee->state == IEEE80211_LINKED)
5424 {
5425 down(&ieee->wx_sem);
5426 printk("ieee->state is IEEE80211_LINKED\n");
5427 ieee80211_stop_send_beacons(priv->ieee80211);
5428 del_timer_sync(&ieee->associate_timer);
5429 cancel_delayed_work(&ieee->associate_retry_wq);
5430 ieee80211_stop_scan(ieee);
5431 netif_carrier_off(dev);
5432 up(&ieee->wx_sem);
5433 }
5434 else{
5435 printk("ieee->state is NOT LINKED\n");
5436 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5437 up(&priv->wx_sem);
5438 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5439 //rtl8192_irq_disable(dev);
5440 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5441 reset_status = _rtl8192_up(dev);
5442
5443 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5444 if(reset_status == -EAGAIN)
5445 {
5446 if(reset_times < 3)
5447 {
5448 reset_times++;
5449 goto RESET_START;
5450 }
5451 else
5452 {
5453 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5454 }
5455 }
5456 #endif
5457 ieee->is_silent_reset = 1;
5458 #if 1
5459 EnableHWSecurityConfig8192(dev);
5460 #if 1
5461 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5462 {
5463 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5464
5465 #if 1
5466 queue_work(ieee->wq, &ieee->associate_complete_wq);
5467 #endif
5468
5469 }
5470 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5471 {
5472 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5473 ieee->link_change(ieee->dev);
5474
5475 // notify_wx_assoc_event(ieee);
5476
5477 ieee80211_start_send_beacons(ieee);
5478
5479 if (ieee->data_hard_resume)
5480 ieee->data_hard_resume(ieee->dev);
5481 netif_carrier_on(ieee->dev);
5482 }
5483 #endif
5484
5485 CamRestoreAllEntry(dev);
5486
5487 priv->ResetProgress = RESET_TYPE_NORESET;
5488 priv->reset_count++;
5489
5490 priv->bForcedSilentReset =false;
5491 priv->bResetInProgress = false;
5492
5493 // For test --> force write UFWP.
5494 write_nic_byte(dev, UFWP, 1);
5495 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5496 #endif
5497 }
5498 }
5499
5500 void CAM_read_entry(
5501 struct net_device *dev,
5502 u32 iIndex
5503 )
5504 {
5505 u32 target_command=0;
5506 u32 target_content=0;
5507 u8 entry_i=0;
5508 u32 ulStatus;
5509 s32 i=100;
5510 // printk("=======>start read CAM\n");
5511 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5512 {
5513 // polling bit, and No Write enable, and address
5514 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5515 target_command= target_command | BIT31;
5516
5517 //Check polling bit is clear
5518 // mdelay(1);
5519 #if 1
5520 while((i--)>=0)
5521 {
5522 ulStatus = read_nic_dword(dev, RWCAM);
5523 if(ulStatus & BIT31){
5524 continue;
5525 }
5526 else{
5527 break;
5528 }
5529 }
5530 #endif
5531 write_nic_dword(dev, RWCAM, target_command);
5532 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5533 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5534 target_content = read_nic_dword(dev, RCAMO);
5535 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5536 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5537 }
5538 printk("\n");
5539 }
5540
5541 void rtl819x_update_rxcounts(
5542 struct r8192_priv *priv,
5543 u32* TotalRxBcnNum,
5544 u32* TotalRxDataNum
5545 )
5546 {
5547 u16 SlotIndex;
5548 u8 i;
5549
5550 *TotalRxBcnNum = 0;
5551 *TotalRxDataNum = 0;
5552
5553 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5554 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5555 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5556 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5557 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5558 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5559 }
5560 }
5561
5562 extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5563 {
5564 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5565 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5566 struct net_device *dev = priv->ieee80211->dev;
5567 struct ieee80211_device* ieee = priv->ieee80211;
5568 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5569 static u8 check_reset_cnt=0;
5570 bool bBusyTraffic = false;
5571
5572 if(!priv->up)
5573 return;
5574 hal_dm_watchdog(dev);
5575
5576 {//to get busy traffic condition
5577 if(ieee->state == IEEE80211_LINKED)
5578 {
5579 //windows mod 666 to 100.
5580 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5581 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5582 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5583 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5584 bBusyTraffic = true;
5585 }
5586 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5587 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5588 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5589 }
5590 }
5591 //added by amy for AP roaming
5592 {
5593 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5594 {
5595 u32 TotalRxBcnNum = 0;
5596 u32 TotalRxDataNum = 0;
5597
5598 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5599 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5600 {
5601 #ifdef TODO
5602 if(rfState == eRfOff)
5603 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5604 #endif
5605 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5606 // Dot11d_Reset(dev);
5607 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5608 notify_wx_assoc_event(priv->ieee80211);
5609 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5610 ieee->is_roaming = true;
5611 priv->ieee80211->link_change(dev);
5612 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5613 }
5614 }
5615 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5616 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5617 }
5618 // CAM_read_entry(dev,4);
5619 //check if reset the driver
5620 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5621 {
5622 ResetType = rtl819x_ifcheck_resetornot(dev);
5623 check_reset_cnt = 3;
5624 //DbgPrint("Start to check silent reset\n");
5625 }
5626 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5627 #if 1
5628 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5629 (priv->bForcedSilentReset ||
5630 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5631 {
5632 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5633 rtl819x_ifsilentreset(dev);
5634 }
5635 #endif
5636 priv->force_reset = false;
5637 priv->bForcedSilentReset = false;
5638 priv->bResetInProgress = false;
5639 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5640
5641 }
5642
5643 void watch_dog_timer_callback(unsigned long data)
5644 {
5645 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5646 //printk("===============>watch_dog timer\n");
5647 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5648 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5649 }
5650 int _rtl8192_up(struct net_device *dev)
5651 {
5652 struct r8192_priv *priv = ieee80211_priv(dev);
5653 //int i;
5654 int init_status = 0;
5655 priv->up=1;
5656 priv->ieee80211->ieee_up=1;
5657 RT_TRACE(COMP_INIT, "Bringing up iface");
5658 init_status = priv->ops->rtl819x_adapter_start(dev);
5659 if(!init_status)
5660 {
5661 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5662 priv->up=priv->ieee80211->ieee_up = 0;
5663 return -EAGAIN;
5664 }
5665 RT_TRACE(COMP_INIT, "start adapter finished\n");
5666 rtl8192_rx_enable(dev);
5667 // rtl8192_tx_enable(dev);
5668 if(priv->ieee80211->state != IEEE80211_LINKED)
5669 ieee80211_softmac_start_protocol(priv->ieee80211);
5670 ieee80211_reset_queue(priv->ieee80211);
5671 watch_dog_timer_callback((unsigned long) dev);
5672 if(!netif_queue_stopped(dev))
5673 netif_start_queue(dev);
5674 else
5675 netif_wake_queue(dev);
5676
5677 /*
5678 * Make sure that drop_unencrypted is initialized as "0"
5679 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5680 * ex, After kill wpa_supplicant process, make the driver up again.
5681 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5682 */
5683 priv->ieee80211->drop_unencrypted = 0;
5684
5685 return 0;
5686 }
5687
5688
5689 int rtl8192_open(struct net_device *dev)
5690 {
5691 struct r8192_priv *priv = ieee80211_priv(dev);
5692 int ret;
5693 down(&priv->wx_sem);
5694 ret = rtl8192_up(dev);
5695 up(&priv->wx_sem);
5696 return ret;
5697
5698 }
5699
5700
5701 int rtl8192_up(struct net_device *dev)
5702 {
5703 struct r8192_priv *priv = ieee80211_priv(dev);
5704
5705 if (priv->up == 1) return -1;
5706
5707 return _rtl8192_up(dev);
5708 }
5709
5710
5711 int rtl8192_close(struct net_device *dev)
5712 {
5713 struct r8192_priv *priv = ieee80211_priv(dev);
5714 int ret;
5715
5716 down(&priv->wx_sem);
5717
5718 ret = rtl8192_down(dev);
5719
5720 up(&priv->wx_sem);
5721
5722 return ret;
5723
5724 }
5725
5726 int rtl8192_down(struct net_device *dev)
5727 {
5728 struct r8192_priv *priv = ieee80211_priv(dev);
5729 int i;
5730
5731 if (priv->up == 0) return -1;
5732
5733 priv->up=0;
5734 priv->ieee80211->ieee_up = 0;
5735 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5736 /* FIXME */
5737 if (!netif_queue_stopped(dev))
5738 netif_stop_queue(dev);
5739
5740 rtl8192_rtx_disable(dev);
5741 //rtl8192_irq_disable(dev);
5742
5743 /* Tx related queue release */
5744 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5745 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5746 }
5747 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5748 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5749 }
5750
5751 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5752 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5753 }
5754
5755 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5756 // flush_scheduled_work();
5757 rtl8192_cancel_deferred_work(priv);
5758 deinit_hal_dm(dev);
5759 del_timer_sync(&priv->watch_dog_timer);
5760
5761
5762 ieee80211_softmac_stop_protocol(priv->ieee80211);
5763 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5764 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5765
5766 return 0;
5767 }
5768
5769
5770 void rtl8192_commit(struct net_device *dev)
5771 {
5772 struct r8192_priv *priv = ieee80211_priv(dev);
5773 int reset_status = 0;
5774 //u8 reset_times = 0;
5775 if (priv->up == 0) return ;
5776 priv->up = 0;
5777
5778 rtl8192_cancel_deferred_work(priv);
5779 del_timer_sync(&priv->watch_dog_timer);
5780 //cancel_delayed_work(&priv->SwChnlWorkItem);
5781
5782 ieee80211_softmac_stop_protocol(priv->ieee80211);
5783
5784 //rtl8192_irq_disable(dev);
5785 rtl8192_rtx_disable(dev);
5786 reset_status = _rtl8192_up(dev);
5787
5788 }
5789
5790 /*
5791 void rtl8192_restart(struct net_device *dev)
5792 {
5793 struct r8192_priv *priv = ieee80211_priv(dev);
5794 */
5795 void rtl8192_restart(struct work_struct *work)
5796 {
5797 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5798 struct net_device *dev = priv->ieee80211->dev;
5799
5800 down(&priv->wx_sem);
5801
5802 rtl8192_commit(dev);
5803
5804 up(&priv->wx_sem);
5805 }
5806
5807 static void r8192_set_multicast(struct net_device *dev)
5808 {
5809 struct r8192_priv *priv = ieee80211_priv(dev);
5810 short promisc;
5811
5812 //down(&priv->wx_sem);
5813
5814 /* FIXME FIXME */
5815
5816 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5817
5818 if (promisc != priv->promisc)
5819 // rtl8192_commit(dev);
5820
5821 priv->promisc = promisc;
5822
5823 //schedule_work(&priv->reset_wq);
5824 //up(&priv->wx_sem);
5825 }
5826
5827
5828 int r8192_set_mac_adr(struct net_device *dev, void *mac)
5829 {
5830 struct r8192_priv *priv = ieee80211_priv(dev);
5831 struct sockaddr *addr = mac;
5832
5833 down(&priv->wx_sem);
5834
5835 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5836
5837 schedule_work(&priv->reset_wq);
5838
5839 up(&priv->wx_sem);
5840
5841 return 0;
5842 }
5843
5844 /* based on ipw2200 driver */
5845 int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5846 {
5847 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5848 struct iwreq *wrq = (struct iwreq *)rq;
5849 int ret=-1;
5850 struct ieee80211_device *ieee = priv->ieee80211;
5851 u32 key[4];
5852 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5853 u8 zero_addr[6] = {0};
5854 struct iw_point *p = &wrq->u.data;
5855 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5856
5857 down(&priv->wx_sem);
5858
5859
5860 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5861 ret = -EINVAL;
5862 goto out;
5863 }
5864
5865 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5866 if (ipw == NULL){
5867 ret = -ENOMEM;
5868 goto out;
5869 }
5870 if (copy_from_user(ipw, p->pointer, p->length)) {
5871 kfree(ipw);
5872 ret = -EFAULT;
5873 goto out;
5874 }
5875
5876 switch (cmd) {
5877 case RTL_IOCTL_WPA_SUPPLICANT:
5878 //parse here for HW security
5879 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5880 {
5881 if (ipw->u.crypt.set_tx)
5882 {
5883 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5884 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5885 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5886 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5887 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5888 {
5889 if (ipw->u.crypt.key_len == 13)
5890 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5891 else if (ipw->u.crypt.key_len == 5)
5892 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5893 }
5894 else
5895 ieee->pairwise_key_type = KEY_TYPE_NA;
5896
5897 if (ieee->pairwise_key_type)
5898 {
5899 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5900 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5901 ieee->iw_mode = IW_MODE_ADHOC;
5902 memcpy((u8*)key, ipw->u.crypt.key, 16);
5903 EnableHWSecurityConfig8192(dev);
5904 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5905 //added by WB.
5906 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5907 if (ieee->iw_mode == IW_MODE_ADHOC)
5908 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5909 }
5910 }
5911 else //if (ipw->u.crypt.idx) //group key use idx > 0
5912 {
5913 memcpy((u8*)key, ipw->u.crypt.key, 16);
5914 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5915 ieee->group_key_type= KEY_TYPE_CCMP;
5916 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5917 ieee->group_key_type = KEY_TYPE_TKIP;
5918 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5919 {
5920 if (ipw->u.crypt.key_len == 13)
5921 ieee->group_key_type = KEY_TYPE_WEP104;
5922 else if (ipw->u.crypt.key_len == 5)
5923 ieee->group_key_type = KEY_TYPE_WEP40;
5924 }
5925 else
5926 ieee->group_key_type = KEY_TYPE_NA;
5927
5928 if (ieee->group_key_type)
5929 {
5930 setKey( dev,
5931 ipw->u.crypt.idx,
5932 ipw->u.crypt.idx, //KeyIndex
5933 ieee->group_key_type, //KeyType
5934 broadcast_addr, //MacAddr
5935 0, //DefaultKey
5936 key); //KeyContent
5937 }
5938 }
5939 }
5940 #ifdef JOHN_HWSEC_DEBUG
5941 //john's test 0711
5942 printk("@@ wrq->u pointer = ");
5943 for(i=0;i<wrq->u.data.length;i++){
5944 if(i%10==0) printk("\n");
5945 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5946 }
5947 printk("\n");
5948 #endif /*JOHN_HWSEC_DEBUG*/
5949 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5950 break;
5951
5952 default:
5953 ret = -EOPNOTSUPP;
5954 break;
5955 }
5956 kfree(ipw);
5957 ipw = NULL;
5958 out:
5959 up(&priv->wx_sem);
5960 return ret;
5961 }
5962
5963 u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5964 {
5965
5966 u8 ret_rate = 0x02;
5967
5968 if( bFirstAMPDU )
5969 {
5970 if(!bIsHT)
5971 {
5972 switch(rate)
5973 {
5974
5975 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5976 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5977 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5978 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5979 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5980 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5981 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5982 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5983 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5984 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5985 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5986 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5987
5988 default:
5989 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5990 break;
5991 }
5992 }
5993 else
5994 {
5995 switch(rate)
5996 {
5997
5998 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5999 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6000 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6001 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6002 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6003 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6004 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6005 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6006 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6007 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6008 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6009 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6010 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6011 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6012 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6013 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6014 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6015
6016 default:
6017 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6018 break;
6019 }
6020
6021 }
6022 }
6023 else
6024 {
6025 switch(rate)
6026 {
6027
6028 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
6029 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
6030 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
6031 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
6032 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
6033 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
6034 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
6035 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
6036 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
6037 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
6038 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
6039 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
6040 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
6041 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6042 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6043 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6044 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6045 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6046 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6047 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6048 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6049 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6050 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6051 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6052 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6053 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6054 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6055 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6056 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6057
6058 default:
6059 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6060 break;
6061 }
6062 }
6063 return ret_rate;
6064 }
6065
6066 u8 HwRateToMRate90(bool bIsHT, u8 rate)
6067 {
6068 u8 ret_rate = 0xff;
6069
6070 if(!bIsHT) {
6071 switch(rate) {
6072 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6073 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6074 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6075 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6076 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6077 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6078 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6079 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6080 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6081 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6082 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6083 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6084
6085 default:
6086 ret_rate = 0xff;
6087 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6088 break;
6089 }
6090
6091 } else {
6092 switch(rate) {
6093 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6094 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6095 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6096 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6097 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6098 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6099 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6100 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6101 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6102 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6103 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6104 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6105 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6106 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6107 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6108 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6109 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6110
6111 default:
6112 ret_rate = 0xff;
6113 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6114 break;
6115 }
6116 }
6117
6118 return ret_rate;
6119 }
6120
6121 /**
6122 * Function: UpdateRxPktTimeStamp
6123 * Overview: Recored down the TSF time stamp when receiving a packet
6124 *
6125 * Input:
6126 * PADAPTER Adapter
6127 * PRT_RFD pRfd,
6128 *
6129 * Output:
6130 * PRT_RFD pRfd
6131 * (pRfd->Status.TimeStampHigh is updated)
6132 * (pRfd->Status.TimeStampLow is updated)
6133 * Return:
6134 * None
6135 */
6136 void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6137 {
6138 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6139
6140 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6141 stats->mac_time[0] = priv->LastRxDescTSFLow;
6142 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6143 } else {
6144 priv->LastRxDescTSFLow = stats->mac_time[0];
6145 priv->LastRxDescTSFHigh = stats->mac_time[1];
6146 }
6147 }
6148
6149 //by amy 080606
6150
6151 long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6152 {
6153 long signal_power; // in dBm.
6154
6155 // Translate to dBm (x=0.5y-95).
6156 signal_power = (long)((signal_strength_index + 1) >> 1);
6157 signal_power -= 95;
6158
6159 return signal_power;
6160 }
6161
6162
6163 /* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6164 be a local static. Otherwise, it may increase when we return from S3/S4. The
6165 value will be kept in memory or disk. We must delcare the value in adapter
6166 and it will be reinitialized when return from S3/S4. */
6167 void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6168 {
6169 bool bcheck = false;
6170 u8 rfpath;
6171 u32 nspatial_stream, tmp_val;
6172 //u8 i;
6173 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6174 static u32 slide_evm_index=0, slide_evm_statistics=0;
6175 static u32 last_rssi=0, last_evm=0;
6176
6177 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6178 static u32 last_beacon_adc_pwdb=0;
6179
6180 struct ieee80211_hdr_3addr *hdr;
6181 u16 sc ;
6182 unsigned int frag,seq;
6183 hdr = (struct ieee80211_hdr_3addr *)buffer;
6184 sc = le16_to_cpu(hdr->seq_ctl);
6185 frag = WLAN_GET_SEQ_FRAG(sc);
6186 seq = WLAN_GET_SEQ_SEQ(sc);
6187 //cosa add 04292008 to record the sequence number
6188 pcurrent_stats->Seq_Num = seq;
6189 //
6190 // Check whether we should take the previous packet into accounting
6191 //
6192 if(!pprevious_stats->bIsAMPDU)
6193 {
6194 // if previous packet is not aggregated packet
6195 bcheck = true;
6196 }else
6197 {
6198 }
6199
6200
6201 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6202 {
6203 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6204 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6205 priv->stats.slide_rssi_total -= last_rssi;
6206 }
6207 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6208
6209 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6210 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6211 slide_rssi_index = 0;
6212
6213 // <1> Showed on UI for user, in dbm
6214 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6215 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6216 pcurrent_stats->rssi = priv->stats.signal_strength;
6217 //
6218 // If the previous packet does not match the criteria, neglect it
6219 //
6220 if(!pprevious_stats->bPacketMatchBSSID)
6221 {
6222 if(!pprevious_stats->bToSelfBA)
6223 return;
6224 }
6225
6226 if(!bcheck)
6227 return;
6228
6229
6230 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6231
6232 //
6233 // Check RSSI
6234 //
6235 priv->stats.num_process_phyinfo++;
6236
6237 /* record the general signal strength to the sliding window. */
6238
6239
6240 // <2> Showed on UI for engineering
6241 // hardware does not provide rssi information for each rf path in CCK
6242 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6243 {
6244 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6245 {
6246 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6247 continue;
6248
6249 //Fixed by Jacken 2008-03-20
6250 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6251 {
6252 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6253 //DbgPrint("MIMO RSSI initialize \n");
6254 }
6255 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6256 {
6257 priv->stats.rx_rssi_percentage[rfpath] =
6258 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6259 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6260 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6261 }
6262 else
6263 {
6264 priv->stats.rx_rssi_percentage[rfpath] =
6265 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6266 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6267 }
6268 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6269 }
6270 }
6271
6272
6273 //
6274 // Check PWDB.
6275 //
6276 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6277 pprevious_stats->bIsCCK? "CCK": "OFDM",
6278 pprevious_stats->RxPWDBAll);
6279
6280 if(pprevious_stats->bPacketBeacon)
6281 {
6282 /* record the beacon pwdb to the sliding window. */
6283 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6284 {
6285 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6286 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6287 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6288 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6289 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6290 }
6291 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6292 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6293 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6294 slide_beacon_adc_pwdb_index++;
6295 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6296 slide_beacon_adc_pwdb_index = 0;
6297 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6298 if(pprevious_stats->RxPWDBAll >= 3)
6299 pprevious_stats->RxPWDBAll -= 3;
6300 }
6301
6302 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6303 pprevious_stats->bIsCCK? "CCK": "OFDM",
6304 pprevious_stats->RxPWDBAll);
6305
6306
6307 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6308 {
6309 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6310 {
6311 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6312 //DbgPrint("First pwdb initialize \n");
6313 }
6314 #if 1
6315 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6316 {
6317 priv->undecorated_smoothed_pwdb =
6318 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6319 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6320 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6321 }
6322 else
6323 {
6324 priv->undecorated_smoothed_pwdb =
6325 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6326 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6327 }
6328 #else
6329 //Fixed by Jacken 2008-03-20
6330 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6331 {
6332 pHalData->UndecoratedSmoothedPWDB =
6333 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6334 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6335 }
6336 else
6337 {
6338 pHalData->UndecoratedSmoothedPWDB =
6339 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6340 }
6341 #endif
6342
6343 }
6344
6345 //
6346 // Check EVM
6347 //
6348 /* record the general EVM to the sliding window. */
6349 if(pprevious_stats->SignalQuality == 0)
6350 {
6351 }
6352 else
6353 {
6354 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6355 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6356 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6357 last_evm = priv->stats.slide_evm[slide_evm_index];
6358 priv->stats.slide_evm_total -= last_evm;
6359 }
6360
6361 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6362
6363 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6364 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6365 slide_evm_index = 0;
6366
6367 // <1> Showed on UI for user, in percentage.
6368 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6369 priv->stats.signal_quality = tmp_val;
6370 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6371 priv->stats.last_signal_strength_inpercent = tmp_val;
6372 }
6373
6374 // <2> Showed on UI for engineering
6375 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6376 {
6377 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6378 {
6379 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6380 {
6381 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6382 {
6383 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6384 }
6385 priv->stats.rx_evm_percentage[nspatial_stream] =
6386 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6387 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6388 }
6389 }
6390 }
6391 }
6392
6393
6394 }
6395
6396 /*-----------------------------------------------------------------------------
6397 * Function: rtl819x_query_rxpwrpercentage()
6398 *
6399 * Overview:
6400 *
6401 * Input: char antpower
6402 *
6403 * Output: NONE
6404 *
6405 * Return: 0-100 percentage
6406 *
6407 * Revised History:
6408 * When Who Remark
6409 * 05/26/2008 amy Create Version 0 porting from windows code.
6410 *
6411 *---------------------------------------------------------------------------*/
6412 static u8 rtl819x_query_rxpwrpercentage(
6413 char antpower
6414 )
6415 {
6416 if ((antpower <= -100) || (antpower >= 20))
6417 {
6418 return 0;
6419 }
6420 else if (antpower >= 0)
6421 {
6422 return 100;
6423 }
6424 else
6425 {
6426 return (100+antpower);
6427 }
6428
6429 } /* QueryRxPwrPercentage */
6430
6431 static u8
6432 rtl819x_evm_dbtopercentage(
6433 char value
6434 )
6435 {
6436 char ret_val;
6437
6438 ret_val = value;
6439
6440 if(ret_val >= 0)
6441 ret_val = 0;
6442 if(ret_val <= -33)
6443 ret_val = -33;
6444 ret_val = 0 - ret_val;
6445 ret_val*=3;
6446 if(ret_val == 99)
6447 ret_val = 100;
6448 return(ret_val);
6449 }
6450 //
6451 // Description:
6452 // We want good-looking for signal strength/quality
6453 // 2007/7/19 01:09, by cosa.
6454 //
6455 long
6456 rtl819x_signal_scale_mapping(
6457 long currsig
6458 )
6459 {
6460 long retsig;
6461
6462 // Step 1. Scale mapping.
6463 if(currsig >= 61 && currsig <= 100)
6464 {
6465 retsig = 90 + ((currsig - 60) / 4);
6466 }
6467 else if(currsig >= 41 && currsig <= 60)
6468 {
6469 retsig = 78 + ((currsig - 40) / 2);
6470 }
6471 else if(currsig >= 31 && currsig <= 40)
6472 {
6473 retsig = 66 + (currsig - 30);
6474 }
6475 else if(currsig >= 21 && currsig <= 30)
6476 {
6477 retsig = 54 + (currsig - 20);
6478 }
6479 else if(currsig >= 5 && currsig <= 20)
6480 {
6481 retsig = 42 + (((currsig - 5) * 2) / 3);
6482 }
6483 else if(currsig == 4)
6484 {
6485 retsig = 36;
6486 }
6487 else if(currsig == 3)
6488 {
6489 retsig = 27;
6490 }
6491 else if(currsig == 2)
6492 {
6493 retsig = 18;
6494 }
6495 else if(currsig == 1)
6496 {
6497 retsig = 9;
6498 }
6499 else
6500 {
6501 retsig = currsig;
6502 }
6503
6504 return retsig;
6505 }
6506
6507 /*-----------------------------------------------------------------------------
6508 * Function: QueryRxPhyStatus8192S()
6509 *
6510 * Overview:
6511 *
6512 * Input: NONE
6513 *
6514 * Output: NONE
6515 *
6516 * Return: NONE
6517 *
6518 * Revised History:
6519 * When Who Remark
6520 * 06/01/2007 MHC Create Version 0.
6521 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6522 * descriptor definition.
6523 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6524 * ir_isolation and ext_lna for RF's init value and use
6525 * to compensate RSSI after receiving packets.
6526 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6527 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6528 *
6529 *---------------------------------------------------------------------------*/
6530 static void rtl8192SU_query_rxphystatus(
6531 struct r8192_priv * priv,
6532 struct ieee80211_rx_stats * pstats,
6533 rx_desc_819x_usb *pDesc,
6534 rx_drvinfo_819x_usb * pdrvinfo,
6535 struct ieee80211_rx_stats * precord_stats,
6536 bool bpacket_match_bssid,
6537 bool bpacket_toself,
6538 bool bPacketBeacon,
6539 bool bToSelfBA
6540 )
6541 {
6542 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6543 //PHY_STS_CCK_8192S_T *pCck_buf;
6544 phy_sts_cck_819xusb_t * pcck_buf;
6545 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6546 //u8 *prxpkt;
6547 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6548 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6549 char rx_pwr[4], rx_pwr_all=0;
6550 //long rx_avg_pwr = 0;
6551 //char rx_snrX, rx_evmX;
6552 u8 evm, pwdb_all;
6553 u32 RSSI, total_rssi=0;//, total_evm=0;
6554 // long signal_strength_index = 0;
6555 u8 is_cck_rate=0;
6556 u8 rf_rx_num = 0;
6557
6558
6559
6560 priv->stats.numqry_phystatus++;
6561
6562 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6563
6564 // Record it for next packet processing
6565 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6566 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6567 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6568 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6569 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6570 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6571
6572
6573 pstats->RxMIMOSignalQuality[0] = -1;
6574 pstats->RxMIMOSignalQuality[1] = -1;
6575 precord_stats->RxMIMOSignalQuality[0] = -1;
6576 precord_stats->RxMIMOSignalQuality[1] = -1;
6577
6578 if(is_cck_rate)
6579 {
6580 u8 report;//, tmp_pwdb;
6581 //char cck_adc_pwdb[4];
6582
6583 // CCK Driver info Structure is not the same as OFDM packet.
6584 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6585
6586 //
6587 // (1)Hardware does not provide RSSI for CCK
6588 //
6589
6590 //
6591 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6592 //
6593
6594 priv->stats.numqry_phystatusCCK++;
6595
6596 if(!priv->bCckHighPower)
6597 {
6598 report = pcck_buf->cck_agc_rpt & 0xc0;
6599 report = report>>6;
6600 switch(report)
6601 {
6602 //Fixed by Jacken from Bryant 2008-03-20
6603 //Original value is -38 , -26 , -14 , -2
6604 //Fixed value is -35 , -23 , -11 , 6
6605 case 0x3:
6606 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6607 break;
6608 case 0x2:
6609 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6610 break;
6611 case 0x1:
6612 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6613 break;
6614 case 0x0:
6615 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6616 break;
6617 }
6618 }
6619 else
6620 {
6621 report = pdrvinfo->cfosho[0] & 0x60;
6622 report = report>>5;
6623 switch(report)
6624 {
6625 case 0x3:
6626 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6627 break;
6628 case 0x2:
6629 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6630 break;
6631 case 0x1:
6632 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6633 break;
6634 case 0x0:
6635 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6636 break;
6637 }
6638 }
6639
6640 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6641 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6642 //pstats->RecvSignalPower = pwdb_all;
6643 pstats->RecvSignalPower = rx_pwr_all;
6644
6645 //
6646 // (3) Get Signal Quality (EVM)
6647 //
6648 //if(bpacket_match_bssid)
6649 {
6650 u8 sq;
6651
6652 if(pstats->RxPWDBAll > 40)
6653 {
6654 sq = 100;
6655 }else
6656 {
6657 sq = pcck_buf->sq_rpt;
6658
6659 if(pcck_buf->sq_rpt > 64)
6660 sq = 0;
6661 else if (pcck_buf->sq_rpt < 20)
6662 sq = 100;
6663 else
6664 sq = ((64-sq) * 100) / 44;
6665 }
6666 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6667 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6668 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6669 }
6670 }
6671 else
6672 {
6673 priv->stats.numqry_phystatusHT++;
6674
6675 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6676 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6677
6678 //
6679 // (1)Get RSSI for HT rate
6680 //
6681 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6682 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6683 {
6684 // 2008/01/30 MH we will judge RF RX path now.
6685 if (priv->brfpath_rxenable[i])
6686 rf_rx_num++;
6687 //else
6688 // continue;
6689
6690 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6691 // continue;
6692
6693 //Fixed by Jacken from Bryant 2008-03-20
6694 //Original value is 106
6695 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6696 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6697
6698 /* Translate DBM to percentage. */
6699 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6700 total_rssi += RSSI;
6701 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6702
6703 //Get Rx snr value in DB
6704 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6705 //rx_snrX = (char)(tmp_rxsnr);
6706 //rx_snrX /= 2;
6707 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6708 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6709
6710 /* Translate DBM to percentage. */
6711 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6712 //total_rssi += RSSI;
6713
6714 /* Record Signal Strength for next packet */
6715 //if(bpacket_match_bssid)
6716 {
6717 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6718 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6719 }
6720 }
6721
6722
6723 //
6724 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6725 //
6726 //Fixed by Jacken from Bryant 2008-03-20
6727 //Original value is 106
6728 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6729 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6730 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6731
6732 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6733 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6734 pstats->RecvSignalPower = rx_pwr_all;
6735
6736 //
6737 // (3)EVM of HT rate
6738 //
6739 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6740 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6741 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6742 pDesc->RxMCS<=DESC92S_RATEMCS15)
6743 max_spatial_stream = 2; //both spatial stream make sense
6744 else
6745 max_spatial_stream = 1; //only spatial stream 1 makes sense
6746
6747 for(i=0; i<max_spatial_stream; i++)
6748 {
6749 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6750 //rx_evmX = (char)(tmp_rxevm);
6751
6752 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6753 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6754 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6755 //rx_evmX /= 2; //dbm
6756
6757 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6758 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6759 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
6760
6761 //if(bpacket_match_bssid)
6762 {
6763 if(i==0) // Fill value in RFD, Get the first spatial stream only
6764 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6765 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6766 }
6767 }
6768
6769
6770 /* record rx statistics for debug */
6771 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6772 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6773 //if(pdrvinfo->BW) //40M channel
6774 if(pDesc->BW) //40M channel
6775 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6776 else //20M channel
6777 priv->stats.received_bwtype[0]++;
6778 }
6779
6780 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6781 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6782 if(is_cck_rate)
6783 {
6784 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6785
6786 }
6787 else
6788 {
6789 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6790 // We can judge RX path number now.
6791 if (rf_rx_num != 0)
6792 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6793 }
6794 }/* QueryRxPhyStatus8192S */
6795
6796 void
6797 rtl8192_record_rxdesc_forlateruse(
6798 struct ieee80211_rx_stats * psrc_stats,
6799 struct ieee80211_rx_stats * ptarget_stats
6800 )
6801 {
6802 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6803 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6804 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6805 }
6806
6807 static void rtl8192SU_query_rxphystatus(
6808 struct r8192_priv * priv,
6809 struct ieee80211_rx_stats * pstats,
6810 rx_desc_819x_usb *pDesc,
6811 rx_drvinfo_819x_usb * pdrvinfo,
6812 struct ieee80211_rx_stats * precord_stats,
6813 bool bpacket_match_bssid,
6814 bool bpacket_toself,
6815 bool bPacketBeacon,
6816 bool bToSelfBA
6817 );
6818 void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6819 struct ieee80211_rx_stats * pstats,
6820 rx_desc_819x_usb *pDesc,
6821 rx_drvinfo_819x_usb *pdrvinfo)
6822 {
6823 // TODO: We must only check packet for current MAC address. Not finish
6824 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6825 struct net_device *dev=info->dev;
6826 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6827 bool bpacket_match_bssid, bpacket_toself;
6828 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6829 static struct ieee80211_rx_stats previous_stats;
6830 struct ieee80211_hdr_3addr *hdr;//by amy
6831 u16 fc,type;
6832
6833 // Get Signal Quality for only RX data queue (but not command queue)
6834
6835 u8* tmp_buf;
6836 //u16 tmp_buf_len = 0;
6837 u8 *praddr;
6838
6839 /* Get MAC frame start address. */
6840 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
6841
6842 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
6843 fc = le16_to_cpu(hdr->frame_ctl);
6844 type = WLAN_FC_GET_TYPE(fc);
6845 praddr = hdr->addr1;
6846
6847 /* Check if the received packet is acceptabe. */
6848 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6849 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6850 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6851 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
6852
6853 #if 1//cosa
6854 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6855 {
6856 bPacketBeacon = true;
6857 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6858 }
6859 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6860 {
6861 if((eqMacAddr(praddr,dev->dev_addr)))
6862 bToSelfBA = true;
6863 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6864 }
6865
6866 #endif
6867
6868
6869 if(bpacket_match_bssid)
6870 {
6871 priv->stats.numpacket_matchbssid++;
6872 }
6873 if(bpacket_toself){
6874 priv->stats.numpacket_toself++;
6875 }
6876 //
6877 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6878 //
6879 // Because phy information is contained in the last packet of AMPDU only, so driver
6880 // should process phy information of previous packet
6881 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6882 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6883 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6884
6885 }
6886
6887 /**
6888 * Function: UpdateReceivedRateHistogramStatistics
6889 * Overview: Recored down the received data rate
6890 *
6891 * Input:
6892 * struct net_device *dev
6893 * struct ieee80211_rx_stats *stats
6894 *
6895 * Output:
6896 *
6897 * (priv->stats.ReceivedRateHistogram[] is updated)
6898 * Return:
6899 * None
6900 */
6901 void
6902 UpdateReceivedRateHistogramStatistics8190(
6903 struct net_device *dev,
6904 struct ieee80211_rx_stats *stats
6905 )
6906 {
6907 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6908 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6909 u32 rateIndex;
6910 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6911
6912
6913 if(stats->bCRC)
6914 rcvType = 2;
6915 else if(stats->bICV)
6916 rcvType = 3;
6917
6918 if(stats->bShortPreamble)
6919 preamble_guardinterval = 1;// short
6920 else
6921 preamble_guardinterval = 0;// long
6922
6923 switch(stats->rate)
6924 {
6925 //
6926 // CCK rate
6927 //
6928 case MGN_1M: rateIndex = 0; break;
6929 case MGN_2M: rateIndex = 1; break;
6930 case MGN_5_5M: rateIndex = 2; break;
6931 case MGN_11M: rateIndex = 3; break;
6932 //
6933 // Legacy OFDM rate
6934 //
6935 case MGN_6M: rateIndex = 4; break;
6936 case MGN_9M: rateIndex = 5; break;
6937 case MGN_12M: rateIndex = 6; break;
6938 case MGN_18M: rateIndex = 7; break;
6939 case MGN_24M: rateIndex = 8; break;
6940 case MGN_36M: rateIndex = 9; break;
6941 case MGN_48M: rateIndex = 10; break;
6942 case MGN_54M: rateIndex = 11; break;
6943 //
6944 // 11n High throughput rate
6945 //
6946 case MGN_MCS0: rateIndex = 12; break;
6947 case MGN_MCS1: rateIndex = 13; break;
6948 case MGN_MCS2: rateIndex = 14; break;
6949 case MGN_MCS3: rateIndex = 15; break;
6950 case MGN_MCS4: rateIndex = 16; break;
6951 case MGN_MCS5: rateIndex = 17; break;
6952 case MGN_MCS6: rateIndex = 18; break;
6953 case MGN_MCS7: rateIndex = 19; break;
6954 case MGN_MCS8: rateIndex = 20; break;
6955 case MGN_MCS9: rateIndex = 21; break;
6956 case MGN_MCS10: rateIndex = 22; break;
6957 case MGN_MCS11: rateIndex = 23; break;
6958 case MGN_MCS12: rateIndex = 24; break;
6959 case MGN_MCS13: rateIndex = 25; break;
6960 case MGN_MCS14: rateIndex = 26; break;
6961 case MGN_MCS15: rateIndex = 27; break;
6962 default: rateIndex = 28; break;
6963 }
6964 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6965 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6966 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6967 }
6968
6969 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6970 {
6971 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6972 struct net_device *dev=info->dev;
6973 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6974 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6975 rx_drvinfo_819x_usb *driver_info = NULL;
6976
6977 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6978 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6979 //pu1Byte pDesc = (pu1Byte)pDescIn;
6980 //PRX_DRIVER_INFO_8192S pDrvInfo;
6981
6982 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6983
6984 if(0)
6985 {
6986 int m = 0;
6987 printk("========================");
6988 for(m=0; m<skb->len; m++){
6989 if((m%32) == 0)
6990 printk("\n");
6991 printk("%2x ",((u8*)skb->data)[m]);
6992 }
6993 printk("\n========================\n");
6994
6995 }
6996
6997
6998 //
6999 //Get Rx Descriptor Raw Information
7000 //
7001 stats->Length = desc->Length ;
7002 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
7003 stats->RxBufShift = (desc->Shift)&0x03;
7004 stats->bICV = desc->ICV;
7005 stats->bCRC = desc->CRC32;
7006 stats->bHwError = stats->bCRC|stats->bICV;
7007 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
7008 stats->bIsAMPDU = (desc->AMSDU==1);
7009 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
7010 stats->bShortPreamble = desc->SPLCP;
7011 stats->RxIs40MHzPacket = (desc->BW==1);
7012 stats->TimeStampLow = desc->TSFL;
7013
7014 if((desc->FAGGR==1) || (desc->PAGGR==1))
7015 {// Rx A-MPDU
7016 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
7017 }
7018 //YJ,test,090310
7019 if(stats->bHwError)
7020 {
7021 if(stats->bICV)
7022 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7023 if(stats->bCRC)
7024 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
7025 }
7026
7027 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
7028 {
7029 // Always received ICV error packets in AES mode.
7030 // This fixed HW later MIC write bug.
7031 if(stats->bICV && !stats->bCRC)
7032 {
7033 stats->bICV = FALSE;
7034 stats->bHwError = FALSE;
7035 }
7036 }
7037
7038 // Transform HwRate to MRate
7039 if(!stats->bHwError)
7040 //stats->DataRate = HwRateToMRate(
7041 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
7042 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
7043 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
7044 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
7045 else
7046 stats->rate = MGN_1M;
7047
7048 //
7049 // Collect Rx rate/AMPDU/TSFL
7050 //
7051 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7052 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7053 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7054 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7055 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7056 UpdateRxPktTimeStamp8190(dev, stats);
7057
7058 //
7059 // Get PHY Status and RSVD parts.
7060 // <Roger_Notes> It only appears on last aggregated packet.
7061 //
7062 if (desc->PHYStatus)
7063 {
7064 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7065 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7066 stats->RxBufShift);
7067 if(0)
7068 {
7069 int m = 0;
7070 printk("========================\n");
7071 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7072 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7073 for(m=0; m<32; m++){
7074 printk("%2x ",((u8*)driver_info)[m]);
7075 }
7076 printk("\n========================\n");
7077
7078 }
7079
7080 }
7081
7082 //YJ,add,090107
7083 skb_pull(skb, sizeof(rx_desc_819x_usb));
7084 //YJ,add,090107,end
7085
7086 //
7087 // Get Total offset of MPDU Frame Body
7088 //
7089 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7090 {
7091 stats->bShift = 1;
7092 //YJ,add,090107
7093 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7094 //YJ,add,090107,end
7095 }
7096
7097 //
7098 // Get PHY Status and RSVD parts.
7099 // <Roger_Notes> It only appears on last aggregated packet.
7100 //
7101 if (desc->PHYStatus)
7102 {
7103 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7104 }
7105 }
7106
7107 //
7108 // Description:
7109 // The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7110 // (1) QoS control : shift 2 bytes
7111 // (2) Mesh Network : shift 1 or 3 bytes
7112 // (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7113 //
7114 // It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7115 // of IP header is not double word alignment.
7116 // This features is supported in 818xb and 8190 only, but not 818x.
7117 //
7118 // parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7119 // Rx Descriptor
7120 // return value: unsigned int, number of total shifted bytes
7121 //
7122 // Notes: 2008/06/28, created by Roger
7123 //
7124 u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7125 {
7126 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7127
7128 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7129 }
7130
7131 void rtl8192SU_rx_nomal(struct sk_buff* skb)
7132 {
7133 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7134 struct net_device *dev=info->dev;
7135 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7136 struct ieee80211_rx_stats stats = {
7137 .signal = 0,
7138 .noise = -98,
7139 .rate = 0,
7140 // .mac_time = jiffies,
7141 .freq = IEEE80211_24GHZ_BAND,
7142 };
7143 u32 rx_pkt_len = 0;
7144 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7145 bool unicast_packet = false;
7146
7147 //printk("**********skb->len = %d\n", skb->len);
7148 /* 20 is for ps-poll */
7149 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7150
7151 /* first packet should not contain Rx aggregation header */
7152 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7153 /* TODO */
7154
7155 /* hardware related info */
7156 priv->stats.rxoktotal++; //YJ,test,090108
7157
7158 /* Process the MPDU recevied */
7159 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7160
7161 rx_pkt_len = skb->len;
7162 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7163 unicast_packet = false;
7164 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7165 //TODO
7166 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7167 //TODO
7168 }else {
7169 /* unicast packet */
7170 unicast_packet = true;
7171 }
7172
7173 if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
7174 dev_kfree_skb_any(skb);
7175 } else {
7176 // priv->stats.rxoktotal++; //YJ,test,090108
7177 if(unicast_packet) {
7178 priv->stats.rxbytesunicast += rx_pkt_len;
7179 }
7180 }
7181
7182 //up is firs pkt, follow is next and next
7183 }
7184 else
7185 {
7186 priv->stats.rxurberr++;
7187 printk("actual_length:%d\n", skb->len);
7188 dev_kfree_skb_any(skb);
7189 }
7190
7191 }
7192
7193 void
7194 rtl819xusb_process_received_packet(
7195 struct net_device *dev,
7196 struct ieee80211_rx_stats *pstats
7197 )
7198 {
7199 // bool bfreerfd=false, bqueued=false;
7200 u8* frame;
7201 u16 frame_len=0;
7202 struct r8192_priv *priv = ieee80211_priv(dev);
7203 // u8 index = 0;
7204 // u8 TID = 0;
7205 //u16 seqnum = 0;
7206 //PRX_TS_RECORD pts = NULL;
7207
7208 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7209 //porting by amy 080508
7210 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7211 frame = pstats->virtual_address;
7212 frame_len = pstats->packetlength;
7213 #ifdef TODO // by amy about HCT
7214 if(!Adapter->bInHctTest)
7215 CountRxErrStatistics(Adapter, pRfd);
7216 #endif
7217 {
7218 #ifdef ENABLE_PS //by amy for adding ps function in future
7219 RT_RF_POWER_STATE rtState;
7220 // When RF is off, we should not count the packet for hw/sw synchronize
7221 // reason, ie. there may be a duration while sw switch is changed and hw
7222 // switch is being changed. 2006.12.04, by shien chang.
7223 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7224 if (rtState == eRfOff)
7225 {
7226 return;
7227 }
7228 #endif
7229 priv->stats.rxframgment++;
7230
7231 }
7232 #ifdef TODO
7233 RmMonitorSignalStrength(Adapter, pRfd);
7234 #endif
7235 /* 2007/01/16 MH Add RX command packet handle here. */
7236 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7237 if (rtl819xusb_rx_command_packet(dev, pstats))
7238 {
7239 return;
7240 }
7241
7242 #ifdef SW_CRC_CHECK
7243 SwCrcCheck();
7244 #endif
7245
7246
7247 }
7248
7249 void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7250 {
7251 // rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7252 // struct net_device *dev=info->dev;
7253 // struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7254 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7255 // rx_drvinfo_819x_usb *driver_info;
7256
7257 //
7258 //Get Rx Descriptor Information
7259 //
7260 stats->virtual_address = (u8*)skb->data;
7261 stats->Length = desc->Length;
7262 stats->RxDrvInfoSize = 0;
7263 stats->RxBufShift = 0;
7264 stats->packetlength = stats->Length-scrclng;
7265 stats->fraglength = stats->packetlength;
7266 stats->fragoffset = 0;
7267 stats->ntotalfrag = 1;
7268 }
7269
7270 void rtl8192SU_rx_cmd(struct sk_buff *skb)
7271 {
7272 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7273 struct net_device *dev = info->dev;
7274
7275 /* TODO */
7276 struct ieee80211_rx_stats stats = {
7277 .signal = 0,
7278 .noise = -98,
7279 .rate = 0,
7280 // .mac_time = jiffies,
7281 .freq = IEEE80211_24GHZ_BAND,
7282 };
7283
7284 //
7285 // Check buffer length to determine if this is a valid MPDU.
7286 //
7287 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7288 //(pHalData->SwChnlInProgress == FALSE))
7289 {
7290 //
7291 // Collection information in Rx descriptor.
7292 //
7293 query_rx_cmdpkt_desc_status(skb,&stats);
7294 // this is to be done by amy 080508 prfd->queue_id = 1;
7295
7296 //
7297 // Process the MPDU recevied.
7298 //
7299 rtl819xusb_process_received_packet(dev,&stats);
7300
7301 dev_kfree_skb_any(skb);
7302 }
7303 else
7304 {
7305 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7306 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7307 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7308 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7309 }
7310
7311 //
7312 // Reuse USB_IN_CONTEXT since we had finished processing the
7313 // buffer in USB_IN_CONTEXT.
7314 //
7315 //HalUsbReturnInContext(pAdapter, pContext);
7316
7317 //
7318 // Issue another bulk IN transfer.
7319 //
7320 //HalUsbInMpdu(pAdapter, PipeIndex);
7321
7322 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7323
7324 }
7325
7326 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7327 {
7328 struct sk_buff *skb;
7329 struct rtl8192_rx_info *info;
7330
7331 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7332 info = (struct rtl8192_rx_info *)skb->cb;
7333 switch (info->out_pipe) {
7334 /* Nomal packet pipe */
7335 case 3:
7336 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7337 priv->IrpPendingCount--;
7338 priv->ops->rtl819x_rx_nomal(skb);
7339 break;
7340
7341 /* Command packet pipe */
7342 case 9:
7343 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7344 info->out_pipe);
7345 priv->ops->rtl819x_rx_cmd(skb);
7346 break;
7347
7348 default: /* should never get here! */
7349 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7350 info->out_pipe);
7351 dev_kfree_skb(skb);
7352 break;
7353
7354 }
7355 }
7356 }
7357
7358
7359
7360 /****************************************************************************
7361 ---------------------------- USB_STUFF---------------------------
7362 *****************************************************************************/
7363 //LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7364 static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7365 {
7366 struct r8192_priv *priv = ieee80211_priv(dev);
7367 struct usb_host_interface *iface_desc;
7368 struct usb_endpoint_descriptor *endpoint;
7369 u8 i = 0;
7370
7371 priv->ep_in_num = 0;
7372 priv->ep_out_num = 0;
7373 memset(priv->RtOutPipes,0,16);
7374 memset(priv->RtInPipes,0,16);
7375
7376 iface_desc = intf->cur_altsetting;
7377 priv->ep_num = iface_desc->desc.bNumEndpoints;
7378
7379 for (i = 0; i < priv->ep_num; ++i) {
7380 endpoint = &iface_desc->endpoint[i].desc;
7381 if (usb_endpoint_is_bulk_in(endpoint)) {
7382 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7383 priv->ep_in_num ++;
7384 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7385 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7386 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7387 priv->ep_out_num ++;
7388 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7389 }
7390 }
7391 {
7392 memset(priv->txqueue_to_outpipemap,0,9);
7393 if (priv->ep_num == 6) {
7394 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7395 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7396
7397 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7398 } else if (priv->ep_num == 4) {
7399 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7400 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7401
7402 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7403 } else if (priv->ep_num > 9) {
7404 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7405 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7406
7407 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7408 } else {//use sigle pipe
7409 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7410 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7411 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7412 }
7413 }
7414 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7415
7416 printk("==>RtInPipes:");
7417 for(i=0; i < priv->ep_in_num; i++)
7418 printk("%d ", priv->RtInPipes[i]);
7419 printk("\n");
7420
7421 printk("==>RtOutPipes:");
7422 for(i=0; i < priv->ep_out_num; i++)
7423 printk("%d ", priv->RtOutPipes[i]);
7424 printk("\n");
7425
7426 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7427 for(i=0; i < 9; i++)
7428 printk("%d ", priv->txqueue_to_outpipemap[i]);
7429 printk("\n");
7430
7431 return;
7432 }
7433
7434 static const struct net_device_ops rtl8192_netdev_ops = {
7435 .ndo_open = rtl8192_open,
7436 .ndo_stop = rtl8192_close,
7437 .ndo_get_stats = rtl8192_stats,
7438 .ndo_tx_timeout = tx_timeout,
7439 .ndo_do_ioctl = rtl8192_ioctl,
7440 .ndo_set_multicast_list = r8192_set_multicast,
7441 .ndo_set_mac_address = r8192_set_mac_adr,
7442 .ndo_validate_addr = eth_validate_addr,
7443 .ndo_change_mtu = eth_change_mtu,
7444 .ndo_start_xmit = rtl8192_ieee80211_xmit,
7445 };
7446
7447 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7448 const struct usb_device_id *id)
7449 {
7450 // unsigned long ioaddr = 0;
7451 struct net_device *dev = NULL;
7452 struct r8192_priv *priv= NULL;
7453 struct usb_device *udev = interface_to_usbdev(intf);
7454
7455 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7456
7457 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7458
7459 usb_set_intfdata(intf, dev);
7460 SET_NETDEV_DEV(dev, &intf->dev);
7461 priv = ieee80211_priv(dev);
7462 priv->ieee80211 = netdev_priv(dev);
7463 priv->udev=udev;
7464
7465 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
7466
7467 //printk("===============>NIC 8192SU\n");
7468 priv->ops = &rtl8192su_ops;
7469
7470 dev->netdev_ops = &rtl8192_netdev_ops;
7471
7472 //DMESG("Oops: i'm coming\n");
7473 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
7474
7475 dev->type=ARPHRD_ETHER;
7476
7477 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7478
7479 if (dev_alloc_name(dev, ifname) < 0){
7480 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7481 ifname = "wlan%d";
7482 dev_alloc_name(dev, ifname);
7483 }
7484
7485 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7486 #if 1
7487 if(rtl8192_init(dev)!=0){
7488 RT_TRACE(COMP_ERR, "Initialization failed");
7489 goto fail;
7490 }
7491 #endif
7492 netif_carrier_off(dev);
7493 netif_stop_queue(dev);
7494
7495 register_netdev(dev);
7496 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7497 rtl8192_proc_init_one(dev);
7498
7499
7500 RT_TRACE(COMP_INIT, "Driver probe completed\n");
7501 return 0;
7502 fail:
7503 free_ieee80211(dev);
7504
7505 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
7506 return -ENODEV;
7507 }
7508
7509 //detach all the work and timer structure declared or inititialize in r8192U_init function.
7510 void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7511 {
7512 cancel_work_sync(&priv->reset_wq);
7513 cancel_work_sync(&priv->qos_activate);
7514 cancel_delayed_work(&priv->watch_dog_wq);
7515 cancel_delayed_work(&priv->update_beacon_wq);
7516 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7517 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7518 //cancel_work_sync(&priv->SetBWModeWorkItem);
7519 //cancel_work_sync(&priv->SwChnlWorkItem);
7520 }
7521
7522 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
7523 {
7524 struct net_device *dev = usb_get_intfdata(intf);
7525 struct r8192_priv *priv = ieee80211_priv(dev);
7526 if(dev){
7527
7528 unregister_netdev(dev);
7529
7530 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7531 rtl8192_proc_remove_one(dev);
7532
7533 rtl8192_down(dev);
7534 if (priv->pFirmware)
7535 {
7536 vfree(priv->pFirmware);
7537 priv->pFirmware = NULL;
7538 }
7539 // priv->rf_close(dev);
7540 // rtl8192_SetRFPowerState(dev, eRfOff);
7541 destroy_workqueue(priv->priv_wq);
7542 //rtl8192_irq_disable(dev);
7543 //rtl8192_reset(dev);
7544 mdelay(10);
7545
7546 }
7547 free_ieee80211(dev);
7548 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7549 }
7550
7551 static int __init rtl8192_usb_module_init(void)
7552 {
7553 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7554 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7555 RT_TRACE(COMP_INIT, "Initializing module");
7556 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7557 rtl8192_proc_module_init();
7558 return usb_register(&rtl8192_usb_driver);
7559 }
7560
7561
7562 static void __exit rtl8192_usb_module_exit(void)
7563 {
7564 usb_deregister(&rtl8192_usb_driver);
7565
7566 RT_TRACE(COMP_DOWN, "Exiting");
7567 rtl8192_proc_module_remove();
7568 }
7569
7570
7571 void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7572 {
7573 unsigned long flags;
7574 short enough_desc;
7575 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7576
7577 spin_lock_irqsave(&priv->tx_lock,flags);
7578 enough_desc = check_nic_enough_desc(dev,pri);
7579 spin_unlock_irqrestore(&priv->tx_lock,flags);
7580
7581 if(enough_desc)
7582 ieee80211_wake_queue(priv->ieee80211);
7583 }
7584
7585 void EnableHWSecurityConfig8192(struct net_device *dev)
7586 {
7587 u8 SECR_value = 0x0;
7588 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7589 struct ieee80211_device* ieee = priv->ieee80211;
7590
7591 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7592 #if 1
7593 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7594 {
7595 SECR_value |= SCR_RxUseDK;
7596 SECR_value |= SCR_TxUseDK;
7597 }
7598 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7599 {
7600 SECR_value |= SCR_RxUseDK;
7601 SECR_value |= SCR_TxUseDK;
7602 }
7603 #endif
7604 //add HWSec active enable here.
7605 //default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7606
7607 ieee->hwsec_active = 1;
7608
7609 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7610 {
7611 ieee->hwsec_active = 0;
7612 SECR_value &= ~SCR_RxDecEnable;
7613 }
7614
7615 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7616 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7617 {
7618 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7619 }
7620 }
7621
7622
7623 void setKey( struct net_device *dev,
7624 u8 EntryNo,
7625 u8 KeyIndex,
7626 u16 KeyType,
7627 u8 *MacAddr,
7628 u8 DefaultKey,
7629 u32 *KeyContent )
7630 {
7631 u32 TargetCommand = 0;
7632 u32 TargetContent = 0;
7633 u16 usConfig = 0;
7634 u8 i;
7635 if (EntryNo >= TOTAL_CAM_ENTRY)
7636 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7637
7638 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
7639
7640 if (DefaultKey)
7641 usConfig |= BIT15 | (KeyType<<2);
7642 else
7643 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7644 // usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7645
7646
7647 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7648 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7649 TargetCommand |= BIT31|BIT16;
7650
7651 if(i==0){//MAC|Config
7652 TargetContent = (u32)(*(MacAddr+0)) << 16|
7653 (u32)(*(MacAddr+1)) << 24|
7654 (u32)usConfig;
7655
7656 write_nic_dword(dev, WCAMI, TargetContent);
7657 write_nic_dword(dev, RWCAM, TargetCommand);
7658 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7659 }
7660 else if(i==1){//MAC
7661 TargetContent = (u32)(*(MacAddr+2)) |
7662 (u32)(*(MacAddr+3)) << 8|
7663 (u32)(*(MacAddr+4)) << 16|
7664 (u32)(*(MacAddr+5)) << 24;
7665 write_nic_dword(dev, WCAMI, TargetContent);
7666 write_nic_dword(dev, RWCAM, TargetCommand);
7667 }
7668 else {
7669 //Key Material
7670 if(KeyContent !=NULL){
7671 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7672 write_nic_dword(dev, RWCAM, TargetCommand);
7673 }
7674 }
7675 }
7676
7677 }
7678
7679 /***************************************************************************
7680 ------------------- module init / exit stubs ----------------
7681 ****************************************************************************/
7682 module_init(rtl8192_usb_module_init);
7683 module_exit(rtl8192_usb_module_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree