drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_edid.h"
  34 #include "intel_drv.h"
  35 #include "i915_drm.h"
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         bool force_hotplug_required;
  49 };
  50
  51 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  52 {
  53         return container_of(intel_attached_encoder(connector),
  54                             struct intel_crt, base);
  55 }
  56
  57 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  58 {
  59         struct drm_device *dev = encoder->dev;
  60         struct drm_i915_private *dev_priv = dev->dev_private;
  61         u32 temp, reg;
  62
  63         if (HAS_PCH_SPLIT(dev))
  64                 reg = PCH_ADPA;
  65         else
  66                 reg = ADPA;
  67
  68         temp = I915_READ(reg);
  69         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  70         temp &= ~ADPA_DAC_ENABLE;
  71
  72         switch(mode) {
  73         case DRM_MODE_DPMS_ON:
  74                 temp |= ADPA_DAC_ENABLE;
  75                 break;
  76         case DRM_MODE_DPMS_STANDBY:
  77                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  78                 break;
  79         case DRM_MODE_DPMS_SUSPEND:
  80                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  81                 break;
  82         case DRM_MODE_DPMS_OFF:
  83                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  84                 break;
  85         }
  86
  87         I915_WRITE(reg, temp);
  88 }
  89
  90 static int intel_crt_mode_valid(struct drm_connector *connector,
  91                                 struct drm_display_mode *mode)
  92 {
  93         struct drm_device *dev = connector->dev;
  94
  95         int max_clock = 0;
  96         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  97                 return MODE_NO_DBLESCAN;
  98
  99         if (mode->clock < 25000)
 100                 return MODE_CLOCK_LOW;
 101
 102         if (IS_GEN2(dev))
 103                 max_clock = 350000;
 104         else
 105                 max_clock = 400000;
 106         if (mode->clock > max_clock)
 107                 return MODE_CLOCK_HIGH;
 108
 109         return MODE_OK;
 110 }
 111
 112 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 113                                  struct drm_display_mode *mode,
 114                                  struct drm_display_mode *adjusted_mode)
 115 {
 116         return true;
 117 }
 118
 119 static void intel_crt_mode_set(struct drm_encoder *encoder,
 120                                struct drm_display_mode *mode,
 121                                struct drm_display_mode *adjusted_mode)
 122 {
 123
 124         struct drm_device *dev = encoder->dev;
 125         struct drm_crtc *crtc = encoder->crtc;
 126         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 127         struct drm_i915_private *dev_priv = dev->dev_private;
 128         int dpll_md_reg;
 129         u32 adpa, dpll_md;
 130         u32 adpa_reg;
 131
 132         dpll_md_reg = DPLL_MD(intel_crtc->pipe);
 133
 134         if (HAS_PCH_SPLIT(dev))
 135                 adpa_reg = PCH_ADPA;
 136         else
 137                 adpa_reg = ADPA;
 138
 139         /*
 140          * Disable separate mode multiplier used when cloning SDVO to CRT
 141          * XXX this needs to be adjusted when we really are cloning
 142          */
 143         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 144                 dpll_md = I915_READ(dpll_md_reg);
 145                 I915_WRITE(dpll_md_reg,
 146                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 147         }
 148
 149         adpa = ADPA_HOTPLUG_BITS;
 150         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 151                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 152         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 153                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 154
 155         if (intel_crtc->pipe == 0) {
 156                 if (HAS_PCH_CPT(dev))
 157                         adpa |= PORT_TRANS_A_SEL_CPT;
 158                 else
 159                         adpa |= ADPA_PIPE_A_SELECT;
 160         } else {
 161                 if (HAS_PCH_CPT(dev))
 162                         adpa |= PORT_TRANS_B_SEL_CPT;
 163                 else
 164                         adpa |= ADPA_PIPE_B_SELECT;
 165         }
 166
 167         if (!HAS_PCH_SPLIT(dev))
 168                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 169
 170         I915_WRITE(adpa_reg, adpa);
 171 }
 172
 173 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 174 {
 175         struct drm_device *dev = connector->dev;
 176         struct intel_crt *crt = intel_attached_crt(connector);
 177         struct drm_i915_private *dev_priv = dev->dev_private;
 178         u32 adpa;
 179         bool ret;
 180
 181         /* The first time through, trigger an explicit detection cycle */
 182         if (crt->force_hotplug_required) {
 183                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 184                 u32 save_adpa;
 185
 186                 crt->force_hotplug_required = 0;
 187
 188                 save_adpa = adpa = I915_READ(PCH_ADPA);
 189                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 190
 191                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 192                 if (turn_off_dac)
 193                         adpa &= ~ADPA_DAC_ENABLE;
 194
 195                 I915_WRITE(PCH_ADPA, adpa);
 196
 197                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 198                              1000))
 199                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 200
 201                 if (turn_off_dac) {
 202                         I915_WRITE(PCH_ADPA, save_adpa);
 203                         POSTING_READ(PCH_ADPA);
 204                 }
 205         }
 206
 207         /* Check the status to see if both blue and green are on now */
 208         adpa = I915_READ(PCH_ADPA);
 209         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 210                 ret = true;
 211         else
 212                 ret = false;
 213         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 214
 215         return ret;
 216 }
 217
 218 /**
 219  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 220  *
 221  * Not for i915G/i915GM
 222  *
 223  * \return true if CRT is connected.
 224  * \return false if CRT is disconnected.
 225  */
 226 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 227 {
 228         struct drm_device *dev = connector->dev;
 229         struct drm_i915_private *dev_priv = dev->dev_private;
 230         u32 hotplug_en, orig, stat;
 231         bool ret = false;
 232         int i, tries = 0;
 233
 234         if (HAS_PCH_SPLIT(dev))
 235                 return intel_ironlake_crt_detect_hotplug(connector);
 236
 237         /*
 238          * On 4 series desktop, CRT detect sequence need to be done twice
 239          * to get a reliable result.
 240          */
 241
 242         if (IS_G4X(dev) && !IS_GM45(dev))
 243                 tries = 2;
 244         else
 245                 tries = 1;
 246         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 247         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 248
 249         for (i = 0; i < tries ; i++) {
 250                 /* turn on the FORCE_DETECT */
 251                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 252                 /* wait for FORCE_DETECT to go off */
 253                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 254                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 255                              1000))
 256                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 257         }
 258
 259         stat = I915_READ(PORT_HOTPLUG_STAT);
 260         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 261                 ret = true;
 262
 263         /* clear the interrupt we just generated, if any */
 264         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 265
 266         /* and put the bits back */
 267         I915_WRITE(PORT_HOTPLUG_EN, orig);
 268
 269         return ret;
 270 }
 271
 272 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 273 {
 274         struct intel_crt *crt = intel_attached_crt(connector);
 275         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 276
 277         /* CRT should always be at 0, but check anyway */
 278         if (crt->base.type != INTEL_OUTPUT_ANALOG)
 279                 return false;
 280
 281         if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
 282                 struct edid *edid;
 283                 bool is_digital = false;
 284
 285                 edid = drm_get_edid(connector,
 286                         &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 287                 /*
 288                  * This may be a DVI-I connector with a shared DDC
 289                  * link between analog and digital outputs, so we
 290                  * have to check the EDID input spec of the attached device.
 291                  */
 292                 if (edid != NULL) {
 293                         is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 294                         connector->display_info.raw_edid = NULL;
 295                         kfree(edid);
 296                 }
 297
 298                 if (!is_digital) {
 299                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 300                         return true;
 301                 }
 302         }
 303
 304         return false;
 305 }
 306
 307 static enum drm_connector_status
 308 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt)
 309 {
 310         struct drm_encoder *encoder = &crt->base.base;
 311         struct drm_device *dev = encoder->dev;
 312         struct drm_i915_private *dev_priv = dev->dev_private;
 313         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 314         uint32_t pipe = intel_crtc->pipe;
 315         uint32_t save_bclrpat;
 316         uint32_t save_vtotal;
 317         uint32_t vtotal, vactive;
 318         uint32_t vsample;
 319         uint32_t vblank, vblank_start, vblank_end;
 320         uint32_t dsl;
 321         uint32_t bclrpat_reg;
 322         uint32_t vtotal_reg;
 323         uint32_t vblank_reg;
 324         uint32_t vsync_reg;
 325         uint32_t pipeconf_reg;
 326         uint32_t pipe_dsl_reg;
 327         uint8_t st00;
 328         enum drm_connector_status status;
 329
 330         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 331
 332         bclrpat_reg = BCLRPAT(pipe);
 333         vtotal_reg = VTOTAL(pipe);
 334         vblank_reg = VBLANK(pipe);
 335         vsync_reg = VSYNC(pipe);
 336         pipeconf_reg = PIPECONF(pipe);
 337         pipe_dsl_reg = PIPEDSL(pipe);
 338
 339         save_bclrpat = I915_READ(bclrpat_reg);
 340         save_vtotal = I915_READ(vtotal_reg);
 341         vblank = I915_READ(vblank_reg);
 342
 343         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 344         vactive = (save_vtotal & 0x7ff) + 1;
 345
 346         vblank_start = (vblank & 0xfff) + 1;
 347         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 348
 349         /* Set the border color to purple. */
 350         I915_WRITE(bclrpat_reg, 0x500050);
 351
 352         if (!IS_GEN2(dev)) {
 353                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 354                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 355                 POSTING_READ(pipeconf_reg);
 356                 /* Wait for next Vblank to substitue
 357                  * border color for Color info */
 358                 intel_wait_for_vblank(dev, pipe);
 359                 st00 = I915_READ8(VGA_MSR_WRITE);
 360                 status = ((st00 & (1 << 4)) != 0) ?
 361                         connector_status_connected :
 362                         connector_status_disconnected;
 363
 364                 I915_WRITE(pipeconf_reg, pipeconf);
 365         } else {
 366                 bool restore_vblank = false;
 367                 int count, detect;
 368
 369                 /*
 370                 * If there isn't any border, add some.
 371                 * Yes, this will flicker
 372                 */
 373                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 374                         uint32_t vsync = I915_READ(vsync_reg);
 375                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 376
 377                         vblank_start = vsync_start;
 378                         I915_WRITE(vblank_reg,
 379                                    (vblank_start - 1) |
 380                                    ((vblank_end - 1) << 16));
 381                         restore_vblank = true;
 382                 }
 383                 /* sample in the vertical border, selecting the larger one */
 384                 if (vblank_start - vactive >= vtotal - vblank_end)
 385                         vsample = (vblank_start + vactive) >> 1;
 386                 else
 387                         vsample = (vtotal + vblank_end) >> 1;
 388
 389                 /*
 390                  * Wait for the border to be displayed
 391                  */
 392                 while (I915_READ(pipe_dsl_reg) >= vactive)
 393                         ;
 394                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 395                         ;
 396                 /*
 397                  * Watch ST00 for an entire scanline
 398                  */
 399                 detect = 0;
 400                 count = 0;
 401                 do {
 402                         count++;
 403                         /* Read the ST00 VGA status register */
 404                         st00 = I915_READ8(VGA_MSR_WRITE);
 405                         if (st00 & (1 << 4))
 406                                 detect++;
 407                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 408
 409                 /* restore vblank if necessary */
 410                 if (restore_vblank)
 411                         I915_WRITE(vblank_reg, vblank);
 412                 /*
 413                  * If more than 3/4 of the scanline detected a monitor,
 414                  * then it is assumed to be present. This works even on i830,
 415                  * where there isn't any way to force the border color across
 416                  * the screen
 417                  */
 418                 status = detect * 4 > count * 3 ?
 419                          connector_status_connected :
 420                          connector_status_disconnected;
 421         }
 422
 423         /* Restore previous settings */
 424         I915_WRITE(bclrpat_reg, save_bclrpat);
 425
 426         return status;
 427 }
 428
 429 static enum drm_connector_status
 430 intel_crt_detect(struct drm_connector *connector, bool force)
 431 {
 432         struct drm_device *dev = connector->dev;
 433         struct intel_crt *crt = intel_attached_crt(connector);
 434         struct drm_crtc *crtc;
 435         int dpms_mode;
 436         enum drm_connector_status status;
 437
 438         if (I915_HAS_HOTPLUG(dev)) {
 439                 if (intel_crt_detect_hotplug(connector)) {
 440                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 441                         return connector_status_connected;
 442                 } else {
 443                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 444                         return connector_status_disconnected;
 445                 }
 446         }
 447
 448         if (intel_crt_detect_ddc(connector))
 449                 return connector_status_connected;
 450
 451         if (!force)
 452                 return connector->status;
 453
 454         /* for pre-945g platforms use load detect */
 455         crtc = crt->base.base.crtc;
 456         if (crtc && crtc->enabled) {
 457                 status = intel_crt_load_detect(crtc, crt);
 458         } else {
 459                 crtc = intel_get_load_detect_pipe(&crt->base, connector,
 460                                                   NULL, &dpms_mode);
 461                 if (crtc) {
 462                         if (intel_crt_detect_ddc(connector))
 463                                 status = connector_status_connected;
 464                         else
 465                                 status = intel_crt_load_detect(crtc, crt);
 466                         intel_release_load_detect_pipe(&crt->base,
 467                                                        connector, dpms_mode);
 468                 } else
 469                         status = connector_status_unknown;
 470         }
 471
 472         return status;
 473 }
 474
 475 static void intel_crt_destroy(struct drm_connector *connector)
 476 {
 477         drm_sysfs_connector_remove(connector);
 478         drm_connector_cleanup(connector);
 479         kfree(connector);
 480 }
 481
 482 static int intel_crt_get_modes(struct drm_connector *connector)
 483 {
 484         struct drm_device *dev = connector->dev;
 485         struct drm_i915_private *dev_priv = dev->dev_private;
 486         int ret;
 487
 488         ret = intel_ddc_get_modes(connector,
 489                                  &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 490         if (ret || !IS_G4X(dev))
 491                 return ret;
 492
 493         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 494         return intel_ddc_get_modes(connector,
 495                                    &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
 496 }
 497
 498 static int intel_crt_set_property(struct drm_connector *connector,
 499                                   struct drm_property *property,
 500                                   uint64_t value)
 501 {
 502         return 0;
 503 }
 504
 505 static void intel_crt_reset(struct drm_connector *connector)
 506 {
 507         struct drm_device *dev = connector->dev;
 508         struct intel_crt *crt = intel_attached_crt(connector);
 509
 510         if (HAS_PCH_SPLIT(dev))
 511                 crt->force_hotplug_required = 1;
 512 }
 513
 514 /*
 515  * Routines for controlling stuff on the analog port
 516  */
 517
 518 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 519         .dpms = intel_crt_dpms,
 520         .mode_fixup = intel_crt_mode_fixup,
 521         .prepare = intel_encoder_prepare,
 522         .commit = intel_encoder_commit,
 523         .mode_set = intel_crt_mode_set,
 524 };
 525
 526 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 527         .reset = intel_crt_reset,
 528         .dpms = drm_helper_connector_dpms,
 529         .detect = intel_crt_detect,
 530         .fill_modes = drm_helper_probe_single_connector_modes,
 531         .destroy = intel_crt_destroy,
 532         .set_property = intel_crt_set_property,
 533 };
 534
 535 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 536         .mode_valid = intel_crt_mode_valid,
 537         .get_modes = intel_crt_get_modes,
 538         .best_encoder = intel_best_encoder,
 539 };
 540
 541 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 542         .destroy = intel_encoder_destroy,
 543 };
 544
 545 void intel_crt_init(struct drm_device *dev)
 546 {
 547         struct drm_connector *connector;
 548         struct intel_crt *crt;
 549         struct intel_connector *intel_connector;
 550         struct drm_i915_private *dev_priv = dev->dev_private;
 551
 552         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 553         if (!crt)
 554                 return;
 555
 556         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 557         if (!intel_connector) {
 558                 kfree(crt);
 559                 return;
 560         }
 561
 562         connector = &intel_connector->base;
 563         drm_connector_init(dev, &intel_connector->base,
 564                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 565
 566         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 567                          DRM_MODE_ENCODER_DAC);
 568
 569         intel_connector_attach_encoder(intel_connector, &crt->base);
 570
 571         crt->base.type = INTEL_OUTPUT_ANALOG;
 572         crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
 573                                 1 << INTEL_ANALOG_CLONE_BIT |
 574                                 1 << INTEL_SDVO_LVDS_CLONE_BIT);
 575         crt->base.crtc_mask = (1 << 0) | (1 << 1);
 576         connector->interlace_allowed = 1;
 577         connector->doublescan_allowed = 0;
 578
 579         drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
 580         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 581
 582         drm_sysfs_connector_add(connector);
 583
 584         if (I915_HAS_HOTPLUG(dev))
 585                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 586         else
 587                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 588
 589         /*
 590          * Configure the automatic hotplug detection stuff
 591          */
 592         crt->force_hotplug_required = 0;
 593         if (HAS_PCH_SPLIT(dev)) {
 594                 u32 adpa;
 595
 596                 adpa = I915_READ(PCH_ADPA);
 597                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 598                 adpa |= ADPA_HOTPLUG_BITS;
 599                 I915_WRITE(PCH_ADPA, adpa);
 600                 POSTING_READ(PCH_ADPA);
 601
 602                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 603                 crt->force_hotplug_required = 1;
 604         }
 605
 606         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 607 }