1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include <linux/device.h>
35 #include "intel_drv.h"
37 #include <linux/console.h>
38 #include "drm_crtc_helper.h"
40 static int i915_modeset
= -1;
41 module_param_named(modeset
, i915_modeset
, int, 0400);
43 unsigned int i915_fbpercrtc
= 0;
44 module_param_named(fbpercrtc
, i915_fbpercrtc
, int, 0400);
46 int i915_panel_ignore_lid
= 0;
47 module_param_named(panel_ignore_lid
, i915_panel_ignore_lid
, int, 0600);
49 unsigned int i915_powersave
= 1;
50 module_param_named(powersave
, i915_powersave
, int, 0600);
52 unsigned int i915_semaphores
= 0;
53 module_param_named(semaphores
, i915_semaphores
, int, 0600);
55 unsigned int i915_enable_rc6
= 0;
56 module_param_named(i915_enable_rc6
, i915_enable_rc6
, int, 0600);
58 unsigned int i915_lvds_downclock
= 0;
59 module_param_named(lvds_downclock
, i915_lvds_downclock
, int, 0400);
61 unsigned int i915_panel_use_ssc
= 1;
62 module_param_named(lvds_use_ssc
, i915_panel_use_ssc
, int, 0600);
64 int i915_vbt_sdvo_panel_type
= -1;
65 module_param_named(vbt_sdvo_panel_type
, i915_vbt_sdvo_panel_type
, int, 0600);
67 static bool i915_try_reset
= true;
68 module_param_named(reset
, i915_try_reset
, bool, 0600);
70 static struct drm_driver driver
;
71 extern int intel_agp_enabled
;
73 #define INTEL_VGA_DEVICE(id, info) { \
74 .class = PCI_CLASS_DISPLAY_VGA << 8, \
75 .class_mask = 0xff0000, \
78 .subvendor = PCI_ANY_ID, \
79 .subdevice = PCI_ANY_ID, \
80 .driver_data = (unsigned long) info }
82 static const struct intel_device_info intel_i830_info
= {
83 .gen
= 2, .is_mobile
= 1, .cursor_needs_physical
= 1,
84 .has_overlay
= 1, .overlay_needs_physical
= 1,
87 static const struct intel_device_info intel_845g_info
= {
89 .has_overlay
= 1, .overlay_needs_physical
= 1,
92 static const struct intel_device_info intel_i85x_info
= {
93 .gen
= 2, .is_i85x
= 1, .is_mobile
= 1,
94 .cursor_needs_physical
= 1,
95 .has_overlay
= 1, .overlay_needs_physical
= 1,
98 static const struct intel_device_info intel_i865g_info
= {
100 .has_overlay
= 1, .overlay_needs_physical
= 1,
103 static const struct intel_device_info intel_i915g_info
= {
104 .gen
= 3, .is_i915g
= 1, .cursor_needs_physical
= 1,
105 .has_overlay
= 1, .overlay_needs_physical
= 1,
107 static const struct intel_device_info intel_i915gm_info
= {
108 .gen
= 3, .is_mobile
= 1,
109 .cursor_needs_physical
= 1,
110 .has_overlay
= 1, .overlay_needs_physical
= 1,
113 static const struct intel_device_info intel_i945g_info
= {
114 .gen
= 3, .has_hotplug
= 1, .cursor_needs_physical
= 1,
115 .has_overlay
= 1, .overlay_needs_physical
= 1,
117 static const struct intel_device_info intel_i945gm_info
= {
118 .gen
= 3, .is_i945gm
= 1, .is_mobile
= 1,
119 .has_hotplug
= 1, .cursor_needs_physical
= 1,
120 .has_overlay
= 1, .overlay_needs_physical
= 1,
124 static const struct intel_device_info intel_i965g_info
= {
125 .gen
= 4, .is_broadwater
= 1,
130 static const struct intel_device_info intel_i965gm_info
= {
131 .gen
= 4, .is_crestline
= 1,
132 .is_mobile
= 1, .has_fbc
= 1, .has_hotplug
= 1,
137 static const struct intel_device_info intel_g33_info
= {
138 .gen
= 3, .is_g33
= 1,
139 .need_gfx_hws
= 1, .has_hotplug
= 1,
143 static const struct intel_device_info intel_g45_info
= {
144 .gen
= 4, .is_g4x
= 1, .need_gfx_hws
= 1,
145 .has_pipe_cxsr
= 1, .has_hotplug
= 1,
149 static const struct intel_device_info intel_gm45_info
= {
150 .gen
= 4, .is_g4x
= 1,
151 .is_mobile
= 1, .need_gfx_hws
= 1, .has_fbc
= 1,
152 .has_pipe_cxsr
= 1, .has_hotplug
= 1,
157 static const struct intel_device_info intel_pineview_info
= {
158 .gen
= 3, .is_g33
= 1, .is_pineview
= 1, .is_mobile
= 1,
159 .need_gfx_hws
= 1, .has_hotplug
= 1,
163 static const struct intel_device_info intel_ironlake_d_info
= {
165 .need_gfx_hws
= 1, .has_pipe_cxsr
= 1, .has_hotplug
= 1,
169 static const struct intel_device_info intel_ironlake_m_info
= {
170 .gen
= 5, .is_mobile
= 1,
171 .need_gfx_hws
= 1, .has_hotplug
= 1,
172 .has_fbc
= 0, /* disabled due to buggy hardware */
176 static const struct intel_device_info intel_sandybridge_d_info
= {
178 .need_gfx_hws
= 1, .has_hotplug
= 1,
183 static const struct intel_device_info intel_sandybridge_m_info
= {
184 .gen
= 6, .is_mobile
= 1,
185 .need_gfx_hws
= 1, .has_hotplug
= 1,
191 static const struct pci_device_id pciidlist
[] = { /* aka */
192 INTEL_VGA_DEVICE(0x3577, &intel_i830_info
), /* I830_M */
193 INTEL_VGA_DEVICE(0x2562, &intel_845g_info
), /* 845_G */
194 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info
), /* I855_GM */
195 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info
),
196 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info
), /* I865_G */
197 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info
), /* I915_G */
198 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info
), /* E7221_G */
199 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info
), /* I915_GM */
200 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info
), /* I945_G */
201 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info
), /* I945_GM */
202 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info
), /* I945_GME */
203 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info
), /* I946_GZ */
204 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info
), /* G35_G */
205 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info
), /* I965_Q */
206 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info
), /* I965_G */
207 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info
), /* Q35_G */
208 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info
), /* G33_G */
209 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info
), /* Q33_G */
210 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info
), /* I965_GM */
211 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info
), /* I965_GME */
212 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info
), /* GM45_G */
213 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info
), /* IGD_E_G */
214 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info
), /* Q45_G */
215 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info
), /* G45_G */
216 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info
), /* G41_G */
217 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info
), /* B43_G */
218 INTEL_VGA_DEVICE(0x2e92, &intel_g45_info
), /* B43_G.1 */
219 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info
),
220 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info
),
221 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info
),
222 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info
),
223 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info
),
224 INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info
),
225 INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info
),
226 INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info
),
227 INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info
),
228 INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info
),
229 INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info
),
233 #if defined(CONFIG_DRM_I915_KMS)
234 MODULE_DEVICE_TABLE(pci
, pciidlist
);
237 #define INTEL_PCH_DEVICE_ID_MASK 0xff00
238 #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
240 void intel_detect_pch (struct drm_device
*dev
)
242 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
246 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
247 * make graphics device passthrough work easy for VMM, that only
248 * need to expose ISA bridge to let driver know the real hardware
249 * underneath. This is a requirement from virtualization team.
251 pch
= pci_get_class(PCI_CLASS_BRIDGE_ISA
<< 8, NULL
);
253 if (pch
->vendor
== PCI_VENDOR_ID_INTEL
) {
255 id
= pch
->device
& INTEL_PCH_DEVICE_ID_MASK
;
257 if (id
== INTEL_PCH_CPT_DEVICE_ID_TYPE
) {
258 dev_priv
->pch_type
= PCH_CPT
;
259 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
266 void __gen6_gt_force_wake_get(struct drm_i915_private
*dev_priv
)
271 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1))
274 I915_WRITE_NOTRACE(FORCEWAKE
, 1);
275 POSTING_READ(FORCEWAKE
);
278 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1) == 0)
282 void __gen6_gt_force_wake_put(struct drm_i915_private
*dev_priv
)
284 I915_WRITE_NOTRACE(FORCEWAKE
, 0);
285 POSTING_READ(FORCEWAKE
);
288 void __gen6_gt_wait_for_fifo(struct drm_i915_private
*dev_priv
)
291 u32 fifo
= I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES
);
292 while (fifo
< 20 && loop
--) {
294 fifo
= I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES
);
298 static int i915_drm_freeze(struct drm_device
*dev
)
300 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
302 drm_kms_helper_poll_disable(dev
);
304 pci_save_state(dev
->pdev
);
306 /* If KMS is active, we do the leavevt stuff here */
307 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
308 int error
= i915_gem_idle(dev
);
310 dev_err(&dev
->pdev
->dev
,
311 "GEM idle failed, resume might fail\n");
314 drm_irq_uninstall(dev
);
317 i915_save_state(dev
);
319 intel_opregion_fini(dev
);
321 /* Modeset on resume, not lid events */
322 dev_priv
->modeset_on_lid
= 0;
327 int i915_suspend(struct drm_device
*dev
, pm_message_t state
)
331 if (!dev
|| !dev
->dev_private
) {
332 DRM_ERROR("dev: %p\n", dev
);
333 DRM_ERROR("DRM not initialized, aborting suspend.\n");
337 if (state
.event
== PM_EVENT_PRETHAW
)
341 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
344 error
= i915_drm_freeze(dev
);
348 if (state
.event
== PM_EVENT_SUSPEND
) {
349 /* Shut down the device */
350 pci_disable_device(dev
->pdev
);
351 pci_set_power_state(dev
->pdev
, PCI_D3hot
);
357 static int i915_drm_thaw(struct drm_device
*dev
)
359 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
362 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
363 mutex_lock(&dev
->struct_mutex
);
364 i915_gem_restore_gtt_mappings(dev
);
365 mutex_unlock(&dev
->struct_mutex
);
368 i915_restore_state(dev
);
369 intel_opregion_setup(dev
);
371 /* KMS EnterVT equivalent */
372 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
373 mutex_lock(&dev
->struct_mutex
);
374 dev_priv
->mm
.suspended
= 0;
376 error
= i915_gem_init_ringbuffer(dev
);
377 mutex_unlock(&dev
->struct_mutex
);
379 drm_mode_config_reset(dev
);
380 drm_irq_install(dev
);
382 /* Resume the modeset for every activated CRTC */
383 drm_helper_resume_force_mode(dev
);
385 if (IS_IRONLAKE_M(dev
))
386 ironlake_enable_rc6(dev
);
389 intel_opregion_init(dev
);
391 dev_priv
->modeset_on_lid
= 0;
396 int i915_resume(struct drm_device
*dev
)
400 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
403 if (pci_enable_device(dev
->pdev
))
406 pci_set_master(dev
->pdev
);
408 ret
= i915_drm_thaw(dev
);
412 drm_kms_helper_poll_enable(dev
);
416 static int i8xx_do_reset(struct drm_device
*dev
, u8 flags
)
418 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
423 I915_WRITE(D_STATE
, I915_READ(D_STATE
) | DSTATE_GFX_RESET_I830
);
424 POSTING_READ(D_STATE
);
426 if (IS_I830(dev
) || IS_845G(dev
)) {
427 I915_WRITE(DEBUG_RESET_I830
,
428 DEBUG_RESET_DISPLAY
|
431 POSTING_READ(DEBUG_RESET_I830
);
434 I915_WRITE(DEBUG_RESET_I830
, 0);
435 POSTING_READ(DEBUG_RESET_I830
);
440 I915_WRITE(D_STATE
, I915_READ(D_STATE
) & ~DSTATE_GFX_RESET_I830
);
441 POSTING_READ(D_STATE
);
446 static int i965_reset_complete(struct drm_device
*dev
)
449 pci_read_config_byte(dev
->pdev
, I965_GDRST
, &gdrst
);
453 static int i965_do_reset(struct drm_device
*dev
, u8 flags
)
458 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
459 * well as the reset bit (GR/bit 0). Setting the GR bit
460 * triggers the reset; when done, the hardware will clear it.
462 pci_read_config_byte(dev
->pdev
, I965_GDRST
, &gdrst
);
463 pci_write_config_byte(dev
->pdev
, I965_GDRST
, gdrst
| flags
| 0x1);
465 return wait_for(i965_reset_complete(dev
), 500);
468 static int ironlake_do_reset(struct drm_device
*dev
, u8 flags
)
470 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
471 u32 gdrst
= I915_READ(MCHBAR_MIRROR_BASE
+ ILK_GDSR
);
472 I915_WRITE(MCHBAR_MIRROR_BASE
+ ILK_GDSR
, gdrst
| flags
| 0x1);
473 return wait_for(I915_READ(MCHBAR_MIRROR_BASE
+ ILK_GDSR
) & 0x1, 500);
476 static int gen6_do_reset(struct drm_device
*dev
, u8 flags
)
478 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
480 I915_WRITE(GEN6_GDRST
, GEN6_GRDOM_FULL
);
481 return wait_for((I915_READ(GEN6_GDRST
) & GEN6_GRDOM_FULL
) == 0, 500);
485 * i965_reset - reset chip after a hang
486 * @dev: drm device to reset
487 * @flags: reset domains
489 * Reset the chip. Useful if a hang is detected. Returns zero on successful
490 * reset or otherwise an error code.
492 * Procedure is fairly simple:
493 * - reset the chip using the reset reg
494 * - re-init context state
495 * - re-init hardware status page
496 * - re-init ring buffer
497 * - re-init interrupt state
500 int i915_reset(struct drm_device
*dev
, u8 flags
)
502 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
504 * We really should only reset the display subsystem if we actually
507 bool need_display
= true;
513 if (!mutex_trylock(&dev
->struct_mutex
))
519 if (get_seconds() - dev_priv
->last_gpu_reset
< 5) {
520 DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
521 } else switch (INTEL_INFO(dev
)->gen
) {
523 ret
= gen6_do_reset(dev
, flags
);
526 ret
= ironlake_do_reset(dev
, flags
);
529 ret
= i965_do_reset(dev
, flags
);
532 ret
= i8xx_do_reset(dev
, flags
);
535 dev_priv
->last_gpu_reset
= get_seconds();
537 DRM_ERROR("Failed to reset chip.\n");
538 mutex_unlock(&dev
->struct_mutex
);
542 /* Ok, now get things going again... */
545 * Everything depends on having the GTT running, so we need to start
546 * there. Fortunately we don't need to do this unless we reset the
547 * chip at a PCI level.
549 * Next we need to restore the context, but we don't use those
552 * Ring buffer needs to be re-initialized in the KMS case, or if X
553 * was running at the time of the reset (i.e. we weren't VT
556 if (drm_core_check_feature(dev
, DRIVER_MODESET
) ||
557 !dev_priv
->mm
.suspended
) {
558 dev_priv
->mm
.suspended
= 0;
560 dev_priv
->ring
[RCS
].init(&dev_priv
->ring
[RCS
]);
562 dev_priv
->ring
[VCS
].init(&dev_priv
->ring
[VCS
]);
564 dev_priv
->ring
[BCS
].init(&dev_priv
->ring
[BCS
]);
566 mutex_unlock(&dev
->struct_mutex
);
567 drm_irq_uninstall(dev
);
568 drm_mode_config_reset(dev
);
569 drm_irq_install(dev
);
570 mutex_lock(&dev
->struct_mutex
);
573 mutex_unlock(&dev
->struct_mutex
);
576 * Perform a full modeset as on later generations, e.g. Ironlake, we may
577 * need to retrain the display link and cannot just restore the register
581 mutex_lock(&dev
->mode_config
.mutex
);
582 drm_helper_resume_force_mode(dev
);
583 mutex_unlock(&dev
->mode_config
.mutex
);
591 i915_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
593 /* Only bind to function 0 of the device. Early generations
594 * used function 1 as a placeholder for multi-head. This causes
595 * us confusion instead, especially on the systems where both
596 * functions have the same PCI-ID!
598 if (PCI_FUNC(pdev
->devfn
))
601 return drm_get_pci_dev(pdev
, ent
, &driver
);
605 i915_pci_remove(struct pci_dev
*pdev
)
607 struct drm_device
*dev
= pci_get_drvdata(pdev
);
612 static int i915_pm_suspend(struct device
*dev
)
614 struct pci_dev
*pdev
= to_pci_dev(dev
);
615 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
618 if (!drm_dev
|| !drm_dev
->dev_private
) {
619 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
623 if (drm_dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
626 error
= i915_drm_freeze(drm_dev
);
630 pci_disable_device(pdev
);
631 pci_set_power_state(pdev
, PCI_D3hot
);
636 static int i915_pm_resume(struct device
*dev
)
638 struct pci_dev
*pdev
= to_pci_dev(dev
);
639 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
641 return i915_resume(drm_dev
);
644 static int i915_pm_freeze(struct device
*dev
)
646 struct pci_dev
*pdev
= to_pci_dev(dev
);
647 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
649 if (!drm_dev
|| !drm_dev
->dev_private
) {
650 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
654 return i915_drm_freeze(drm_dev
);
657 static int i915_pm_thaw(struct device
*dev
)
659 struct pci_dev
*pdev
= to_pci_dev(dev
);
660 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
662 return i915_drm_thaw(drm_dev
);
665 static int i915_pm_poweroff(struct device
*dev
)
667 struct pci_dev
*pdev
= to_pci_dev(dev
);
668 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
670 return i915_drm_freeze(drm_dev
);
673 static const struct dev_pm_ops i915_pm_ops
= {
674 .suspend
= i915_pm_suspend
,
675 .resume
= i915_pm_resume
,
676 .freeze
= i915_pm_freeze
,
677 .thaw
= i915_pm_thaw
,
678 .poweroff
= i915_pm_poweroff
,
679 .restore
= i915_pm_resume
,
682 static struct vm_operations_struct i915_gem_vm_ops
= {
683 .fault
= i915_gem_fault
,
684 .open
= drm_gem_vm_open
,
685 .close
= drm_gem_vm_close
,
688 static struct drm_driver driver
= {
689 /* don't use mtrr's here, the Xserver or user space app should
690 * deal with them for intel hardware.
693 DRIVER_USE_AGP
| DRIVER_REQUIRE_AGP
| /* DRIVER_USE_MTRR |*/
694 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
,
695 .load
= i915_driver_load
,
696 .unload
= i915_driver_unload
,
697 .open
= i915_driver_open
,
698 .lastclose
= i915_driver_lastclose
,
699 .preclose
= i915_driver_preclose
,
700 .postclose
= i915_driver_postclose
,
702 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
703 .suspend
= i915_suspend
,
704 .resume
= i915_resume
,
706 .device_is_agp
= i915_driver_device_is_agp
,
707 .enable_vblank
= i915_enable_vblank
,
708 .disable_vblank
= i915_disable_vblank
,
709 .get_vblank_timestamp
= i915_get_vblank_timestamp
,
710 .get_scanout_position
= i915_get_crtc_scanoutpos
,
711 .irq_preinstall
= i915_driver_irq_preinstall
,
712 .irq_postinstall
= i915_driver_irq_postinstall
,
713 .irq_uninstall
= i915_driver_irq_uninstall
,
714 .irq_handler
= i915_driver_irq_handler
,
715 .reclaim_buffers
= drm_core_reclaim_buffers
,
716 .master_create
= i915_master_create
,
717 .master_destroy
= i915_master_destroy
,
718 #if defined(CONFIG_DEBUG_FS)
719 .debugfs_init
= i915_debugfs_init
,
720 .debugfs_cleanup
= i915_debugfs_cleanup
,
722 .gem_init_object
= i915_gem_init_object
,
723 .gem_free_object
= i915_gem_free_object
,
724 .gem_vm_ops
= &i915_gem_vm_ops
,
725 .dumb_create
= i915_gem_dumb_create
,
726 .dumb_map_offset
= i915_gem_mmap_gtt
,
727 .dumb_destroy
= i915_gem_dumb_destroy
,
728 .ioctls
= i915_ioctls
,
730 .owner
= THIS_MODULE
,
732 .release
= drm_release
,
733 .unlocked_ioctl
= drm_ioctl
,
734 .mmap
= drm_gem_mmap
,
736 .fasync
= drm_fasync
,
739 .compat_ioctl
= i915_compat_ioctl
,
741 .llseek
= noop_llseek
,
747 .major
= DRIVER_MAJOR
,
748 .minor
= DRIVER_MINOR
,
749 .patchlevel
= DRIVER_PATCHLEVEL
,
752 static struct pci_driver i915_pci_driver
= {
754 .id_table
= pciidlist
,
755 .probe
= i915_pci_probe
,
756 .remove
= i915_pci_remove
,
757 .driver
.pm
= &i915_pm_ops
,
760 static int __init
i915_init(void)
762 if (!intel_agp_enabled
) {
763 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
767 driver
.num_ioctls
= i915_max_ioctl
;
770 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
771 * explicitly disabled with the module pararmeter.
773 * Otherwise, just follow the parameter (defaulting to off).
775 * Allow optional vga_text_mode_force boot option to override
776 * the default behavior.
778 #if defined(CONFIG_DRM_I915_KMS)
779 if (i915_modeset
!= 0)
780 driver
.driver_features
|= DRIVER_MODESET
;
782 if (i915_modeset
== 1)
783 driver
.driver_features
|= DRIVER_MODESET
;
785 #ifdef CONFIG_VGA_CONSOLE
786 if (vgacon_text_force() && i915_modeset
== -1)
787 driver
.driver_features
&= ~DRIVER_MODESET
;
790 if (!(driver
.driver_features
& DRIVER_MODESET
))
791 driver
.get_vblank_timestamp
= NULL
;
793 return drm_pci_init(&driver
, &i915_pci_driver
);
796 static void __exit
i915_exit(void)
798 drm_pci_exit(&driver
, &i915_pci_driver
);
801 module_init(i915_init
);
802 module_exit(i915_exit
);
804 MODULE_AUTHOR(DRIVER_AUTHOR
);
805 MODULE_DESCRIPTION(DRIVER_DESC
);
806 MODULE_LICENSE("GPL and additional rights");