2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
19 #include "ar9003_mac.h"
21 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio
, int maxdelta
,
24 int mindelta
, int main_rssi_avg
,
25 int alt_rssi_avg
, int pkt_count
)
27 return (((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
28 (alt_rssi_avg
> main_rssi_avg
+ maxdelta
)) ||
29 (alt_rssi_avg
> main_rssi_avg
+ mindelta
)) && (pkt_count
> 50);
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group
, int alt_ratio
,
33 int curr_main_set
, int curr_alt_set
,
34 int alt_rssi_avg
, int main_rssi_avg
)
39 if (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
)
44 if ((((curr_main_set
== ATH_ANT_DIV_COMB_LNA2
) &&
45 (curr_alt_set
== ATH_ANT_DIV_COMB_LNA1
) &&
46 (alt_rssi_avg
>= (main_rssi_avg
- 5))) ||
47 ((curr_main_set
== ATH_ANT_DIV_COMB_LNA1
) &&
48 (curr_alt_set
== ATH_ANT_DIV_COMB_LNA2
) &&
49 (alt_rssi_avg
>= (main_rssi_avg
- 2)))) &&
60 static inline bool ath9k_check_auto_sleep(struct ath_softc
*sc
)
62 return sc
->ps_enabled
&&
63 (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
);
67 * Setup and link descriptors.
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
74 static void ath_rx_buf_link(struct ath_softc
*sc
, struct ath_buf
*bf
)
76 struct ath_hw
*ah
= sc
->sc_ah
;
77 struct ath_common
*common
= ath9k_hw_common(ah
);
84 ds
->ds_link
= 0; /* link to null */
85 ds
->ds_data
= bf
->bf_buf_addr
;
87 /* virtual addr of the beginning of the buffer. */
90 ds
->ds_vdata
= skb
->data
;
93 * setup rx descriptors. The rx_bufsize here tells the hardware
94 * how much data it can DMA to us and that we are prepared
97 ath9k_hw_setuprxdesc(ah
, ds
,
101 if (sc
->rx
.rxlink
== NULL
)
102 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
104 *sc
->rx
.rxlink
= bf
->bf_daddr
;
106 sc
->rx
.rxlink
= &ds
->ds_link
;
109 static void ath_setdefantenna(struct ath_softc
*sc
, u32 antenna
)
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc
->sc_ah
, antenna
);
113 sc
->rx
.defant
= antenna
;
114 sc
->rx
.rxotherant
= 0;
117 static void ath_opmode_init(struct ath_softc
*sc
)
119 struct ath_hw
*ah
= sc
->sc_ah
;
120 struct ath_common
*common
= ath9k_hw_common(ah
);
124 /* configure rx filter */
125 rfilt
= ath_calcrxfilter(sc
);
126 ath9k_hw_setrxfilter(ah
, rfilt
);
128 /* configure bssid mask */
129 ath_hw_setbssidmask(common
);
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah
);
134 /* calculate and install multicast filter */
135 mfilt
[0] = mfilt
[1] = ~0;
136 ath9k_hw_setmcastfilter(ah
, mfilt
[0], mfilt
[1]);
139 static bool ath_rx_edma_buf_link(struct ath_softc
*sc
,
140 enum ath9k_rx_qtype qtype
)
142 struct ath_hw
*ah
= sc
->sc_ah
;
143 struct ath_rx_edma
*rx_edma
;
147 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
148 if (skb_queue_len(&rx_edma
->rx_fifo
) >= rx_edma
->rx_fifo_hwsize
)
151 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
152 list_del_init(&bf
->list
);
157 memset(skb
->data
, 0, ah
->caps
.rx_status_len
);
158 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
159 ah
->caps
.rx_status_len
, DMA_TO_DEVICE
);
161 SKB_CB_ATHBUF(skb
) = bf
;
162 ath9k_hw_addrxbuf_edma(ah
, bf
->bf_buf_addr
, qtype
);
163 skb_queue_tail(&rx_edma
->rx_fifo
, skb
);
168 static void ath_rx_addbuffer_edma(struct ath_softc
*sc
,
169 enum ath9k_rx_qtype qtype
, int size
)
171 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
174 if (list_empty(&sc
->rx
.rxbuf
)) {
175 ath_dbg(common
, ATH_DBG_QUEUE
, "No free rx buf available\n");
179 while (!list_empty(&sc
->rx
.rxbuf
)) {
182 if (!ath_rx_edma_buf_link(sc
, qtype
))
190 static void ath_rx_remove_buffer(struct ath_softc
*sc
,
191 enum ath9k_rx_qtype qtype
)
194 struct ath_rx_edma
*rx_edma
;
197 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
199 while ((skb
= skb_dequeue(&rx_edma
->rx_fifo
)) != NULL
) {
200 bf
= SKB_CB_ATHBUF(skb
);
202 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
206 static void ath_rx_edma_cleanup(struct ath_softc
*sc
)
210 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
211 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
213 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
215 dev_kfree_skb_any(bf
->bf_mpdu
);
218 INIT_LIST_HEAD(&sc
->rx
.rxbuf
);
220 kfree(sc
->rx
.rx_bufptr
);
221 sc
->rx
.rx_bufptr
= NULL
;
224 static void ath_rx_edma_init_queue(struct ath_rx_edma
*rx_edma
, int size
)
226 skb_queue_head_init(&rx_edma
->rx_fifo
);
227 skb_queue_head_init(&rx_edma
->rx_buffers
);
228 rx_edma
->rx_fifo_hwsize
= size
;
231 static int ath_rx_edma_init(struct ath_softc
*sc
, int nbufs
)
233 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
234 struct ath_hw
*ah
= sc
->sc_ah
;
240 ath9k_hw_set_rx_bufsize(ah
, common
->rx_bufsize
-
241 ah
->caps
.rx_status_len
);
243 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
],
244 ah
->caps
.rx_lp_qdepth
);
245 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
],
246 ah
->caps
.rx_hp_qdepth
);
248 size
= sizeof(struct ath_buf
) * nbufs
;
249 bf
= kzalloc(size
, GFP_KERNEL
);
253 INIT_LIST_HEAD(&sc
->rx
.rxbuf
);
254 sc
->rx
.rx_bufptr
= bf
;
256 for (i
= 0; i
< nbufs
; i
++, bf
++) {
257 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_KERNEL
);
263 memset(skb
->data
, 0, common
->rx_bufsize
);
266 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
269 if (unlikely(dma_mapping_error(sc
->dev
,
271 dev_kfree_skb_any(skb
);
275 "dma_mapping_error() on RX init\n");
280 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
286 ath_rx_edma_cleanup(sc
);
290 static void ath_edma_start_recv(struct ath_softc
*sc
)
292 spin_lock_bh(&sc
->rx
.rxbuflock
);
294 ath9k_hw_rxena(sc
->sc_ah
);
296 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_HP
,
297 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
].rx_fifo_hwsize
);
299 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_LP
,
300 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
].rx_fifo_hwsize
);
304 ath9k_hw_startpcureceive(sc
->sc_ah
, (sc
->sc_flags
& SC_OP_OFFCHANNEL
));
306 spin_unlock_bh(&sc
->rx
.rxbuflock
);
309 static void ath_edma_stop_recv(struct ath_softc
*sc
)
311 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
312 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
315 int ath_rx_init(struct ath_softc
*sc
, int nbufs
)
317 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
322 spin_lock_init(&sc
->sc_pcu_lock
);
323 sc
->sc_flags
&= ~SC_OP_RXFLUSH
;
324 spin_lock_init(&sc
->rx
.rxbuflock
);
326 common
->rx_bufsize
= IEEE80211_MAX_MPDU_LEN
/ 2 +
327 sc
->sc_ah
->caps
.rx_status_len
;
329 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
330 return ath_rx_edma_init(sc
, nbufs
);
332 ath_dbg(common
, ATH_DBG_CONFIG
, "cachelsz %u rxbufsize %u\n",
333 common
->cachelsz
, common
->rx_bufsize
);
335 /* Initialize rx descriptors */
337 error
= ath_descdma_setup(sc
, &sc
->rx
.rxdma
, &sc
->rx
.rxbuf
,
341 "failed to allocate rx descriptors: %d\n",
346 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
347 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
,
355 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
358 if (unlikely(dma_mapping_error(sc
->dev
,
360 dev_kfree_skb_any(skb
);
364 "dma_mapping_error() on RX init\n");
369 sc
->rx
.rxlink
= NULL
;
379 void ath_rx_cleanup(struct ath_softc
*sc
)
381 struct ath_hw
*ah
= sc
->sc_ah
;
382 struct ath_common
*common
= ath9k_hw_common(ah
);
386 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
387 ath_rx_edma_cleanup(sc
);
390 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
393 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
402 if (sc
->rx
.rxdma
.dd_desc_len
!= 0)
403 ath_descdma_cleanup(sc
, &sc
->rx
.rxdma
, &sc
->rx
.rxbuf
);
408 * Calculate the receive filter according to the
409 * operating mode and state:
411 * o always accept unicast, broadcast, and multicast traffic
412 * o maintain current state of phy error reception (the hal
413 * may enable phy error frames for noise immunity work)
414 * o probe request frames are accepted only when operating in
415 * hostap, adhoc, or monitor modes
416 * o enable promiscuous mode according to the interface state
418 * - when operating in adhoc mode so the 802.11 layer creates
419 * node table entries for peers,
420 * - when operating in station mode for collecting rssi data when
421 * the station is otherwise quiet, or
422 * - when operating as a repeater so we see repeater-sta beacons
426 u32
ath_calcrxfilter(struct ath_softc
*sc
)
428 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
432 rfilt
= (ath9k_hw_getrxfilter(sc
->sc_ah
) & RX_FILTER_PRESERVE
)
433 | ATH9K_RX_FILTER_UCAST
| ATH9K_RX_FILTER_BCAST
434 | ATH9K_RX_FILTER_MCAST
;
436 if (sc
->rx
.rxfilter
& FIF_PROBE_REQ
)
437 rfilt
|= ATH9K_RX_FILTER_PROBEREQ
;
440 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
441 * mode interface or when in monitor mode. AP mode does not need this
442 * since it receives all in-BSS frames anyway.
444 if (sc
->sc_ah
->is_monitoring
)
445 rfilt
|= ATH9K_RX_FILTER_PROM
;
447 if (sc
->rx
.rxfilter
& FIF_CONTROL
)
448 rfilt
|= ATH9K_RX_FILTER_CONTROL
;
450 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_STATION
) &&
452 !(sc
->rx
.rxfilter
& FIF_BCN_PRBRESP_PROMISC
))
453 rfilt
|= ATH9K_RX_FILTER_MYBEACON
;
455 rfilt
|= ATH9K_RX_FILTER_BEACON
;
457 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_AP
) ||
458 (sc
->rx
.rxfilter
& FIF_PSPOLL
))
459 rfilt
|= ATH9K_RX_FILTER_PSPOLL
;
461 if (conf_is_ht(&sc
->hw
->conf
))
462 rfilt
|= ATH9K_RX_FILTER_COMP_BAR
;
464 if (sc
->nvifs
> 1 || (sc
->rx
.rxfilter
& FIF_OTHER_BSS
)) {
465 /* The following may also be needed for other older chips */
466 if (sc
->sc_ah
->hw_version
.macVersion
== AR_SREV_VERSION_9160
)
467 rfilt
|= ATH9K_RX_FILTER_PROM
;
468 rfilt
|= ATH9K_RX_FILTER_MCAST_BCAST_ALL
;
473 #undef RX_FILTER_PRESERVE
476 int ath_startrecv(struct ath_softc
*sc
)
478 struct ath_hw
*ah
= sc
->sc_ah
;
479 struct ath_buf
*bf
, *tbf
;
481 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
482 ath_edma_start_recv(sc
);
486 spin_lock_bh(&sc
->rx
.rxbuflock
);
487 if (list_empty(&sc
->rx
.rxbuf
))
490 sc
->rx
.rxlink
= NULL
;
491 list_for_each_entry_safe(bf
, tbf
, &sc
->rx
.rxbuf
, list
) {
492 ath_rx_buf_link(sc
, bf
);
495 /* We could have deleted elements so the list may be empty now */
496 if (list_empty(&sc
->rx
.rxbuf
))
499 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
500 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
505 ath9k_hw_startpcureceive(ah
, (sc
->sc_flags
& SC_OP_OFFCHANNEL
));
507 spin_unlock_bh(&sc
->rx
.rxbuflock
);
512 bool ath_stoprecv(struct ath_softc
*sc
)
514 struct ath_hw
*ah
= sc
->sc_ah
;
515 bool stopped
, reset
= false;
517 spin_lock_bh(&sc
->rx
.rxbuflock
);
518 ath9k_hw_abortpcurecv(ah
);
519 ath9k_hw_setrxfilter(ah
, 0);
520 stopped
= ath9k_hw_stopdmarecv(ah
, &reset
);
522 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
523 ath_edma_stop_recv(sc
);
525 sc
->rx
.rxlink
= NULL
;
526 spin_unlock_bh(&sc
->rx
.rxbuflock
);
528 if (!(ah
->ah_flags
& AH_UNPLUGGED
) &&
529 unlikely(!stopped
)) {
530 ath_err(ath9k_hw_common(sc
->sc_ah
),
531 "Could not stop RX, we could be "
532 "confusing the DMA engine when we start RX up\n");
533 ATH_DBG_WARN_ON_ONCE(!stopped
);
535 return stopped
&& !reset
;
538 void ath_flushrecv(struct ath_softc
*sc
)
540 sc
->sc_flags
|= SC_OP_RXFLUSH
;
541 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
542 ath_rx_tasklet(sc
, 1, true);
543 ath_rx_tasklet(sc
, 1, false);
544 sc
->sc_flags
&= ~SC_OP_RXFLUSH
;
547 static bool ath_beacon_dtim_pending_cab(struct sk_buff
*skb
)
549 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
550 struct ieee80211_mgmt
*mgmt
;
551 u8
*pos
, *end
, id
, elen
;
552 struct ieee80211_tim_ie
*tim
;
554 mgmt
= (struct ieee80211_mgmt
*)skb
->data
;
555 pos
= mgmt
->u
.beacon
.variable
;
556 end
= skb
->data
+ skb
->len
;
558 while (pos
+ 2 < end
) {
561 if (pos
+ elen
> end
)
564 if (id
== WLAN_EID_TIM
) {
565 if (elen
< sizeof(*tim
))
567 tim
= (struct ieee80211_tim_ie
*) pos
;
568 if (tim
->dtim_count
!= 0)
570 return tim
->bitmap_ctrl
& 0x01;
579 static void ath_rx_ps_beacon(struct ath_softc
*sc
, struct sk_buff
*skb
)
581 struct ieee80211_mgmt
*mgmt
;
582 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
584 if (skb
->len
< 24 + 8 + 2 + 2)
587 mgmt
= (struct ieee80211_mgmt
*)skb
->data
;
588 if (memcmp(common
->curbssid
, mgmt
->bssid
, ETH_ALEN
) != 0) {
589 /* TODO: This doesn't work well if you have stations
590 * associated to two different APs because curbssid
591 * is just the last AP that any of the stations associated
594 return; /* not from our current AP */
597 sc
->ps_flags
&= ~PS_WAIT_FOR_BEACON
;
599 if (sc
->ps_flags
& PS_BEACON_SYNC
) {
600 sc
->ps_flags
&= ~PS_BEACON_SYNC
;
601 ath_dbg(common
, ATH_DBG_PS
,
602 "Reconfigure Beacon timers based on timestamp from the AP\n");
606 if (ath_beacon_dtim_pending_cab(skb
)) {
608 * Remain awake waiting for buffered broadcast/multicast
609 * frames. If the last broadcast/multicast frame is not
610 * received properly, the next beacon frame will work as
611 * a backup trigger for returning into NETWORK SLEEP state,
612 * so we are waiting for it as well.
614 ath_dbg(common
, ATH_DBG_PS
,
615 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
616 sc
->ps_flags
|= PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
;
620 if (sc
->ps_flags
& PS_WAIT_FOR_CAB
) {
622 * This can happen if a broadcast frame is dropped or the AP
623 * fails to send a frame indicating that all CAB frames have
626 sc
->ps_flags
&= ~PS_WAIT_FOR_CAB
;
627 ath_dbg(common
, ATH_DBG_PS
,
628 "PS wait for CAB frames timed out\n");
632 static void ath_rx_ps(struct ath_softc
*sc
, struct sk_buff
*skb
)
634 struct ieee80211_hdr
*hdr
;
635 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
637 hdr
= (struct ieee80211_hdr
*)skb
->data
;
639 /* Process Beacon and CAB receive in PS state */
640 if (((sc
->ps_flags
& PS_WAIT_FOR_BEACON
) || ath9k_check_auto_sleep(sc
))
641 && ieee80211_is_beacon(hdr
->frame_control
))
642 ath_rx_ps_beacon(sc
, skb
);
643 else if ((sc
->ps_flags
& PS_WAIT_FOR_CAB
) &&
644 (ieee80211_is_data(hdr
->frame_control
) ||
645 ieee80211_is_action(hdr
->frame_control
)) &&
646 is_multicast_ether_addr(hdr
->addr1
) &&
647 !ieee80211_has_moredata(hdr
->frame_control
)) {
649 * No more broadcast/multicast frames to be received at this
652 sc
->ps_flags
&= ~(PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
);
653 ath_dbg(common
, ATH_DBG_PS
,
654 "All PS CAB frames received, back to sleep\n");
655 } else if ((sc
->ps_flags
& PS_WAIT_FOR_PSPOLL_DATA
) &&
656 !is_multicast_ether_addr(hdr
->addr1
) &&
657 !ieee80211_has_morefrags(hdr
->frame_control
)) {
658 sc
->ps_flags
&= ~PS_WAIT_FOR_PSPOLL_DATA
;
659 ath_dbg(common
, ATH_DBG_PS
,
660 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
661 sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
663 PS_WAIT_FOR_PSPOLL_DATA
|
664 PS_WAIT_FOR_TX_ACK
));
668 static bool ath_edma_get_buffers(struct ath_softc
*sc
,
669 enum ath9k_rx_qtype qtype
)
671 struct ath_rx_edma
*rx_edma
= &sc
->rx
.rx_edma
[qtype
];
672 struct ath_hw
*ah
= sc
->sc_ah
;
673 struct ath_common
*common
= ath9k_hw_common(ah
);
678 skb
= skb_peek(&rx_edma
->rx_fifo
);
682 bf
= SKB_CB_ATHBUF(skb
);
685 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
686 common
->rx_bufsize
, DMA_FROM_DEVICE
);
688 ret
= ath9k_hw_process_rxdesc_edma(ah
, NULL
, skb
->data
);
689 if (ret
== -EINPROGRESS
) {
690 /*let device gain the buffer again*/
691 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
692 common
->rx_bufsize
, DMA_FROM_DEVICE
);
696 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
697 if (ret
== -EINVAL
) {
698 /* corrupt descriptor, skip this one and the following one */
699 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
700 ath_rx_edma_buf_link(sc
, qtype
);
701 skb
= skb_peek(&rx_edma
->rx_fifo
);
705 bf
= SKB_CB_ATHBUF(skb
);
708 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
709 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
710 ath_rx_edma_buf_link(sc
, qtype
);
713 skb_queue_tail(&rx_edma
->rx_buffers
, skb
);
718 static struct ath_buf
*ath_edma_get_next_rx_buf(struct ath_softc
*sc
,
719 struct ath_rx_status
*rs
,
720 enum ath9k_rx_qtype qtype
)
722 struct ath_rx_edma
*rx_edma
= &sc
->rx
.rx_edma
[qtype
];
726 while (ath_edma_get_buffers(sc
, qtype
));
727 skb
= __skb_dequeue(&rx_edma
->rx_buffers
);
731 bf
= SKB_CB_ATHBUF(skb
);
732 ath9k_hw_process_rxdesc_edma(sc
->sc_ah
, rs
, skb
->data
);
736 static struct ath_buf
*ath_get_next_rx_buf(struct ath_softc
*sc
,
737 struct ath_rx_status
*rs
)
739 struct ath_hw
*ah
= sc
->sc_ah
;
740 struct ath_common
*common
= ath9k_hw_common(ah
);
745 if (list_empty(&sc
->rx
.rxbuf
)) {
746 sc
->rx
.rxlink
= NULL
;
750 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
754 * Must provide the virtual address of the current
755 * descriptor, the physical address, and the virtual
756 * address of the next descriptor in the h/w chain.
757 * This allows the HAL to look ahead to see if the
758 * hardware is done with a descriptor by checking the
759 * done bit in the following descriptor and the address
760 * of the current descriptor the DMA engine is working
761 * on. All this is necessary because of our use of
762 * a self-linked list to avoid rx overruns.
764 ret
= ath9k_hw_rxprocdesc(ah
, ds
, rs
);
765 if (ret
== -EINPROGRESS
) {
766 struct ath_rx_status trs
;
768 struct ath_desc
*tds
;
770 memset(&trs
, 0, sizeof(trs
));
771 if (list_is_last(&bf
->list
, &sc
->rx
.rxbuf
)) {
772 sc
->rx
.rxlink
= NULL
;
776 tbf
= list_entry(bf
->list
.next
, struct ath_buf
, list
);
779 * On some hardware the descriptor status words could
780 * get corrupted, including the done bit. Because of
781 * this, check if the next descriptor's done bit is
784 * If the next descriptor's done bit is set, the current
785 * descriptor has been corrupted. Force s/w to discard
786 * this descriptor and continue...
790 ret
= ath9k_hw_rxprocdesc(ah
, tds
, &trs
);
791 if (ret
== -EINPROGRESS
)
799 * Synchronize the DMA transfer with CPU before
800 * 1. accessing the frame
801 * 2. requeueing the same buffer to h/w
803 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
810 /* Assumes you've already done the endian to CPU conversion */
811 static bool ath9k_rx_accept(struct ath_common
*common
,
812 struct ieee80211_hdr
*hdr
,
813 struct ieee80211_rx_status
*rxs
,
814 struct ath_rx_status
*rx_stats
,
817 bool is_mc
, is_valid_tkip
, strip_mic
, mic_error
;
818 struct ath_hw
*ah
= common
->ah
;
820 u8 rx_status_len
= ah
->caps
.rx_status_len
;
822 fc
= hdr
->frame_control
;
824 is_mc
= !!is_multicast_ether_addr(hdr
->addr1
);
825 is_valid_tkip
= rx_stats
->rs_keyix
!= ATH9K_RXKEYIX_INVALID
&&
826 test_bit(rx_stats
->rs_keyix
, common
->tkip_keymap
);
827 strip_mic
= is_valid_tkip
&& ieee80211_is_data(fc
) &&
828 !(rx_stats
->rs_status
&
829 (ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_CRC
| ATH9K_RXERR_MIC
));
831 if (!rx_stats
->rs_datalen
)
834 * rs_status follows rs_datalen so if rs_datalen is too large
835 * we can take a hint that hardware corrupted it, so ignore
838 if (rx_stats
->rs_datalen
> (common
->rx_bufsize
- rx_status_len
))
841 /* Only use error bits from the last fragment */
842 if (rx_stats
->rs_more
)
845 mic_error
= is_valid_tkip
&& !ieee80211_is_ctl(fc
) &&
846 !ieee80211_has_morefrags(fc
) &&
847 !(le16_to_cpu(hdr
->seq_ctrl
) & IEEE80211_SCTL_FRAG
) &&
848 (rx_stats
->rs_status
& ATH9K_RXERR_MIC
);
851 * The rx_stats->rs_status will not be set until the end of the
852 * chained descriptors so it can be ignored if rs_more is set. The
853 * rs_more will be false at the last element of the chained
856 if (rx_stats
->rs_status
!= 0) {
857 if (rx_stats
->rs_status
& ATH9K_RXERR_CRC
) {
858 rxs
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
861 if (rx_stats
->rs_status
& ATH9K_RXERR_PHY
)
864 if (rx_stats
->rs_status
& ATH9K_RXERR_DECRYPT
) {
865 *decrypt_error
= true;
870 * Reject error frames with the exception of
871 * decryption and MIC failures. For monitor mode,
872 * we also ignore the CRC error.
874 if (ah
->is_monitoring
) {
875 if (rx_stats
->rs_status
&
876 ~(ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_MIC
|
880 if (rx_stats
->rs_status
&
881 ~(ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_MIC
)) {
888 * For unicast frames the MIC error bit can have false positives,
889 * so all MIC error reports need to be validated in software.
890 * False negatives are not common, so skip software verification
891 * if the hardware considers the MIC valid.
894 rxs
->flag
|= RX_FLAG_MMIC_STRIPPED
;
895 else if (is_mc
&& mic_error
)
896 rxs
->flag
|= RX_FLAG_MMIC_ERROR
;
901 static int ath9k_process_rate(struct ath_common
*common
,
902 struct ieee80211_hw
*hw
,
903 struct ath_rx_status
*rx_stats
,
904 struct ieee80211_rx_status
*rxs
)
906 struct ieee80211_supported_band
*sband
;
907 enum ieee80211_band band
;
910 band
= hw
->conf
.channel
->band
;
911 sband
= hw
->wiphy
->bands
[band
];
913 if (rx_stats
->rs_rate
& 0x80) {
915 rxs
->flag
|= RX_FLAG_HT
;
916 if (rx_stats
->rs_flags
& ATH9K_RX_2040
)
917 rxs
->flag
|= RX_FLAG_40MHZ
;
918 if (rx_stats
->rs_flags
& ATH9K_RX_GI
)
919 rxs
->flag
|= RX_FLAG_SHORT_GI
;
920 rxs
->rate_idx
= rx_stats
->rs_rate
& 0x7f;
924 for (i
= 0; i
< sband
->n_bitrates
; i
++) {
925 if (sband
->bitrates
[i
].hw_value
== rx_stats
->rs_rate
) {
929 if (sband
->bitrates
[i
].hw_value_short
== rx_stats
->rs_rate
) {
930 rxs
->flag
|= RX_FLAG_SHORTPRE
;
937 * No valid hardware bitrate found -- we should not get here
938 * because hardware has already validated this frame as OK.
940 ath_dbg(common
, ATH_DBG_ANY
,
941 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
947 static void ath9k_process_rssi(struct ath_common
*common
,
948 struct ieee80211_hw
*hw
,
949 struct ieee80211_hdr
*hdr
,
950 struct ath_rx_status
*rx_stats
)
952 struct ath_softc
*sc
= hw
->priv
;
953 struct ath_hw
*ah
= common
->ah
;
956 if (!rx_stats
->is_mybeacon
||
957 ((ah
->opmode
!= NL80211_IFTYPE_STATION
) &&
958 (ah
->opmode
!= NL80211_IFTYPE_ADHOC
)))
961 if (rx_stats
->rs_rssi
!= ATH9K_RSSI_BAD
&& !rx_stats
->rs_moreaggr
)
962 ATH_RSSI_LPF(sc
->last_rssi
, rx_stats
->rs_rssi
);
964 last_rssi
= sc
->last_rssi
;
965 if (likely(last_rssi
!= ATH_RSSI_DUMMY_MARKER
))
966 rx_stats
->rs_rssi
= ATH_EP_RND(last_rssi
,
967 ATH_RSSI_EP_MULTIPLIER
);
968 if (rx_stats
->rs_rssi
< 0)
969 rx_stats
->rs_rssi
= 0;
971 /* Update Beacon RSSI, this is used by ANI. */
972 ah
->stats
.avgbrssi
= rx_stats
->rs_rssi
;
976 * For Decrypt or Demic errors, we only mark packet status here and always push
977 * up the frame up to let mac80211 handle the actual error case, be it no
978 * decryption key or real decryption error. This let us keep statistics there.
980 static int ath9k_rx_skb_preprocess(struct ath_common
*common
,
981 struct ieee80211_hw
*hw
,
982 struct ieee80211_hdr
*hdr
,
983 struct ath_rx_status
*rx_stats
,
984 struct ieee80211_rx_status
*rx_status
,
987 struct ath_hw
*ah
= common
->ah
;
989 memset(rx_status
, 0, sizeof(struct ieee80211_rx_status
));
992 * everything but the rate is checked here, the rate check is done
993 * separately to avoid doing two lookups for a rate for each frame.
995 if (!ath9k_rx_accept(common
, hdr
, rx_status
, rx_stats
, decrypt_error
))
998 /* Only use status info from the last fragment */
999 if (rx_stats
->rs_more
)
1002 ath9k_process_rssi(common
, hw
, hdr
, rx_stats
);
1004 if (ath9k_process_rate(common
, hw
, rx_stats
, rx_status
))
1007 rx_status
->band
= hw
->conf
.channel
->band
;
1008 rx_status
->freq
= hw
->conf
.channel
->center_freq
;
1009 rx_status
->signal
= ah
->noise
+ rx_stats
->rs_rssi
;
1010 rx_status
->antenna
= rx_stats
->rs_antenna
;
1011 rx_status
->flag
|= RX_FLAG_MACTIME_MPDU
;
1016 static void ath9k_rx_skb_postprocess(struct ath_common
*common
,
1017 struct sk_buff
*skb
,
1018 struct ath_rx_status
*rx_stats
,
1019 struct ieee80211_rx_status
*rxs
,
1022 struct ath_hw
*ah
= common
->ah
;
1023 struct ieee80211_hdr
*hdr
;
1024 int hdrlen
, padpos
, padsize
;
1028 /* see if any padding is done by the hw and remove it */
1029 hdr
= (struct ieee80211_hdr
*) skb
->data
;
1030 hdrlen
= ieee80211_get_hdrlen_from_skb(skb
);
1031 fc
= hdr
->frame_control
;
1032 padpos
= ath9k_cmn_padpos(hdr
->frame_control
);
1034 /* The MAC header is padded to have 32-bit boundary if the
1035 * packet payload is non-zero. The general calculation for
1036 * padsize would take into account odd header lengths:
1037 * padsize = (4 - padpos % 4) % 4; However, since only
1038 * even-length headers are used, padding can only be 0 or 2
1039 * bytes and we can optimize this a bit. In addition, we must
1040 * not try to remove padding from short control frames that do
1041 * not have payload. */
1042 padsize
= padpos
& 3;
1043 if (padsize
&& skb
->len
>=padpos
+padsize
+FCS_LEN
) {
1044 memmove(skb
->data
+ padsize
, skb
->data
, padpos
);
1045 skb_pull(skb
, padsize
);
1048 keyix
= rx_stats
->rs_keyix
;
1050 if (!(keyix
== ATH9K_RXKEYIX_INVALID
) && !decrypt_error
&&
1051 ieee80211_has_protected(fc
)) {
1052 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1053 } else if (ieee80211_has_protected(fc
)
1054 && !decrypt_error
&& skb
->len
>= hdrlen
+ 4) {
1055 keyix
= skb
->data
[hdrlen
+ 3] >> 6;
1057 if (test_bit(keyix
, common
->keymap
))
1058 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1060 if (ah
->sw_mgmt_crypto
&&
1061 (rxs
->flag
& RX_FLAG_DECRYPTED
) &&
1062 ieee80211_is_mgmt(fc
))
1063 /* Use software decrypt for management frames. */
1064 rxs
->flag
&= ~RX_FLAG_DECRYPTED
;
1067 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb
*antcomb
,
1068 struct ath_hw_antcomb_conf ant_conf
,
1071 antcomb
->quick_scan_cnt
= 0;
1073 if (ant_conf
.main_lna_conf
== ATH_ANT_DIV_COMB_LNA2
)
1074 antcomb
->rssi_lna2
= main_rssi_avg
;
1075 else if (ant_conf
.main_lna_conf
== ATH_ANT_DIV_COMB_LNA1
)
1076 antcomb
->rssi_lna1
= main_rssi_avg
;
1078 switch ((ant_conf
.main_lna_conf
<< 4) | ant_conf
.alt_lna_conf
) {
1079 case 0x10: /* LNA2 A-B */
1080 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1081 antcomb
->first_quick_scan_conf
=
1082 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1083 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA1
;
1085 case 0x20: /* LNA1 A-B */
1086 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1087 antcomb
->first_quick_scan_conf
=
1088 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1089 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA2
;
1091 case 0x21: /* LNA1 LNA2 */
1092 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA2
;
1093 antcomb
->first_quick_scan_conf
=
1094 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1095 antcomb
->second_quick_scan_conf
=
1096 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1098 case 0x12: /* LNA2 LNA1 */
1099 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1
;
1100 antcomb
->first_quick_scan_conf
=
1101 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1102 antcomb
->second_quick_scan_conf
=
1103 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1105 case 0x13: /* LNA2 A+B */
1106 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1107 antcomb
->first_quick_scan_conf
=
1108 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1109 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA1
;
1111 case 0x23: /* LNA1 A+B */
1112 antcomb
->main_conf
= ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1113 antcomb
->first_quick_scan_conf
=
1114 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1115 antcomb
->second_quick_scan_conf
= ATH_ANT_DIV_COMB_LNA2
;
1122 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb
*antcomb
,
1123 struct ath_hw_antcomb_conf
*div_ant_conf
,
1124 int main_rssi_avg
, int alt_rssi_avg
,
1128 switch (antcomb
->quick_scan_cnt
) {
1130 /* set alt to main, and alt to first conf */
1131 div_ant_conf
->main_lna_conf
= antcomb
->main_conf
;
1132 div_ant_conf
->alt_lna_conf
= antcomb
->first_quick_scan_conf
;
1135 /* set alt to main, and alt to first conf */
1136 div_ant_conf
->main_lna_conf
= antcomb
->main_conf
;
1137 div_ant_conf
->alt_lna_conf
= antcomb
->second_quick_scan_conf
;
1138 antcomb
->rssi_first
= main_rssi_avg
;
1139 antcomb
->rssi_second
= alt_rssi_avg
;
1141 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) {
1143 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1144 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
,
1145 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1146 main_rssi_avg
, alt_rssi_avg
,
1147 antcomb
->total_pkt_count
))
1148 antcomb
->first_ratio
= true;
1150 antcomb
->first_ratio
= false;
1151 } else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
) {
1152 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1153 ATH_ANT_DIV_COMB_LNA1_DELTA_MID
,
1154 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1155 main_rssi_avg
, alt_rssi_avg
,
1156 antcomb
->total_pkt_count
))
1157 antcomb
->first_ratio
= true;
1159 antcomb
->first_ratio
= false;
1161 if ((((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
1162 (alt_rssi_avg
> main_rssi_avg
+
1163 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
)) ||
1164 (alt_rssi_avg
> main_rssi_avg
)) &&
1165 (antcomb
->total_pkt_count
> 50))
1166 antcomb
->first_ratio
= true;
1168 antcomb
->first_ratio
= false;
1172 antcomb
->alt_good
= false;
1173 antcomb
->scan_not_start
= false;
1174 antcomb
->scan
= false;
1175 antcomb
->rssi_first
= main_rssi_avg
;
1176 antcomb
->rssi_third
= alt_rssi_avg
;
1178 if (antcomb
->second_quick_scan_conf
== ATH_ANT_DIV_COMB_LNA1
)
1179 antcomb
->rssi_lna1
= alt_rssi_avg
;
1180 else if (antcomb
->second_quick_scan_conf
==
1181 ATH_ANT_DIV_COMB_LNA2
)
1182 antcomb
->rssi_lna2
= alt_rssi_avg
;
1183 else if (antcomb
->second_quick_scan_conf
==
1184 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
) {
1185 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
)
1186 antcomb
->rssi_lna2
= main_rssi_avg
;
1187 else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
)
1188 antcomb
->rssi_lna1
= main_rssi_avg
;
1191 if (antcomb
->rssi_lna2
> antcomb
->rssi_lna1
+
1192 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA
)
1193 div_ant_conf
->main_lna_conf
= ATH_ANT_DIV_COMB_LNA2
;
1195 div_ant_conf
->main_lna_conf
= ATH_ANT_DIV_COMB_LNA1
;
1197 if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) {
1198 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1199 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
,
1200 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1201 main_rssi_avg
, alt_rssi_avg
,
1202 antcomb
->total_pkt_count
))
1203 antcomb
->second_ratio
= true;
1205 antcomb
->second_ratio
= false;
1206 } else if (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
) {
1207 if (ath_is_alt_ant_ratio_better(alt_ratio
,
1208 ATH_ANT_DIV_COMB_LNA1_DELTA_MID
,
1209 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW
,
1210 main_rssi_avg
, alt_rssi_avg
,
1211 antcomb
->total_pkt_count
))
1212 antcomb
->second_ratio
= true;
1214 antcomb
->second_ratio
= false;
1216 if ((((alt_ratio
>= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2
) &&
1217 (alt_rssi_avg
> main_rssi_avg
+
1218 ATH_ANT_DIV_COMB_LNA1_DELTA_HI
)) ||
1219 (alt_rssi_avg
> main_rssi_avg
)) &&
1220 (antcomb
->total_pkt_count
> 50))
1221 antcomb
->second_ratio
= true;
1223 antcomb
->second_ratio
= false;
1226 /* set alt to the conf with maximun ratio */
1227 if (antcomb
->first_ratio
&& antcomb
->second_ratio
) {
1228 if (antcomb
->rssi_second
> antcomb
->rssi_third
) {
1230 if ((antcomb
->first_quick_scan_conf
==
1231 ATH_ANT_DIV_COMB_LNA1
) ||
1232 (antcomb
->first_quick_scan_conf
==
1233 ATH_ANT_DIV_COMB_LNA2
))
1234 /* Set alt LNA1 or LNA2*/
1235 if (div_ant_conf
->main_lna_conf
==
1236 ATH_ANT_DIV_COMB_LNA2
)
1237 div_ant_conf
->alt_lna_conf
=
1238 ATH_ANT_DIV_COMB_LNA1
;
1240 div_ant_conf
->alt_lna_conf
=
1241 ATH_ANT_DIV_COMB_LNA2
;
1243 /* Set alt to A+B or A-B */
1244 div_ant_conf
->alt_lna_conf
=
1245 antcomb
->first_quick_scan_conf
;
1246 } else if ((antcomb
->second_quick_scan_conf
==
1247 ATH_ANT_DIV_COMB_LNA1
) ||
1248 (antcomb
->second_quick_scan_conf
==
1249 ATH_ANT_DIV_COMB_LNA2
)) {
1250 /* Set alt LNA1 or LNA2 */
1251 if (div_ant_conf
->main_lna_conf
==
1252 ATH_ANT_DIV_COMB_LNA2
)
1253 div_ant_conf
->alt_lna_conf
=
1254 ATH_ANT_DIV_COMB_LNA1
;
1256 div_ant_conf
->alt_lna_conf
=
1257 ATH_ANT_DIV_COMB_LNA2
;
1259 /* Set alt to A+B or A-B */
1260 div_ant_conf
->alt_lna_conf
=
1261 antcomb
->second_quick_scan_conf
;
1263 } else if (antcomb
->first_ratio
) {
1265 if ((antcomb
->first_quick_scan_conf
==
1266 ATH_ANT_DIV_COMB_LNA1
) ||
1267 (antcomb
->first_quick_scan_conf
==
1268 ATH_ANT_DIV_COMB_LNA2
))
1269 /* Set alt LNA1 or LNA2 */
1270 if (div_ant_conf
->main_lna_conf
==
1271 ATH_ANT_DIV_COMB_LNA2
)
1272 div_ant_conf
->alt_lna_conf
=
1273 ATH_ANT_DIV_COMB_LNA1
;
1275 div_ant_conf
->alt_lna_conf
=
1276 ATH_ANT_DIV_COMB_LNA2
;
1278 /* Set alt to A+B or A-B */
1279 div_ant_conf
->alt_lna_conf
=
1280 antcomb
->first_quick_scan_conf
;
1281 } else if (antcomb
->second_ratio
) {
1283 if ((antcomb
->second_quick_scan_conf
==
1284 ATH_ANT_DIV_COMB_LNA1
) ||
1285 (antcomb
->second_quick_scan_conf
==
1286 ATH_ANT_DIV_COMB_LNA2
))
1287 /* Set alt LNA1 or LNA2 */
1288 if (div_ant_conf
->main_lna_conf
==
1289 ATH_ANT_DIV_COMB_LNA2
)
1290 div_ant_conf
->alt_lna_conf
=
1291 ATH_ANT_DIV_COMB_LNA1
;
1293 div_ant_conf
->alt_lna_conf
=
1294 ATH_ANT_DIV_COMB_LNA2
;
1296 /* Set alt to A+B or A-B */
1297 div_ant_conf
->alt_lna_conf
=
1298 antcomb
->second_quick_scan_conf
;
1300 /* main is largest */
1301 if ((antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA1
) ||
1302 (antcomb
->main_conf
== ATH_ANT_DIV_COMB_LNA2
))
1303 /* Set alt LNA1 or LNA2 */
1304 if (div_ant_conf
->main_lna_conf
==
1305 ATH_ANT_DIV_COMB_LNA2
)
1306 div_ant_conf
->alt_lna_conf
=
1307 ATH_ANT_DIV_COMB_LNA1
;
1309 div_ant_conf
->alt_lna_conf
=
1310 ATH_ANT_DIV_COMB_LNA2
;
1312 /* Set alt to A+B or A-B */
1313 div_ant_conf
->alt_lna_conf
= antcomb
->main_conf
;
1321 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf
*ant_conf
,
1322 struct ath_ant_comb
*antcomb
, int alt_ratio
)
1324 if (ant_conf
->div_group
== 0) {
1325 /* Adjust the fast_div_bias based on main and alt lna conf */
1326 switch ((ant_conf
->main_lna_conf
<< 4) |
1327 ant_conf
->alt_lna_conf
) {
1328 case 0x01: /* A-B LNA2 */
1329 ant_conf
->fast_div_bias
= 0x3b;
1331 case 0x02: /* A-B LNA1 */
1332 ant_conf
->fast_div_bias
= 0x3d;
1334 case 0x03: /* A-B A+B */
1335 ant_conf
->fast_div_bias
= 0x1;
1337 case 0x10: /* LNA2 A-B */
1338 ant_conf
->fast_div_bias
= 0x7;
1340 case 0x12: /* LNA2 LNA1 */
1341 ant_conf
->fast_div_bias
= 0x2;
1343 case 0x13: /* LNA2 A+B */
1344 ant_conf
->fast_div_bias
= 0x7;
1346 case 0x20: /* LNA1 A-B */
1347 ant_conf
->fast_div_bias
= 0x6;
1349 case 0x21: /* LNA1 LNA2 */
1350 ant_conf
->fast_div_bias
= 0x0;
1352 case 0x23: /* LNA1 A+B */
1353 ant_conf
->fast_div_bias
= 0x6;
1355 case 0x30: /* A+B A-B */
1356 ant_conf
->fast_div_bias
= 0x1;
1358 case 0x31: /* A+B LNA2 */
1359 ant_conf
->fast_div_bias
= 0x3b;
1361 case 0x32: /* A+B LNA1 */
1362 ant_conf
->fast_div_bias
= 0x3d;
1367 } else if (ant_conf
->div_group
== 1) {
1368 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1369 switch ((ant_conf
->main_lna_conf
<< 4) |
1370 ant_conf
->alt_lna_conf
) {
1371 case 0x01: /* A-B LNA2 */
1372 ant_conf
->fast_div_bias
= 0x1;
1373 ant_conf
->main_gaintb
= 0;
1374 ant_conf
->alt_gaintb
= 0;
1376 case 0x02: /* A-B LNA1 */
1377 ant_conf
->fast_div_bias
= 0x1;
1378 ant_conf
->main_gaintb
= 0;
1379 ant_conf
->alt_gaintb
= 0;
1381 case 0x03: /* A-B A+B */
1382 ant_conf
->fast_div_bias
= 0x1;
1383 ant_conf
->main_gaintb
= 0;
1384 ant_conf
->alt_gaintb
= 0;
1386 case 0x10: /* LNA2 A-B */
1387 if (!(antcomb
->scan
) &&
1388 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1389 ant_conf
->fast_div_bias
= 0x3f;
1391 ant_conf
->fast_div_bias
= 0x1;
1392 ant_conf
->main_gaintb
= 0;
1393 ant_conf
->alt_gaintb
= 0;
1395 case 0x12: /* LNA2 LNA1 */
1396 ant_conf
->fast_div_bias
= 0x1;
1397 ant_conf
->main_gaintb
= 0;
1398 ant_conf
->alt_gaintb
= 0;
1400 case 0x13: /* LNA2 A+B */
1401 if (!(antcomb
->scan
) &&
1402 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1403 ant_conf
->fast_div_bias
= 0x3f;
1405 ant_conf
->fast_div_bias
= 0x1;
1406 ant_conf
->main_gaintb
= 0;
1407 ant_conf
->alt_gaintb
= 0;
1409 case 0x20: /* LNA1 A-B */
1410 if (!(antcomb
->scan
) &&
1411 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1412 ant_conf
->fast_div_bias
= 0x3f;
1414 ant_conf
->fast_div_bias
= 0x1;
1415 ant_conf
->main_gaintb
= 0;
1416 ant_conf
->alt_gaintb
= 0;
1418 case 0x21: /* LNA1 LNA2 */
1419 ant_conf
->fast_div_bias
= 0x1;
1420 ant_conf
->main_gaintb
= 0;
1421 ant_conf
->alt_gaintb
= 0;
1423 case 0x23: /* LNA1 A+B */
1424 if (!(antcomb
->scan
) &&
1425 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1426 ant_conf
->fast_div_bias
= 0x3f;
1428 ant_conf
->fast_div_bias
= 0x1;
1429 ant_conf
->main_gaintb
= 0;
1430 ant_conf
->alt_gaintb
= 0;
1432 case 0x30: /* A+B A-B */
1433 ant_conf
->fast_div_bias
= 0x1;
1434 ant_conf
->main_gaintb
= 0;
1435 ant_conf
->alt_gaintb
= 0;
1437 case 0x31: /* A+B LNA2 */
1438 ant_conf
->fast_div_bias
= 0x1;
1439 ant_conf
->main_gaintb
= 0;
1440 ant_conf
->alt_gaintb
= 0;
1442 case 0x32: /* A+B LNA1 */
1443 ant_conf
->fast_div_bias
= 0x1;
1444 ant_conf
->main_gaintb
= 0;
1445 ant_conf
->alt_gaintb
= 0;
1450 } else if (ant_conf
->div_group
== 2) {
1451 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1452 switch ((ant_conf
->main_lna_conf
<< 4) |
1453 ant_conf
->alt_lna_conf
) {
1454 case 0x01: /* A-B LNA2 */
1455 ant_conf
->fast_div_bias
= 0x1;
1456 ant_conf
->main_gaintb
= 0;
1457 ant_conf
->alt_gaintb
= 0;
1459 case 0x02: /* A-B LNA1 */
1460 ant_conf
->fast_div_bias
= 0x1;
1461 ant_conf
->main_gaintb
= 0;
1462 ant_conf
->alt_gaintb
= 0;
1464 case 0x03: /* A-B A+B */
1465 ant_conf
->fast_div_bias
= 0x1;
1466 ant_conf
->main_gaintb
= 0;
1467 ant_conf
->alt_gaintb
= 0;
1469 case 0x10: /* LNA2 A-B */
1470 if (!(antcomb
->scan
) &&
1471 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1472 ant_conf
->fast_div_bias
= 0x1;
1474 ant_conf
->fast_div_bias
= 0x2;
1475 ant_conf
->main_gaintb
= 0;
1476 ant_conf
->alt_gaintb
= 0;
1478 case 0x12: /* LNA2 LNA1 */
1479 ant_conf
->fast_div_bias
= 0x1;
1480 ant_conf
->main_gaintb
= 0;
1481 ant_conf
->alt_gaintb
= 0;
1483 case 0x13: /* LNA2 A+B */
1484 if (!(antcomb
->scan
) &&
1485 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1486 ant_conf
->fast_div_bias
= 0x1;
1488 ant_conf
->fast_div_bias
= 0x2;
1489 ant_conf
->main_gaintb
= 0;
1490 ant_conf
->alt_gaintb
= 0;
1492 case 0x20: /* LNA1 A-B */
1493 if (!(antcomb
->scan
) &&
1494 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1495 ant_conf
->fast_div_bias
= 0x1;
1497 ant_conf
->fast_div_bias
= 0x2;
1498 ant_conf
->main_gaintb
= 0;
1499 ant_conf
->alt_gaintb
= 0;
1501 case 0x21: /* LNA1 LNA2 */
1502 ant_conf
->fast_div_bias
= 0x1;
1503 ant_conf
->main_gaintb
= 0;
1504 ant_conf
->alt_gaintb
= 0;
1506 case 0x23: /* LNA1 A+B */
1507 if (!(antcomb
->scan
) &&
1508 (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
))
1509 ant_conf
->fast_div_bias
= 0x1;
1511 ant_conf
->fast_div_bias
= 0x2;
1512 ant_conf
->main_gaintb
= 0;
1513 ant_conf
->alt_gaintb
= 0;
1515 case 0x30: /* A+B A-B */
1516 ant_conf
->fast_div_bias
= 0x1;
1517 ant_conf
->main_gaintb
= 0;
1518 ant_conf
->alt_gaintb
= 0;
1520 case 0x31: /* A+B LNA2 */
1521 ant_conf
->fast_div_bias
= 0x1;
1522 ant_conf
->main_gaintb
= 0;
1523 ant_conf
->alt_gaintb
= 0;
1525 case 0x32: /* A+B LNA1 */
1526 ant_conf
->fast_div_bias
= 0x1;
1527 ant_conf
->main_gaintb
= 0;
1528 ant_conf
->alt_gaintb
= 0;
1536 /* Antenna diversity and combining */
1537 static void ath_ant_comb_scan(struct ath_softc
*sc
, struct ath_rx_status
*rs
)
1539 struct ath_hw_antcomb_conf div_ant_conf
;
1540 struct ath_ant_comb
*antcomb
= &sc
->ant_comb
;
1541 int alt_ratio
= 0, alt_rssi_avg
= 0, main_rssi_avg
= 0, curr_alt_set
;
1543 int main_rssi
= rs
->rs_rssi_ctl0
;
1544 int alt_rssi
= rs
->rs_rssi_ctl1
;
1545 int rx_ant_conf
, main_ant_conf
;
1546 bool short_scan
= false;
1548 rx_ant_conf
= (rs
->rs_rssi_ctl2
>> ATH_ANT_RX_CURRENT_SHIFT
) &
1550 main_ant_conf
= (rs
->rs_rssi_ctl2
>> ATH_ANT_RX_MAIN_SHIFT
) &
1553 /* Record packet only when both main_rssi and alt_rssi is positive */
1554 if (main_rssi
> 0 && alt_rssi
> 0) {
1555 antcomb
->total_pkt_count
++;
1556 antcomb
->main_total_rssi
+= main_rssi
;
1557 antcomb
->alt_total_rssi
+= alt_rssi
;
1558 if (main_ant_conf
== rx_ant_conf
)
1559 antcomb
->main_recv_cnt
++;
1561 antcomb
->alt_recv_cnt
++;
1564 /* Short scan check */
1565 if (antcomb
->scan
&& antcomb
->alt_good
) {
1566 if (time_after(jiffies
, antcomb
->scan_start_time
+
1567 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR
)))
1570 if (antcomb
->total_pkt_count
==
1571 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT
) {
1572 alt_ratio
= ((antcomb
->alt_recv_cnt
* 100) /
1573 antcomb
->total_pkt_count
);
1574 if (alt_ratio
< ATH_ANT_DIV_COMB_ALT_ANT_RATIO
)
1579 if (((antcomb
->total_pkt_count
< ATH_ANT_DIV_COMB_MAX_PKTCOUNT
) ||
1580 rs
->rs_moreaggr
) && !short_scan
)
1583 if (antcomb
->total_pkt_count
) {
1584 alt_ratio
= ((antcomb
->alt_recv_cnt
* 100) /
1585 antcomb
->total_pkt_count
);
1586 main_rssi_avg
= (antcomb
->main_total_rssi
/
1587 antcomb
->total_pkt_count
);
1588 alt_rssi_avg
= (antcomb
->alt_total_rssi
/
1589 antcomb
->total_pkt_count
);
1593 ath9k_hw_antdiv_comb_conf_get(sc
->sc_ah
, &div_ant_conf
);
1594 curr_alt_set
= div_ant_conf
.alt_lna_conf
;
1595 curr_main_set
= div_ant_conf
.main_lna_conf
;
1599 if (antcomb
->count
== ATH_ANT_DIV_COMB_MAX_COUNT
) {
1600 if (alt_ratio
> ATH_ANT_DIV_COMB_ALT_ANT_RATIO
) {
1601 ath_lnaconf_alt_good_scan(antcomb
, div_ant_conf
,
1603 antcomb
->alt_good
= true;
1605 antcomb
->alt_good
= false;
1609 antcomb
->scan
= true;
1610 antcomb
->scan_not_start
= true;
1613 if (!antcomb
->scan
) {
1614 if (ath_ant_div_comb_alt_check(div_ant_conf
.div_group
,
1615 alt_ratio
, curr_main_set
, curr_alt_set
,
1616 alt_rssi_avg
, main_rssi_avg
)) {
1617 if (curr_alt_set
== ATH_ANT_DIV_COMB_LNA2
) {
1618 /* Switch main and alt LNA */
1619 div_ant_conf
.main_lna_conf
=
1620 ATH_ANT_DIV_COMB_LNA2
;
1621 div_ant_conf
.alt_lna_conf
=
1622 ATH_ANT_DIV_COMB_LNA1
;
1623 } else if (curr_alt_set
== ATH_ANT_DIV_COMB_LNA1
) {
1624 div_ant_conf
.main_lna_conf
=
1625 ATH_ANT_DIV_COMB_LNA1
;
1626 div_ant_conf
.alt_lna_conf
=
1627 ATH_ANT_DIV_COMB_LNA2
;
1631 } else if ((curr_alt_set
!= ATH_ANT_DIV_COMB_LNA1
) &&
1632 (curr_alt_set
!= ATH_ANT_DIV_COMB_LNA2
)) {
1633 /* Set alt to another LNA */
1634 if (curr_main_set
== ATH_ANT_DIV_COMB_LNA2
)
1635 div_ant_conf
.alt_lna_conf
=
1636 ATH_ANT_DIV_COMB_LNA1
;
1637 else if (curr_main_set
== ATH_ANT_DIV_COMB_LNA1
)
1638 div_ant_conf
.alt_lna_conf
=
1639 ATH_ANT_DIV_COMB_LNA2
;
1644 if ((alt_rssi_avg
< (main_rssi_avg
+
1645 div_ant_conf
.lna1_lna2_delta
)))
1649 if (!antcomb
->scan_not_start
) {
1650 switch (curr_alt_set
) {
1651 case ATH_ANT_DIV_COMB_LNA2
:
1652 antcomb
->rssi_lna2
= alt_rssi_avg
;
1653 antcomb
->rssi_lna1
= main_rssi_avg
;
1654 antcomb
->scan
= true;
1656 div_ant_conf
.main_lna_conf
=
1657 ATH_ANT_DIV_COMB_LNA1
;
1658 div_ant_conf
.alt_lna_conf
=
1659 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1661 case ATH_ANT_DIV_COMB_LNA1
:
1662 antcomb
->rssi_lna1
= alt_rssi_avg
;
1663 antcomb
->rssi_lna2
= main_rssi_avg
;
1664 antcomb
->scan
= true;
1666 div_ant_conf
.main_lna_conf
= ATH_ANT_DIV_COMB_LNA2
;
1667 div_ant_conf
.alt_lna_conf
=
1668 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1670 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
:
1671 antcomb
->rssi_add
= alt_rssi_avg
;
1672 antcomb
->scan
= true;
1674 div_ant_conf
.alt_lna_conf
=
1675 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1677 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
:
1678 antcomb
->rssi_sub
= alt_rssi_avg
;
1679 antcomb
->scan
= false;
1680 if (antcomb
->rssi_lna2
>
1681 (antcomb
->rssi_lna1
+
1682 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA
)) {
1683 /* use LNA2 as main LNA */
1684 if ((antcomb
->rssi_add
> antcomb
->rssi_lna1
) &&
1685 (antcomb
->rssi_add
> antcomb
->rssi_sub
)) {
1687 div_ant_conf
.main_lna_conf
=
1688 ATH_ANT_DIV_COMB_LNA2
;
1689 div_ant_conf
.alt_lna_conf
=
1690 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1691 } else if (antcomb
->rssi_sub
>
1692 antcomb
->rssi_lna1
) {
1694 div_ant_conf
.main_lna_conf
=
1695 ATH_ANT_DIV_COMB_LNA2
;
1696 div_ant_conf
.alt_lna_conf
=
1697 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1700 div_ant_conf
.main_lna_conf
=
1701 ATH_ANT_DIV_COMB_LNA2
;
1702 div_ant_conf
.alt_lna_conf
=
1703 ATH_ANT_DIV_COMB_LNA1
;
1706 /* use LNA1 as main LNA */
1707 if ((antcomb
->rssi_add
> antcomb
->rssi_lna2
) &&
1708 (antcomb
->rssi_add
> antcomb
->rssi_sub
)) {
1710 div_ant_conf
.main_lna_conf
=
1711 ATH_ANT_DIV_COMB_LNA1
;
1712 div_ant_conf
.alt_lna_conf
=
1713 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2
;
1714 } else if (antcomb
->rssi_sub
>
1715 antcomb
->rssi_lna1
) {
1717 div_ant_conf
.main_lna_conf
=
1718 ATH_ANT_DIV_COMB_LNA1
;
1719 div_ant_conf
.alt_lna_conf
=
1720 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2
;
1723 div_ant_conf
.main_lna_conf
=
1724 ATH_ANT_DIV_COMB_LNA1
;
1725 div_ant_conf
.alt_lna_conf
=
1726 ATH_ANT_DIV_COMB_LNA2
;
1734 if (!antcomb
->alt_good
) {
1735 antcomb
->scan_not_start
= false;
1736 /* Set alt to another LNA */
1737 if (curr_main_set
== ATH_ANT_DIV_COMB_LNA2
) {
1738 div_ant_conf
.main_lna_conf
=
1739 ATH_ANT_DIV_COMB_LNA2
;
1740 div_ant_conf
.alt_lna_conf
=
1741 ATH_ANT_DIV_COMB_LNA1
;
1742 } else if (curr_main_set
== ATH_ANT_DIV_COMB_LNA1
) {
1743 div_ant_conf
.main_lna_conf
=
1744 ATH_ANT_DIV_COMB_LNA1
;
1745 div_ant_conf
.alt_lna_conf
=
1746 ATH_ANT_DIV_COMB_LNA2
;
1752 ath_select_ant_div_from_quick_scan(antcomb
, &div_ant_conf
,
1753 main_rssi_avg
, alt_rssi_avg
,
1756 antcomb
->quick_scan_cnt
++;
1759 ath_ant_div_conf_fast_divbias(&div_ant_conf
, antcomb
, alt_ratio
);
1760 ath9k_hw_antdiv_comb_conf_set(sc
->sc_ah
, &div_ant_conf
);
1762 antcomb
->scan_start_time
= jiffies
;
1763 antcomb
->total_pkt_count
= 0;
1764 antcomb
->main_total_rssi
= 0;
1765 antcomb
->alt_total_rssi
= 0;
1766 antcomb
->main_recv_cnt
= 0;
1767 antcomb
->alt_recv_cnt
= 0;
1770 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
, bool hp
)
1773 struct sk_buff
*skb
= NULL
, *requeue_skb
, *hdr_skb
;
1774 struct ieee80211_rx_status
*rxs
;
1775 struct ath_hw
*ah
= sc
->sc_ah
;
1776 struct ath_common
*common
= ath9k_hw_common(ah
);
1777 struct ieee80211_hw
*hw
= sc
->hw
;
1778 struct ieee80211_hdr
*hdr
;
1780 bool decrypt_error
= false;
1781 struct ath_rx_status rs
;
1782 enum ath9k_rx_qtype qtype
;
1783 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
1785 u8 rx_status_len
= ah
->caps
.rx_status_len
;
1788 unsigned long flags
;
1791 dma_type
= DMA_BIDIRECTIONAL
;
1793 dma_type
= DMA_FROM_DEVICE
;
1795 qtype
= hp
? ATH9K_RX_QUEUE_HP
: ATH9K_RX_QUEUE_LP
;
1796 spin_lock_bh(&sc
->rx
.rxbuflock
);
1798 tsf
= ath9k_hw_gettsf64(ah
);
1799 tsf_lower
= tsf
& 0xffffffff;
1802 /* If handling rx interrupt and flush is in progress => exit */
1803 if ((sc
->sc_flags
& SC_OP_RXFLUSH
) && (flush
== 0))
1806 memset(&rs
, 0, sizeof(rs
));
1808 bf
= ath_edma_get_next_rx_buf(sc
, &rs
, qtype
);
1810 bf
= ath_get_next_rx_buf(sc
, &rs
);
1820 * Take frame header from the first fragment and RX status from
1824 hdr_skb
= sc
->rx
.frag
;
1828 hdr
= (struct ieee80211_hdr
*) (hdr_skb
->data
+ rx_status_len
);
1829 rxs
= IEEE80211_SKB_RXCB(hdr_skb
);
1830 if (ieee80211_is_beacon(hdr
->frame_control
) &&
1831 !compare_ether_addr(hdr
->addr3
, common
->curbssid
))
1832 rs
.is_mybeacon
= true;
1834 rs
.is_mybeacon
= false;
1836 ath_debug_stat_rx(sc
, &rs
);
1839 * If we're asked to flush receive queue, directly
1840 * chain it back at the queue without processing it.
1842 if (sc
->sc_flags
& SC_OP_RXFLUSH
)
1843 goto requeue_drop_frag
;
1845 retval
= ath9k_rx_skb_preprocess(common
, hw
, hdr
, &rs
,
1846 rxs
, &decrypt_error
);
1848 goto requeue_drop_frag
;
1850 rxs
->mactime
= (tsf
& ~0xffffffffULL
) | rs
.rs_tstamp
;
1851 if (rs
.rs_tstamp
> tsf_lower
&&
1852 unlikely(rs
.rs_tstamp
- tsf_lower
> 0x10000000))
1853 rxs
->mactime
-= 0x100000000ULL
;
1855 if (rs
.rs_tstamp
< tsf_lower
&&
1856 unlikely(tsf_lower
- rs
.rs_tstamp
> 0x10000000))
1857 rxs
->mactime
+= 0x100000000ULL
;
1859 /* Ensure we always have an skb to requeue once we are done
1860 * processing the current buffer's skb */
1861 requeue_skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_ATOMIC
);
1863 /* If there is no memory we ignore the current RX'd frame,
1864 * tell hardware it can give us a new frame using the old
1865 * skb and put it at the tail of the sc->rx.rxbuf list for
1868 goto requeue_drop_frag
;
1870 /* Unmap the frame */
1871 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
1875 skb_put(skb
, rs
.rs_datalen
+ ah
->caps
.rx_status_len
);
1876 if (ah
->caps
.rx_status_len
)
1877 skb_pull(skb
, ah
->caps
.rx_status_len
);
1880 ath9k_rx_skb_postprocess(common
, hdr_skb
, &rs
,
1881 rxs
, decrypt_error
);
1883 /* We will now give hardware our shiny new allocated skb */
1884 bf
->bf_mpdu
= requeue_skb
;
1885 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, requeue_skb
->data
,
1888 if (unlikely(dma_mapping_error(sc
->dev
,
1889 bf
->bf_buf_addr
))) {
1890 dev_kfree_skb_any(requeue_skb
);
1892 bf
->bf_buf_addr
= 0;
1893 ath_err(common
, "dma_mapping_error() on RX\n");
1894 ieee80211_rx(hw
, skb
);
1900 * rs_more indicates chained descriptors which can be
1901 * used to link buffers together for a sort of
1902 * scatter-gather operation.
1905 /* too many fragments - cannot handle frame */
1906 dev_kfree_skb_any(sc
->rx
.frag
);
1907 dev_kfree_skb_any(skb
);
1915 int space
= skb
->len
- skb_tailroom(hdr_skb
);
1919 if (pskb_expand_head(hdr_skb
, 0, space
, GFP_ATOMIC
) < 0) {
1921 goto requeue_drop_frag
;
1924 skb_copy_from_linear_data(skb
, skb_put(hdr_skb
, skb
->len
),
1926 dev_kfree_skb_any(skb
);
1931 * change the default rx antenna if rx diversity chooses the
1932 * other antenna 3 times in a row.
1934 if (sc
->rx
.defant
!= rs
.rs_antenna
) {
1935 if (++sc
->rx
.rxotherant
>= 3)
1936 ath_setdefantenna(sc
, rs
.rs_antenna
);
1938 sc
->rx
.rxotherant
= 0;
1941 if (rxs
->flag
& RX_FLAG_MMIC_STRIPPED
)
1942 skb_trim(skb
, skb
->len
- 8);
1944 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1946 if ((sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
1948 PS_WAIT_FOR_PSPOLL_DATA
)) ||
1949 ath9k_check_auto_sleep(sc
))
1951 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1953 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_ANT_DIV_COMB
) && sc
->ant_rx
== 3)
1954 ath_ant_comb_scan(sc
, &rs
);
1956 ieee80211_rx(hw
, skb
);
1960 dev_kfree_skb_any(sc
->rx
.frag
);
1965 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
1966 ath_rx_edma_buf_link(sc
, qtype
);
1968 list_move_tail(&bf
->list
, &sc
->rx
.rxbuf
);
1969 ath_rx_buf_link(sc
, bf
);
1975 spin_unlock_bh(&sc
->rx
.rxbuflock
);
1977 if (!(ah
->imask
& ATH9K_INT_RXEOL
)) {
1978 ah
->imask
|= (ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
1979 ath9k_hw_set_interrupts(ah
, ah
->imask
);