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ath9k: ensure that rx is not enabled during a reset
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blob8149511e8f7e48e218aff65f424f26a59b1f2af6
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 unsigned long flags;
115
116 spin_lock_irqsave(&sc->sc_pm_lock, flags);
117 if (--sc->ps_usecount != 0)
118 goto unlock;
119
120 spin_lock(&common->cc_lock);
121 ath_hw_cycle_counters_update(common);
122 spin_unlock(&common->cc_lock);
123
124 if (sc->ps_idle)
125 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
126 else if (sc->ps_enabled &&
127 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128 PS_WAIT_FOR_CAB |
129 PS_WAIT_FOR_PSPOLL_DATA |
130 PS_WAIT_FOR_TX_ACK)))
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
132
133 unlock:
134 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
135 }
136
137 void ath_start_ani(struct ath_common *common)
138 {
139 struct ath_hw *ah = common->ah;
140 unsigned long timestamp = jiffies_to_msecs(jiffies);
141 struct ath_softc *sc = (struct ath_softc *) common->priv;
142
143 if (!(sc->sc_flags & SC_OP_ANI_RUN))
144 return;
145
146 if (sc->sc_flags & SC_OP_OFFCHANNEL)
147 return;
148
149 common->ani.longcal_timer = timestamp;
150 common->ani.shortcal_timer = timestamp;
151 common->ani.checkani_timer = timestamp;
152
153 mod_timer(&common->ani.timer,
154 jiffies +
155 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
156 }
157
158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
159 {
160 struct ath_hw *ah = sc->sc_ah;
161 struct ath9k_channel *chan = &ah->channels[channel];
162 struct survey_info *survey = &sc->survey[channel];
163
164 if (chan->noisefloor) {
165 survey->filled |= SURVEY_INFO_NOISE_DBM;
166 survey->noise = ath9k_hw_getchan_noise(ah, chan);
167 }
168 }
169
170 /*
171 * Updates the survey statistics and returns the busy time since last
172 * update in %, if the measurement duration was long enough for the
173 * result to be useful, -1 otherwise.
174 */
175 static int ath_update_survey_stats(struct ath_softc *sc)
176 {
177 struct ath_hw *ah = sc->sc_ah;
178 struct ath_common *common = ath9k_hw_common(ah);
179 int pos = ah->curchan - &ah->channels[0];
180 struct survey_info *survey = &sc->survey[pos];
181 struct ath_cycle_counters *cc = &common->cc_survey;
182 unsigned int div = common->clockrate * 1000;
183 int ret = 0;
184
185 if (!ah->curchan)
186 return -1;
187
188 if (ah->power_mode == ATH9K_PM_AWAKE)
189 ath_hw_cycle_counters_update(common);
190
191 if (cc->cycles > 0) {
192 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193 SURVEY_INFO_CHANNEL_TIME_BUSY |
194 SURVEY_INFO_CHANNEL_TIME_RX |
195 SURVEY_INFO_CHANNEL_TIME_TX;
196 survey->channel_time += cc->cycles / div;
197 survey->channel_time_busy += cc->rx_busy / div;
198 survey->channel_time_rx += cc->rx_frame / div;
199 survey->channel_time_tx += cc->tx_frame / div;
200 }
201
202 if (cc->cycles < div)
203 return -1;
204
205 if (cc->cycles > 0)
206 ret = cc->rx_busy * 100 / cc->cycles;
207
208 memset(cc, 0, sizeof(*cc));
209
210 ath_update_survey_nf(sc, pos);
211
212 return ret;
213 }
214
215 static void __ath_cancel_work(struct ath_softc *sc)
216 {
217 cancel_work_sync(&sc->paprd_work);
218 cancel_work_sync(&sc->hw_check_work);
219 cancel_delayed_work_sync(&sc->tx_complete_work);
220 cancel_delayed_work_sync(&sc->hw_pll_work);
221 }
222
223 static void ath_cancel_work(struct ath_softc *sc)
224 {
225 __ath_cancel_work(sc);
226 cancel_work_sync(&sc->hw_reset_work);
227 }
228
229 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
230 {
231 struct ath_hw *ah = sc->sc_ah;
232 struct ath_common *common = ath9k_hw_common(ah);
233 bool ret;
234
235 ieee80211_stop_queues(sc->hw);
236
237 sc->hw_busy_count = 0;
238 del_timer_sync(&common->ani.timer);
239
240 ath9k_debug_samp_bb_mac(sc);
241 ath9k_hw_disable_interrupts(ah);
242
243 ret = ath_drain_all_txq(sc, retry_tx);
244
245 if (!ath_stoprecv(sc))
246 ret = false;
247
248 if (!flush) {
249 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
250 ath_rx_tasklet(sc, 1, true);
251 ath_rx_tasklet(sc, 1, false);
252 } else {
253 ath_flushrecv(sc);
254 }
255
256 return ret;
257 }
258
259 static bool ath_complete_reset(struct ath_softc *sc, bool start)
260 {
261 struct ath_hw *ah = sc->sc_ah;
262 struct ath_common *common = ath9k_hw_common(ah);
263
264 if (ath_startrecv(sc) != 0) {
265 ath_err(common, "Unable to restart recv logic\n");
266 return false;
267 }
268
269 ath9k_cmn_update_txpow(ah, sc->curtxpow,
270 sc->config.txpowlimit, &sc->curtxpow);
271 ath9k_hw_set_interrupts(ah, ah->imask);
272 ath9k_hw_enable_interrupts(ah);
273
274 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
275 if (sc->sc_flags & SC_OP_BEACONS)
276 ath_set_beacon(sc);
277
278 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
279 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
280 if (!common->disable_ani)
281 ath_start_ani(common);
282 }
283
284 if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
285 struct ath_hw_antcomb_conf div_ant_conf;
286 u8 lna_conf;
287
288 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
289
290 if (sc->ant_rx == 1)
291 lna_conf = ATH_ANT_DIV_COMB_LNA1;
292 else
293 lna_conf = ATH_ANT_DIV_COMB_LNA2;
294 div_ant_conf.main_lna_conf = lna_conf;
295 div_ant_conf.alt_lna_conf = lna_conf;
296
297 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
298 }
299
300 ieee80211_wake_queues(sc->hw);
301
302 return true;
303 }
304
305 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
306 bool retry_tx)
307 {
308 struct ath_hw *ah = sc->sc_ah;
309 struct ath_common *common = ath9k_hw_common(ah);
310 struct ath9k_hw_cal_data *caldata = NULL;
311 bool fastcc = true;
312 bool flush = false;
313 int r;
314
315 __ath_cancel_work(sc);
316
317 spin_lock_bh(&sc->sc_pcu_lock);
318
319 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
320 fastcc = false;
321 caldata = &sc->caldata;
322 }
323
324 if (!hchan) {
325 fastcc = false;
326 flush = true;
327 hchan = ah->curchan;
328 }
329
330 if (fastcc && !ath9k_hw_check_alive(ah))
331 fastcc = false;
332
333 if (!ath_prepare_reset(sc, retry_tx, flush))
334 fastcc = false;
335
336 ath_dbg(common, ATH_DBG_CONFIG,
337 "Reset to %u MHz, HT40: %d fastcc: %d\n",
338 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
339 CHANNEL_HT40PLUS)),
340 fastcc);
341
342 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
343 if (r) {
344 ath_err(common,
345 "Unable to reset channel, reset status %d\n", r);
346 goto out;
347 }
348
349 if (!ath_complete_reset(sc, true))
350 r = -EIO;
351
352 out:
353 spin_unlock_bh(&sc->sc_pcu_lock);
354 return r;
355 }
356
357
358 /*
359 * Set/change channels. If the channel is really being changed, it's done
360 * by reseting the chip. To accomplish this we must first cleanup any pending
361 * DMA, then restart stuff.
362 */
363 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
364 struct ath9k_channel *hchan)
365 {
366 int r;
367
368 if (sc->sc_flags & SC_OP_INVALID)
369 return -EIO;
370
371 ath9k_ps_wakeup(sc);
372
373 r = ath_reset_internal(sc, hchan, false);
374
375 ath9k_ps_restore(sc);
376
377 return r;
378 }
379
380 static void ath_paprd_activate(struct ath_softc *sc)
381 {
382 struct ath_hw *ah = sc->sc_ah;
383 struct ath9k_hw_cal_data *caldata = ah->caldata;
384 int chain;
385
386 if (!caldata || !caldata->paprd_done)
387 return;
388
389 ath9k_ps_wakeup(sc);
390 ar9003_paprd_enable(ah, false);
391 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
392 if (!(ah->txchainmask & BIT(chain)))
393 continue;
394
395 ar9003_paprd_populate_single_table(ah, caldata, chain);
396 }
397
398 ar9003_paprd_enable(ah, true);
399 ath9k_ps_restore(sc);
400 }
401
402 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
403 {
404 struct ieee80211_hw *hw = sc->hw;
405 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
406 struct ath_hw *ah = sc->sc_ah;
407 struct ath_common *common = ath9k_hw_common(ah);
408 struct ath_tx_control txctl;
409 int time_left;
410
411 memset(&txctl, 0, sizeof(txctl));
412 txctl.txq = sc->tx.txq_map[WME_AC_BE];
413
414 memset(tx_info, 0, sizeof(*tx_info));
415 tx_info->band = hw->conf.channel->band;
416 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
417 tx_info->control.rates[0].idx = 0;
418 tx_info->control.rates[0].count = 1;
419 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
420 tx_info->control.rates[1].idx = -1;
421
422 init_completion(&sc->paprd_complete);
423 txctl.paprd = BIT(chain);
424
425 if (ath_tx_start(hw, skb, &txctl) != 0) {
426 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
427 dev_kfree_skb_any(skb);
428 return false;
429 }
430
431 time_left = wait_for_completion_timeout(&sc->paprd_complete,
432 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
433
434 if (!time_left)
435 ath_dbg(common, ATH_DBG_CALIBRATE,
436 "Timeout waiting for paprd training on TX chain %d\n",
437 chain);
438
439 return !!time_left;
440 }
441
442 void ath_paprd_calibrate(struct work_struct *work)
443 {
444 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
445 struct ieee80211_hw *hw = sc->hw;
446 struct ath_hw *ah = sc->sc_ah;
447 struct ieee80211_hdr *hdr;
448 struct sk_buff *skb = NULL;
449 struct ath9k_hw_cal_data *caldata = ah->caldata;
450 struct ath_common *common = ath9k_hw_common(ah);
451 int ftype;
452 int chain_ok = 0;
453 int chain;
454 int len = 1800;
455
456 if (!caldata)
457 return;
458
459 ath9k_ps_wakeup(sc);
460
461 if (ar9003_paprd_init_table(ah) < 0)
462 goto fail_paprd;
463
464 skb = alloc_skb(len, GFP_KERNEL);
465 if (!skb)
466 goto fail_paprd;
467
468 skb_put(skb, len);
469 memset(skb->data, 0, len);
470 hdr = (struct ieee80211_hdr *)skb->data;
471 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
472 hdr->frame_control = cpu_to_le16(ftype);
473 hdr->duration_id = cpu_to_le16(10);
474 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
475 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
476 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
477
478 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
479 if (!(ah->txchainmask & BIT(chain)))
480 continue;
481
482 chain_ok = 0;
483
484 ath_dbg(common, ATH_DBG_CALIBRATE,
485 "Sending PAPRD frame for thermal measurement "
486 "on chain %d\n", chain);
487 if (!ath_paprd_send_frame(sc, skb, chain))
488 goto fail_paprd;
489
490 ar9003_paprd_setup_gain_table(ah, chain);
491
492 ath_dbg(common, ATH_DBG_CALIBRATE,
493 "Sending PAPRD training frame on chain %d\n", chain);
494 if (!ath_paprd_send_frame(sc, skb, chain))
495 goto fail_paprd;
496
497 if (!ar9003_paprd_is_done(ah)) {
498 ath_dbg(common, ATH_DBG_CALIBRATE,
499 "PAPRD not yet done on chain %d\n", chain);
500 break;
501 }
502
503 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
504 ath_dbg(common, ATH_DBG_CALIBRATE,
505 "PAPRD create curve failed on chain %d\n",
506 chain);
507 break;
508 }
509
510 chain_ok = 1;
511 }
512 kfree_skb(skb);
513
514 if (chain_ok) {
515 caldata->paprd_done = true;
516 ath_paprd_activate(sc);
517 }
518
519 fail_paprd:
520 ath9k_ps_restore(sc);
521 }
522
523 /*
524 * This routine performs the periodic noise floor calibration function
525 * that is used to adjust and optimize the chip performance. This
526 * takes environmental changes (location, temperature) into account.
527 * When the task is complete, it reschedules itself depending on the
528 * appropriate interval that was calculated.
529 */
530 void ath_ani_calibrate(unsigned long data)
531 {
532 struct ath_softc *sc = (struct ath_softc *)data;
533 struct ath_hw *ah = sc->sc_ah;
534 struct ath_common *common = ath9k_hw_common(ah);
535 bool longcal = false;
536 bool shortcal = false;
537 bool aniflag = false;
538 unsigned int timestamp = jiffies_to_msecs(jiffies);
539 u32 cal_interval, short_cal_interval, long_cal_interval;
540 unsigned long flags;
541
542 if (ah->caldata && ah->caldata->nfcal_interference)
543 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
544 else
545 long_cal_interval = ATH_LONG_CALINTERVAL;
546
547 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
548 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
549
550 /* Only calibrate if awake */
551 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
552 goto set_timer;
553
554 ath9k_ps_wakeup(sc);
555
556 /* Long calibration runs independently of short calibration. */
557 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
558 longcal = true;
559 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
560 common->ani.longcal_timer = timestamp;
561 }
562
563 /* Short calibration applies only while caldone is false */
564 if (!common->ani.caldone) {
565 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
566 shortcal = true;
567 ath_dbg(common, ATH_DBG_ANI,
568 "shortcal @%lu\n", jiffies);
569 common->ani.shortcal_timer = timestamp;
570 common->ani.resetcal_timer = timestamp;
571 }
572 } else {
573 if ((timestamp - common->ani.resetcal_timer) >=
574 ATH_RESTART_CALINTERVAL) {
575 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
576 if (common->ani.caldone)
577 common->ani.resetcal_timer = timestamp;
578 }
579 }
580
581 /* Verify whether we must check ANI */
582 if ((timestamp - common->ani.checkani_timer) >=
583 ah->config.ani_poll_interval) {
584 aniflag = true;
585 common->ani.checkani_timer = timestamp;
586 }
587
588 /* Call ANI routine if necessary */
589 if (aniflag) {
590 spin_lock_irqsave(&common->cc_lock, flags);
591 ath9k_hw_ani_monitor(ah, ah->curchan);
592 ath_update_survey_stats(sc);
593 spin_unlock_irqrestore(&common->cc_lock, flags);
594 }
595
596 /* Perform calibration if necessary */
597 if (longcal || shortcal) {
598 common->ani.caldone =
599 ath9k_hw_calibrate(ah, ah->curchan,
600 ah->rxchainmask, longcal);
601 }
602
603 ath9k_ps_restore(sc);
604
605 set_timer:
606 /*
607 * Set timer interval based on previous results.
608 * The interval must be the shortest necessary to satisfy ANI,
609 * short calibration and long calibration.
610 */
611 ath9k_debug_samp_bb_mac(sc);
612 cal_interval = ATH_LONG_CALINTERVAL;
613 if (sc->sc_ah->config.enable_ani)
614 cal_interval = min(cal_interval,
615 (u32)ah->config.ani_poll_interval);
616 if (!common->ani.caldone)
617 cal_interval = min(cal_interval, (u32)short_cal_interval);
618
619 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
620 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
621 if (!ah->caldata->paprd_done)
622 ieee80211_queue_work(sc->hw, &sc->paprd_work);
623 else if (!ah->paprd_table_write_done)
624 ath_paprd_activate(sc);
625 }
626 }
627
628 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
629 {
630 struct ath_node *an;
631 an = (struct ath_node *)sta->drv_priv;
632
633 #ifdef CONFIG_ATH9K_DEBUGFS
634 spin_lock(&sc->nodes_lock);
635 list_add(&an->list, &sc->nodes);
636 spin_unlock(&sc->nodes_lock);
637 an->sta = sta;
638 #endif
639 if (sc->sc_flags & SC_OP_TXAGGR) {
640 ath_tx_node_init(sc, an);
641 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
642 sta->ht_cap.ampdu_factor);
643 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
644 }
645 }
646
647 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
648 {
649 struct ath_node *an = (struct ath_node *)sta->drv_priv;
650
651 #ifdef CONFIG_ATH9K_DEBUGFS
652 spin_lock(&sc->nodes_lock);
653 list_del(&an->list);
654 spin_unlock(&sc->nodes_lock);
655 an->sta = NULL;
656 #endif
657
658 if (sc->sc_flags & SC_OP_TXAGGR)
659 ath_tx_node_cleanup(sc, an);
660 }
661
662
663 void ath9k_tasklet(unsigned long data)
664 {
665 struct ath_softc *sc = (struct ath_softc *)data;
666 struct ath_hw *ah = sc->sc_ah;
667 struct ath_common *common = ath9k_hw_common(ah);
668
669 u32 status = sc->intrstatus;
670 u32 rxmask;
671
672 ath9k_ps_wakeup(sc);
673 spin_lock(&sc->sc_pcu_lock);
674
675 if ((status & ATH9K_INT_FATAL) ||
676 (status & ATH9K_INT_BB_WATCHDOG)) {
677 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
678 goto out;
679 }
680
681 /*
682 * Only run the baseband hang check if beacons stop working in AP or
683 * IBSS mode, because it has a high false positive rate. For station
684 * mode it should not be necessary, since the upper layers will detect
685 * this through a beacon miss automatically and the following channel
686 * change will trigger a hardware reset anyway
687 */
688 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
689 !ath9k_hw_check_alive(ah))
690 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
691
692 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
693 /*
694 * TSF sync does not look correct; remain awake to sync with
695 * the next Beacon.
696 */
697 ath_dbg(common, ATH_DBG_PS,
698 "TSFOOR - Sync with next Beacon\n");
699 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
700 }
701
702 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
703 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
704 ATH9K_INT_RXORN);
705 else
706 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
707
708 if (status & rxmask) {
709 /* Check for high priority Rx first */
710 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
711 (status & ATH9K_INT_RXHP))
712 ath_rx_tasklet(sc, 0, true);
713
714 ath_rx_tasklet(sc, 0, false);
715 }
716
717 if (status & ATH9K_INT_TX) {
718 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
719 ath_tx_edma_tasklet(sc);
720 else
721 ath_tx_tasklet(sc);
722 }
723
724 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
725 if (status & ATH9K_INT_GENTIMER)
726 ath_gen_timer_isr(sc->sc_ah);
727
728 out:
729 /* re-enable hardware interrupt */
730 ath9k_hw_enable_interrupts(ah);
731
732 spin_unlock(&sc->sc_pcu_lock);
733 ath9k_ps_restore(sc);
734 }
735
736 irqreturn_t ath_isr(int irq, void *dev)
737 {
738 #define SCHED_INTR ( \
739 ATH9K_INT_FATAL | \
740 ATH9K_INT_BB_WATCHDOG | \
741 ATH9K_INT_RXORN | \
742 ATH9K_INT_RXEOL | \
743 ATH9K_INT_RX | \
744 ATH9K_INT_RXLP | \
745 ATH9K_INT_RXHP | \
746 ATH9K_INT_TX | \
747 ATH9K_INT_BMISS | \
748 ATH9K_INT_CST | \
749 ATH9K_INT_TSFOOR | \
750 ATH9K_INT_GENTIMER)
751
752 struct ath_softc *sc = dev;
753 struct ath_hw *ah = sc->sc_ah;
754 struct ath_common *common = ath9k_hw_common(ah);
755 enum ath9k_int status;
756 bool sched = false;
757
758 /*
759 * The hardware is not ready/present, don't
760 * touch anything. Note this can happen early
761 * on if the IRQ is shared.
762 */
763 if (sc->sc_flags & SC_OP_INVALID)
764 return IRQ_NONE;
765
766
767 /* shared irq, not for us */
768
769 if (!ath9k_hw_intrpend(ah))
770 return IRQ_NONE;
771
772 /*
773 * Figure out the reason(s) for the interrupt. Note
774 * that the hal returns a pseudo-ISR that may include
775 * bits we haven't explicitly enabled so we mask the
776 * value to insure we only process bits we requested.
777 */
778 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
779 status &= ah->imask; /* discard unasked-for bits */
780
781 /*
782 * If there are no status bits set, then this interrupt was not
783 * for me (should have been caught above).
784 */
785 if (!status)
786 return IRQ_NONE;
787
788 /* Cache the status */
789 sc->intrstatus = status;
790
791 if (status & SCHED_INTR)
792 sched = true;
793
794 /*
795 * If a FATAL or RXORN interrupt is received, we have to reset the
796 * chip immediately.
797 */
798 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
799 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
800 goto chip_reset;
801
802 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
803 (status & ATH9K_INT_BB_WATCHDOG)) {
804
805 spin_lock(&common->cc_lock);
806 ath_hw_cycle_counters_update(common);
807 ar9003_hw_bb_watchdog_dbg_info(ah);
808 spin_unlock(&common->cc_lock);
809
810 goto chip_reset;
811 }
812
813 if (status & ATH9K_INT_SWBA)
814 tasklet_schedule(&sc->bcon_tasklet);
815
816 if (status & ATH9K_INT_TXURN)
817 ath9k_hw_updatetxtriglevel(ah, true);
818
819 if (status & ATH9K_INT_RXEOL) {
820 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
821 ath9k_hw_set_interrupts(ah, ah->imask);
822 }
823
824 if (status & ATH9K_INT_MIB) {
825 /*
826 * Disable interrupts until we service the MIB
827 * interrupt; otherwise it will continue to
828 * fire.
829 */
830 ath9k_hw_disable_interrupts(ah);
831 /*
832 * Let the hal handle the event. We assume
833 * it will clear whatever condition caused
834 * the interrupt.
835 */
836 spin_lock(&common->cc_lock);
837 ath9k_hw_proc_mib_event(ah);
838 spin_unlock(&common->cc_lock);
839 ath9k_hw_enable_interrupts(ah);
840 }
841
842 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
843 if (status & ATH9K_INT_TIM_TIMER) {
844 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
845 goto chip_reset;
846 /* Clear RxAbort bit so that we can
847 * receive frames */
848 ath9k_setpower(sc, ATH9K_PM_AWAKE);
849 ath9k_hw_setrxabort(sc->sc_ah, 0);
850 sc->ps_flags |= PS_WAIT_FOR_BEACON;
851 }
852
853 chip_reset:
854
855 ath_debug_stat_interrupt(sc, status);
856
857 if (sched) {
858 /* turn off every interrupt */
859 ath9k_hw_disable_interrupts(ah);
860 tasklet_schedule(&sc->intr_tq);
861 }
862
863 return IRQ_HANDLED;
864
865 #undef SCHED_INTR
866 }
867
868 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
869 {
870 struct ath_hw *ah = sc->sc_ah;
871 struct ath_common *common = ath9k_hw_common(ah);
872 struct ieee80211_channel *channel = hw->conf.channel;
873 int r;
874
875 ath9k_ps_wakeup(sc);
876 spin_lock_bh(&sc->sc_pcu_lock);
877 atomic_set(&ah->intr_ref_cnt, -1);
878
879 ath9k_hw_configpcipowersave(ah, false);
880
881 if (!ah->curchan)
882 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
883
884 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
885 if (r) {
886 ath_err(common,
887 "Unable to reset channel (%u MHz), reset status %d\n",
888 channel->center_freq, r);
889 }
890
891 ath_complete_reset(sc, true);
892
893 /* Enable LED */
894 ath9k_hw_cfg_output(ah, ah->led_pin,
895 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
896 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
897
898 spin_unlock_bh(&sc->sc_pcu_lock);
899
900 ath9k_ps_restore(sc);
901 }
902
903 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
904 {
905 struct ath_hw *ah = sc->sc_ah;
906 struct ieee80211_channel *channel = hw->conf.channel;
907 int r;
908
909 ath9k_ps_wakeup(sc);
910
911 ath_cancel_work(sc);
912
913 spin_lock_bh(&sc->sc_pcu_lock);
914
915 /*
916 * Keep the LED on when the radio is disabled
917 * during idle unassociated state.
918 */
919 if (!sc->ps_idle) {
920 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
921 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
922 }
923
924 ath_prepare_reset(sc, false, true);
925
926 if (!ah->curchan)
927 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
928
929 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
930 if (r) {
931 ath_err(ath9k_hw_common(sc->sc_ah),
932 "Unable to reset channel (%u MHz), reset status %d\n",
933 channel->center_freq, r);
934 }
935
936 ath9k_hw_phy_disable(ah);
937
938 ath9k_hw_configpcipowersave(ah, true);
939
940 spin_unlock_bh(&sc->sc_pcu_lock);
941 ath9k_ps_restore(sc);
942 }
943
944 static int ath_reset(struct ath_softc *sc, bool retry_tx)
945 {
946 int r;
947
948 ath9k_ps_wakeup(sc);
949
950 r = ath_reset_internal(sc, NULL, retry_tx);
951
952 if (retry_tx) {
953 int i;
954 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
955 if (ATH_TXQ_SETUP(sc, i)) {
956 spin_lock_bh(&sc->tx.txq[i].axq_lock);
957 ath_txq_schedule(sc, &sc->tx.txq[i]);
958 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
959 }
960 }
961 }
962
963 ath9k_ps_restore(sc);
964
965 return r;
966 }
967
968 void ath_reset_work(struct work_struct *work)
969 {
970 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
971
972 ath_reset(sc, true);
973 }
974
975 void ath_hw_check(struct work_struct *work)
976 {
977 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
978 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
979 unsigned long flags;
980 int busy;
981
982 ath9k_ps_wakeup(sc);
983 if (ath9k_hw_check_alive(sc->sc_ah))
984 goto out;
985
986 spin_lock_irqsave(&common->cc_lock, flags);
987 busy = ath_update_survey_stats(sc);
988 spin_unlock_irqrestore(&common->cc_lock, flags);
989
990 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
991 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
992 if (busy >= 99) {
993 if (++sc->hw_busy_count >= 3)
994 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
995
996 } else if (busy >= 0)
997 sc->hw_busy_count = 0;
998
999 out:
1000 ath9k_ps_restore(sc);
1001 }
1002
1003 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
1004 {
1005 static int count;
1006 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1007
1008 if (pll_sqsum >= 0x40000) {
1009 count++;
1010 if (count == 3) {
1011 /* Rx is hung for more than 500ms. Reset it */
1012 ath_dbg(common, ATH_DBG_RESET,
1013 "Possible RX hang, resetting");
1014 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1015 count = 0;
1016 }
1017 } else
1018 count = 0;
1019 }
1020
1021 void ath_hw_pll_work(struct work_struct *work)
1022 {
1023 struct ath_softc *sc = container_of(work, struct ath_softc,
1024 hw_pll_work.work);
1025 u32 pll_sqsum;
1026
1027 if (AR_SREV_9485(sc->sc_ah)) {
1028
1029 ath9k_ps_wakeup(sc);
1030 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
1031 ath9k_ps_restore(sc);
1032
1033 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
1034
1035 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
1036 }
1037 }
1038
1039 /**********************/
1040 /* mac80211 callbacks */
1041 /**********************/
1042
1043 static int ath9k_start(struct ieee80211_hw *hw)
1044 {
1045 struct ath_softc *sc = hw->priv;
1046 struct ath_hw *ah = sc->sc_ah;
1047 struct ath_common *common = ath9k_hw_common(ah);
1048 struct ieee80211_channel *curchan = hw->conf.channel;
1049 struct ath9k_channel *init_channel;
1050 int r;
1051
1052 ath_dbg(common, ATH_DBG_CONFIG,
1053 "Starting driver with initial channel: %d MHz\n",
1054 curchan->center_freq);
1055
1056 ath9k_ps_wakeup(sc);
1057
1058 mutex_lock(&sc->mutex);
1059
1060 /* setup initial channel */
1061 sc->chan_idx = curchan->hw_value;
1062
1063 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1064
1065 /* Reset SERDES registers */
1066 ath9k_hw_configpcipowersave(ah, false);
1067
1068 /*
1069 * The basic interface to setting the hardware in a good
1070 * state is ``reset''. On return the hardware is known to
1071 * be powered up and with interrupts disabled. This must
1072 * be followed by initialization of the appropriate bits
1073 * and then setup of the interrupt mask.
1074 */
1075 spin_lock_bh(&sc->sc_pcu_lock);
1076 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1077 if (r) {
1078 ath_err(common,
1079 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1080 r, curchan->center_freq);
1081 spin_unlock_bh(&sc->sc_pcu_lock);
1082 goto mutex_unlock;
1083 }
1084
1085 /* Setup our intr mask. */
1086 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1087 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1088 ATH9K_INT_GLOBAL;
1089
1090 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1091 ah->imask |= ATH9K_INT_RXHP |
1092 ATH9K_INT_RXLP |
1093 ATH9K_INT_BB_WATCHDOG;
1094 else
1095 ah->imask |= ATH9K_INT_RX;
1096
1097 ah->imask |= ATH9K_INT_GTT;
1098
1099 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1100 ah->imask |= ATH9K_INT_CST;
1101
1102 sc->sc_flags &= ~SC_OP_INVALID;
1103 sc->sc_ah->is_monitoring = false;
1104
1105 /* Disable BMISS interrupt when we're not associated */
1106 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1107
1108 if (!ath_complete_reset(sc, false)) {
1109 r = -EIO;
1110 spin_unlock_bh(&sc->sc_pcu_lock);
1111 goto mutex_unlock;
1112 }
1113
1114 spin_unlock_bh(&sc->sc_pcu_lock);
1115
1116 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1117 !ah->btcoex_hw.enabled) {
1118 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1119 AR_STOMP_LOW_WLAN_WGHT);
1120 ath9k_hw_btcoex_enable(ah);
1121
1122 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1123 ath9k_btcoex_timer_resume(sc);
1124 }
1125
1126 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1127 common->bus_ops->extn_synch_en(common);
1128
1129 mutex_unlock:
1130 mutex_unlock(&sc->mutex);
1131
1132 ath9k_ps_restore(sc);
1133
1134 return r;
1135 }
1136
1137 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1138 {
1139 struct ath_softc *sc = hw->priv;
1140 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1141 struct ath_tx_control txctl;
1142 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1143
1144 if (sc->ps_enabled) {
1145 /*
1146 * mac80211 does not set PM field for normal data frames, so we
1147 * need to update that based on the current PS mode.
1148 */
1149 if (ieee80211_is_data(hdr->frame_control) &&
1150 !ieee80211_is_nullfunc(hdr->frame_control) &&
1151 !ieee80211_has_pm(hdr->frame_control)) {
1152 ath_dbg(common, ATH_DBG_PS,
1153 "Add PM=1 for a TX frame while in PS mode\n");
1154 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1155 }
1156 }
1157
1158 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1159 /*
1160 * We are using PS-Poll and mac80211 can request TX while in
1161 * power save mode. Need to wake up hardware for the TX to be
1162 * completed and if needed, also for RX of buffered frames.
1163 */
1164 ath9k_ps_wakeup(sc);
1165 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1166 ath9k_hw_setrxabort(sc->sc_ah, 0);
1167 if (ieee80211_is_pspoll(hdr->frame_control)) {
1168 ath_dbg(common, ATH_DBG_PS,
1169 "Sending PS-Poll to pick a buffered frame\n");
1170 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1171 } else {
1172 ath_dbg(common, ATH_DBG_PS,
1173 "Wake up to complete TX\n");
1174 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1175 }
1176 /*
1177 * The actual restore operation will happen only after
1178 * the sc_flags bit is cleared. We are just dropping
1179 * the ps_usecount here.
1180 */
1181 ath9k_ps_restore(sc);
1182 }
1183
1184 memset(&txctl, 0, sizeof(struct ath_tx_control));
1185 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1186
1187 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1188
1189 if (ath_tx_start(hw, skb, &txctl) != 0) {
1190 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1191 goto exit;
1192 }
1193
1194 return;
1195 exit:
1196 dev_kfree_skb_any(skb);
1197 }
1198
1199 static void ath9k_stop(struct ieee80211_hw *hw)
1200 {
1201 struct ath_softc *sc = hw->priv;
1202 struct ath_hw *ah = sc->sc_ah;
1203 struct ath_common *common = ath9k_hw_common(ah);
1204
1205 mutex_lock(&sc->mutex);
1206
1207 ath_cancel_work(sc);
1208
1209 if (sc->sc_flags & SC_OP_INVALID) {
1210 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1211 mutex_unlock(&sc->mutex);
1212 return;
1213 }
1214
1215 /* Ensure HW is awake when we try to shut it down. */
1216 ath9k_ps_wakeup(sc);
1217
1218 if (ah->btcoex_hw.enabled) {
1219 ath9k_hw_btcoex_disable(ah);
1220 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1221 ath9k_btcoex_timer_pause(sc);
1222 }
1223
1224 spin_lock_bh(&sc->sc_pcu_lock);
1225
1226 /* prevent tasklets to enable interrupts once we disable them */
1227 ah->imask &= ~ATH9K_INT_GLOBAL;
1228
1229 /* make sure h/w will not generate any interrupt
1230 * before setting the invalid flag. */
1231 ath9k_hw_disable_interrupts(ah);
1232
1233 if (!(sc->sc_flags & SC_OP_INVALID)) {
1234 ath_drain_all_txq(sc, false);
1235 ath_stoprecv(sc);
1236 ath9k_hw_phy_disable(ah);
1237 } else
1238 sc->rx.rxlink = NULL;
1239
1240 if (sc->rx.frag) {
1241 dev_kfree_skb_any(sc->rx.frag);
1242 sc->rx.frag = NULL;
1243 }
1244
1245 /* disable HAL and put h/w to sleep */
1246 ath9k_hw_disable(ah);
1247
1248 spin_unlock_bh(&sc->sc_pcu_lock);
1249
1250 /* we can now sync irq and kill any running tasklets, since we already
1251 * disabled interrupts and not holding a spin lock */
1252 synchronize_irq(sc->irq);
1253 tasklet_kill(&sc->intr_tq);
1254 tasklet_kill(&sc->bcon_tasklet);
1255
1256 ath9k_ps_restore(sc);
1257
1258 sc->ps_idle = true;
1259 ath_radio_disable(sc, hw);
1260
1261 sc->sc_flags |= SC_OP_INVALID;
1262
1263 mutex_unlock(&sc->mutex);
1264
1265 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1266 }
1267
1268 bool ath9k_uses_beacons(int type)
1269 {
1270 switch (type) {
1271 case NL80211_IFTYPE_AP:
1272 case NL80211_IFTYPE_ADHOC:
1273 case NL80211_IFTYPE_MESH_POINT:
1274 return true;
1275 default:
1276 return false;
1277 }
1278 }
1279
1280 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1281 struct ieee80211_vif *vif)
1282 {
1283 struct ath_vif *avp = (void *)vif->drv_priv;
1284
1285 ath9k_set_beaconing_status(sc, false);
1286 ath_beacon_return(sc, avp);
1287 ath9k_set_beaconing_status(sc, true);
1288 sc->sc_flags &= ~SC_OP_BEACONS;
1289 }
1290
1291 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1292 {
1293 struct ath9k_vif_iter_data *iter_data = data;
1294 int i;
1295
1296 if (iter_data->hw_macaddr)
1297 for (i = 0; i < ETH_ALEN; i++)
1298 iter_data->mask[i] &=
1299 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1300
1301 switch (vif->type) {
1302 case NL80211_IFTYPE_AP:
1303 iter_data->naps++;
1304 break;
1305 case NL80211_IFTYPE_STATION:
1306 iter_data->nstations++;
1307 break;
1308 case NL80211_IFTYPE_ADHOC:
1309 iter_data->nadhocs++;
1310 break;
1311 case NL80211_IFTYPE_MESH_POINT:
1312 iter_data->nmeshes++;
1313 break;
1314 case NL80211_IFTYPE_WDS:
1315 iter_data->nwds++;
1316 break;
1317 default:
1318 iter_data->nothers++;
1319 break;
1320 }
1321 }
1322
1323 /* Called with sc->mutex held. */
1324 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1325 struct ieee80211_vif *vif,
1326 struct ath9k_vif_iter_data *iter_data)
1327 {
1328 struct ath_softc *sc = hw->priv;
1329 struct ath_hw *ah = sc->sc_ah;
1330 struct ath_common *common = ath9k_hw_common(ah);
1331
1332 /*
1333 * Use the hardware MAC address as reference, the hardware uses it
1334 * together with the BSSID mask when matching addresses.
1335 */
1336 memset(iter_data, 0, sizeof(*iter_data));
1337 iter_data->hw_macaddr = common->macaddr;
1338 memset(&iter_data->mask, 0xff, ETH_ALEN);
1339
1340 if (vif)
1341 ath9k_vif_iter(iter_data, vif->addr, vif);
1342
1343 /* Get list of all active MAC addresses */
1344 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1345 iter_data);
1346 }
1347
1348 /* Called with sc->mutex held. */
1349 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1350 struct ieee80211_vif *vif)
1351 {
1352 struct ath_softc *sc = hw->priv;
1353 struct ath_hw *ah = sc->sc_ah;
1354 struct ath_common *common = ath9k_hw_common(ah);
1355 struct ath9k_vif_iter_data iter_data;
1356
1357 ath9k_calculate_iter_data(hw, vif, &iter_data);
1358
1359 /* Set BSSID mask. */
1360 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1361 ath_hw_setbssidmask(common);
1362
1363 /* Set op-mode & TSF */
1364 if (iter_data.naps > 0) {
1365 ath9k_hw_set_tsfadjust(ah, 1);
1366 sc->sc_flags |= SC_OP_TSF_RESET;
1367 ah->opmode = NL80211_IFTYPE_AP;
1368 } else {
1369 ath9k_hw_set_tsfadjust(ah, 0);
1370 sc->sc_flags &= ~SC_OP_TSF_RESET;
1371
1372 if (iter_data.nmeshes)
1373 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1374 else if (iter_data.nwds)
1375 ah->opmode = NL80211_IFTYPE_AP;
1376 else if (iter_data.nadhocs)
1377 ah->opmode = NL80211_IFTYPE_ADHOC;
1378 else
1379 ah->opmode = NL80211_IFTYPE_STATION;
1380 }
1381
1382 /*
1383 * Enable MIB interrupts when there are hardware phy counters.
1384 */
1385 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1386 if (ah->config.enable_ani)
1387 ah->imask |= ATH9K_INT_MIB;
1388 ah->imask |= ATH9K_INT_TSFOOR;
1389 } else {
1390 ah->imask &= ~ATH9K_INT_MIB;
1391 ah->imask &= ~ATH9K_INT_TSFOOR;
1392 }
1393
1394 ath9k_hw_set_interrupts(ah, ah->imask);
1395
1396 /* Set up ANI */
1397 if (iter_data.naps > 0) {
1398 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1399
1400 if (!common->disable_ani) {
1401 sc->sc_flags |= SC_OP_ANI_RUN;
1402 ath_start_ani(common);
1403 }
1404
1405 } else {
1406 sc->sc_flags &= ~SC_OP_ANI_RUN;
1407 del_timer_sync(&common->ani.timer);
1408 }
1409 }
1410
1411 /* Called with sc->mutex held, vif counts set up properly. */
1412 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1413 struct ieee80211_vif *vif)
1414 {
1415 struct ath_softc *sc = hw->priv;
1416
1417 ath9k_calculate_summary_state(hw, vif);
1418
1419 if (ath9k_uses_beacons(vif->type)) {
1420 int error;
1421 /* This may fail because upper levels do not have beacons
1422 * properly configured yet. That's OK, we assume it
1423 * will be properly configured and then we will be notified
1424 * in the info_changed method and set up beacons properly
1425 * there.
1426 */
1427 ath9k_set_beaconing_status(sc, false);
1428 error = ath_beacon_alloc(sc, vif);
1429 if (!error)
1430 ath_beacon_config(sc, vif);
1431 ath9k_set_beaconing_status(sc, true);
1432 }
1433 }
1434
1435
1436 static int ath9k_add_interface(struct ieee80211_hw *hw,
1437 struct ieee80211_vif *vif)
1438 {
1439 struct ath_softc *sc = hw->priv;
1440 struct ath_hw *ah = sc->sc_ah;
1441 struct ath_common *common = ath9k_hw_common(ah);
1442 int ret = 0;
1443
1444 ath9k_ps_wakeup(sc);
1445 mutex_lock(&sc->mutex);
1446
1447 switch (vif->type) {
1448 case NL80211_IFTYPE_STATION:
1449 case NL80211_IFTYPE_WDS:
1450 case NL80211_IFTYPE_ADHOC:
1451 case NL80211_IFTYPE_AP:
1452 case NL80211_IFTYPE_MESH_POINT:
1453 break;
1454 default:
1455 ath_err(common, "Interface type %d not yet supported\n",
1456 vif->type);
1457 ret = -EOPNOTSUPP;
1458 goto out;
1459 }
1460
1461 if (ath9k_uses_beacons(vif->type)) {
1462 if (sc->nbcnvifs >= ATH_BCBUF) {
1463 ath_err(common, "Not enough beacon buffers when adding"
1464 " new interface of type: %i\n",
1465 vif->type);
1466 ret = -ENOBUFS;
1467 goto out;
1468 }
1469 }
1470
1471 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1472 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1473 sc->nvifs > 0)) {
1474 ath_err(common, "Cannot create ADHOC interface when other"
1475 " interfaces already exist.\n");
1476 ret = -EINVAL;
1477 goto out;
1478 }
1479
1480 ath_dbg(common, ATH_DBG_CONFIG,
1481 "Attach a VIF of type: %d\n", vif->type);
1482
1483 sc->nvifs++;
1484
1485 ath9k_do_vif_add_setup(hw, vif);
1486 out:
1487 mutex_unlock(&sc->mutex);
1488 ath9k_ps_restore(sc);
1489 return ret;
1490 }
1491
1492 static int ath9k_change_interface(struct ieee80211_hw *hw,
1493 struct ieee80211_vif *vif,
1494 enum nl80211_iftype new_type,
1495 bool p2p)
1496 {
1497 struct ath_softc *sc = hw->priv;
1498 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1499 int ret = 0;
1500
1501 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1502 mutex_lock(&sc->mutex);
1503 ath9k_ps_wakeup(sc);
1504
1505 /* See if new interface type is valid. */
1506 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1507 (sc->nvifs > 1)) {
1508 ath_err(common, "When using ADHOC, it must be the only"
1509 " interface.\n");
1510 ret = -EINVAL;
1511 goto out;
1512 }
1513
1514 if (ath9k_uses_beacons(new_type) &&
1515 !ath9k_uses_beacons(vif->type)) {
1516 if (sc->nbcnvifs >= ATH_BCBUF) {
1517 ath_err(common, "No beacon slot available\n");
1518 ret = -ENOBUFS;
1519 goto out;
1520 }
1521 }
1522
1523 /* Clean up old vif stuff */
1524 if (ath9k_uses_beacons(vif->type))
1525 ath9k_reclaim_beacon(sc, vif);
1526
1527 /* Add new settings */
1528 vif->type = new_type;
1529 vif->p2p = p2p;
1530
1531 ath9k_do_vif_add_setup(hw, vif);
1532 out:
1533 ath9k_ps_restore(sc);
1534 mutex_unlock(&sc->mutex);
1535 return ret;
1536 }
1537
1538 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1539 struct ieee80211_vif *vif)
1540 {
1541 struct ath_softc *sc = hw->priv;
1542 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1543
1544 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1545
1546 ath9k_ps_wakeup(sc);
1547 mutex_lock(&sc->mutex);
1548
1549 sc->nvifs--;
1550
1551 /* Reclaim beacon resources */
1552 if (ath9k_uses_beacons(vif->type))
1553 ath9k_reclaim_beacon(sc, vif);
1554
1555 ath9k_calculate_summary_state(hw, NULL);
1556
1557 mutex_unlock(&sc->mutex);
1558 ath9k_ps_restore(sc);
1559 }
1560
1561 static void ath9k_enable_ps(struct ath_softc *sc)
1562 {
1563 struct ath_hw *ah = sc->sc_ah;
1564
1565 sc->ps_enabled = true;
1566 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1567 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1568 ah->imask |= ATH9K_INT_TIM_TIMER;
1569 ath9k_hw_set_interrupts(ah, ah->imask);
1570 }
1571 ath9k_hw_setrxabort(ah, 1);
1572 }
1573 }
1574
1575 static void ath9k_disable_ps(struct ath_softc *sc)
1576 {
1577 struct ath_hw *ah = sc->sc_ah;
1578
1579 sc->ps_enabled = false;
1580 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1581 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1582 ath9k_hw_setrxabort(ah, 0);
1583 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1584 PS_WAIT_FOR_CAB |
1585 PS_WAIT_FOR_PSPOLL_DATA |
1586 PS_WAIT_FOR_TX_ACK);
1587 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1588 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1589 ath9k_hw_set_interrupts(ah, ah->imask);
1590 }
1591 }
1592
1593 }
1594
1595 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1596 {
1597 struct ath_softc *sc = hw->priv;
1598 struct ath_hw *ah = sc->sc_ah;
1599 struct ath_common *common = ath9k_hw_common(ah);
1600 struct ieee80211_conf *conf = &hw->conf;
1601 bool disable_radio = false;
1602
1603 mutex_lock(&sc->mutex);
1604
1605 /*
1606 * Leave this as the first check because we need to turn on the
1607 * radio if it was disabled before prior to processing the rest
1608 * of the changes. Likewise we must only disable the radio towards
1609 * the end.
1610 */
1611 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1612 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1613 if (!sc->ps_idle) {
1614 ath_radio_enable(sc, hw);
1615 ath_dbg(common, ATH_DBG_CONFIG,
1616 "not-idle: enabling radio\n");
1617 } else {
1618 disable_radio = true;
1619 }
1620 }
1621
1622 /*
1623 * We just prepare to enable PS. We have to wait until our AP has
1624 * ACK'd our null data frame to disable RX otherwise we'll ignore
1625 * those ACKs and end up retransmitting the same null data frames.
1626 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1627 */
1628 if (changed & IEEE80211_CONF_CHANGE_PS) {
1629 unsigned long flags;
1630 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1631 if (conf->flags & IEEE80211_CONF_PS)
1632 ath9k_enable_ps(sc);
1633 else
1634 ath9k_disable_ps(sc);
1635 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1636 }
1637
1638 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1639 if (conf->flags & IEEE80211_CONF_MONITOR) {
1640 ath_dbg(common, ATH_DBG_CONFIG,
1641 "Monitor mode is enabled\n");
1642 sc->sc_ah->is_monitoring = true;
1643 } else {
1644 ath_dbg(common, ATH_DBG_CONFIG,
1645 "Monitor mode is disabled\n");
1646 sc->sc_ah->is_monitoring = false;
1647 }
1648 }
1649
1650 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1651 struct ieee80211_channel *curchan = hw->conf.channel;
1652 struct ath9k_channel old_chan;
1653 int pos = curchan->hw_value;
1654 int old_pos = -1;
1655 unsigned long flags;
1656
1657 if (ah->curchan)
1658 old_pos = ah->curchan - &ah->channels[0];
1659
1660 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1661 sc->sc_flags |= SC_OP_OFFCHANNEL;
1662 else
1663 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1664
1665 ath_dbg(common, ATH_DBG_CONFIG,
1666 "Set channel: %d MHz type: %d\n",
1667 curchan->center_freq, conf->channel_type);
1668
1669 /* update survey stats for the old channel before switching */
1670 spin_lock_irqsave(&common->cc_lock, flags);
1671 ath_update_survey_stats(sc);
1672 spin_unlock_irqrestore(&common->cc_lock, flags);
1673
1674 /*
1675 * Preserve the current channel values, before updating
1676 * the same channel
1677 */
1678 if (old_pos == pos) {
1679 memcpy(&old_chan, &sc->sc_ah->channels[pos],
1680 sizeof(struct ath9k_channel));
1681 ah->curchan = &old_chan;
1682 }
1683
1684 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1685 curchan, conf->channel_type);
1686
1687 /*
1688 * If the operating channel changes, change the survey in-use flags
1689 * along with it.
1690 * Reset the survey data for the new channel, unless we're switching
1691 * back to the operating channel from an off-channel operation.
1692 */
1693 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1694 sc->cur_survey != &sc->survey[pos]) {
1695
1696 if (sc->cur_survey)
1697 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1698
1699 sc->cur_survey = &sc->survey[pos];
1700
1701 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1702 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1703 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1704 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1705 }
1706
1707 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1708 ath_err(common, "Unable to set channel\n");
1709 mutex_unlock(&sc->mutex);
1710 return -EINVAL;
1711 }
1712
1713 /*
1714 * The most recent snapshot of channel->noisefloor for the old
1715 * channel is only available after the hardware reset. Copy it to
1716 * the survey stats now.
1717 */
1718 if (old_pos >= 0)
1719 ath_update_survey_nf(sc, old_pos);
1720 }
1721
1722 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1723 ath_dbg(common, ATH_DBG_CONFIG,
1724 "Set power: %d\n", conf->power_level);
1725 sc->config.txpowlimit = 2 * conf->power_level;
1726 ath9k_ps_wakeup(sc);
1727 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1728 sc->config.txpowlimit, &sc->curtxpow);
1729 ath9k_ps_restore(sc);
1730 }
1731
1732 if (disable_radio) {
1733 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1734 ath_radio_disable(sc, hw);
1735 }
1736
1737 mutex_unlock(&sc->mutex);
1738
1739 return 0;
1740 }
1741
1742 #define SUPPORTED_FILTERS \
1743 (FIF_PROMISC_IN_BSS | \
1744 FIF_ALLMULTI | \
1745 FIF_CONTROL | \
1746 FIF_PSPOLL | \
1747 FIF_OTHER_BSS | \
1748 FIF_BCN_PRBRESP_PROMISC | \
1749 FIF_PROBE_REQ | \
1750 FIF_FCSFAIL)
1751
1752 /* FIXME: sc->sc_full_reset ? */
1753 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1754 unsigned int changed_flags,
1755 unsigned int *total_flags,
1756 u64 multicast)
1757 {
1758 struct ath_softc *sc = hw->priv;
1759 u32 rfilt;
1760
1761 changed_flags &= SUPPORTED_FILTERS;
1762 *total_flags &= SUPPORTED_FILTERS;
1763
1764 sc->rx.rxfilter = *total_flags;
1765 ath9k_ps_wakeup(sc);
1766 rfilt = ath_calcrxfilter(sc);
1767 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1768 ath9k_ps_restore(sc);
1769
1770 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1771 "Set HW RX filter: 0x%x\n", rfilt);
1772 }
1773
1774 static int ath9k_sta_add(struct ieee80211_hw *hw,
1775 struct ieee80211_vif *vif,
1776 struct ieee80211_sta *sta)
1777 {
1778 struct ath_softc *sc = hw->priv;
1779 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1780 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1781 struct ieee80211_key_conf ps_key = { };
1782
1783 ath_node_attach(sc, sta);
1784
1785 if (vif->type != NL80211_IFTYPE_AP &&
1786 vif->type != NL80211_IFTYPE_AP_VLAN)
1787 return 0;
1788
1789 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1790
1791 return 0;
1792 }
1793
1794 static void ath9k_del_ps_key(struct ath_softc *sc,
1795 struct ieee80211_vif *vif,
1796 struct ieee80211_sta *sta)
1797 {
1798 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1799 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1800 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1801
1802 if (!an->ps_key)
1803 return;
1804
1805 ath_key_delete(common, &ps_key);
1806 }
1807
1808 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1809 struct ieee80211_vif *vif,
1810 struct ieee80211_sta *sta)
1811 {
1812 struct ath_softc *sc = hw->priv;
1813
1814 ath9k_del_ps_key(sc, vif, sta);
1815 ath_node_detach(sc, sta);
1816
1817 return 0;
1818 }
1819
1820 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1821 struct ieee80211_vif *vif,
1822 enum sta_notify_cmd cmd,
1823 struct ieee80211_sta *sta)
1824 {
1825 struct ath_softc *sc = hw->priv;
1826 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1827
1828 switch (cmd) {
1829 case STA_NOTIFY_SLEEP:
1830 an->sleeping = true;
1831 if (ath_tx_aggr_sleep(sc, an))
1832 ieee80211_sta_set_tim(sta);
1833 break;
1834 case STA_NOTIFY_AWAKE:
1835 an->sleeping = false;
1836 ath_tx_aggr_wakeup(sc, an);
1837 break;
1838 }
1839 }
1840
1841 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1842 const struct ieee80211_tx_queue_params *params)
1843 {
1844 struct ath_softc *sc = hw->priv;
1845 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1846 struct ath_txq *txq;
1847 struct ath9k_tx_queue_info qi;
1848 int ret = 0;
1849
1850 if (queue >= WME_NUM_AC)
1851 return 0;
1852
1853 txq = sc->tx.txq_map[queue];
1854
1855 ath9k_ps_wakeup(sc);
1856 mutex_lock(&sc->mutex);
1857
1858 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1859
1860 qi.tqi_aifs = params->aifs;
1861 qi.tqi_cwmin = params->cw_min;
1862 qi.tqi_cwmax = params->cw_max;
1863 qi.tqi_burstTime = params->txop;
1864
1865 ath_dbg(common, ATH_DBG_CONFIG,
1866 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1867 queue, txq->axq_qnum, params->aifs, params->cw_min,
1868 params->cw_max, params->txop);
1869
1870 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1871 if (ret)
1872 ath_err(common, "TXQ Update failed\n");
1873
1874 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1875 if (queue == WME_AC_BE && !ret)
1876 ath_beaconq_config(sc);
1877
1878 mutex_unlock(&sc->mutex);
1879 ath9k_ps_restore(sc);
1880
1881 return ret;
1882 }
1883
1884 static int ath9k_set_key(struct ieee80211_hw *hw,
1885 enum set_key_cmd cmd,
1886 struct ieee80211_vif *vif,
1887 struct ieee80211_sta *sta,
1888 struct ieee80211_key_conf *key)
1889 {
1890 struct ath_softc *sc = hw->priv;
1891 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1892 int ret = 0;
1893
1894 if (ath9k_modparam_nohwcrypt)
1895 return -ENOSPC;
1896
1897 if (vif->type == NL80211_IFTYPE_ADHOC &&
1898 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1899 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1900 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1901 /*
1902 * For now, disable hw crypto for the RSN IBSS group keys. This
1903 * could be optimized in the future to use a modified key cache
1904 * design to support per-STA RX GTK, but until that gets
1905 * implemented, use of software crypto for group addressed
1906 * frames is a acceptable to allow RSN IBSS to be used.
1907 */
1908 return -EOPNOTSUPP;
1909 }
1910
1911 mutex_lock(&sc->mutex);
1912 ath9k_ps_wakeup(sc);
1913 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1914
1915 switch (cmd) {
1916 case SET_KEY:
1917 if (sta)
1918 ath9k_del_ps_key(sc, vif, sta);
1919
1920 ret = ath_key_config(common, vif, sta, key);
1921 if (ret >= 0) {
1922 key->hw_key_idx = ret;
1923 /* push IV and Michael MIC generation to stack */
1924 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1925 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1926 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1927 if (sc->sc_ah->sw_mgmt_crypto &&
1928 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1929 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1930 ret = 0;
1931 }
1932 break;
1933 case DISABLE_KEY:
1934 ath_key_delete(common, key);
1935 break;
1936 default:
1937 ret = -EINVAL;
1938 }
1939
1940 ath9k_ps_restore(sc);
1941 mutex_unlock(&sc->mutex);
1942
1943 return ret;
1944 }
1945 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1946 {
1947 struct ath_softc *sc = data;
1948 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1949 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1950 struct ath_vif *avp = (void *)vif->drv_priv;
1951
1952 /*
1953 * Skip iteration if primary station vif's bss info
1954 * was not changed
1955 */
1956 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1957 return;
1958
1959 if (bss_conf->assoc) {
1960 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1961 avp->primary_sta_vif = true;
1962 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1963 common->curaid = bss_conf->aid;
1964 ath9k_hw_write_associd(sc->sc_ah);
1965 ath_dbg(common, ATH_DBG_CONFIG,
1966 "Bss Info ASSOC %d, bssid: %pM\n",
1967 bss_conf->aid, common->curbssid);
1968 ath_beacon_config(sc, vif);
1969 /*
1970 * Request a re-configuration of Beacon related timers
1971 * on the receipt of the first Beacon frame (i.e.,
1972 * after time sync with the AP).
1973 */
1974 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1975 /* Reset rssi stats */
1976 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1977 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1978
1979 if (!common->disable_ani) {
1980 sc->sc_flags |= SC_OP_ANI_RUN;
1981 ath_start_ani(common);
1982 }
1983
1984 }
1985 }
1986
1987 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1988 {
1989 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1990 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1991 struct ath_vif *avp = (void *)vif->drv_priv;
1992
1993 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1994 return;
1995
1996 /* Reconfigure bss info */
1997 if (avp->primary_sta_vif && !bss_conf->assoc) {
1998 ath_dbg(common, ATH_DBG_CONFIG,
1999 "Bss Info DISASSOC %d, bssid %pM\n",
2000 common->curaid, common->curbssid);
2001 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2002 avp->primary_sta_vif = false;
2003 memset(common->curbssid, 0, ETH_ALEN);
2004 common->curaid = 0;
2005 }
2006
2007 ieee80211_iterate_active_interfaces_atomic(
2008 sc->hw, ath9k_bss_iter, sc);
2009
2010 /*
2011 * None of station vifs are associated.
2012 * Clear bssid & aid
2013 */
2014 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2015 ath9k_hw_write_associd(sc->sc_ah);
2016 /* Stop ANI */
2017 sc->sc_flags &= ~SC_OP_ANI_RUN;
2018 del_timer_sync(&common->ani.timer);
2019 }
2020 }
2021
2022 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2023 struct ieee80211_vif *vif,
2024 struct ieee80211_bss_conf *bss_conf,
2025 u32 changed)
2026 {
2027 struct ath_softc *sc = hw->priv;
2028 struct ath_hw *ah = sc->sc_ah;
2029 struct ath_common *common = ath9k_hw_common(ah);
2030 struct ath_vif *avp = (void *)vif->drv_priv;
2031 int slottime;
2032 int error;
2033
2034 ath9k_ps_wakeup(sc);
2035 mutex_lock(&sc->mutex);
2036
2037 if (changed & BSS_CHANGED_BSSID) {
2038 ath9k_config_bss(sc, vif);
2039
2040 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2041 common->curbssid, common->curaid);
2042 }
2043
2044 if (changed & BSS_CHANGED_IBSS) {
2045 /* There can be only one vif available */
2046 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2047 common->curaid = bss_conf->aid;
2048 ath9k_hw_write_associd(sc->sc_ah);
2049
2050 if (bss_conf->ibss_joined) {
2051 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2052
2053 if (!common->disable_ani) {
2054 sc->sc_flags |= SC_OP_ANI_RUN;
2055 ath_start_ani(common);
2056 }
2057
2058 } else {
2059 sc->sc_flags &= ~SC_OP_ANI_RUN;
2060 del_timer_sync(&common->ani.timer);
2061 }
2062 }
2063
2064 /* Enable transmission of beacons (AP, IBSS, MESH) */
2065 if ((changed & BSS_CHANGED_BEACON) ||
2066 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2067 ath9k_set_beaconing_status(sc, false);
2068 error = ath_beacon_alloc(sc, vif);
2069 if (!error)
2070 ath_beacon_config(sc, vif);
2071 ath9k_set_beaconing_status(sc, true);
2072 }
2073
2074 if (changed & BSS_CHANGED_ERP_SLOT) {
2075 if (bss_conf->use_short_slot)
2076 slottime = 9;
2077 else
2078 slottime = 20;
2079 if (vif->type == NL80211_IFTYPE_AP) {
2080 /*
2081 * Defer update, so that connected stations can adjust
2082 * their settings at the same time.
2083 * See beacon.c for more details
2084 */
2085 sc->beacon.slottime = slottime;
2086 sc->beacon.updateslot = UPDATE;
2087 } else {
2088 ah->slottime = slottime;
2089 ath9k_hw_init_global_settings(ah);
2090 }
2091 }
2092
2093 /* Disable transmission of beacons */
2094 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2095 !bss_conf->enable_beacon) {
2096 ath9k_set_beaconing_status(sc, false);
2097 avp->is_bslot_active = false;
2098 ath9k_set_beaconing_status(sc, true);
2099 }
2100
2101 if (changed & BSS_CHANGED_BEACON_INT) {
2102 /*
2103 * In case of AP mode, the HW TSF has to be reset
2104 * when the beacon interval changes.
2105 */
2106 if (vif->type == NL80211_IFTYPE_AP) {
2107 sc->sc_flags |= SC_OP_TSF_RESET;
2108 ath9k_set_beaconing_status(sc, false);
2109 error = ath_beacon_alloc(sc, vif);
2110 if (!error)
2111 ath_beacon_config(sc, vif);
2112 ath9k_set_beaconing_status(sc, true);
2113 } else
2114 ath_beacon_config(sc, vif);
2115 }
2116
2117 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2118 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2119 bss_conf->use_short_preamble);
2120 if (bss_conf->use_short_preamble)
2121 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2122 else
2123 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2124 }
2125
2126 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2127 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2128 bss_conf->use_cts_prot);
2129 if (bss_conf->use_cts_prot &&
2130 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2131 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2132 else
2133 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2134 }
2135
2136 mutex_unlock(&sc->mutex);
2137 ath9k_ps_restore(sc);
2138 }
2139
2140 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2141 {
2142 struct ath_softc *sc = hw->priv;
2143 u64 tsf;
2144
2145 mutex_lock(&sc->mutex);
2146 ath9k_ps_wakeup(sc);
2147 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2148 ath9k_ps_restore(sc);
2149 mutex_unlock(&sc->mutex);
2150
2151 return tsf;
2152 }
2153
2154 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2155 {
2156 struct ath_softc *sc = hw->priv;
2157
2158 mutex_lock(&sc->mutex);
2159 ath9k_ps_wakeup(sc);
2160 ath9k_hw_settsf64(sc->sc_ah, tsf);
2161 ath9k_ps_restore(sc);
2162 mutex_unlock(&sc->mutex);
2163 }
2164
2165 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2166 {
2167 struct ath_softc *sc = hw->priv;
2168
2169 mutex_lock(&sc->mutex);
2170
2171 ath9k_ps_wakeup(sc);
2172 ath9k_hw_reset_tsf(sc->sc_ah);
2173 ath9k_ps_restore(sc);
2174
2175 mutex_unlock(&sc->mutex);
2176 }
2177
2178 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2179 struct ieee80211_vif *vif,
2180 enum ieee80211_ampdu_mlme_action action,
2181 struct ieee80211_sta *sta,
2182 u16 tid, u16 *ssn, u8 buf_size)
2183 {
2184 struct ath_softc *sc = hw->priv;
2185 int ret = 0;
2186
2187 local_bh_disable();
2188
2189 switch (action) {
2190 case IEEE80211_AMPDU_RX_START:
2191 if (!(sc->sc_flags & SC_OP_RXAGGR))
2192 ret = -ENOTSUPP;
2193 break;
2194 case IEEE80211_AMPDU_RX_STOP:
2195 break;
2196 case IEEE80211_AMPDU_TX_START:
2197 if (!(sc->sc_flags & SC_OP_TXAGGR))
2198 return -EOPNOTSUPP;
2199
2200 ath9k_ps_wakeup(sc);
2201 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2202 if (!ret)
2203 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2204 ath9k_ps_restore(sc);
2205 break;
2206 case IEEE80211_AMPDU_TX_STOP:
2207 ath9k_ps_wakeup(sc);
2208 ath_tx_aggr_stop(sc, sta, tid);
2209 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2210 ath9k_ps_restore(sc);
2211 break;
2212 case IEEE80211_AMPDU_TX_OPERATIONAL:
2213 ath9k_ps_wakeup(sc);
2214 ath_tx_aggr_resume(sc, sta, tid);
2215 ath9k_ps_restore(sc);
2216 break;
2217 default:
2218 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2219 }
2220
2221 local_bh_enable();
2222
2223 return ret;
2224 }
2225
2226 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2227 struct survey_info *survey)
2228 {
2229 struct ath_softc *sc = hw->priv;
2230 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2231 struct ieee80211_supported_band *sband;
2232 struct ieee80211_channel *chan;
2233 unsigned long flags;
2234 int pos;
2235
2236 spin_lock_irqsave(&common->cc_lock, flags);
2237 if (idx == 0)
2238 ath_update_survey_stats(sc);
2239
2240 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2241 if (sband && idx >= sband->n_channels) {
2242 idx -= sband->n_channels;
2243 sband = NULL;
2244 }
2245
2246 if (!sband)
2247 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2248
2249 if (!sband || idx >= sband->n_channels) {
2250 spin_unlock_irqrestore(&common->cc_lock, flags);
2251 return -ENOENT;
2252 }
2253
2254 chan = &sband->channels[idx];
2255 pos = chan->hw_value;
2256 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2257 survey->channel = chan;
2258 spin_unlock_irqrestore(&common->cc_lock, flags);
2259
2260 return 0;
2261 }
2262
2263 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2264 {
2265 struct ath_softc *sc = hw->priv;
2266 struct ath_hw *ah = sc->sc_ah;
2267
2268 mutex_lock(&sc->mutex);
2269 ah->coverage_class = coverage_class;
2270 ath9k_hw_init_global_settings(ah);
2271 mutex_unlock(&sc->mutex);
2272 }
2273
2274 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2275 {
2276 struct ath_softc *sc = hw->priv;
2277 struct ath_hw *ah = sc->sc_ah;
2278 struct ath_common *common = ath9k_hw_common(ah);
2279 int timeout = 200; /* ms */
2280 int i, j;
2281 bool drain_txq;
2282
2283 mutex_lock(&sc->mutex);
2284 cancel_delayed_work_sync(&sc->tx_complete_work);
2285
2286 if (sc->sc_flags & SC_OP_INVALID) {
2287 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2288 mutex_unlock(&sc->mutex);
2289 return;
2290 }
2291
2292 if (drop)
2293 timeout = 1;
2294
2295 for (j = 0; j < timeout; j++) {
2296 bool npend = false;
2297
2298 if (j)
2299 usleep_range(1000, 2000);
2300
2301 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2302 if (!ATH_TXQ_SETUP(sc, i))
2303 continue;
2304
2305 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2306
2307 if (npend)
2308 break;
2309 }
2310
2311 if (!npend)
2312 goto out;
2313 }
2314
2315 ath9k_ps_wakeup(sc);
2316 spin_lock_bh(&sc->sc_pcu_lock);
2317 drain_txq = ath_drain_all_txq(sc, false);
2318 spin_unlock_bh(&sc->sc_pcu_lock);
2319
2320 if (!drain_txq)
2321 ath_reset(sc, false);
2322
2323 ath9k_ps_restore(sc);
2324 ieee80211_wake_queues(hw);
2325
2326 out:
2327 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2328 mutex_unlock(&sc->mutex);
2329 }
2330
2331 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2332 {
2333 struct ath_softc *sc = hw->priv;
2334 int i;
2335
2336 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2337 if (!ATH_TXQ_SETUP(sc, i))
2338 continue;
2339
2340 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2341 return true;
2342 }
2343 return false;
2344 }
2345
2346 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2347 {
2348 struct ath_softc *sc = hw->priv;
2349 struct ath_hw *ah = sc->sc_ah;
2350 struct ieee80211_vif *vif;
2351 struct ath_vif *avp;
2352 struct ath_buf *bf;
2353 struct ath_tx_status ts;
2354 int status;
2355
2356 vif = sc->beacon.bslot[0];
2357 if (!vif)
2358 return 0;
2359
2360 avp = (void *)vif->drv_priv;
2361 if (!avp->is_bslot_active)
2362 return 0;
2363
2364 if (!sc->beacon.tx_processed) {
2365 tasklet_disable(&sc->bcon_tasklet);
2366
2367 bf = avp->av_bcbuf;
2368 if (!bf || !bf->bf_mpdu)
2369 goto skip;
2370
2371 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2372 if (status == -EINPROGRESS)
2373 goto skip;
2374
2375 sc->beacon.tx_processed = true;
2376 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2377
2378 skip:
2379 tasklet_enable(&sc->bcon_tasklet);
2380 }
2381
2382 return sc->beacon.tx_last;
2383 }
2384
2385 static int ath9k_get_stats(struct ieee80211_hw *hw,
2386 struct ieee80211_low_level_stats *stats)
2387 {
2388 struct ath_softc *sc = hw->priv;
2389 struct ath_hw *ah = sc->sc_ah;
2390 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2391
2392 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2393 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2394 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2395 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2396 return 0;
2397 }
2398
2399 static u32 fill_chainmask(u32 cap, u32 new)
2400 {
2401 u32 filled = 0;
2402 int i;
2403
2404 for (i = 0; cap && new; i++, cap >>= 1) {
2405 if (!(cap & BIT(0)))
2406 continue;
2407
2408 if (new & BIT(0))
2409 filled |= BIT(i);
2410
2411 new >>= 1;
2412 }
2413
2414 return filled;
2415 }
2416
2417 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2418 {
2419 struct ath_softc *sc = hw->priv;
2420 struct ath_hw *ah = sc->sc_ah;
2421
2422 if (!rx_ant || !tx_ant)
2423 return -EINVAL;
2424
2425 sc->ant_rx = rx_ant;
2426 sc->ant_tx = tx_ant;
2427
2428 if (ah->caps.rx_chainmask == 1)
2429 return 0;
2430
2431 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2432 if (AR_SREV_9100(ah))
2433 ah->rxchainmask = 0x7;
2434 else
2435 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2436
2437 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2438 ath9k_reload_chainmask_settings(sc);
2439
2440 return 0;
2441 }
2442
2443 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2444 {
2445 struct ath_softc *sc = hw->priv;
2446
2447 *tx_ant = sc->ant_tx;
2448 *rx_ant = sc->ant_rx;
2449 return 0;
2450 }
2451
2452 struct ieee80211_ops ath9k_ops = {
2453 .tx = ath9k_tx,
2454 .start = ath9k_start,
2455 .stop = ath9k_stop,
2456 .add_interface = ath9k_add_interface,
2457 .change_interface = ath9k_change_interface,
2458 .remove_interface = ath9k_remove_interface,
2459 .config = ath9k_config,
2460 .configure_filter = ath9k_configure_filter,
2461 .sta_add = ath9k_sta_add,
2462 .sta_remove = ath9k_sta_remove,
2463 .sta_notify = ath9k_sta_notify,
2464 .conf_tx = ath9k_conf_tx,
2465 .bss_info_changed = ath9k_bss_info_changed,
2466 .set_key = ath9k_set_key,
2467 .get_tsf = ath9k_get_tsf,
2468 .set_tsf = ath9k_set_tsf,
2469 .reset_tsf = ath9k_reset_tsf,
2470 .ampdu_action = ath9k_ampdu_action,
2471 .get_survey = ath9k_get_survey,
2472 .rfkill_poll = ath9k_rfkill_poll_state,
2473 .set_coverage_class = ath9k_set_coverage_class,
2474 .flush = ath9k_flush,
2475 .tx_frames_pending = ath9k_tx_frames_pending,
2476 .tx_last_beacon = ath9k_tx_last_beacon,
2477 .get_stats = ath9k_get_stats,
2478 .set_antenna = ath9k_set_antenna,
2479 .get_antenna = ath9k_get_antenna,
2480 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree