drivers/staging/rtl8712/rtl8712_hal.h

   1 #ifndef __RTL8712_HAL_H__
   2 #define __RTL8712_HAL_H__
   3
   4 enum _HW_VERSION {
   5         RTL8712_FPGA,
   6         RTL8712_1stCUT, /*A Cut (RTL8712_ASIC)*/
   7         RTL8712_2ndCUT, /*B Cut*/
   8         RTL8712_3rdCUT, /*C Cut*/
   9 };
  10
  11 enum _LOOPBACK_TYPE {
  12         RTL8712_AIR_TRX = 0,
  13         RTL8712_MAC_LBK,
  14         RTL8712_BB_LBK,
  15         RTL8712_MAC_FW_LBK = 4,
  16         RTL8712_BB_FW_LBK = 8,
  17 };
  18
  19 enum RTL871X_HCI_TYPE {
  20         RTL8712_SDIO,
  21         RTL8712_USB,
  22 };
  23
  24 enum RTL8712_RF_CONFIG{
  25         RTL8712_RF_1T1R,
  26         RTL8712_RF_1T2R,
  27         RTL8712_RF_2T2R
  28 };
  29
  30 enum _RTL8712_HCI_TYPE_{
  31         RTL8712_HCI_TYPE_PCIE = 0x01,
  32         RTL8712_HCI_TYPE_AP_PCIE = 0x81,
  33         RTL8712_HCI_TYPE_USB = 0x02,
  34         RTL8712_HCI_TYPE_92USB = 0x02,
  35         RTL8712_HCI_TYPE_AP_USB = 0x82,
  36         RTL8712_HCI_TYPE_72USB = 0x12,
  37         RTL8712_HCI_TYPE_SDIO = 0x04,
  38         RTL8712_HCI_TYPE_72SDIO = 0x14
  39 };
  40
  41 struct fw_priv {   /*8-bytes alignment required*/
  42         /*--- long word 0 ----*/
  43  unsigned char  signature_0;  /*0x12: CE product, 0x92: IT product*/
  44  unsigned char  signature_1;  /*0x87: CE product, 0x81: IT product*/
  45  unsigned char  hci_sel;   /*0x81: PCI-AP, 01:PCIe, 02: 92S-U, 0x82: USB-AP,
  46                             * 0x12: 72S-U, 03:SDIO*/
  47  unsigned char  chip_version; /*the same value as register value*/
  48  unsigned char  customer_ID_0; /*customer  ID low byte*/
  49  unsigned char  customer_ID_1; /*customer  ID high byte*/
  50  unsigned char  rf_config;  /*0x11:  1T1R, 0x12: 1T2R, 0x92: 1T2R turbo,
  51                              * 0x22: 2T2R*/
  52  unsigned char  usb_ep_num;  /* 4: 4EP, 6: 6EP, 11: 11EP*/
  53         /*--- long word 1 ----*/
  54  unsigned char  regulatory_class_0; /*regulatory class bit map 0*/
  55  unsigned char  regulatory_class_1; /*regulatory class bit map 1*/
  56  unsigned char  regulatory_class_2; /*regulatory class bit map 2*/
  57  unsigned char  regulatory_class_3; /*regulatory class bit map 3*/
  58  unsigned char  rfintfs;    /* 0:SWSI, 1:HWSI, 2:HWPI*/
  59  unsigned char  def_nettype;
  60  unsigned char  turboMode;
  61  unsigned char  lowPowerMode;/* 0: noral mode, 1: low power mode*/
  62         /*--- long word 2 ----*/
  63  unsigned char  lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/
  64  unsigned char  mp_mode; /* 1: for MP use, 0: for normal driver */
  65  unsigned char  vcsType; /* 0:off 1:on 2:auto */
  66  unsigned char  vcsMode; /* 1:RTS/CTS 2:CTS to self */
  67  unsigned char  rsvd022;
  68  unsigned char  rsvd023;
  69  unsigned char  rsvd024;
  70  unsigned char  rsvd025;
  71         /*--- long word 3 ----*/
  72  unsigned char  qos_en;    /*1: QoS enable*/
  73  unsigned char  bw_40MHz_en;   /*1: 40MHz BW enable*/
  74  unsigned char  AMSDU2AMPDU_en;   /*1: 4181 convert AMSDU to AMPDU,
  75                                    * 0: disable*/
  76  unsigned char  AMPDU_en;   /*1: 11n AMPDU enable*/
  77  unsigned char  rate_control_offload;  /*1: FW offloads, 0: driver handles*/
  78  unsigned char  aggregation_offload;  /*1: FW offloads, 0: driver handles*/
  79  unsigned char  rsvd030;
  80  unsigned char  rsvd031;
  81         /*--- long word 4 ----*/
  82  unsigned char  beacon_offload;   /* 1. FW offloads, 0: driver handles*/
  83  unsigned char  MLME_offload;   /* 2. FW offloads, 0: driver handles*/
  84  unsigned char  hwpc_offload;   /* 3. FW offloads, 0: driver handles*/
  85  unsigned char  tcp_checksum_offload; /* 4. FW offloads, 0: driver handles*/
  86  unsigned char  tcp_offload;    /* 5. FW offloads, 0: driver handles*/
  87  unsigned char  ps_control_offload;  /* 6. FW offloads, 0: driver handles*/
  88  unsigned char  WWLAN_offload;   /* 7. FW offloads, 0: driver handles*/
  89  unsigned char  rsvd040;
  90         /*--- long word 5 ----*/
  91  unsigned char  tcp_tx_frame_len_L;  /*tcp tx packet length low byte*/
  92  unsigned char  tcp_tx_frame_len_H;  /*tcp tx packet length high byte*/
  93  unsigned char  tcp_rx_frame_len_L;  /*tcp rx packet length low byte*/
  94  unsigned char  tcp_rx_frame_len_H;  /*tcp rx packet length high byte*/
  95  unsigned char  rsvd050;
  96  unsigned char  rsvd051;
  97  unsigned char  rsvd052;
  98  unsigned char  rsvd053;
  99 };
 100
 101 struct fw_hdr {/*8-byte alinment required*/
 102         unsigned short  signature;
 103         unsigned short  version;        /*0x8000 ~ 0x8FFF for FPGA version,
 104                                          *0x0000 ~ 0x7FFF for ASIC version,*/
 105         unsigned int            dmem_size;    /*define the size of boot loader*/
 106         unsigned int            img_IMEM_size; /*define the size of FW in IMEM*/
 107         unsigned int            img_SRAM_size; /*define the size of FW in SRAM*/
 108         unsigned int            fw_priv_sz; /*define the size of DMEM variable*/
 109         unsigned short  efuse_addr;
 110         unsigned short  h2ccnd_resp_addr;
 111         unsigned int            SVNRevision;
 112         unsigned int            release_time; /*Mon:Day:Hr:Min*/
 113         struct fw_priv  fwpriv;
 114 };
 115
 116 struct hal_priv{
 117         /*Endpoint handles*/
 118         struct  net_device *pipehdls_r8712[10];
 119         u8 (*hal_bus_init)(struct _adapter *adapter);
 120 };
 121
 122 uint     rtl8712_hal_init(struct _adapter *padapter);
 123
 124 #endif