9 config GENERIC_CMOS_UPDATE
13 config GENERIC_CLOCKEVENTS
19 select CPU_HAS_NO_BITFIELDS
21 The Freescale (was Motorola) 68000 CPU is the first generation of
22 the well known M68K family of processors. The CPU core as well as
23 being available as a stand alone CPU was also used in many
24 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
29 select CPU_HAS_NO_BITFIELDS
31 The Freescale (was then Motorola) CPU32 is a CPU core that is
32 based on the 68020 processor. For the most part it is used in
33 System-On-Chip parts, and does not contain a paging MMU.
38 select ARCH_REQUIRE_GPIOLIB
39 select CPU_HAS_NO_BITFIELDS
41 The Freescale ColdFire family of processors is a modern derivitive
42 of the 68000 processor family. They are mainly targeted at embedded
43 applications, and are all System-On-Chip (SOC) devices, as opposed
44 to stand alone CPUs. They implement a subset of the original 68000
45 processor instruction set.
51 config HAVE_CACHE_SPLIT
71 Motorola 68328 processor support.
77 Motorola 68EX328 processor support.
83 Motorola 68VZ328 processor support.
89 Motorola 68360 processor support.
97 Motorola ColdFire 5206 processor support.
102 select COLDFIRE_SW_A7
105 Motorola ColdFire 5206e processor support.
110 select GENERIC_CLOCKEVENTS
111 select HAVE_CACHE_SPLIT
113 Freescale Coldfire 5207/5208 processor support.
118 select GENERIC_CLOCKEVENTS
119 select HAVE_CACHE_SPLIT
122 Freescale Coldfire 5230/1/2/4/5 processor support
127 select COLDFIRE_SW_A7
130 Motorola ColdFire 5249 processor support.
135 select HAVE_CACHE_SPLIT
138 Freescale (Motorola) ColdFire 5270/5271 processor support.
143 select COLDFIRE_SW_A7
146 Motorola ColdFire 5272 processor support.
151 select HAVE_CACHE_SPLIT
154 Freescale (Motorola) ColdFire 5274/5275 processor support.
159 select GENERIC_CLOCKEVENTS
160 select HAVE_CACHE_SPLIT
163 Motorola ColdFire 5280/5282 processor support.
168 select COLDFIRE_SW_A7
172 Motorola ColdFire 5307 processor support.
179 Freescale (Motorola) ColdFire 532x processor support.
184 select COLDFIRE_SW_A7
188 Motorola ColdFire 5407 processor support.
196 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
204 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
210 depends on (M5271 || M5275)
211 select GENERIC_CLOCKEVENTS
216 depends on (M548x || M547x)
220 bool "Enable setting the CPU clock frequency"
223 On some CPU's you do not need to know what the core CPU clock
224 frequency is. On these you can disable clock setting. On some
225 traditional 68K parts, and on all ColdFire parts you need to set
226 the appropriate CPU clock frequency. On these devices many of the
227 onboard peripherals derive their timing from the master CPU clock
231 int "Set the core clock frequency"
235 Define the CPU clock frequency in use. This is the core clock
236 frequency, it may or may not be the same as the external clock
237 crystal fitted to your board. Some processors have an internal
238 PLL and can have their frequency programmed at run time, others
239 use internal dividers. In general the kernel won't setup a PLL
240 if it is fitted (there are some exceptions). This value will be
241 specific to the exact CPU that you are using.
244 bool "Old mask 5307 (1H55J) silicon"
247 Build support for the older revision ColdFire 5307 silicon.
248 Specifically this is the 1H55J mask revision.
252 prompt "Split Cache Configuration"
258 Use all of the ColdFire CPU cache memory as an instruction cache.
263 Use all of the ColdFire CPU cache memory as a data cache.
268 Split the ColdFire CPU cache, and use half as an instruction cache
269 and half as a data cache.
275 prompt "Data cache mode"
276 default CACHE_WRITETHRU
278 config CACHE_WRITETHRU
281 The ColdFire CPU cache is set into Write-through mode.
283 config CACHE_COPYBACK
286 The ColdFire CPU cache is set into Copy-back mode.
293 bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
296 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
299 bool "(X)Copilot support"
302 Support the bugs of Xcopilot.
305 bool 'Arcturus Networks uC5272 dimm board support'
308 Support for the Arcturus Networks uC5272 dimm board.
311 bool "Arcturus Networks uC5282 board support"
314 Support for the Arcturus Networks uC5282 dimm board.
317 bool "uCsimm module support"
320 Support for the Arcturus Networks uCsimm module.
323 bool "uDsimm module support"
326 Support for the Arcturus Networks uDsimm module.
329 bool "DragenEngine II board support"
332 Support for the DragenEngine II board.
334 config DIRECT_IO_ACCESS
335 bool "Allow user to access IO directly"
336 depends on (UCSIMM || UCDIMM || DRAGEN2)
338 Disable the CPU internal registers protection in user mode,
339 to allow a user application to read/write them.
342 bool "Initialize LCD"
343 depends on (UCSIMM || UCDIMM || DRAGEN2)
345 Initialize the LCD controller of the 68x328 processor.
347 config MEMORY_RESERVE
348 int "Memory reservation (MiB)"
349 depends on (UCSIMM || UCDIMM)
351 Reserve certain memory regions on 68x328 based boards.
354 bool "Lineo uCquicc board support"
357 Support for the Lineo uCquicc board.
360 bool "Arnewsh 5206 board support"
363 Support for the Arnewsh 5206 board.
366 bool "Motorola M5206eC3 board support"
369 Support for the Motorola M5206eC3 board.
372 bool "Motorola M5206eLITE board support"
375 Support for the Motorola M5206eLITE board.
378 bool "Freescale M5208EVB board support"
381 Support for the Freescale Coldfire M5208EVB.
384 bool "Freescale M5235EVB support"
387 Support for the Freescale M5235EVB board.
390 bool "Motorola M5249C3 board support"
393 Support for the Motorola M5249C3 board.
396 bool "Freescale (Motorola) M5271EVB board support"
399 Support for the Freescale (Motorola) M5271EVB board.
402 bool "Freescale (Motorola) M5275EVB board support"
405 Support for the Freescale (Motorola) M5275EVB board.
408 bool "Motorola M5272C3 board support"
411 Support for the Motorola M5272C3 board.
414 bool "senTec COBRA5272 board support"
417 Support for the senTec COBRA5272 board.
420 bool "Avnet 5282 board support"
423 Support for the Avnet 5282 board.
426 bool "Motorola M5282EVB board support"
429 Support for the Motorola M5282EVB board.
432 bool "senTec COBRA5282 board support"
435 Support for the senTec COBRA5282 board.
438 bool "EMAC.Inc SOM5282EM board support"
441 Support for the EMAC.Inc SOM5282EM module.
444 bool "Intec Automation Inc. WildFire board support"
447 Support for the Intec Automation Inc. WildFire.
450 bool "Intec Automation Inc. WildFire module support"
453 Support for the Intec Automation Inc. WildFire module.
456 bool "Arnewsh 5307 board support"
459 Support for the Arnewsh 5307 board.
462 bool "Motorola M5307C3 board support"
465 Support for the Motorola M5307C3 board.
468 bool "SnapGear SecureEdge/MP3 platform support"
471 Support for the SnapGear SecureEdge/MP3 platform.
474 bool "Freescale (Motorola) M5329EVB board support"
477 Support for the Freescale (Motorola) M5329EVB board.
480 bool "senTec COBRA5329 board support"
483 Support for the senTec COBRA5329 board.
486 bool "Motorola M5407C3 board support"
489 Support for the Motorola M5407C3 board.
492 bool "FireBee board support"
495 Support for the FireBee ColdFire 5475 based board.
498 bool "Feith CLEOPATRA board support"
499 depends on (M5307 || M5407)
501 Support for the Feith Cleopatra boards.
504 bool "Feith CANCam board support"
507 Support for the Feith CANCam board.
510 bool "Feith SCALES board support"
513 Support for the Feith SCALES board.
516 bool "SecureEdge/NETtel board support"
517 depends on (M5206e || M5272 || M5307)
519 Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
522 bool "SnapGear router board support"
525 Special additional support for SnapGear router boards.
528 bool "Sneha Technologies S.L. Sarasvati board support"
531 Support for the SNEHA CPU16B board.
534 bool "Netburner MOD-5272 board support"
537 Support for the Netburner MOD-5272 board.
540 bool "Savant Rosie1 board support"
543 Support for the Savant Rosie1 board.
545 config ROMFS_FROM_ROM
546 bool "ROMFS image not RAM resident"
547 depends on (NETtel || SNAPGEAR)
549 The ROMfs filesystem will stay resident in the FLASH/ROM, not be
555 depends on (PILOT3 || PILOT5)
560 depends on (ARN5206 || ARN5307)
565 depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
570 depends on (CLEOPATRA || CANCam || SCALES)
575 depends on (COBRA5272 || COBRA5282)
580 depends on (SOM5282EM)
590 depends on SAVANTrosie1
595 depends on (AVNET5282)
598 bool "Support for U-Boot command line parameters"
600 If you say Y here kernel will try to collect command
601 line parameters from the initial u-boot stack.
605 bool "Use 4Kb for kernel stacks instead of 8Kb"
608 If you say Y here the kernel will use a 4Kb stacksize for the
609 kernel stack attached to each process/thread. This facilitates
610 running more threads on a system and also reduces the pressure
611 on the VM subsystem for higher order allocations.
613 comment "RAM configuration"
616 hex "Address of the base of RAM"
619 Define the address that RAM starts at. On many platforms this is
620 0, the base of the address space. And this is the default. Some
621 platforms choose to setup their RAM at other addresses within the
622 processor address space.
625 hex "Size of RAM (in bytes), or 0 for automatic"
628 Define the size of the system RAM. If you select 0 then the
629 kernel will try to probe the RAM size at runtime. This is not
630 supported on all CPU types.
633 hex "Address of the base of system vectors"
636 Define the address of the system vectors. Commonly this is
637 put at the start of RAM, but it doesn't have to be. On ColdFire
638 platforms this address is programmed into the VBR register, thus
639 actually setting the address to use.
642 hex "Address of the MBAR (internal peripherals)"
646 Define the address of the internal system peripherals. This value
647 is set in the processors MBAR register. This is generally setup by
648 the boot loader, and will not be written by the kernel. By far most
649 ColdFire boards use the default 0x10000000 value, so if unsure then
653 hex "Address of the IPSBAR (internal peripherals)"
655 depends on HAVE_IPSBAR
657 Define the address of the internal system peripherals. This value
658 is set in the processors IPSBAR register. This is generally setup by
659 the boot loader, and will not be written by the kernel. By far most
660 ColdFire boards use the default 0x40000000 value, so if unsure then
664 hex "Address of the base of kernel code"
667 Typically on m68k systems the kernel will not start at the base
668 of RAM, but usually some small offset from it. Define the start
669 address of the kernel here. The most common setup will have the
670 processor vectors at the base of RAM and then the start of the
671 kernel. On some platforms some RAM is reserved for boot loaders
672 and the kernel starts after that. The 0x400 default was based on
673 a system with the RAM based at address 0, and leaving enough room
674 for the theoretical maximum number of 256 vectors.
677 prompt "RAM bus width"
683 Select the physical RAM data bus size. Not needed on most platforms,
684 so you can generally choose AUTO.
689 Configure RAM bus to be 8 bits wide.
694 Configure RAM bus to be 16 bits wide.
699 Configure RAM bus to be 32 bits wide.
703 comment "ROM configuration"
706 bool "Specify ROM linker regions"
709 Define a ROM region for the linker script. This creates a kernel
710 that can be stored in flash, with possibly the text, and data
711 regions being copied out to RAM at startup.
714 hex "Address of the base of ROM device"
718 Define the address that the ROM region starts at. Some platforms
719 use this to set their chip select region accordingly for the boot
723 hex "Address of the base of the ROM vectors"
727 This is almost always the same as the base of the ROM. Since on all
728 68000 type variants the vectors are at the base of the boot device
732 hex "Size of ROM vector region (in bytes)"
736 Define the size of the vector region in ROM. For most 68000
737 variants this would be 0x400 bytes in size. Set to 0 if you do
738 not want a vector region at the start of the ROM.
741 hex "Address of the base of system image in ROM"
745 Define the start address of the system image in ROM. Commonly this
746 is strait after the ROM vectors.
749 hex "Size of the ROM device"
753 Size of the ROM device. On some platforms this is used to setup
754 the chip select that controls the boot ROM device.
757 prompt "Kernel executes from"
759 Choose the memory type that the kernel will be running in.
764 The kernel will be resident in RAM when running.
769 The kernel will be resident in FLASH/ROM when running. This is
770 often referred to as Execute-in-Place (XIP), since the kernel
771 code executes from the position it is stored in the FLASH/ROM.
776 source "kernel/Kconfig.preempt"
779 source "kernel/time/Kconfig"
786 source "drivers/pcmcia/Kconfig"