2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
35 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
39 #include <linux/module.h>
40 #include <linux/ioport.h>
41 #include <linux/init.h>
42 #include <linux/console.h>
43 #include <linux/sysrq.h>
44 #include <linux/device.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial_core.h>
48 #include <linux/serial.h>
49 #include <linux/amba/bus.h>
50 #include <linux/amba/serial.h>
51 #include <linux/clk.h>
57 #define SERIAL_AMBA_MAJOR 204
58 #define SERIAL_AMBA_MINOR 16
59 #define SERIAL_AMBA_NR UART_NR
61 #define AMBA_ISR_PASS_LIMIT 256
63 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
64 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
66 #define UART_DUMMY_RSR_RX 256
67 #define UART_PORT_SIZE 64
70 * We wrap our port structure around the generic uart_port.
72 struct uart_amba_port
{
73 struct uart_port port
;
75 struct amba_device
*dev
;
76 struct amba_pl010_data
*data
;
77 unsigned int old_status
;
80 static void pl010_stop_tx(struct uart_port
*port
)
82 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
85 cr
= readb(uap
->port
.membase
+ UART010_CR
);
86 cr
&= ~UART010_CR_TIE
;
87 writel(cr
, uap
->port
.membase
+ UART010_CR
);
90 static void pl010_start_tx(struct uart_port
*port
)
92 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
95 cr
= readb(uap
->port
.membase
+ UART010_CR
);
97 writel(cr
, uap
->port
.membase
+ UART010_CR
);
100 static void pl010_stop_rx(struct uart_port
*port
)
102 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
105 cr
= readb(uap
->port
.membase
+ UART010_CR
);
106 cr
&= ~(UART010_CR_RIE
| UART010_CR_RTIE
);
107 writel(cr
, uap
->port
.membase
+ UART010_CR
);
110 static void pl010_enable_ms(struct uart_port
*port
)
112 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
115 cr
= readb(uap
->port
.membase
+ UART010_CR
);
116 cr
|= UART010_CR_MSIE
;
117 writel(cr
, uap
->port
.membase
+ UART010_CR
);
120 static void pl010_rx_chars(struct uart_amba_port
*uap
)
122 struct tty_struct
*tty
= uap
->port
.info
->tty
;
123 unsigned int status
, ch
, flag
, rsr
, max_count
= 256;
125 status
= readb(uap
->port
.membase
+ UART01x_FR
);
126 while (UART_RX_DATA(status
) && max_count
--) {
127 ch
= readb(uap
->port
.membase
+ UART01x_DR
);
130 uap
->port
.icount
.rx
++;
133 * Note that the error handling code is
134 * out of the main execution path
136 rsr
= readb(uap
->port
.membase
+ UART01x_RSR
) | UART_DUMMY_RSR_RX
;
137 if (unlikely(rsr
& UART01x_RSR_ANY
)) {
138 writel(0, uap
->port
.membase
+ UART01x_ECR
);
140 if (rsr
& UART01x_RSR_BE
) {
141 rsr
&= ~(UART01x_RSR_FE
| UART01x_RSR_PE
);
142 uap
->port
.icount
.brk
++;
143 if (uart_handle_break(&uap
->port
))
145 } else if (rsr
& UART01x_RSR_PE
)
146 uap
->port
.icount
.parity
++;
147 else if (rsr
& UART01x_RSR_FE
)
148 uap
->port
.icount
.frame
++;
149 if (rsr
& UART01x_RSR_OE
)
150 uap
->port
.icount
.overrun
++;
152 rsr
&= uap
->port
.read_status_mask
;
154 if (rsr
& UART01x_RSR_BE
)
156 else if (rsr
& UART01x_RSR_PE
)
158 else if (rsr
& UART01x_RSR_FE
)
162 if (uart_handle_sysrq_char(&uap
->port
, ch
))
165 uart_insert_char(&uap
->port
, rsr
, UART01x_RSR_OE
, ch
, flag
);
168 status
= readb(uap
->port
.membase
+ UART01x_FR
);
170 spin_unlock(&uap
->port
.lock
);
171 tty_flip_buffer_push(tty
);
172 spin_lock(&uap
->port
.lock
);
175 static void pl010_tx_chars(struct uart_amba_port
*uap
)
177 struct circ_buf
*xmit
= &uap
->port
.info
->xmit
;
180 if (uap
->port
.x_char
) {
181 writel(uap
->port
.x_char
, uap
->port
.membase
+ UART01x_DR
);
182 uap
->port
.icount
.tx
++;
183 uap
->port
.x_char
= 0;
186 if (uart_circ_empty(xmit
) || uart_tx_stopped(&uap
->port
)) {
187 pl010_stop_tx(&uap
->port
);
191 count
= uap
->port
.fifosize
>> 1;
193 writel(xmit
->buf
[xmit
->tail
], uap
->port
.membase
+ UART01x_DR
);
194 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
195 uap
->port
.icount
.tx
++;
196 if (uart_circ_empty(xmit
))
198 } while (--count
> 0);
200 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
201 uart_write_wakeup(&uap
->port
);
203 if (uart_circ_empty(xmit
))
204 pl010_stop_tx(&uap
->port
);
207 static void pl010_modem_status(struct uart_amba_port
*uap
)
209 unsigned int status
, delta
;
211 writel(0, uap
->port
.membase
+ UART010_ICR
);
213 status
= readb(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
215 delta
= status
^ uap
->old_status
;
216 uap
->old_status
= status
;
221 if (delta
& UART01x_FR_DCD
)
222 uart_handle_dcd_change(&uap
->port
, status
& UART01x_FR_DCD
);
224 if (delta
& UART01x_FR_DSR
)
225 uap
->port
.icount
.dsr
++;
227 if (delta
& UART01x_FR_CTS
)
228 uart_handle_cts_change(&uap
->port
, status
& UART01x_FR_CTS
);
230 wake_up_interruptible(&uap
->port
.info
->delta_msr_wait
);
233 static irqreturn_t
pl010_int(int irq
, void *dev_id
)
235 struct uart_amba_port
*uap
= dev_id
;
236 unsigned int status
, pass_counter
= AMBA_ISR_PASS_LIMIT
;
239 spin_lock(&uap
->port
.lock
);
241 status
= readb(uap
->port
.membase
+ UART010_IIR
);
244 if (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
))
246 if (status
& UART010_IIR_MIS
)
247 pl010_modem_status(uap
);
248 if (status
& UART010_IIR_TIS
)
251 if (pass_counter
-- == 0)
254 status
= readb(uap
->port
.membase
+ UART010_IIR
);
255 } while (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
|
260 spin_unlock(&uap
->port
.lock
);
262 return IRQ_RETVAL(handled
);
265 static unsigned int pl010_tx_empty(struct uart_port
*port
)
267 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
268 unsigned int status
= readb(uap
->port
.membase
+ UART01x_FR
);
269 return status
& UART01x_FR_BUSY
? 0 : TIOCSER_TEMT
;
272 static unsigned int pl010_get_mctrl(struct uart_port
*port
)
274 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
275 unsigned int result
= 0;
278 status
= readb(uap
->port
.membase
+ UART01x_FR
);
279 if (status
& UART01x_FR_DCD
)
281 if (status
& UART01x_FR_DSR
)
283 if (status
& UART01x_FR_CTS
)
289 static void pl010_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
291 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
294 uap
->data
->set_mctrl(uap
->dev
, uap
->port
.membase
, mctrl
);
297 static void pl010_break_ctl(struct uart_port
*port
, int break_state
)
299 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
303 spin_lock_irqsave(&uap
->port
.lock
, flags
);
304 lcr_h
= readb(uap
->port
.membase
+ UART010_LCRH
);
305 if (break_state
== -1)
306 lcr_h
|= UART01x_LCRH_BRK
;
308 lcr_h
&= ~UART01x_LCRH_BRK
;
309 writel(lcr_h
, uap
->port
.membase
+ UART010_LCRH
);
310 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
313 static int pl010_startup(struct uart_port
*port
)
315 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
319 * Try to enable the clock producer.
321 retval
= clk_enable(uap
->clk
);
325 uap
->port
.uartclk
= clk_get_rate(uap
->clk
);
330 retval
= request_irq(uap
->port
.irq
, pl010_int
, 0, "uart-pl010", uap
);
335 * initialise the old status of the modem signals
337 uap
->old_status
= readb(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
340 * Finally, enable interrupts
342 writel(UART01x_CR_UARTEN
| UART010_CR_RIE
| UART010_CR_RTIE
,
343 uap
->port
.membase
+ UART010_CR
);
348 clk_disable(uap
->clk
);
353 static void pl010_shutdown(struct uart_port
*port
)
355 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
360 free_irq(uap
->port
.irq
, uap
);
363 * disable all interrupts, disable the port
365 writel(0, uap
->port
.membase
+ UART010_CR
);
367 /* disable break condition and fifos */
368 writel(readb(uap
->port
.membase
+ UART010_LCRH
) &
369 ~(UART01x_LCRH_BRK
| UART01x_LCRH_FEN
),
370 uap
->port
.membase
+ UART010_LCRH
);
373 * Shut down the clock producer
375 clk_disable(uap
->clk
);
379 pl010_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
380 struct ktermios
*old
)
382 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
383 unsigned int lcr_h
, old_cr
;
385 unsigned int baud
, quot
;
388 * Ask the core to calculate the divisor for us.
390 baud
= uart_get_baud_rate(port
, termios
, old
, 0, uap
->port
.uartclk
/16);
391 quot
= uart_get_divisor(port
, baud
);
393 switch (termios
->c_cflag
& CSIZE
) {
395 lcr_h
= UART01x_LCRH_WLEN_5
;
398 lcr_h
= UART01x_LCRH_WLEN_6
;
401 lcr_h
= UART01x_LCRH_WLEN_7
;
404 lcr_h
= UART01x_LCRH_WLEN_8
;
407 if (termios
->c_cflag
& CSTOPB
)
408 lcr_h
|= UART01x_LCRH_STP2
;
409 if (termios
->c_cflag
& PARENB
) {
410 lcr_h
|= UART01x_LCRH_PEN
;
411 if (!(termios
->c_cflag
& PARODD
))
412 lcr_h
|= UART01x_LCRH_EPS
;
414 if (uap
->port
.fifosize
> 1)
415 lcr_h
|= UART01x_LCRH_FEN
;
417 spin_lock_irqsave(&uap
->port
.lock
, flags
);
420 * Update the per-port timeout.
422 uart_update_timeout(port
, termios
->c_cflag
, baud
);
424 uap
->port
.read_status_mask
= UART01x_RSR_OE
;
425 if (termios
->c_iflag
& INPCK
)
426 uap
->port
.read_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
427 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
428 uap
->port
.read_status_mask
|= UART01x_RSR_BE
;
431 * Characters to ignore
433 uap
->port
.ignore_status_mask
= 0;
434 if (termios
->c_iflag
& IGNPAR
)
435 uap
->port
.ignore_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
436 if (termios
->c_iflag
& IGNBRK
) {
437 uap
->port
.ignore_status_mask
|= UART01x_RSR_BE
;
439 * If we're ignoring parity and break indicators,
440 * ignore overruns too (for real raw support).
442 if (termios
->c_iflag
& IGNPAR
)
443 uap
->port
.ignore_status_mask
|= UART01x_RSR_OE
;
447 * Ignore all characters if CREAD is not set.
449 if ((termios
->c_cflag
& CREAD
) == 0)
450 uap
->port
.ignore_status_mask
|= UART_DUMMY_RSR_RX
;
452 /* first, disable everything */
453 old_cr
= readb(uap
->port
.membase
+ UART010_CR
) & ~UART010_CR_MSIE
;
455 if (UART_ENABLE_MS(port
, termios
->c_cflag
))
456 old_cr
|= UART010_CR_MSIE
;
458 writel(0, uap
->port
.membase
+ UART010_CR
);
462 writel((quot
& 0xf00) >> 8, uap
->port
.membase
+ UART010_LCRM
);
463 writel(quot
& 0xff, uap
->port
.membase
+ UART010_LCRL
);
466 * ----------v----------v----------v----------v-----
467 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
468 * ----------^----------^----------^----------^-----
470 writel(lcr_h
, uap
->port
.membase
+ UART010_LCRH
);
471 writel(old_cr
, uap
->port
.membase
+ UART010_CR
);
473 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
476 static const char *pl010_type(struct uart_port
*port
)
478 return port
->type
== PORT_AMBA
? "AMBA" : NULL
;
482 * Release the memory region(s) being used by 'port'
484 static void pl010_release_port(struct uart_port
*port
)
486 release_mem_region(port
->mapbase
, UART_PORT_SIZE
);
490 * Request the memory region(s) being used by 'port'
492 static int pl010_request_port(struct uart_port
*port
)
494 return request_mem_region(port
->mapbase
, UART_PORT_SIZE
, "uart-pl010")
495 != NULL
? 0 : -EBUSY
;
499 * Configure/autoconfigure the port.
501 static void pl010_config_port(struct uart_port
*port
, int flags
)
503 if (flags
& UART_CONFIG_TYPE
) {
504 port
->type
= PORT_AMBA
;
505 pl010_request_port(port
);
510 * verify the new serial_struct (for TIOCSSERIAL).
512 static int pl010_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
515 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_AMBA
)
517 if (ser
->irq
< 0 || ser
->irq
>= NR_IRQS
)
519 if (ser
->baud_base
< 9600)
524 static struct uart_ops amba_pl010_pops
= {
525 .tx_empty
= pl010_tx_empty
,
526 .set_mctrl
= pl010_set_mctrl
,
527 .get_mctrl
= pl010_get_mctrl
,
528 .stop_tx
= pl010_stop_tx
,
529 .start_tx
= pl010_start_tx
,
530 .stop_rx
= pl010_stop_rx
,
531 .enable_ms
= pl010_enable_ms
,
532 .break_ctl
= pl010_break_ctl
,
533 .startup
= pl010_startup
,
534 .shutdown
= pl010_shutdown
,
535 .set_termios
= pl010_set_termios
,
537 .release_port
= pl010_release_port
,
538 .request_port
= pl010_request_port
,
539 .config_port
= pl010_config_port
,
540 .verify_port
= pl010_verify_port
,
543 static struct uart_amba_port
*amba_ports
[UART_NR
];
545 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
547 static void pl010_console_putchar(struct uart_port
*port
, int ch
)
549 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
553 status
= readb(uap
->port
.membase
+ UART01x_FR
);
555 } while (!UART_TX_READY(status
));
556 writel(ch
, uap
->port
.membase
+ UART01x_DR
);
560 pl010_console_write(struct console
*co
, const char *s
, unsigned int count
)
562 struct uart_amba_port
*uap
= amba_ports
[co
->index
];
563 unsigned int status
, old_cr
;
565 clk_enable(uap
->clk
);
568 * First save the CR then disable the interrupts
570 old_cr
= readb(uap
->port
.membase
+ UART010_CR
);
571 writel(UART01x_CR_UARTEN
, uap
->port
.membase
+ UART010_CR
);
573 uart_console_write(&uap
->port
, s
, count
, pl010_console_putchar
);
576 * Finally, wait for transmitter to become empty
577 * and restore the TCR
580 status
= readb(uap
->port
.membase
+ UART01x_FR
);
582 } while (status
& UART01x_FR_BUSY
);
583 writel(old_cr
, uap
->port
.membase
+ UART010_CR
);
585 clk_disable(uap
->clk
);
589 pl010_console_get_options(struct uart_amba_port
*uap
, int *baud
,
590 int *parity
, int *bits
)
592 if (readb(uap
->port
.membase
+ UART010_CR
) & UART01x_CR_UARTEN
) {
593 unsigned int lcr_h
, quot
;
594 lcr_h
= readb(uap
->port
.membase
+ UART010_LCRH
);
597 if (lcr_h
& UART01x_LCRH_PEN
) {
598 if (lcr_h
& UART01x_LCRH_EPS
)
604 if ((lcr_h
& 0x60) == UART01x_LCRH_WLEN_7
)
609 quot
= readb(uap
->port
.membase
+ UART010_LCRL
) |
610 readb(uap
->port
.membase
+ UART010_LCRM
) << 8;
611 *baud
= uap
->port
.uartclk
/ (16 * (quot
+ 1));
615 static int __init
pl010_console_setup(struct console
*co
, char *options
)
617 struct uart_amba_port
*uap
;
624 * Check whether an invalid uart number has been specified, and
625 * if so, search for the first available port that does have
628 if (co
->index
>= UART_NR
)
630 uap
= amba_ports
[co
->index
];
634 uap
->port
.uartclk
= clk_get_rate(uap
->clk
);
637 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
639 pl010_console_get_options(uap
, &baud
, &parity
, &bits
);
641 return uart_set_options(&uap
->port
, co
, baud
, parity
, bits
, flow
);
644 static struct uart_driver amba_reg
;
645 static struct console amba_console
= {
647 .write
= pl010_console_write
,
648 .device
= uart_console_device
,
649 .setup
= pl010_console_setup
,
650 .flags
= CON_PRINTBUFFER
,
655 #define AMBA_CONSOLE &amba_console
657 #define AMBA_CONSOLE NULL
660 static struct uart_driver amba_reg
= {
661 .owner
= THIS_MODULE
,
662 .driver_name
= "ttyAM",
664 .major
= SERIAL_AMBA_MAJOR
,
665 .minor
= SERIAL_AMBA_MINOR
,
667 .cons
= AMBA_CONSOLE
,
670 static int pl010_probe(struct amba_device
*dev
, void *id
)
672 struct uart_amba_port
*uap
;
676 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
677 if (amba_ports
[i
] == NULL
)
680 if (i
== ARRAY_SIZE(amba_ports
)) {
685 uap
= kzalloc(sizeof(struct uart_amba_port
), GFP_KERNEL
);
691 base
= ioremap(dev
->res
.start
, PAGE_SIZE
);
697 uap
->clk
= clk_get(&dev
->dev
, "UARTCLK");
698 if (IS_ERR(uap
->clk
)) {
699 ret
= PTR_ERR(uap
->clk
);
703 uap
->port
.dev
= &dev
->dev
;
704 uap
->port
.mapbase
= dev
->res
.start
;
705 uap
->port
.membase
= base
;
706 uap
->port
.iotype
= UPIO_MEM
;
707 uap
->port
.irq
= dev
->irq
[0];
708 uap
->port
.fifosize
= 16;
709 uap
->port
.ops
= &amba_pl010_pops
;
710 uap
->port
.flags
= UPF_BOOT_AUTOCONF
;
713 uap
->data
= dev
->dev
.platform_data
;
717 amba_set_drvdata(dev
, uap
);
718 ret
= uart_add_one_port(&amba_reg
, &uap
->port
);
720 amba_set_drvdata(dev
, NULL
);
721 amba_ports
[i
] = NULL
;
732 static int pl010_remove(struct amba_device
*dev
)
734 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
737 amba_set_drvdata(dev
, NULL
);
739 uart_remove_one_port(&amba_reg
, &uap
->port
);
741 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
742 if (amba_ports
[i
] == uap
)
743 amba_ports
[i
] = NULL
;
745 iounmap(uap
->port
.membase
);
751 static int pl010_suspend(struct amba_device
*dev
, pm_message_t state
)
753 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
756 uart_suspend_port(&amba_reg
, &uap
->port
);
761 static int pl010_resume(struct amba_device
*dev
)
763 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
766 uart_resume_port(&amba_reg
, &uap
->port
);
771 static struct amba_id pl010_ids
[] __initdata
= {
779 static struct amba_driver pl010_driver
= {
781 .name
= "uart-pl010",
783 .id_table
= pl010_ids
,
784 .probe
= pl010_probe
,
785 .remove
= pl010_remove
,
786 .suspend
= pl010_suspend
,
787 .resume
= pl010_resume
,
790 static int __init
pl010_init(void)
794 printk(KERN_INFO
"Serial: AMBA driver $Revision: 1.41 $\n");
796 ret
= uart_register_driver(&amba_reg
);
798 ret
= amba_driver_register(&pl010_driver
);
800 uart_unregister_driver(&amba_reg
);
805 static void __exit
pl010_exit(void)
807 amba_driver_unregister(&pl010_driver
);
808 uart_unregister_driver(&amba_reg
);
811 module_init(pl010_init
);
812 module_exit(pl010_exit
);
814 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
815 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
816 MODULE_LICENSE("GPL");