arch/x86/include/asm/cache.h

   1 #ifndef _ASM_X86_CACHE_H
   2 #define _ASM_X86_CACHE_H
   3
   4 #include <linux/linkage.h>
   5
   6 /* L1 cache line size */
   7 #define L1_CACHE_SHIFT  (CONFIG_X86_L1_CACHE_SHIFT)
   8 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
   9
  10 #define __read_mostly __attribute__((__section__(".data.read_mostly")))
  11
  12 #define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT
  13 #define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT)
  14
  15 #ifdef CONFIG_X86_VSMP
  16 #ifdef CONFIG_SMP
  17 #define __cacheline_aligned_in_smp                                      \
  18         __attribute__((__aligned__(INTERNODE_CACHE_BYTES)))             \
  19         __page_aligned_data
  20 #endif
  21 #endif
  22
  23 #endif /* _ASM_X86_CACHE_H */