Blackfin arch: dont clear status register bits in SWRST so we can actually use it
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm26 / lib / muldi3.c
blob44d611b1cfdbda4fcfdd5b17d0586109b249bb4a
1 /* More subroutines needed by GCC output code on some machines. */
2 /* Compile this one with gcc. */
3 /* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* As a special exception, if you link this library with other files,
23 some of which are compiled with GCC, to produce an executable,
24 this library does not by itself cause the resulting executable
25 to be covered by the GNU General Public License.
26 This exception does not however invalidate any other reasons why
27 the executable file might be covered by the GNU General Public License.
29 /* support functions required by the kernel. based on code from gcc-2.95.3 */
30 /* I Molton 29/07/01 */
32 #include "gcclib.h"
34 #define umul_ppmm(xh, xl, a, b) \
35 {register USItype __t0, __t1, __t2; \
36 __asm__ ("%@ Inlined umul_ppmm \n\
37 mov %2, %5, lsr #16 \n\
38 mov %0, %6, lsr #16 \n\
39 bic %3, %5, %2, lsl #16 \n\
40 bic %4, %6, %0, lsl #16 \n\
41 mul %1, %3, %4 \n\
42 mul %4, %2, %4 \n\
43 mul %3, %0, %3 \n\
44 mul %0, %2, %0 \n\
45 adds %3, %4, %3 \n\
46 addcs %0, %0, #65536 \n\
47 adds %1, %1, %3, lsl #16 \n\
48 adc %0, %0, %3, lsr #16" \
49 : "=&r" ((USItype) (xh)), \
50 "=r" ((USItype) (xl)), \
51 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
52 : "r" ((USItype) (a)), \
53 "r" ((USItype) (b)));}
56 #define __umulsidi3(u, v) \
57 ({DIunion __w; \
58 umul_ppmm (__w.s.high, __w.s.low, u, v); \
59 __w.ll; })
62 DItype
63 __muldi3 (DItype u, DItype v)
65 DIunion w;
66 DIunion uu, vv;
68 uu.ll = u,
69 vv.ll = v;
71 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
72 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
73 + (USItype) uu.s.high * (USItype) vv.s.low);
75 return w.ll;