drivers/media/video/ov772x.c

   1 /*
   2  * ov772x Camera Driver
   3  *
   4  * Copyright (C) 2008 Renesas Solutions Corp.
   5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   6  *
   7  * Based on ov7670 and soc_camera_platform driver,
   8  *
   9  * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
  10  * Copyright (C) 2008 Magnus Damm
  11  * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/i2c.h>
  21 #include <linux/slab.h>
  22 #include <linux/delay.h>
  23 #include <linux/videodev2.h>
  24 #include <media/v4l2-chip-ident.h>
  25 #include <media/v4l2-subdev.h>
  26 #include <media/soc_camera.h>
  27 #include <media/soc_mediabus.h>
  28 #include <media/ov772x.h>
  29
  30 /*
  31  * register offset
  32  */
  33 #define GAIN        0x00 /* AGC - Gain control gain setting */
  34 #define BLUE        0x01 /* AWB - Blue channel gain setting */
  35 #define RED         0x02 /* AWB - Red   channel gain setting */
  36 #define GREEN       0x03 /* AWB - Green channel gain setting */
  37 #define COM1        0x04 /* Common control 1 */
  38 #define BAVG        0x05 /* U/B Average Level */
  39 #define GAVG        0x06 /* Y/Gb Average Level */
  40 #define RAVG        0x07 /* V/R Average Level */
  41 #define AECH        0x08 /* Exposure Value - AEC MSBs */
  42 #define COM2        0x09 /* Common control 2 */
  43 #define PID         0x0A /* Product ID Number MSB */
  44 #define VER         0x0B /* Product ID Number LSB */
  45 #define COM3        0x0C /* Common control 3 */
  46 #define COM4        0x0D /* Common control 4 */
  47 #define COM5        0x0E /* Common control 5 */
  48 #define COM6        0x0F /* Common control 6 */
  49 #define AEC         0x10 /* Exposure Value */
  50 #define CLKRC       0x11 /* Internal clock */
  51 #define COM7        0x12 /* Common control 7 */
  52 #define COM8        0x13 /* Common control 8 */
  53 #define COM9        0x14 /* Common control 9 */
  54 #define COM10       0x15 /* Common control 10 */
  55 #define REG16       0x16 /* Register 16 */
  56 #define HSTART      0x17 /* Horizontal sensor size */
  57 #define HSIZE       0x18 /* Horizontal frame (HREF column) end high 8-bit */
  58 #define VSTART      0x19 /* Vertical frame (row) start high 8-bit */
  59 #define VSIZE       0x1A /* Vertical sensor size */
  60 #define PSHFT       0x1B /* Data format - pixel delay select */
  61 #define MIDH        0x1C /* Manufacturer ID byte - high */
  62 #define MIDL        0x1D /* Manufacturer ID byte - low  */
  63 #define LAEC        0x1F /* Fine AEC value */
  64 #define COM11       0x20 /* Common control 11 */
  65 #define BDBASE      0x22 /* Banding filter Minimum AEC value */
  66 #define DBSTEP      0x23 /* Banding filter Maximum Setp */
  67 #define AEW         0x24 /* AGC/AEC - Stable operating region (upper limit) */
  68 #define AEB         0x25 /* AGC/AEC - Stable operating region (lower limit) */
  69 #define VPT         0x26 /* AGC/AEC Fast mode operating region */
  70 #define REG28       0x28 /* Register 28 */
  71 #define HOUTSIZE    0x29 /* Horizontal data output size MSBs */
  72 #define EXHCH       0x2A /* Dummy pixel insert MSB */
  73 #define EXHCL       0x2B /* Dummy pixel insert LSB */
  74 #define VOUTSIZE    0x2C /* Vertical data output size MSBs */
  75 #define ADVFL       0x2D /* LSB of insert dummy lines in Vertical direction */
  76 #define ADVFH       0x2E /* MSG of insert dummy lines in Vertical direction */
  77 #define YAVE        0x2F /* Y/G Channel Average value */
  78 #define LUMHTH      0x30 /* Histogram AEC/AGC Luminance high level threshold */
  79 #define LUMLTH      0x31 /* Histogram AEC/AGC Luminance low  level threshold */
  80 #define HREF        0x32 /* Image start and size control */
  81 #define DM_LNL      0x33 /* Dummy line low  8 bits */
  82 #define DM_LNH      0x34 /* Dummy line high 8 bits */
  83 #define ADOFF_B     0x35 /* AD offset compensation value for B  channel */
  84 #define ADOFF_R     0x36 /* AD offset compensation value for R  channel */
  85 #define ADOFF_GB    0x37 /* AD offset compensation value for Gb channel */
  86 #define ADOFF_GR    0x38 /* AD offset compensation value for Gr channel */
  87 #define OFF_B       0x39 /* Analog process B  channel offset value */
  88 #define OFF_R       0x3A /* Analog process R  channel offset value */
  89 #define OFF_GB      0x3B /* Analog process Gb channel offset value */
  90 #define OFF_GR      0x3C /* Analog process Gr channel offset value */
  91 #define COM12       0x3D /* Common control 12 */
  92 #define COM13       0x3E /* Common control 13 */
  93 #define COM14       0x3F /* Common control 14 */
  94 #define COM15       0x40 /* Common control 15*/
  95 #define COM16       0x41 /* Common control 16 */
  96 #define TGT_B       0x42 /* BLC blue channel target value */
  97 #define TGT_R       0x43 /* BLC red  channel target value */
  98 #define TGT_GB      0x44 /* BLC Gb   channel target value */
  99 #define TGT_GR      0x45 /* BLC Gr   channel target value */
 100 /* for ov7720 */
 101 #define LCC0        0x46 /* Lens correction control 0 */
 102 #define LCC1        0x47 /* Lens correction option 1 - X coordinate */
 103 #define LCC2        0x48 /* Lens correction option 2 - Y coordinate */
 104 #define LCC3        0x49 /* Lens correction option 3 */
 105 #define LCC4        0x4A /* Lens correction option 4 - radius of the circular */
 106 #define LCC5        0x4B /* Lens correction option 5 */
 107 #define LCC6        0x4C /* Lens correction option 6 */
 108 /* for ov7725 */
 109 #define LC_CTR      0x46 /* Lens correction control */
 110 #define LC_XC       0x47 /* X coordinate of lens correction center relative */
 111 #define LC_YC       0x48 /* Y coordinate of lens correction center relative */
 112 #define LC_COEF     0x49 /* Lens correction coefficient */
 113 #define LC_RADI     0x4A /* Lens correction radius */
 114 #define LC_COEFB    0x4B /* Lens B channel compensation coefficient */
 115 #define LC_COEFR    0x4C /* Lens R channel compensation coefficient */
 116
 117 #define FIXGAIN     0x4D /* Analog fix gain amplifer */
 118 #define AREF0       0x4E /* Sensor reference control */
 119 #define AREF1       0x4F /* Sensor reference current control */
 120 #define AREF2       0x50 /* Analog reference control */
 121 #define AREF3       0x51 /* ADC    reference control */
 122 #define AREF4       0x52 /* ADC    reference control */
 123 #define AREF5       0x53 /* ADC    reference control */
 124 #define AREF6       0x54 /* Analog reference control */
 125 #define AREF7       0x55 /* Analog reference control */
 126 #define UFIX        0x60 /* U channel fixed value output */
 127 #define VFIX        0x61 /* V channel fixed value output */
 128 #define AWBB_BLK    0x62 /* AWB option for advanced AWB */
 129 #define AWB_CTRL0   0x63 /* AWB control byte 0 */
 130 #define DSP_CTRL1   0x64 /* DSP control byte 1 */
 131 #define DSP_CTRL2   0x65 /* DSP control byte 2 */
 132 #define DSP_CTRL3   0x66 /* DSP control byte 3 */
 133 #define DSP_CTRL4   0x67 /* DSP control byte 4 */
 134 #define AWB_BIAS    0x68 /* AWB BLC level clip */
 135 #define AWB_CTRL1   0x69 /* AWB control  1 */
 136 #define AWB_CTRL2   0x6A /* AWB control  2 */
 137 #define AWB_CTRL3   0x6B /* AWB control  3 */
 138 #define AWB_CTRL4   0x6C /* AWB control  4 */
 139 #define AWB_CTRL5   0x6D /* AWB control  5 */
 140 #define AWB_CTRL6   0x6E /* AWB control  6 */
 141 #define AWB_CTRL7   0x6F /* AWB control  7 */
 142 #define AWB_CTRL8   0x70 /* AWB control  8 */
 143 #define AWB_CTRL9   0x71 /* AWB control  9 */
 144 #define AWB_CTRL10  0x72 /* AWB control 10 */
 145 #define AWB_CTRL11  0x73 /* AWB control 11 */
 146 #define AWB_CTRL12  0x74 /* AWB control 12 */
 147 #define AWB_CTRL13  0x75 /* AWB control 13 */
 148 #define AWB_CTRL14  0x76 /* AWB control 14 */
 149 #define AWB_CTRL15  0x77 /* AWB control 15 */
 150 #define AWB_CTRL16  0x78 /* AWB control 16 */
 151 #define AWB_CTRL17  0x79 /* AWB control 17 */
 152 #define AWB_CTRL18  0x7A /* AWB control 18 */
 153 #define AWB_CTRL19  0x7B /* AWB control 19 */
 154 #define AWB_CTRL20  0x7C /* AWB control 20 */
 155 #define AWB_CTRL21  0x7D /* AWB control 21 */
 156 #define GAM1        0x7E /* Gamma Curve  1st segment input end point */
 157 #define GAM2        0x7F /* Gamma Curve  2nd segment input end point */
 158 #define GAM3        0x80 /* Gamma Curve  3rd segment input end point */
 159 #define GAM4        0x81 /* Gamma Curve  4th segment input end point */
 160 #define GAM5        0x82 /* Gamma Curve  5th segment input end point */
 161 #define GAM6        0x83 /* Gamma Curve  6th segment input end point */
 162 #define GAM7        0x84 /* Gamma Curve  7th segment input end point */
 163 #define GAM8        0x85 /* Gamma Curve  8th segment input end point */
 164 #define GAM9        0x86 /* Gamma Curve  9th segment input end point */
 165 #define GAM10       0x87 /* Gamma Curve 10th segment input end point */
 166 #define GAM11       0x88 /* Gamma Curve 11th segment input end point */
 167 #define GAM12       0x89 /* Gamma Curve 12th segment input end point */
 168 #define GAM13       0x8A /* Gamma Curve 13th segment input end point */
 169 #define GAM14       0x8B /* Gamma Curve 14th segment input end point */
 170 #define GAM15       0x8C /* Gamma Curve 15th segment input end point */
 171 #define SLOP        0x8D /* Gamma curve highest segment slope */
 172 #define DNSTH       0x8E /* De-noise threshold */
 173 #define EDGE_STRNGT 0x8F /* Edge strength  control when manual mode */
 174 #define EDGE_TRSHLD 0x90 /* Edge threshold control when manual mode */
 175 #define DNSOFF      0x91 /* Auto De-noise threshold control */
 176 #define EDGE_UPPER  0x92 /* Edge strength upper limit when Auto mode */
 177 #define EDGE_LOWER  0x93 /* Edge strength lower limit when Auto mode */
 178 #define MTX1        0x94 /* Matrix coefficient 1 */
 179 #define MTX2        0x95 /* Matrix coefficient 2 */
 180 #define MTX3        0x96 /* Matrix coefficient 3 */
 181 #define MTX4        0x97 /* Matrix coefficient 4 */
 182 #define MTX5        0x98 /* Matrix coefficient 5 */
 183 #define MTX6        0x99 /* Matrix coefficient 6 */
 184 #define MTX_CTRL    0x9A /* Matrix control */
 185 #define BRIGHT      0x9B /* Brightness control */
 186 #define CNTRST      0x9C /* Contrast contrast */
 187 #define CNTRST_CTRL 0x9D /* Contrast contrast center */
 188 #define UVAD_J0     0x9E /* Auto UV adjust contrast 0 */
 189 #define UVAD_J1     0x9F /* Auto UV adjust contrast 1 */
 190 #define SCAL0       0xA0 /* Scaling control 0 */
 191 #define SCAL1       0xA1 /* Scaling control 1 */
 192 #define SCAL2       0xA2 /* Scaling control 2 */
 193 #define FIFODLYM    0xA3 /* FIFO manual mode delay control */
 194 #define FIFODLYA    0xA4 /* FIFO auto   mode delay control */
 195 #define SDE         0xA6 /* Special digital effect control */
 196 #define USAT        0xA7 /* U component saturation control */
 197 #define VSAT        0xA8 /* V component saturation control */
 198 /* for ov7720 */
 199 #define HUE0        0xA9 /* Hue control 0 */
 200 #define HUE1        0xAA /* Hue control 1 */
 201 /* for ov7725 */
 202 #define HUECOS      0xA9 /* Cosine value */
 203 #define HUESIN      0xAA /* Sine value */
 204
 205 #define SIGN        0xAB /* Sign bit for Hue and contrast */
 206 #define DSPAUTO     0xAC /* DSP auto function ON/OFF control */
 207
 208 /*
 209  * register detail
 210  */
 211
 212 /* COM2 */
 213 #define SOFT_SLEEP_MODE 0x10    /* Soft sleep mode */
 214                                 /* Output drive capability */
 215 #define OCAP_1x         0x00    /* 1x */
 216 #define OCAP_2x         0x01    /* 2x */
 217 #define OCAP_3x         0x02    /* 3x */
 218 #define OCAP_4x         0x03    /* 4x */
 219
 220 /* COM3 */
 221 #define SWAP_MASK       (SWAP_RGB | SWAP_YUV | SWAP_ML)
 222 #define IMG_MASK        (VFLIP_IMG | HFLIP_IMG)
 223
 224 #define VFLIP_IMG       0x80    /* Vertical flip image ON/OFF selection */
 225 #define HFLIP_IMG       0x40    /* Horizontal mirror image ON/OFF selection */
 226 #define SWAP_RGB        0x20    /* Swap B/R  output sequence in RGB mode */
 227 #define SWAP_YUV        0x10    /* Swap Y/UV output sequence in YUV mode */
 228 #define SWAP_ML         0x08    /* Swap output MSB/LSB */
 229                                 /* Tri-state option for output clock */
 230 #define NOTRI_CLOCK     0x04    /*   0: Tri-state    at this period */
 231                                 /*   1: No tri-state at this period */
 232                                 /* Tri-state option for output data */
 233 #define NOTRI_DATA      0x02    /*   0: Tri-state    at this period */
 234                                 /*   1: No tri-state at this period */
 235 #define SCOLOR_TEST     0x01    /* Sensor color bar test pattern */
 236
 237 /* COM4 */
 238                                 /* PLL frequency control */
 239 #define PLL_BYPASS      0x00    /*  00: Bypass PLL */
 240 #define PLL_4x          0x40    /*  01: PLL 4x */
 241 #define PLL_6x          0x80    /*  10: PLL 6x */
 242 #define PLL_8x          0xc0    /*  11: PLL 8x */
 243                                 /* AEC evaluate window */
 244 #define AEC_FULL        0x00    /*  00: Full window */
 245 #define AEC_1p2         0x10    /*  01: 1/2  window */
 246 #define AEC_1p4         0x20    /*  10: 1/4  window */
 247 #define AEC_2p3         0x30    /*  11: Low 2/3 window */
 248
 249 /* COM5 */
 250 #define AFR_ON_OFF      0x80    /* Auto frame rate control ON/OFF selection */
 251 #define AFR_SPPED       0x40    /* Auto frame rate control speed selection */
 252                                 /* Auto frame rate max rate control */
 253 #define AFR_NO_RATE     0x00    /*     No  reduction of frame rate */
 254 #define AFR_1p2         0x10    /*     Max reduction to 1/2 frame rate */
 255 #define AFR_1p4         0x20    /*     Max reduction to 1/4 frame rate */
 256 #define AFR_1p8         0x30    /* Max reduction to 1/8 frame rate */
 257                                 /* Auto frame rate active point control */
 258 #define AF_2x           0x00    /*     Add frame when AGC reaches  2x gain */
 259 #define AF_4x           0x04    /*     Add frame when AGC reaches  4x gain */
 260 #define AF_8x           0x08    /*     Add frame when AGC reaches  8x gain */
 261 #define AF_16x          0x0c    /* Add frame when AGC reaches 16x gain */
 262                                 /* AEC max step control */
 263 #define AEC_NO_LIMIT    0x01    /*   0 : AEC incease step has limit */
 264                                 /*   1 : No limit to AEC increase step */
 265
 266 /* COM7 */
 267                                 /* SCCB Register Reset */
 268 #define SCCB_RESET      0x80    /*   0 : No change */
 269                                 /*   1 : Resets all registers to default */
 270                                 /* Resolution selection */
 271 #define SLCT_MASK       0x40    /*   Mask of VGA or QVGA */
 272 #define SLCT_VGA        0x00    /*   0 : VGA */
 273 #define SLCT_QVGA       0x40    /*   1 : QVGA */
 274 #define ITU656_ON_OFF   0x20    /* ITU656 protocol ON/OFF selection */
 275                                 /* RGB output format control */
 276 #define FMT_MASK        0x0c    /*      Mask of color format */
 277 #define FMT_GBR422      0x00    /*      00 : GBR 4:2:2 */
 278 #define FMT_RGB565      0x04    /*      01 : RGB 565 */
 279 #define FMT_RGB555      0x08    /*      10 : RGB 555 */
 280 #define FMT_RGB444      0x0c    /* 11 : RGB 444 */
 281                                 /* Output format control */
 282 #define OFMT_MASK       0x03    /*      Mask of output format */
 283 #define OFMT_YUV        0x00    /*      00 : YUV */
 284 #define OFMT_P_BRAW     0x01    /*      01 : Processed Bayer RAW */
 285 #define OFMT_RGB        0x02    /*      10 : RGB */
 286 #define OFMT_BRAW       0x03    /* 11 : Bayer RAW */
 287
 288 /* COM8 */
 289 #define FAST_ALGO       0x80    /* Enable fast AGC/AEC algorithm */
 290                                 /* AEC Setp size limit */
 291 #define UNLMT_STEP      0x40    /*   0 : Step size is limited */
 292                                 /*   1 : Unlimited step size */
 293 #define BNDF_ON_OFF     0x20    /* Banding filter ON/OFF */
 294 #define AEC_BND         0x10    /* Enable AEC below banding value */
 295 #define AEC_ON_OFF      0x08    /* Fine AEC ON/OFF control */
 296 #define AGC_ON          0x04    /* AGC Enable */
 297 #define AWB_ON          0x02    /* AWB Enable */
 298 #define AEC_ON          0x01    /* AEC Enable */
 299
 300 /* COM9 */
 301 #define BASE_AECAGC     0x80    /* Histogram or average based AEC/AGC */
 302                                 /* Automatic gain ceiling - maximum AGC value */
 303 #define GAIN_2x         0x00    /*    000 :   2x */
 304 #define GAIN_4x         0x10    /*    001 :   4x */
 305 #define GAIN_8x         0x20    /*    010 :   8x */
 306 #define GAIN_16x        0x30    /*    011 :  16x */
 307 #define GAIN_32x        0x40    /*    100 :  32x */
 308 #define GAIN_64x        0x50    /* 101 :  64x */
 309 #define GAIN_128x       0x60    /* 110 : 128x */
 310 #define DROP_VSYNC      0x04    /* Drop VSYNC output of corrupt frame */
 311 #define DROP_HREF       0x02    /* Drop HREF  output of corrupt frame */
 312
 313 /* COM11 */
 314 #define SGLF_ON_OFF     0x02    /* Single frame ON/OFF selection */
 315 #define SGLF_TRIG       0x01    /* Single frame transfer trigger */
 316
 317 /* EXHCH */
 318 #define VSIZE_LSB       0x04    /* Vertical data output size LSB */
 319
 320 /* DSP_CTRL1 */
 321 #define FIFO_ON         0x80    /* FIFO enable/disable selection */
 322 #define UV_ON_OFF       0x40    /* UV adjust function ON/OFF selection */
 323 #define YUV444_2_422    0x20    /* YUV444 to 422 UV channel option selection */
 324 #define CLR_MTRX_ON_OFF 0x10    /* Color matrix ON/OFF selection */
 325 #define INTPLT_ON_OFF   0x08    /* Interpolation ON/OFF selection */
 326 #define GMM_ON_OFF      0x04    /* Gamma function ON/OFF selection */
 327 #define AUTO_BLK_ON_OFF 0x02    /* Black defect auto correction ON/OFF */
 328 #define AUTO_WHT_ON_OFF 0x01    /* White define auto correction ON/OFF */
 329
 330 /* DSP_CTRL3 */
 331 #define UV_MASK         0x80    /* UV output sequence option */
 332 #define UV_ON           0x80    /*   ON */
 333 #define UV_OFF          0x00    /*   OFF */
 334 #define CBAR_MASK       0x20    /* DSP Color bar mask */
 335 #define CBAR_ON         0x20    /*   ON */
 336 #define CBAR_OFF        0x00    /*   OFF */
 337
 338 /* HSTART */
 339 #define HST_VGA         0x23
 340 #define HST_QVGA        0x3F
 341
 342 /* HSIZE */
 343 #define HSZ_VGA         0xA0
 344 #define HSZ_QVGA        0x50
 345
 346 /* VSTART */
 347 #define VST_VGA         0x07
 348 #define VST_QVGA        0x03
 349
 350 /* VSIZE */
 351 #define VSZ_VGA         0xF0
 352 #define VSZ_QVGA        0x78
 353
 354 /* HOUTSIZE */
 355 #define HOSZ_VGA        0xA0
 356 #define HOSZ_QVGA       0x50
 357
 358 /* VOUTSIZE */
 359 #define VOSZ_VGA        0xF0
 360 #define VOSZ_QVGA       0x78
 361
 362 /* DSPAUTO (DSP Auto Function ON/OFF Control) */
 363 #define AWB_ACTRL       0x80 /* AWB auto threshold control */
 364 #define DENOISE_ACTRL   0x40 /* De-noise auto threshold control */
 365 #define EDGE_ACTRL      0x20 /* Edge enhancement auto strength control */
 366 #define UV_ACTRL        0x10 /* UV adjust auto slope control */
 367 #define SCAL0_ACTRL     0x08 /* Auto scaling factor control */
 368 #define SCAL1_2_ACTRL   0x04 /* Auto scaling factor control */
 369
 370 /*
 371  * ID
 372  */
 373 #define OV7720  0x7720
 374 #define OV7725  0x7721
 375 #define VERSION(pid, ver) ((pid<<8)|(ver&0xFF))
 376
 377 /*
 378  * struct
 379  */
 380 struct regval_list {
 381         unsigned char reg_num;
 382         unsigned char value;
 383 };
 384
 385 struct ov772x_color_format {
 386         enum v4l2_mbus_pixelcode code;
 387         enum v4l2_colorspace colorspace;
 388         u8 dsp3;
 389         u8 com3;
 390         u8 com7;
 391 };
 392
 393 struct ov772x_win_size {
 394         char                     *name;
 395         __u32                     width;
 396         __u32                     height;
 397         unsigned char             com7_bit;
 398         const struct regval_list *regs;
 399 };
 400
 401 struct ov772x_priv {
 402         struct v4l2_subdev                subdev;
 403         struct ov772x_camera_info        *info;
 404         const struct ov772x_color_format *cfmt;
 405         const struct ov772x_win_size     *win;
 406         int                               model;
 407         unsigned short                    flag_vflip:1;
 408         unsigned short                    flag_hflip:1;
 409         /* band_filter = COM8[5] ? 256 - BDBASE : 0 */
 410         unsigned short                    band_filter;
 411 };
 412
 413 #define ENDMARKER { 0xff, 0xff }
 414
 415 /*
 416  * register setting for window size
 417  */
 418 static const struct regval_list ov772x_qvga_regs[] = {
 419         { HSTART,   HST_QVGA },
 420         { HSIZE,    HSZ_QVGA },
 421         { VSTART,   VST_QVGA },
 422         { VSIZE,    VSZ_QVGA  },
 423         { HOUTSIZE, HOSZ_QVGA },
 424         { VOUTSIZE, VOSZ_QVGA },
 425         ENDMARKER,
 426 };
 427
 428 static const struct regval_list ov772x_vga_regs[] = {
 429         { HSTART,   HST_VGA },
 430         { HSIZE,    HSZ_VGA },
 431         { VSTART,   VST_VGA },
 432         { VSIZE,    VSZ_VGA },
 433         { HOUTSIZE, HOSZ_VGA },
 434         { VOUTSIZE, VOSZ_VGA },
 435         ENDMARKER,
 436 };
 437
 438 /*
 439  * supported color format list
 440  */
 441 static const struct ov772x_color_format ov772x_cfmts[] = {
 442         {
 443                 .code           = V4L2_MBUS_FMT_YUYV8_2X8,
 444                 .colorspace     = V4L2_COLORSPACE_JPEG,
 445                 .dsp3           = 0x0,
 446                 .com3           = SWAP_YUV,
 447                 .com7           = OFMT_YUV,
 448         },
 449         {
 450                 .code           = V4L2_MBUS_FMT_YVYU8_2X8,
 451                 .colorspace     = V4L2_COLORSPACE_JPEG,
 452                 .dsp3           = UV_ON,
 453                 .com3           = SWAP_YUV,
 454                 .com7           = OFMT_YUV,
 455         },
 456         {
 457                 .code           = V4L2_MBUS_FMT_UYVY8_2X8,
 458                 .colorspace     = V4L2_COLORSPACE_JPEG,
 459                 .dsp3           = 0x0,
 460                 .com3           = 0x0,
 461                 .com7           = OFMT_YUV,
 462         },
 463         {
 464                 .code           = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
 465                 .colorspace     = V4L2_COLORSPACE_SRGB,
 466                 .dsp3           = 0x0,
 467                 .com3           = SWAP_RGB,
 468                 .com7           = FMT_RGB555 | OFMT_RGB,
 469         },
 470         {
 471                 .code           = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,
 472                 .colorspace     = V4L2_COLORSPACE_SRGB,
 473                 .dsp3           = 0x0,
 474                 .com3           = 0x0,
 475                 .com7           = FMT_RGB555 | OFMT_RGB,
 476         },
 477         {
 478                 .code           = V4L2_MBUS_FMT_RGB565_2X8_LE,
 479                 .colorspace     = V4L2_COLORSPACE_SRGB,
 480                 .dsp3           = 0x0,
 481                 .com3           = SWAP_RGB,
 482                 .com7           = FMT_RGB565 | OFMT_RGB,
 483         },
 484         {
 485                 .code           = V4L2_MBUS_FMT_RGB565_2X8_BE,
 486                 .colorspace     = V4L2_COLORSPACE_SRGB,
 487                 .dsp3           = 0x0,
 488                 .com3           = 0x0,
 489                 .com7           = FMT_RGB565 | OFMT_RGB,
 490         },
 491 };
 492
 493
 494 /*
 495  * window size list
 496  */
 497 #define VGA_WIDTH   640
 498 #define VGA_HEIGHT  480
 499 #define QVGA_WIDTH  320
 500 #define QVGA_HEIGHT 240
 501 #define MAX_WIDTH   VGA_WIDTH
 502 #define MAX_HEIGHT  VGA_HEIGHT
 503
 504 static const struct ov772x_win_size ov772x_win_vga = {
 505         .name     = "VGA",
 506         .width    = VGA_WIDTH,
 507         .height   = VGA_HEIGHT,
 508         .com7_bit = SLCT_VGA,
 509         .regs     = ov772x_vga_regs,
 510 };
 511
 512 static const struct ov772x_win_size ov772x_win_qvga = {
 513         .name     = "QVGA",
 514         .width    = QVGA_WIDTH,
 515         .height   = QVGA_HEIGHT,
 516         .com7_bit = SLCT_QVGA,
 517         .regs     = ov772x_qvga_regs,
 518 };
 519
 520 static const struct v4l2_queryctrl ov772x_controls[] = {
 521         {
 522                 .id             = V4L2_CID_VFLIP,
 523                 .type           = V4L2_CTRL_TYPE_BOOLEAN,
 524                 .name           = "Flip Vertically",
 525                 .minimum        = 0,
 526                 .maximum        = 1,
 527                 .step           = 1,
 528                 .default_value  = 0,
 529         },
 530         {
 531                 .id             = V4L2_CID_HFLIP,
 532                 .type           = V4L2_CTRL_TYPE_BOOLEAN,
 533                 .name           = "Flip Horizontally",
 534                 .minimum        = 0,
 535                 .maximum        = 1,
 536                 .step           = 1,
 537                 .default_value  = 0,
 538         },
 539         {
 540                 .id             = V4L2_CID_BAND_STOP_FILTER,
 541                 .type           = V4L2_CTRL_TYPE_INTEGER,
 542                 .name           = "Band-stop filter",
 543                 .minimum        = 0,
 544                 .maximum        = 256,
 545                 .step           = 1,
 546                 .default_value  = 0,
 547         },
 548 };
 549
 550 /*
 551  * general function
 552  */
 553
 554 static struct ov772x_priv *to_ov772x(const struct i2c_client *client)
 555 {
 556         return container_of(i2c_get_clientdata(client), struct ov772x_priv,
 557                             subdev);
 558 }
 559
 560 static int ov772x_write_array(struct i2c_client        *client,
 561                               const struct regval_list *vals)
 562 {
 563         while (vals->reg_num != 0xff) {
 564                 int ret = i2c_smbus_write_byte_data(client,
 565                                                     vals->reg_num,
 566                                                     vals->value);
 567                 if (ret < 0)
 568                         return ret;
 569                 vals++;
 570         }
 571         return 0;
 572 }
 573
 574 static int ov772x_mask_set(struct i2c_client *client,
 575                                           u8  command,
 576                                           u8  mask,
 577                                           u8  set)
 578 {
 579         s32 val = i2c_smbus_read_byte_data(client, command);
 580         if (val < 0)
 581                 return val;
 582
 583         val &= ~mask;
 584         val |= set & mask;
 585
 586         return i2c_smbus_write_byte_data(client, command, val);
 587 }
 588
 589 static int ov772x_reset(struct i2c_client *client)
 590 {
 591         int ret = i2c_smbus_write_byte_data(client, COM7, SCCB_RESET);
 592         msleep(1);
 593         return ret;
 594 }
 595
 596 /*
 597  * soc_camera_ops function
 598  */
 599
 600 static int ov772x_s_stream(struct v4l2_subdev *sd, int enable)
 601 {
 602         struct i2c_client *client = v4l2_get_subdevdata(sd);
 603         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 604
 605         if (!enable) {
 606                 ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, SOFT_SLEEP_MODE);
 607                 return 0;
 608         }
 609
 610         if (!priv->win || !priv->cfmt) {
 611                 dev_err(&client->dev, "norm or win select error\n");
 612                 return -EPERM;
 613         }
 614
 615         ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, 0);
 616
 617         dev_dbg(&client->dev, "format %d, win %s\n",
 618                 priv->cfmt->code, priv->win->name);
 619
 620         return 0;
 621 }
 622
 623 static int ov772x_set_bus_param(struct soc_camera_device *icd,
 624                                 unsigned long             flags)
 625 {
 626         return 0;
 627 }
 628
 629 static unsigned long ov772x_query_bus_param(struct soc_camera_device *icd)
 630 {
 631         struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
 632         struct ov772x_priv *priv = i2c_get_clientdata(client);
 633         struct soc_camera_link *icl = to_soc_camera_link(icd);
 634         unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
 635                 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
 636                 SOCAM_DATA_ACTIVE_HIGH;
 637
 638         if (priv->info->flags & OV772X_FLAG_8BIT)
 639                 flags |= SOCAM_DATAWIDTH_8;
 640         else
 641                 flags |= SOCAM_DATAWIDTH_10;
 642
 643         return soc_camera_apply_sensor_flags(icl, flags);
 644 }
 645
 646 static int ov772x_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 647 {
 648         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 649
 650         switch (ctrl->id) {
 651         case V4L2_CID_VFLIP:
 652                 ctrl->value = priv->flag_vflip;
 653                 break;
 654         case V4L2_CID_HFLIP:
 655                 ctrl->value = priv->flag_hflip;
 656                 break;
 657         case V4L2_CID_BAND_STOP_FILTER:
 658                 ctrl->value = priv->band_filter;
 659                 break;
 660         }
 661         return 0;
 662 }
 663
 664 static int ov772x_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 665 {
 666         struct i2c_client *client = v4l2_get_subdevdata(sd);
 667         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 668         int ret = 0;
 669         u8 val;
 670
 671         switch (ctrl->id) {
 672         case V4L2_CID_VFLIP:
 673                 val = ctrl->value ? VFLIP_IMG : 0x00;
 674                 priv->flag_vflip = ctrl->value;
 675                 if (priv->info->flags & OV772X_FLAG_VFLIP)
 676                         val ^= VFLIP_IMG;
 677                 ret = ov772x_mask_set(client, COM3, VFLIP_IMG, val);
 678                 break;
 679         case V4L2_CID_HFLIP:
 680                 val = ctrl->value ? HFLIP_IMG : 0x00;
 681                 priv->flag_hflip = ctrl->value;
 682                 if (priv->info->flags & OV772X_FLAG_HFLIP)
 683                         val ^= HFLIP_IMG;
 684                 ret = ov772x_mask_set(client, COM3, HFLIP_IMG, val);
 685                 break;
 686         case V4L2_CID_BAND_STOP_FILTER:
 687                 if ((unsigned)ctrl->value > 256)
 688                         ctrl->value = 256;
 689                 if (ctrl->value == priv->band_filter)
 690                         break;
 691                 if (!ctrl->value) {
 692                         /* Switch the filter off, it is on now */
 693                         ret = ov772x_mask_set(client, BDBASE, 0xff, 0xff);
 694                         if (!ret)
 695                                 ret = ov772x_mask_set(client, COM8,
 696                                                       BNDF_ON_OFF, 0);
 697                 } else {
 698                         /* Switch the filter on, set AEC low limit */
 699                         val = 256 - ctrl->value;
 700                         ret = ov772x_mask_set(client, COM8,
 701                                               BNDF_ON_OFF, BNDF_ON_OFF);
 702                         if (!ret)
 703                                 ret = ov772x_mask_set(client, BDBASE,
 704                                                       0xff, val);
 705                 }
 706                 if (!ret)
 707                         priv->band_filter = ctrl->value;
 708                 break;
 709         }
 710
 711         return ret;
 712 }
 713
 714 static int ov772x_g_chip_ident(struct v4l2_subdev *sd,
 715                                struct v4l2_dbg_chip_ident *id)
 716 {
 717         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 718
 719         id->ident    = priv->model;
 720         id->revision = 0;
 721
 722         return 0;
 723 }
 724
 725 #ifdef CONFIG_VIDEO_ADV_DEBUG
 726 static int ov772x_g_register(struct v4l2_subdev *sd,
 727                              struct v4l2_dbg_register *reg)
 728 {
 729         struct i2c_client *client = v4l2_get_subdevdata(sd);
 730         int ret;
 731
 732         reg->size = 1;
 733         if (reg->reg > 0xff)
 734                 return -EINVAL;
 735
 736         ret = i2c_smbus_read_byte_data(client, reg->reg);
 737         if (ret < 0)
 738                 return ret;
 739
 740         reg->val = (__u64)ret;
 741
 742         return 0;
 743 }
 744
 745 static int ov772x_s_register(struct v4l2_subdev *sd,
 746                              struct v4l2_dbg_register *reg)
 747 {
 748         struct i2c_client *client = v4l2_get_subdevdata(sd);
 749
 750         if (reg->reg > 0xff ||
 751             reg->val > 0xff)
 752                 return -EINVAL;
 753
 754         return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
 755 }
 756 #endif
 757
 758 static const struct ov772x_win_size *ov772x_select_win(u32 width, u32 height)
 759 {
 760         __u32 diff;
 761         const struct ov772x_win_size *win;
 762
 763         /* default is QVGA */
 764         diff = abs(width - ov772x_win_qvga.width) +
 765                 abs(height - ov772x_win_qvga.height);
 766         win = &ov772x_win_qvga;
 767
 768         /* VGA */
 769         if (diff >
 770             abs(width  - ov772x_win_vga.width) +
 771             abs(height - ov772x_win_vga.height))
 772                 win = &ov772x_win_vga;
 773
 774         return win;
 775 }
 776
 777 static int ov772x_set_params(struct i2c_client *client, u32 *width, u32 *height,
 778                              enum v4l2_mbus_pixelcode code)
 779 {
 780         struct ov772x_priv *priv = to_ov772x(client);
 781         int ret = -EINVAL;
 782         u8  val;
 783         int i;
 784
 785         /*
 786          * select format
 787          */
 788         priv->cfmt = NULL;
 789         for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++) {
 790                 if (code == ov772x_cfmts[i].code) {
 791                         priv->cfmt = ov772x_cfmts + i;
 792                         break;
 793                 }
 794         }
 795         if (!priv->cfmt)
 796                 goto ov772x_set_fmt_error;
 797
 798         /*
 799          * select win
 800          */
 801         priv->win = ov772x_select_win(*width, *height);
 802
 803         /*
 804          * reset hardware
 805          */
 806         ov772x_reset(client);
 807
 808         /*
 809          * Edge Ctrl
 810          */
 811         if (priv->info->edgectrl.strength & OV772X_MANUAL_EDGE_CTRL) {
 812
 813                 /*
 814                  * Manual Edge Control Mode
 815                  *
 816                  * Edge auto strength bit is set by default.
 817                  * Remove it when manual mode.
 818                  */
 819
 820                 ret = ov772x_mask_set(client, DSPAUTO, EDGE_ACTRL, 0x00);
 821                 if (ret < 0)
 822                         goto ov772x_set_fmt_error;
 823
 824                 ret = ov772x_mask_set(client,
 825                                       EDGE_TRSHLD, EDGE_THRESHOLD_MASK,
 826                                       priv->info->edgectrl.threshold);
 827                 if (ret < 0)
 828                         goto ov772x_set_fmt_error;
 829
 830                 ret = ov772x_mask_set(client,
 831                                       EDGE_STRNGT, EDGE_STRENGTH_MASK,
 832                                       priv->info->edgectrl.strength);
 833                 if (ret < 0)
 834                         goto ov772x_set_fmt_error;
 835
 836         } else if (priv->info->edgectrl.upper > priv->info->edgectrl.lower) {
 837                 /*
 838                  * Auto Edge Control Mode
 839                  *
 840                  * set upper and lower limit
 841                  */
 842                 ret = ov772x_mask_set(client,
 843                                       EDGE_UPPER, EDGE_UPPER_MASK,
 844                                       priv->info->edgectrl.upper);
 845                 if (ret < 0)
 846                         goto ov772x_set_fmt_error;
 847
 848                 ret = ov772x_mask_set(client,
 849                                       EDGE_LOWER, EDGE_LOWER_MASK,
 850                                       priv->info->edgectrl.lower);
 851                 if (ret < 0)
 852                         goto ov772x_set_fmt_error;
 853         }
 854
 855         /*
 856          * set size format
 857          */
 858         ret = ov772x_write_array(client, priv->win->regs);
 859         if (ret < 0)
 860                 goto ov772x_set_fmt_error;
 861
 862         /*
 863          * set DSP_CTRL3
 864          */
 865         val = priv->cfmt->dsp3;
 866         if (val) {
 867                 ret = ov772x_mask_set(client,
 868                                       DSP_CTRL3, UV_MASK, val);
 869                 if (ret < 0)
 870                         goto ov772x_set_fmt_error;
 871         }
 872
 873         /*
 874          * set COM3
 875          */
 876         val = priv->cfmt->com3;
 877         if (priv->info->flags & OV772X_FLAG_VFLIP)
 878                 val |= VFLIP_IMG;
 879         if (priv->info->flags & OV772X_FLAG_HFLIP)
 880                 val |= HFLIP_IMG;
 881         if (priv->flag_vflip)
 882                 val ^= VFLIP_IMG;
 883         if (priv->flag_hflip)
 884                 val ^= HFLIP_IMG;
 885
 886         ret = ov772x_mask_set(client,
 887                               COM3, SWAP_MASK | IMG_MASK, val);
 888         if (ret < 0)
 889                 goto ov772x_set_fmt_error;
 890
 891         /*
 892          * set COM7
 893          */
 894         val = priv->win->com7_bit | priv->cfmt->com7;
 895         ret = ov772x_mask_set(client,
 896                               COM7, SLCT_MASK | FMT_MASK | OFMT_MASK,
 897                               val);
 898         if (ret < 0)
 899                 goto ov772x_set_fmt_error;
 900
 901         /*
 902          * set COM8
 903          */
 904         if (priv->band_filter) {
 905                 ret = ov772x_mask_set(client, COM8, BNDF_ON_OFF, 1);
 906                 if (!ret)
 907                         ret = ov772x_mask_set(client, BDBASE,
 908                                               0xff, 256 - priv->band_filter);
 909                 if (ret < 0)
 910                         goto ov772x_set_fmt_error;
 911         }
 912
 913         *width = priv->win->width;
 914         *height = priv->win->height;
 915
 916         return ret;
 917
 918 ov772x_set_fmt_error:
 919
 920         ov772x_reset(client);
 921         priv->win = NULL;
 922         priv->cfmt = NULL;
 923
 924         return ret;
 925 }
 926
 927 static int ov772x_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
 928 {
 929         a->c.left       = 0;
 930         a->c.top        = 0;
 931         a->c.width      = VGA_WIDTH;
 932         a->c.height     = VGA_HEIGHT;
 933         a->type         = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 934
 935         return 0;
 936 }
 937
 938 static int ov772x_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
 939 {
 940         a->bounds.left                  = 0;
 941         a->bounds.top                   = 0;
 942         a->bounds.width                 = VGA_WIDTH;
 943         a->bounds.height                = VGA_HEIGHT;
 944         a->defrect                      = a->bounds;
 945         a->type                         = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 946         a->pixelaspect.numerator        = 1;
 947         a->pixelaspect.denominator      = 1;
 948
 949         return 0;
 950 }
 951
 952 static int ov772x_g_fmt(struct v4l2_subdev *sd,
 953                         struct v4l2_mbus_framefmt *mf)
 954 {
 955         struct i2c_client *client = v4l2_get_subdevdata(sd);
 956         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 957
 958         if (!priv->win || !priv->cfmt) {
 959                 u32 width = VGA_WIDTH, height = VGA_HEIGHT;
 960                 int ret = ov772x_set_params(client, &width, &height,
 961                                             V4L2_MBUS_FMT_YUYV8_2X8);
 962                 if (ret < 0)
 963                         return ret;
 964         }
 965
 966         mf->width       = priv->win->width;
 967         mf->height      = priv->win->height;
 968         mf->code        = priv->cfmt->code;
 969         mf->colorspace  = priv->cfmt->colorspace;
 970         mf->field       = V4L2_FIELD_NONE;
 971
 972         return 0;
 973 }
 974
 975 static int ov772x_s_fmt(struct v4l2_subdev *sd,
 976                         struct v4l2_mbus_framefmt *mf)
 977 {
 978         struct i2c_client *client = v4l2_get_subdevdata(sd);
 979         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 980         int ret = ov772x_set_params(client, &mf->width, &mf->height,
 981                                     mf->code);
 982
 983         if (!ret)
 984                 mf->colorspace = priv->cfmt->colorspace;
 985
 986         return ret;
 987 }
 988
 989 static int ov772x_try_fmt(struct v4l2_subdev *sd,
 990                           struct v4l2_mbus_framefmt *mf)
 991 {
 992         struct ov772x_priv *priv = container_of(sd, struct ov772x_priv, subdev);
 993         const struct ov772x_win_size *win;
 994         int i;
 995
 996         /*
 997          * select suitable win
 998          */
 999         win = ov772x_select_win(mf->width, mf->height);
1000
1001         mf->width       = win->width;
1002         mf->height      = win->height;
1003         mf->field       = V4L2_FIELD_NONE;
1004
1005         for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++)
1006                 if (mf->code == ov772x_cfmts[i].code)
1007                         break;
1008
1009         if (i == ARRAY_SIZE(ov772x_cfmts)) {
1010                 /* Unsupported format requested. Propose either */
1011                 if (priv->cfmt) {
1012                         /* the current one or */
1013                         mf->colorspace = priv->cfmt->colorspace;
1014                         mf->code = priv->cfmt->code;
1015                 } else {
1016                         /* the default one */
1017                         mf->colorspace = ov772x_cfmts[0].colorspace;
1018                         mf->code = ov772x_cfmts[0].code;
1019                 }
1020         } else {
1021                 /* Also return the colorspace */
1022                 mf->colorspace  = ov772x_cfmts[i].colorspace;
1023         }
1024
1025         return 0;
1026 }
1027
1028 static int ov772x_video_probe(struct soc_camera_device *icd,
1029                               struct i2c_client *client)
1030 {
1031         struct ov772x_priv *priv = to_ov772x(client);
1032         u8                  pid, ver;
1033         const char         *devname;
1034
1035         /* We must have a parent by now. And it cannot be a wrong one. */
1036         BUG_ON(!icd->parent ||
1037                to_soc_camera_host(icd->parent)->nr != icd->iface);
1038
1039         /*
1040          * check and show product ID and manufacturer ID
1041          */
1042         pid = i2c_smbus_read_byte_data(client, PID);
1043         ver = i2c_smbus_read_byte_data(client, VER);
1044
1045         switch (VERSION(pid, ver)) {
1046         case OV7720:
1047                 devname     = "ov7720";
1048                 priv->model = V4L2_IDENT_OV7720;
1049                 break;
1050         case OV7725:
1051                 devname     = "ov7725";
1052                 priv->model = V4L2_IDENT_OV7725;
1053                 break;
1054         default:
1055                 dev_err(&client->dev,
1056                         "Product ID error %x:%x\n", pid, ver);
1057                 return -ENODEV;
1058         }
1059
1060         dev_info(&client->dev,
1061                  "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
1062                  devname,
1063                  pid,
1064                  ver,
1065                  i2c_smbus_read_byte_data(client, MIDH),
1066                  i2c_smbus_read_byte_data(client, MIDL));
1067
1068         return 0;
1069 }
1070
1071 static struct soc_camera_ops ov772x_ops = {
1072         .set_bus_param          = ov772x_set_bus_param,
1073         .query_bus_param        = ov772x_query_bus_param,
1074         .controls               = ov772x_controls,
1075         .num_controls           = ARRAY_SIZE(ov772x_controls),
1076 };
1077
1078 static struct v4l2_subdev_core_ops ov772x_subdev_core_ops = {
1079         .g_ctrl         = ov772x_g_ctrl,
1080         .s_ctrl         = ov772x_s_ctrl,
1081         .g_chip_ident   = ov772x_g_chip_ident,
1082 #ifdef CONFIG_VIDEO_ADV_DEBUG
1083         .g_register     = ov772x_g_register,
1084         .s_register     = ov772x_s_register,
1085 #endif
1086 };
1087
1088 static int ov772x_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
1089                            enum v4l2_mbus_pixelcode *code)
1090 {
1091         if (index >= ARRAY_SIZE(ov772x_cfmts))
1092                 return -EINVAL;
1093
1094         *code = ov772x_cfmts[index].code;
1095         return 0;
1096 }
1097
1098 static struct v4l2_subdev_video_ops ov772x_subdev_video_ops = {
1099         .s_stream       = ov772x_s_stream,
1100         .g_mbus_fmt     = ov772x_g_fmt,
1101         .s_mbus_fmt     = ov772x_s_fmt,
1102         .try_mbus_fmt   = ov772x_try_fmt,
1103         .cropcap        = ov772x_cropcap,
1104         .g_crop         = ov772x_g_crop,
1105         .enum_mbus_fmt  = ov772x_enum_fmt,
1106 };
1107
1108 static struct v4l2_subdev_ops ov772x_subdev_ops = {
1109         .core   = &ov772x_subdev_core_ops,
1110         .video  = &ov772x_subdev_video_ops,
1111 };
1112
1113 /*
1114  * i2c_driver function
1115  */
1116
1117 static int ov772x_probe(struct i2c_client *client,
1118                         const struct i2c_device_id *did)
1119 {
1120         struct ov772x_priv        *priv;
1121         struct soc_camera_device  *icd = client->dev.platform_data;
1122         struct i2c_adapter        *adapter = to_i2c_adapter(client->dev.parent);
1123         struct soc_camera_link    *icl;
1124         int                        ret;
1125
1126         if (!icd) {
1127                 dev_err(&client->dev, "OV772X: missing soc-camera data!\n");
1128                 return -EINVAL;
1129         }
1130
1131         icl = to_soc_camera_link(icd);
1132         if (!icl || !icl->priv)
1133                 return -EINVAL;
1134
1135         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1136                 dev_err(&adapter->dev,
1137                         "I2C-Adapter doesn't support "
1138                         "I2C_FUNC_SMBUS_BYTE_DATA\n");
1139                 return -EIO;
1140         }
1141
1142         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1143         if (!priv)
1144                 return -ENOMEM;
1145
1146         priv->info = icl->priv;
1147
1148         v4l2_i2c_subdev_init(&priv->subdev, client, &ov772x_subdev_ops);
1149
1150         icd->ops                = &ov772x_ops;
1151
1152         ret = ov772x_video_probe(icd, client);
1153         if (ret) {
1154                 icd->ops = NULL;
1155                 kfree(priv);
1156         }
1157
1158         return ret;
1159 }
1160
1161 static int ov772x_remove(struct i2c_client *client)
1162 {
1163         struct ov772x_priv *priv = to_ov772x(client);
1164         struct soc_camera_device *icd = client->dev.platform_data;
1165
1166         icd->ops = NULL;
1167         kfree(priv);
1168         return 0;
1169 }
1170
1171 static const struct i2c_device_id ov772x_id[] = {
1172         { "ov772x", 0 },
1173         { }
1174 };
1175 MODULE_DEVICE_TABLE(i2c, ov772x_id);
1176
1177 static struct i2c_driver ov772x_i2c_driver = {
1178         .driver = {
1179                 .name = "ov772x",
1180         },
1181         .probe    = ov772x_probe,
1182         .remove   = ov772x_remove,
1183         .id_table = ov772x_id,
1184 };
1185
1186 /*
1187  * module function
1188  */
1189
1190 static int __init ov772x_module_init(void)
1191 {
1192         return i2c_add_driver(&ov772x_i2c_driver);
1193 }
1194
1195 static void __exit ov772x_module_exit(void)
1196 {
1197         i2c_del_driver(&ov772x_i2c_driver);
1198 }
1199
1200 module_init(ov772x_module_init);
1201 module_exit(ov772x_module_exit);
1202
1203 MODULE_DESCRIPTION("SoC Camera driver for ov772x");
1204 MODULE_AUTHOR("Kuninori Morimoto");
1205 MODULE_LICENSE("GPL v2");