[PATCH] Fix atomicity of TIF update in flush_thread() for x86_64
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86_64 / kernel / setup64.c
blob6a70b55f719d7cb47a463b3d8c638f7aae378c25
1 /*
2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 */
7 #include <linux/init.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/string.h>
11 #include <linux/bootmem.h>
12 #include <linux/bitops.h>
13 #include <linux/module.h>
14 #include <asm/bootsetup.h>
15 #include <asm/pda.h>
16 #include <asm/pgtable.h>
17 #include <asm/processor.h>
18 #include <asm/desc.h>
19 #include <asm/atomic.h>
20 #include <asm/mmu_context.h>
21 #include <asm/smp.h>
22 #include <asm/i387.h>
23 #include <asm/percpu.h>
24 #include <asm/proto.h>
25 #include <asm/sections.h>
27 char x86_boot_params[BOOT_PARAM_SIZE] __initdata;
29 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
31 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
32 EXPORT_SYMBOL(_cpu_pda);
33 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
35 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
37 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
39 unsigned long __supported_pte_mask __read_mostly = ~0UL;
40 static int do_not_nx __cpuinitdata = 0;
42 /* noexec=on|off
43 Control non executable mappings for 64bit processes.
45 on Enable(default)
46 off Disable
47 */
48 static int __init nonx_setup(char *str)
50 if (!str)
51 return -EINVAL;
52 if (!strncmp(str, "on", 2)) {
53 __supported_pte_mask |= _PAGE_NX;
54 do_not_nx = 0;
55 } else if (!strncmp(str, "off", 3)) {
56 do_not_nx = 1;
57 __supported_pte_mask &= ~_PAGE_NX;
59 return 0;
61 early_param("noexec", nonx_setup);
63 int force_personality32 = 0;
65 /* noexec32=on|off
66 Control non executable heap for 32bit processes.
67 To control the stack too use noexec=off
69 on PROT_READ does not imply PROT_EXEC for 32bit processes
70 off PROT_READ implies PROT_EXEC (default)
72 static int __init nonx32_setup(char *str)
74 if (!strcmp(str, "on"))
75 force_personality32 &= ~READ_IMPLIES_EXEC;
76 else if (!strcmp(str, "off"))
77 force_personality32 |= READ_IMPLIES_EXEC;
78 return 1;
80 __setup("noexec32=", nonx32_setup);
83 * Great future plan:
84 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
85 * Always point %gs to its beginning
87 void __init setup_per_cpu_areas(void)
89 int i;
90 unsigned long size;
92 #ifdef CONFIG_HOTPLUG_CPU
93 prefill_possible_map();
94 #endif
96 /* Copy section for each CPU (we discard the original) */
97 size = PERCPU_ENOUGH_ROOM;
99 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
100 for_each_cpu_mask (i, cpu_possible_map) {
101 char *ptr;
103 if (!NODE_DATA(cpu_to_node(i))) {
104 printk("cpu with no node %d, num_online_nodes %d\n",
105 i, num_online_nodes());
106 ptr = alloc_bootmem(size);
107 } else {
108 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
110 if (!ptr)
111 panic("Cannot allocate cpu data for CPU %d\n", i);
112 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
113 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
117 void pda_init(int cpu)
119 struct x8664_pda *pda = cpu_pda(cpu);
121 /* Setup up data that may be needed in __get_free_pages early */
122 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
123 /* Memory clobbers used to order PDA accessed */
124 mb();
125 wrmsrl(MSR_GS_BASE, pda);
126 mb();
128 pda->cpunumber = cpu;
129 pda->irqcount = -1;
130 pda->kernelstack =
131 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
132 pda->active_mm = &init_mm;
133 pda->mmu_state = 0;
135 if (cpu == 0) {
136 /* others are initialized in smpboot.c */
137 pda->pcurrent = &init_task;
138 pda->irqstackptr = boot_cpu_stack;
139 } else {
140 pda->irqstackptr = (char *)
141 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
142 if (!pda->irqstackptr)
143 panic("cannot allocate irqstack for cpu %d", cpu);
147 pda->irqstackptr += IRQSTACKSIZE-64;
150 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
151 __attribute__((section(".bss.page_aligned")));
153 /* May not be marked __init: used by software suspend */
154 void syscall_init(void)
157 * LSTAR and STAR live in a bit strange symbiosis.
158 * They both write to the same internal register. STAR allows to set CS/DS
159 * but only a 32bit target. LSTAR sets the 64bit rip.
161 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
162 wrmsrl(MSR_LSTAR, system_call);
164 #ifdef CONFIG_IA32_EMULATION
165 syscall32_cpu_init ();
166 #endif
168 /* Flags to clear on syscall */
169 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
172 void __cpuinit check_efer(void)
174 unsigned long efer;
176 rdmsrl(MSR_EFER, efer);
177 if (!(efer & EFER_NX) || do_not_nx) {
178 __supported_pte_mask &= ~_PAGE_NX;
182 unsigned long kernel_eflags;
185 * cpu_init() initializes state that is per-CPU. Some data is already
186 * initialized (naturally) in the bootstrap process, such as the GDT
187 * and IDT. We reload them nevertheless, this function acts as a
188 * 'CPU state barrier', nothing should get across.
189 * A lot of state is already set up in PDA init.
191 void __cpuinit cpu_init (void)
193 int cpu = stack_smp_processor_id();
194 struct tss_struct *t = &per_cpu(init_tss, cpu);
195 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
196 unsigned long v;
197 char *estacks = NULL;
198 struct task_struct *me;
199 int i;
201 /* CPU 0 is initialised in head64.c */
202 if (cpu != 0) {
203 pda_init(cpu);
204 zap_low_mappings(cpu);
205 } else
206 estacks = boot_exception_stacks;
208 me = current;
210 if (cpu_test_and_set(cpu, cpu_initialized))
211 panic("CPU#%d already initialized!\n", cpu);
213 printk("Initializing CPU#%d\n", cpu);
215 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
218 * Initialize the per-CPU GDT with the boot GDT,
219 * and set up the GDT descriptor:
221 if (cpu)
222 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
224 cpu_gdt_descr[cpu].size = GDT_SIZE;
225 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
226 asm volatile("lidt %0" :: "m" (idt_descr));
228 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
229 syscall_init();
231 wrmsrl(MSR_FS_BASE, 0);
232 wrmsrl(MSR_KERNEL_GS_BASE, 0);
233 barrier();
235 check_efer();
238 * set up and load the per-CPU TSS
240 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
241 static const unsigned int order[N_EXCEPTION_STACKS] = {
242 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
243 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
245 if (cpu) {
246 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
247 if (!estacks)
248 panic("Cannot allocate exception stack %ld %d\n",
249 v, cpu);
251 estacks += PAGE_SIZE << order[v];
252 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
255 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
257 * <= is required because the CPU will access up to
258 * 8 bits beyond the end of the IO permission bitmap.
260 for (i = 0; i <= IO_BITMAP_LONGS; i++)
261 t->io_bitmap[i] = ~0UL;
263 atomic_inc(&init_mm.mm_count);
264 me->active_mm = &init_mm;
265 if (me->mm)
266 BUG();
267 enter_lazy_tlb(&init_mm, me);
269 set_tss_desc(cpu, t);
270 load_TR_desc();
271 load_LDT(&init_mm.context);
274 * Clear all 6 debug registers:
277 set_debugreg(0UL, 0);
278 set_debugreg(0UL, 1);
279 set_debugreg(0UL, 2);
280 set_debugreg(0UL, 3);
281 set_debugreg(0UL, 6);
282 set_debugreg(0UL, 7);
284 fpu_init();
286 raw_local_save_flags(kernel_eflags);