arch/powerpc/platforms/pseries/xics.c

   1 /*
   2  * arch/powerpc/platforms/pseries/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11
  12
  13 #include <linux/types.h>
  14 #include <linux/threads.h>
  15 #include <linux/kernel.h>
  16 #include <linux/irq.h>
  17 #include <linux/smp.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/signal.h>
  20 #include <linux/init.h>
  21 #include <linux/gfp.h>
  22 #include <linux/radix-tree.h>
  23 #include <linux/cpu.h>
  24
  25 #include <asm/firmware.h>
  26 #include <asm/prom.h>
  27 #include <asm/io.h>
  28 #include <asm/pgtable.h>
  29 #include <asm/smp.h>
  30 #include <asm/rtas.h>
  31 #include <asm/hvcall.h>
  32 #include <asm/machdep.h>
  33 #include <asm/i8259.h>
  34
  35 #include "xics.h"
  36 #include "plpar_wrappers.h"
  37
  38 #define XICS_IPI                2
  39 #define XICS_IRQ_SPURIOUS       0
  40
  41 /* Want a priority other than 0.  Various HW issues require this. */
  42 #define DEFAULT_PRIORITY        5
  43
  44 /*
  45  * Mark IPIs as higher priority so we can take them inside interrupts that
  46  * arent marked IRQF_DISABLED
  47  */
  48 #define IPI_PRIORITY            4
  49
  50 struct xics_ipl {
  51         union {
  52                 u32 word;
  53                 u8 bytes[4];
  54         } xirr_poll;
  55         union {
  56                 u32 word;
  57                 u8 bytes[4];
  58         } xirr;
  59         u32 dummy;
  60         union {
  61                 u32 word;
  62                 u8 bytes[4];
  63         } qirr;
  64 };
  65
  66 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  67
  68 static unsigned int default_server = 0xFF;
  69 static unsigned int default_distrib_server = 0;
  70 static unsigned int interrupt_server_size = 8;
  71
  72 static struct irq_host *xics_host;
  73
  74 /*
  75  * XICS only has a single IPI, so encode the messages per CPU
  76  */
  77 struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
  78
  79 /* RTAS service tokens */
  80 static int ibm_get_xive;
  81 static int ibm_set_xive;
  82 static int ibm_int_on;
  83 static int ibm_int_off;
  84
  85
  86 /* Direct HW low level accessors */
  87
  88
  89 static inline unsigned int direct_xirr_info_get(void)
  90 {
  91         int cpu = smp_processor_id();
  92
  93         return in_be32(&xics_per_cpu[cpu]->xirr.word);
  94 }
  95
  96 static inline void direct_xirr_info_set(int value)
  97 {
  98         int cpu = smp_processor_id();
  99
 100         out_be32(&xics_per_cpu[cpu]->xirr.word, value);
 101 }
 102
 103 static inline void direct_cppr_info(u8 value)
 104 {
 105         int cpu = smp_processor_id();
 106
 107         out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
 108 }
 109
 110 static inline void direct_qirr_info(int n_cpu, u8 value)
 111 {
 112         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 113 }
 114
 115
 116 /* LPAR low level accessors */
 117
 118
 119 static inline unsigned int lpar_xirr_info_get(void)
 120 {
 121         unsigned long lpar_rc;
 122         unsigned long return_value;
 123
 124         lpar_rc = plpar_xirr(&return_value);
 125         if (lpar_rc != H_SUCCESS)
 126                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 127         return (unsigned int)return_value;
 128 }
 129
 130 static inline void lpar_xirr_info_set(int value)
 131 {
 132         unsigned long lpar_rc;
 133         unsigned long val64 = value & 0xffffffff;
 134
 135         lpar_rc = plpar_eoi(val64);
 136         if (lpar_rc != H_SUCCESS)
 137                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
 138                       val64);
 139 }
 140
 141 static inline void lpar_cppr_info(u8 value)
 142 {
 143         unsigned long lpar_rc;
 144
 145         lpar_rc = plpar_cppr(value);
 146         if (lpar_rc != H_SUCCESS)
 147                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 148 }
 149
 150 static inline void lpar_qirr_info(int n_cpu , u8 value)
 151 {
 152         unsigned long lpar_rc;
 153
 154         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 155         if (lpar_rc != H_SUCCESS)
 156                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 157 }
 158
 159
 160 /* High level handlers and init code */
 161
 162 static void xics_update_irq_servers(void)
 163 {
 164         int i, j;
 165         struct device_node *np;
 166         u32 ilen;
 167         const u32 *ireg, *isize;
 168         u32 hcpuid;
 169
 170         /* Find the server numbers for the boot cpu. */
 171         np = of_get_cpu_node(boot_cpuid, NULL);
 172         BUG_ON(!np);
 173
 174         ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
 175         if (!ireg) {
 176                 of_node_put(np);
 177                 return;
 178         }
 179
 180         i = ilen / sizeof(int);
 181         hcpuid = get_hard_smp_processor_id(boot_cpuid);
 182
 183         /* Global interrupt distribution server is specified in the last
 184          * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
 185          * entry fom this property for current boot cpu id and use it as
 186          * default distribution server
 187          */
 188         for (j = 0; j < i; j += 2) {
 189                 if (ireg[j] == hcpuid) {
 190                         default_server = hcpuid;
 191                         default_distrib_server = ireg[j+1];
 192
 193                         isize = of_get_property(np,
 194                                         "ibm,interrupt-server#-size", NULL);
 195                         if (isize)
 196                                 interrupt_server_size = *isize;
 197                 }
 198         }
 199
 200         of_node_put(np);
 201 }
 202
 203 #ifdef CONFIG_SMP
 204 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 205 {
 206         int server;
 207         /* For the moment only implement delivery to all cpus or one cpu */
 208         cpumask_t cpumask = irq_desc[virq].affinity;
 209         cpumask_t tmp = CPU_MASK_NONE;
 210
 211         if (!distribute_irqs)
 212                 return default_server;
 213
 214         if (!cpus_equal(cpumask, CPU_MASK_ALL)) {
 215                 cpus_and(tmp, cpu_online_map, cpumask);
 216
 217                 server = first_cpu(tmp);
 218
 219                 if (server < NR_CPUS)
 220                         return get_hard_smp_processor_id(server);
 221
 222                 if (strict_check)
 223                         return -1;
 224         }
 225
 226         if (cpus_equal(cpu_online_map, cpu_present_map))
 227                 return default_distrib_server;
 228
 229         return default_server;
 230 }
 231 #else
 232 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 233 {
 234         return default_server;
 235 }
 236 #endif
 237
 238
 239 static void xics_unmask_irq(unsigned int virq)
 240 {
 241         unsigned int irq;
 242         int call_status;
 243         int server;
 244
 245         pr_debug("xics: unmask virq %d\n", virq);
 246
 247         irq = (unsigned int)irq_map[virq].hwirq;
 248         pr_debug(" -> map to hwirq 0x%x\n", irq);
 249         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 250                 return;
 251
 252         server = get_irq_server(virq, 0);
 253
 254         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 255                                 DEFAULT_PRIORITY);
 256         if (call_status != 0) {
 257                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
 258                        "returned %d\n", irq, call_status);
 259                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
 260                 return;
 261         }
 262
 263         /* Now unmask the interrupt (often a no-op) */
 264         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 265         if (call_status != 0) {
 266                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
 267                        "returned %d\n", irq, call_status);
 268                 return;
 269         }
 270 }
 271
 272 static void xics_mask_real_irq(unsigned int irq)
 273 {
 274         int call_status;
 275
 276         if (irq == XICS_IPI)
 277                 return;
 278
 279         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 280         if (call_status != 0) {
 281                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
 282                        "ibm_int_off returned %d\n", irq, call_status);
 283                 return;
 284         }
 285
 286         /* Have to set XIVE to 0xff to be able to remove a slot */
 287         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
 288                                 default_server, 0xff);
 289         if (call_status != 0) {
 290                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
 291                        " returned %d\n", irq, call_status);
 292                 return;
 293         }
 294 }
 295
 296 static void xics_mask_irq(unsigned int virq)
 297 {
 298         unsigned int irq;
 299
 300         pr_debug("xics: mask virq %d\n", virq);
 301
 302         irq = (unsigned int)irq_map[virq].hwirq;
 303         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 304                 return;
 305         xics_mask_real_irq(irq);
 306 }
 307
 308 static unsigned int xics_startup(unsigned int virq)
 309 {
 310         /* unmask it */
 311         xics_unmask_irq(virq);
 312         return 0;
 313 }
 314
 315 static void xics_eoi_direct(unsigned int virq)
 316 {
 317         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 318
 319         iosync();
 320         direct_xirr_info_set((0xff << 24) | irq);
 321 }
 322
 323
 324 static void xics_eoi_lpar(unsigned int virq)
 325 {
 326         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 327
 328         iosync();
 329         lpar_xirr_info_set((0xff << 24) | irq);
 330 }
 331
 332 static inline unsigned int xics_xirr_vector(unsigned int xirr)
 333 {
 334         /*
 335          * The top byte is the old cppr, to be restored on EOI.
 336          * The remaining 24 bits are the vector.
 337          */
 338         return xirr & 0x00ffffff;
 339 }
 340
 341 static void xics_mask_unknown_vec(unsigned int vec)
 342 {
 343         printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
 344         xics_mask_real_irq(vec);
 345 }
 346
 347 static unsigned int xics_get_irq_direct(void)
 348 {
 349         unsigned int xirr = direct_xirr_info_get();
 350         unsigned int vec = xics_xirr_vector(xirr);
 351         unsigned int irq;
 352
 353         if (vec == XICS_IRQ_SPURIOUS)
 354                 return NO_IRQ;
 355
 356         irq = irq_radix_revmap_lookup(xics_host, vec);
 357         if (likely(irq != NO_IRQ))
 358                 return irq;
 359
 360         /* We don't have a linux mapping, so have rtas mask it. */
 361         xics_mask_unknown_vec(vec);
 362
 363         /* We might learn about it later, so EOI it */
 364         direct_xirr_info_set(xirr);
 365         return NO_IRQ;
 366 }
 367
 368 static unsigned int xics_get_irq_lpar(void)
 369 {
 370         unsigned int xirr = lpar_xirr_info_get();
 371         unsigned int vec = xics_xirr_vector(xirr);
 372         unsigned int irq;
 373
 374         if (vec == XICS_IRQ_SPURIOUS)
 375                 return NO_IRQ;
 376
 377         irq = irq_radix_revmap_lookup(xics_host, vec);
 378         if (likely(irq != NO_IRQ))
 379                 return irq;
 380
 381         /* We don't have a linux mapping, so have RTAS mask it. */
 382         xics_mask_unknown_vec(vec);
 383
 384         /* We might learn about it later, so EOI it */
 385         lpar_xirr_info_set(xirr);
 386         return NO_IRQ;
 387 }
 388
 389 #ifdef CONFIG_SMP
 390
 391 static irqreturn_t xics_ipi_dispatch(int cpu)
 392 {
 393         WARN_ON(cpu_is_offline(cpu));
 394
 395         while (xics_ipi_message[cpu].value) {
 396                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 397                                        &xics_ipi_message[cpu].value)) {
 398                         mb();
 399                         smp_message_recv(PPC_MSG_CALL_FUNCTION);
 400                 }
 401                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 402                                        &xics_ipi_message[cpu].value)) {
 403                         mb();
 404                         smp_message_recv(PPC_MSG_RESCHEDULE);
 405                 }
 406                 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
 407                                        &xics_ipi_message[cpu].value)) {
 408                         mb();
 409                         smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
 410                 }
 411 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 412                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 413                                        &xics_ipi_message[cpu].value)) {
 414                         mb();
 415                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 416                 }
 417 #endif
 418         }
 419         return IRQ_HANDLED;
 420 }
 421
 422 static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
 423 {
 424         int cpu = smp_processor_id();
 425
 426         direct_qirr_info(cpu, 0xff);
 427
 428         return xics_ipi_dispatch(cpu);
 429 }
 430
 431 static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
 432 {
 433         int cpu = smp_processor_id();
 434
 435         lpar_qirr_info(cpu, 0xff);
 436
 437         return xics_ipi_dispatch(cpu);
 438 }
 439
 440 void xics_cause_IPI(int cpu)
 441 {
 442         if (firmware_has_feature(FW_FEATURE_LPAR))
 443                 lpar_qirr_info(cpu, IPI_PRIORITY);
 444         else
 445                 direct_qirr_info(cpu, IPI_PRIORITY);
 446 }
 447
 448 #endif /* CONFIG_SMP */
 449
 450 static void xics_set_cpu_priority(unsigned char cppr)
 451 {
 452         if (firmware_has_feature(FW_FEATURE_LPAR))
 453                 lpar_cppr_info(cppr);
 454         else
 455                 direct_cppr_info(cppr);
 456         iosync();
 457 }
 458
 459 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
 460 {
 461         unsigned int irq;
 462         int status;
 463         int xics_status[2];
 464         int irq_server;
 465
 466         irq = (unsigned int)irq_map[virq].hwirq;
 467         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 468                 return;
 469
 470         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 471
 472         if (status) {
 473                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
 474                        "returns %d\n", irq, status);
 475                 return;
 476         }
 477
 478         /*
 479          * For the moment only implement delivery to all cpus or one cpu.
 480          * Get current irq_server for the given irq
 481          */
 482         irq_server = get_irq_server(virq, 1);
 483         if (irq_server == -1) {
 484                 char cpulist[128];
 485                 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
 486                 printk(KERN_WARNING "xics_set_affinity: No online cpus in "
 487                                 "the mask %s for irq %d\n", cpulist, virq);
 488                 return;
 489         }
 490
 491         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 492                                 irq, irq_server, xics_status[1]);
 493
 494         if (status) {
 495                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
 496                        "returns %d\n", irq, status);
 497                 return;
 498         }
 499 }
 500
 501 void xics_setup_cpu(void)
 502 {
 503         xics_set_cpu_priority(0xff);
 504
 505         /*
 506          * Put the calling processor into the GIQ.  This is really only
 507          * necessary from a secondary thread as the OF start-cpu interface
 508          * performs this function for us on primary threads.
 509          *
 510          * XXX: undo of teardown on kexec needs this too, as may hotplug
 511          */
 512         rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 513                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
 514 }
 515
 516
 517 static struct irq_chip xics_pic_direct = {
 518         .typename = " XICS     ",
 519         .startup = xics_startup,
 520         .mask = xics_mask_irq,
 521         .unmask = xics_unmask_irq,
 522         .eoi = xics_eoi_direct,
 523         .set_affinity = xics_set_affinity
 524 };
 525
 526
 527 static struct irq_chip xics_pic_lpar = {
 528         .typename = " XICS     ",
 529         .startup = xics_startup,
 530         .mask = xics_mask_irq,
 531         .unmask = xics_unmask_irq,
 532         .eoi = xics_eoi_lpar,
 533         .set_affinity = xics_set_affinity
 534 };
 535
 536 /* Points to the irq_chip we're actually using */
 537 static struct irq_chip *xics_irq_chip;
 538
 539 static int xics_host_match(struct irq_host *h, struct device_node *node)
 540 {
 541         /* IBM machines have interrupt parents of various funky types for things
 542          * like vdevices, events, etc... The trick we use here is to match
 543          * everything here except the legacy 8259 which is compatible "chrp,iic"
 544          */
 545         return !of_device_is_compatible(node, "chrp,iic");
 546 }
 547
 548 static int xics_host_map(struct irq_host *h, unsigned int virq,
 549                          irq_hw_number_t hw)
 550 {
 551         pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
 552
 553         /* Insert the interrupt mapping into the radix tree for fast lookup */
 554         irq_radix_revmap_insert(xics_host, virq, hw);
 555
 556         get_irq_desc(virq)->status |= IRQ_LEVEL;
 557         set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
 558         return 0;
 559 }
 560
 561 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
 562                            u32 *intspec, unsigned int intsize,
 563                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 564
 565 {
 566         /* Current xics implementation translates everything
 567          * to level. It is not technically right for MSIs but this
 568          * is irrelevant at this point. We might get smarter in the future
 569          */
 570         *out_hwirq = intspec[0];
 571         *out_flags = IRQ_TYPE_LEVEL_LOW;
 572
 573         return 0;
 574 }
 575
 576 static struct irq_host_ops xics_host_ops = {
 577         .match = xics_host_match,
 578         .map = xics_host_map,
 579         .xlate = xics_host_xlate,
 580 };
 581
 582 static void __init xics_init_host(void)
 583 {
 584         if (firmware_has_feature(FW_FEATURE_LPAR))
 585                 xics_irq_chip = &xics_pic_lpar;
 586         else
 587                 xics_irq_chip = &xics_pic_direct;
 588
 589         xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
 590                                    XICS_IRQ_SPURIOUS);
 591         BUG_ON(xics_host == NULL);
 592         irq_set_default_host(xics_host);
 593 }
 594
 595 static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
 596                                      unsigned long size)
 597 {
 598 #ifdef CONFIG_SMP
 599         int i;
 600
 601         /* This may look gross but it's good enough for now, we don't quite
 602          * have a hard -> linux processor id matching.
 603          */
 604         for_each_possible_cpu(i) {
 605                 if (!cpu_present(i))
 606                         continue;
 607                 if (hw_id == get_hard_smp_processor_id(i)) {
 608                         xics_per_cpu[i] = ioremap(addr, size);
 609                         return;
 610                 }
 611         }
 612 #else
 613         if (hw_id != 0)
 614                 return;
 615         xics_per_cpu[0] = ioremap(addr, size);
 616 #endif /* CONFIG_SMP */
 617 }
 618
 619 static void __init xics_init_one_node(struct device_node *np,
 620                                       unsigned int *indx)
 621 {
 622         unsigned int ilen;
 623         const u32 *ireg;
 624
 625         /* This code does the theorically broken assumption that the interrupt
 626          * server numbers are the same as the hard CPU numbers.
 627          * This happens to be the case so far but we are playing with fire...
 628          * should be fixed one of these days. -BenH.
 629          */
 630         ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
 631
 632         /* Do that ever happen ? we'll know soon enough... but even good'old
 633          * f80 does have that property ..
 634          */
 635         WARN_ON(ireg == NULL);
 636         if (ireg) {
 637                 /*
 638                  * set node starting index for this node
 639                  */
 640                 *indx = *ireg;
 641         }
 642         ireg = of_get_property(np, "reg", &ilen);
 643         if (!ireg)
 644                 panic("xics_init_IRQ: can't find interrupt reg property");
 645
 646         while (ilen >= (4 * sizeof(u32))) {
 647                 unsigned long addr, size;
 648
 649                 /* XXX Use proper OF parsing code here !!! */
 650                 addr = (unsigned long)*ireg++ << 32;
 651                 ilen -= sizeof(u32);
 652                 addr |= *ireg++;
 653                 ilen -= sizeof(u32);
 654                 size = (unsigned long)*ireg++ << 32;
 655                 ilen -= sizeof(u32);
 656                 size |= *ireg++;
 657                 ilen -= sizeof(u32);
 658                 xics_map_one_cpu(*indx, addr, size);
 659                 (*indx)++;
 660         }
 661 }
 662
 663 void __init xics_init_IRQ(void)
 664 {
 665         struct device_node *np;
 666         u32 indx = 0;
 667         int found = 0;
 668
 669         ppc64_boot_msg(0x20, "XICS Init");
 670
 671         ibm_get_xive = rtas_token("ibm,get-xive");
 672         ibm_set_xive = rtas_token("ibm,set-xive");
 673         ibm_int_on  = rtas_token("ibm,int-on");
 674         ibm_int_off = rtas_token("ibm,int-off");
 675
 676         for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
 677                 found = 1;
 678                 if (firmware_has_feature(FW_FEATURE_LPAR))
 679                         break;
 680                 xics_init_one_node(np, &indx);
 681         }
 682         if (found == 0)
 683                 return;
 684
 685         xics_update_irq_servers();
 686         xics_init_host();
 687
 688         if (firmware_has_feature(FW_FEATURE_LPAR))
 689                 ppc_md.get_irq = xics_get_irq_lpar;
 690         else
 691                 ppc_md.get_irq = xics_get_irq_direct;
 692
 693         xics_setup_cpu();
 694
 695         ppc64_boot_msg(0x21, "XICS Done");
 696 }
 697
 698
 699 #ifdef CONFIG_SMP
 700 void xics_request_IPIs(void)
 701 {
 702         unsigned int ipi;
 703         int rc;
 704
 705         ipi = irq_create_mapping(xics_host, XICS_IPI);
 706         BUG_ON(ipi == NO_IRQ);
 707
 708         /*
 709          * IPIs are marked IRQF_DISABLED as they must run with irqs
 710          * disabled
 711          */
 712         set_irq_handler(ipi, handle_percpu_irq);
 713         if (firmware_has_feature(FW_FEATURE_LPAR))
 714                 rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
 715                                 "IPI", NULL);
 716         else
 717                 rc = request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
 718                                 "IPI", NULL);
 719         BUG_ON(rc);
 720 }
 721 #endif /* CONFIG_SMP */
 722
 723 void xics_teardown_cpu(void)
 724 {
 725         int cpu = smp_processor_id();
 726
 727         xics_set_cpu_priority(0);
 728
 729         /*
 730          * Clear IPI
 731          */
 732         if (firmware_has_feature(FW_FEATURE_LPAR))
 733                 lpar_qirr_info(cpu, 0xff);
 734         else
 735                 direct_qirr_info(cpu, 0xff);
 736 }
 737
 738 void xics_kexec_teardown_cpu(int secondary)
 739 {
 740         unsigned int ipi;
 741         struct irq_desc *desc;
 742
 743         xics_teardown_cpu();
 744
 745         /*
 746          * we need to EOI the IPI
 747          *
 748          * probably need to check all the other interrupts too
 749          * should we be flagging idle loop instead?
 750          * or creating some task to be scheduled?
 751          */
 752
 753         ipi = irq_find_mapping(xics_host, XICS_IPI);
 754         if (ipi == XICS_IRQ_SPURIOUS)
 755                 return;
 756         desc = get_irq_desc(ipi);
 757         if (desc->chip && desc->chip->eoi)
 758                 desc->chip->eoi(ipi);
 759
 760         /*
 761          * Some machines need to have at least one cpu in the GIQ,
 762          * so leave the master cpu in the group.
 763          */
 764         if (secondary)
 765                 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 766                                    (1UL << interrupt_server_size) - 1 -
 767                                    default_distrib_server, 0);
 768 }
 769
 770 #ifdef CONFIG_HOTPLUG_CPU
 771
 772 /* Interrupts are disabled. */
 773 void xics_migrate_irqs_away(void)
 774 {
 775         int status;
 776         int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
 777         unsigned int irq, virq;
 778
 779         /* If we used to be the default server, move to the new "boot_cpuid" */
 780         if (hw_cpu == default_server)
 781                 xics_update_irq_servers();
 782
 783         /* Reject any interrupt that was queued to us... */
 784         xics_set_cpu_priority(0);
 785
 786         /* remove ourselves from the global interrupt queue */
 787         status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
 788                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
 789         WARN_ON(status < 0);
 790
 791         /* Allow IPIs again... */
 792         xics_set_cpu_priority(DEFAULT_PRIORITY);
 793
 794         for_each_irq(virq) {
 795                 struct irq_desc *desc;
 796                 int xics_status[2];
 797                 unsigned long flags;
 798
 799                 /* We cant set affinity on ISA interrupts */
 800                 if (virq < NUM_ISA_INTERRUPTS)
 801                         continue;
 802                 if (irq_map[virq].host != xics_host)
 803                         continue;
 804                 irq = (unsigned int)irq_map[virq].hwirq;
 805                 /* We need to get IPIs still. */
 806                 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 807                         continue;
 808                 desc = get_irq_desc(virq);
 809
 810                 /* We only need to migrate enabled IRQS */
 811                 if (desc == NULL || desc->chip == NULL
 812                     || desc->action == NULL
 813                     || desc->chip->set_affinity == NULL)
 814                         continue;
 815
 816                 spin_lock_irqsave(&desc->lock, flags);
 817
 818                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 819                 if (status) {
 820                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
 821                                         "ibm,get-xive returns %d\n",
 822                                         virq, status);
 823                         goto unlock;
 824                 }
 825
 826                 /*
 827                  * We only support delivery to all cpus or to one cpu.
 828                  * The irq has to be migrated only in the single cpu
 829                  * case.
 830                  */
 831                 if (xics_status[0] != hw_cpu)
 832                         goto unlock;
 833
 834                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 835                        virq, cpu);
 836
 837                 /* Reset affinity to all cpus */
 838                 irq_desc[virq].affinity = CPU_MASK_ALL;
 839                 desc->chip->set_affinity(virq, CPU_MASK_ALL);
 840 unlock:
 841                 spin_unlock_irqrestore(&desc->lock, flags);
 842         }
 843 }
 844 #endif