[MTD] OneNAND: fix onenand_wait bug in read ecc error
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mtd / onenand / onenand_base.c
blobe80857b3bb83dde457e93961016ae60f8a657027
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2006 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
22 #include <asm/io.h>
24 /**
25 * onenand_oob_64 - oob info for large (2KB) page
27 static struct nand_ecclayout onenand_oob_64 = {
28 .eccbytes = 20,
29 .eccpos = {
30 8, 9, 10, 11, 12,
31 24, 25, 26, 27, 28,
32 40, 41, 42, 43, 44,
33 56, 57, 58, 59, 60,
35 .oobfree = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {34, 3}, {46, 2}, {50, 3}, {62, 2}
41 /**
42 * onenand_oob_32 - oob info for middle (1KB) page
44 static struct nand_ecclayout onenand_oob_32 = {
45 .eccbytes = 10,
46 .eccpos = {
47 8, 9, 10, 11, 12,
48 24, 25, 26, 27, 28,
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
64 /**
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
72 return readw(addr);
75 /**
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
84 writew(value, addr);
87 /**
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
98 /* Device Flash Core select, NAND Flash Block Address */
99 int dfs = 0;
101 if (block & this->density_mask)
102 dfs = 1;
104 return (dfs << ONENAND_DDP_SHIFT) |
105 (block & (this->density_mask - 1));
108 return block;
112 * onenand_bufferram_address - [DEFAULT] Get bufferram address
113 * @param this onenand chip data structure
114 * @param block the block
115 * @return set DBS value if DDP, otherwise 0
117 * Setup Start Address 2 Register (F101h) for DDP
119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
121 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
122 /* Device BufferRAM Select */
123 int dbs = 0;
125 if (block & this->density_mask)
126 dbs = 1;
128 return (dbs << ONENAND_DDP_SHIFT);
131 return 0;
135 * onenand_page_address - [DEFAULT] Get page address
136 * @param page the page address
137 * @param sector the sector address
138 * @return combined page and sector address
140 * Setup Start Address 8 Register (F107h)
142 static int onenand_page_address(int page, int sector)
144 /* Flash Page Address, Flash Sector Address */
145 int fpa, fsa;
147 fpa = page & ONENAND_FPA_MASK;
148 fsa = sector & ONENAND_FSA_MASK;
150 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
154 * onenand_buffer_address - [DEFAULT] Get buffer address
155 * @param dataram1 DataRAM index
156 * @param sectors the sector address
157 * @param count the number of sectors
158 * @return the start buffer value
160 * Setup Start Buffer Register (F200h)
162 static int onenand_buffer_address(int dataram1, int sectors, int count)
164 int bsa, bsc;
166 /* BufferRAM Sector Address */
167 bsa = sectors & ONENAND_BSA_MASK;
169 if (dataram1)
170 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
171 else
172 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
174 /* BufferRAM Sector Count */
175 bsc = count & ONENAND_BSC_MASK;
177 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
181 * onenand_command - [DEFAULT] Send command to OneNAND device
182 * @param mtd MTD device structure
183 * @param cmd the command to be sent
184 * @param addr offset to read from or write to
185 * @param len number of bytes to read or write
187 * Send command to OneNAND device. This function is used for middle/large page
188 * devices (1KB/2KB Bytes per page)
190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
192 struct onenand_chip *this = mtd->priv;
193 int value, readcmd = 0, block_cmd = 0;
194 int block, page;
196 /* Address translation */
197 switch (cmd) {
198 case ONENAND_CMD_UNLOCK:
199 case ONENAND_CMD_LOCK:
200 case ONENAND_CMD_LOCK_TIGHT:
201 case ONENAND_CMD_UNLOCK_ALL:
202 block = -1;
203 page = -1;
204 break;
206 case ONENAND_CMD_ERASE:
207 case ONENAND_CMD_BUFFERRAM:
208 case ONENAND_CMD_OTP_ACCESS:
209 block_cmd = 1;
210 block = (int) (addr >> this->erase_shift);
211 page = -1;
212 break;
214 default:
215 block = (int) (addr >> this->erase_shift);
216 page = (int) (addr >> this->page_shift);
217 page &= this->page_mask;
218 break;
221 /* NOTE: The setting order of the registers is very important! */
222 if (cmd == ONENAND_CMD_BUFFERRAM) {
223 /* Select DataRAM for DDP */
224 value = onenand_bufferram_address(this, block);
225 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
227 /* Switch to the next data buffer */
228 ONENAND_SET_NEXT_BUFFERRAM(this);
230 return 0;
233 if (block != -1) {
234 /* Write 'DFS, FBA' of Flash */
235 value = onenand_block_address(this, block);
236 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
238 if (block_cmd) {
239 /* Select DataRAM for DDP */
240 value = onenand_bufferram_address(this, block);
241 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
245 if (page != -1) {
246 /* Now we use page size operation */
247 int sectors = 4, count = 4;
248 int dataram;
250 switch (cmd) {
251 case ONENAND_CMD_READ:
252 case ONENAND_CMD_READOOB:
253 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
254 readcmd = 1;
255 break;
257 default:
258 dataram = ONENAND_CURRENT_BUFFERRAM(this);
259 break;
262 /* Write 'FPA, FSA' of Flash */
263 value = onenand_page_address(page, sectors);
264 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
266 /* Write 'BSA, BSC' of DataRAM */
267 value = onenand_buffer_address(dataram, sectors, count);
268 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
270 if (readcmd) {
271 /* Select DataRAM for DDP */
272 value = onenand_bufferram_address(this, block);
273 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
277 /* Interrupt clear */
278 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
280 /* Write command */
281 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
283 return 0;
287 * onenand_wait - [DEFAULT] wait until the command is done
288 * @param mtd MTD device structure
289 * @param state state to select the max. timeout value
291 * Wait for command done. This applies to all OneNAND command
292 * Read can take up to 30us, erase up to 2ms and program up to 350us
293 * according to general OneNAND specs
295 static int onenand_wait(struct mtd_info *mtd, int state)
297 struct onenand_chip * this = mtd->priv;
298 unsigned long timeout;
299 unsigned int flags = ONENAND_INT_MASTER;
300 unsigned int interrupt = 0;
301 unsigned int ctrl;
303 /* The 20 msec is enough */
304 timeout = jiffies + msecs_to_jiffies(20);
305 while (time_before(jiffies, timeout)) {
306 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
308 if (interrupt & flags)
309 break;
311 if (state != FL_READING)
312 cond_resched();
314 /* To get correct interrupt status in timeout case */
315 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
319 if (ctrl & ONENAND_CTRL_ERROR) {
320 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
321 if (ctrl & ONENAND_CTRL_LOCK)
322 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
323 return ctrl;
326 if (interrupt & ONENAND_INT_READ) {
327 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
328 if (ecc) {
329 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
330 if (ecc & ONENAND_ECC_2BIT_ALL)
331 mtd->ecc_stats.failed++;
332 else if (ecc & ONENAND_ECC_1BIT_ALL)
333 mtd->ecc_stats.corrected++;
335 return ecc;
338 return 0;
342 * onenand_interrupt - [DEFAULT] onenand interrupt handler
343 * @param irq onenand interrupt number
344 * @param dev_id interrupt data
346 * complete the work
348 static irqreturn_t onenand_interrupt(int irq, void *data)
350 struct onenand_chip *this = (struct onenand_chip *) data;
352 /* To handle shared interrupt */
353 if (!this->complete.done)
354 complete(&this->complete);
356 return IRQ_HANDLED;
360 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
361 * @param mtd MTD device structure
362 * @param state state to select the max. timeout value
364 * Wait for command done.
366 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
368 struct onenand_chip *this = mtd->priv;
370 wait_for_completion(&this->complete);
372 return onenand_wait(mtd, state);
376 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
377 * @param mtd MTD device structure
378 * @param state state to select the max. timeout value
380 * Try interrupt based wait (It is used one-time)
382 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
384 struct onenand_chip *this = mtd->priv;
385 unsigned long remain, timeout;
387 /* We use interrupt wait first */
388 this->wait = onenand_interrupt_wait;
390 timeout = msecs_to_jiffies(100);
391 remain = wait_for_completion_timeout(&this->complete, timeout);
392 if (!remain) {
393 printk(KERN_INFO "OneNAND: There's no interrupt. "
394 "We use the normal wait\n");
396 /* Release the irq */
397 free_irq(this->irq, this);
399 this->wait = onenand_wait;
402 return onenand_wait(mtd, state);
406 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
407 * @param mtd MTD device structure
409 * There's two method to wait onenand work
410 * 1. polling - read interrupt status register
411 * 2. interrupt - use the kernel interrupt method
413 static void onenand_setup_wait(struct mtd_info *mtd)
415 struct onenand_chip *this = mtd->priv;
416 int syscfg;
418 init_completion(&this->complete);
420 if (this->irq <= 0) {
421 this->wait = onenand_wait;
422 return;
425 if (request_irq(this->irq, &onenand_interrupt,
426 IRQF_SHARED, "onenand", this)) {
427 /* If we can't get irq, use the normal wait */
428 this->wait = onenand_wait;
429 return;
432 /* Enable interrupt */
433 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
434 syscfg |= ONENAND_SYS_CFG1_IOBE;
435 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
437 this->wait = onenand_try_interrupt_wait;
441 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
442 * @param mtd MTD data structure
443 * @param area BufferRAM area
444 * @return offset given area
446 * Return BufferRAM offset given area
448 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
450 struct onenand_chip *this = mtd->priv;
452 if (ONENAND_CURRENT_BUFFERRAM(this)) {
453 if (area == ONENAND_DATARAM)
454 return mtd->writesize;
455 if (area == ONENAND_SPARERAM)
456 return mtd->oobsize;
459 return 0;
463 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
464 * @param mtd MTD data structure
465 * @param area BufferRAM area
466 * @param buffer the databuffer to put/get data
467 * @param offset offset to read from or write to
468 * @param count number of bytes to read/write
470 * Read the BufferRAM area
472 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
473 unsigned char *buffer, int offset, size_t count)
475 struct onenand_chip *this = mtd->priv;
476 void __iomem *bufferram;
478 bufferram = this->base + area;
480 bufferram += onenand_bufferram_offset(mtd, area);
482 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
483 unsigned short word;
485 /* Align with word(16-bit) size */
486 count--;
488 /* Read word and save byte */
489 word = this->read_word(bufferram + offset + count);
490 buffer[count] = (word & 0xff);
493 memcpy(buffer, bufferram + offset, count);
495 return 0;
499 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
500 * @param mtd MTD data structure
501 * @param area BufferRAM area
502 * @param buffer the databuffer to put/get data
503 * @param offset offset to read from or write to
504 * @param count number of bytes to read/write
506 * Read the BufferRAM area with Sync. Burst Mode
508 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
509 unsigned char *buffer, int offset, size_t count)
511 struct onenand_chip *this = mtd->priv;
512 void __iomem *bufferram;
514 bufferram = this->base + area;
516 bufferram += onenand_bufferram_offset(mtd, area);
518 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
520 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
521 unsigned short word;
523 /* Align with word(16-bit) size */
524 count--;
526 /* Read word and save byte */
527 word = this->read_word(bufferram + offset + count);
528 buffer[count] = (word & 0xff);
531 memcpy(buffer, bufferram + offset, count);
533 this->mmcontrol(mtd, 0);
535 return 0;
539 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
540 * @param mtd MTD data structure
541 * @param area BufferRAM area
542 * @param buffer the databuffer to put/get data
543 * @param offset offset to read from or write to
544 * @param count number of bytes to read/write
546 * Write the BufferRAM area
548 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
549 const unsigned char *buffer, int offset, size_t count)
551 struct onenand_chip *this = mtd->priv;
552 void __iomem *bufferram;
554 bufferram = this->base + area;
556 bufferram += onenand_bufferram_offset(mtd, area);
558 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
559 unsigned short word;
560 int byte_offset;
562 /* Align with word(16-bit) size */
563 count--;
565 /* Calculate byte access offset */
566 byte_offset = offset + count;
568 /* Read word and save byte */
569 word = this->read_word(bufferram + byte_offset);
570 word = (word & ~0xff) | buffer[count];
571 this->write_word(word, bufferram + byte_offset);
574 memcpy(bufferram + offset, buffer, count);
576 return 0;
580 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
581 * @param mtd MTD data structure
582 * @param addr address to check
583 * @return 1 if there are valid data, otherwise 0
585 * Check bufferram if there is data we required
587 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
589 struct onenand_chip *this = mtd->priv;
590 int block, page;
591 int i;
593 block = (int) (addr >> this->erase_shift);
594 page = (int) (addr >> this->page_shift);
595 page &= this->page_mask;
597 i = ONENAND_CURRENT_BUFFERRAM(this);
599 /* Is there valid data? */
600 if (this->bufferram[i].block == block &&
601 this->bufferram[i].page == page &&
602 this->bufferram[i].valid)
603 return 1;
605 return 0;
609 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
610 * @param mtd MTD data structure
611 * @param addr address to update
612 * @param valid valid flag
614 * Update BufferRAM information
616 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
617 int valid)
619 struct onenand_chip *this = mtd->priv;
620 int block, page;
621 int i;
623 block = (int) (addr >> this->erase_shift);
624 page = (int) (addr >> this->page_shift);
625 page &= this->page_mask;
627 /* Invalidate BufferRAM */
628 for (i = 0; i < MAX_BUFFERRAM; i++) {
629 if (this->bufferram[i].block == block &&
630 this->bufferram[i].page == page)
631 this->bufferram[i].valid = 0;
634 /* Update BufferRAM */
635 i = ONENAND_CURRENT_BUFFERRAM(this);
636 this->bufferram[i].block = block;
637 this->bufferram[i].page = page;
638 this->bufferram[i].valid = valid;
640 return 0;
644 * onenand_get_device - [GENERIC] Get chip for selected access
645 * @param mtd MTD device structure
646 * @param new_state the state which is requested
648 * Get the device and lock it for exclusive access
650 static int onenand_get_device(struct mtd_info *mtd, int new_state)
652 struct onenand_chip *this = mtd->priv;
653 DECLARE_WAITQUEUE(wait, current);
656 * Grab the lock and see if the device is available
658 while (1) {
659 spin_lock(&this->chip_lock);
660 if (this->state == FL_READY) {
661 this->state = new_state;
662 spin_unlock(&this->chip_lock);
663 break;
665 if (new_state == FL_PM_SUSPENDED) {
666 spin_unlock(&this->chip_lock);
667 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
669 set_current_state(TASK_UNINTERRUPTIBLE);
670 add_wait_queue(&this->wq, &wait);
671 spin_unlock(&this->chip_lock);
672 schedule();
673 remove_wait_queue(&this->wq, &wait);
676 return 0;
680 * onenand_release_device - [GENERIC] release chip
681 * @param mtd MTD device structure
683 * Deselect, release chip lock and wake up anyone waiting on the device
685 static void onenand_release_device(struct mtd_info *mtd)
687 struct onenand_chip *this = mtd->priv;
689 /* Release the chip */
690 spin_lock(&this->chip_lock);
691 this->state = FL_READY;
692 wake_up(&this->wq);
693 spin_unlock(&this->chip_lock);
697 * onenand_read - [MTD Interface] Read data from flash
698 * @param mtd MTD device structure
699 * @param from offset to read from
700 * @param len number of bytes to read
701 * @param retlen pointer to variable to store the number of read bytes
702 * @param buf the databuffer to put data
704 * Read with ecc
706 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
707 size_t *retlen, u_char *buf)
709 struct onenand_chip *this = mtd->priv;
710 struct mtd_ecc_stats stats;
711 int read = 0, column;
712 int thislen;
713 int ret = 0;
715 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
717 /* Do not allow reads past end of device */
718 if ((from + len) > mtd->size) {
719 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
720 *retlen = 0;
721 return -EINVAL;
724 /* Grab the lock and see if the device is available */
725 onenand_get_device(mtd, FL_READING);
727 /* TODO handling oob */
729 stats = mtd->ecc_stats;
730 while (read < len) {
731 cond_resched();
733 thislen = min_t(int, mtd->writesize, len - read);
735 column = from & (mtd->writesize - 1);
736 if (column + thislen > mtd->writesize)
737 thislen = mtd->writesize - column;
739 if (!onenand_check_bufferram(mtd, from)) {
740 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
742 ret = this->wait(mtd, FL_READING);
743 /* First copy data and check return value for ECC handling */
744 onenand_update_bufferram(mtd, from, !ret);
747 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
749 if (ret) {
750 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
751 goto out;
754 read += thislen;
756 if (read == len)
757 break;
759 from += thislen;
760 buf += thislen;
763 out:
764 /* Deselect and wake up anyone waiting on the device */
765 onenand_release_device(mtd);
768 * Return success, if no ECC failures, else -EBADMSG
769 * fs driver will take care of that, because
770 * retlen == desired len and result == -EBADMSG
772 *retlen = read;
774 if (mtd->ecc_stats.failed - stats.failed)
775 return -EBADMSG;
777 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
781 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
782 * @param mtd MTD device structure
783 * @param from offset to read from
784 * @param len number of bytes to read
785 * @param retlen pointer to variable to store the number of read bytes
786 * @param buf the databuffer to put data
788 * OneNAND read out-of-band data from the spare area
790 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
791 size_t *retlen, u_char *buf)
793 struct onenand_chip *this = mtd->priv;
794 int read = 0, thislen, column;
795 int ret = 0;
797 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
799 /* Initialize return length value */
800 *retlen = 0;
802 /* Do not allow reads past end of device */
803 if (unlikely((from + len) > mtd->size)) {
804 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
805 return -EINVAL;
808 /* Grab the lock and see if the device is available */
809 onenand_get_device(mtd, FL_READING);
811 column = from & (mtd->oobsize - 1);
813 while (read < len) {
814 cond_resched();
816 thislen = mtd->oobsize - column;
817 thislen = min_t(int, thislen, len);
819 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
821 onenand_update_bufferram(mtd, from, 0);
823 ret = this->wait(mtd, FL_READING);
824 /* First copy data and check return value for ECC handling */
826 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
828 if (ret) {
829 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
830 goto out;
833 read += thislen;
835 if (read == len)
836 break;
838 buf += thislen;
840 /* Read more? */
841 if (read < len) {
842 /* Page size */
843 from += mtd->writesize;
844 column = 0;
848 out:
849 /* Deselect and wake up anyone waiting on the device */
850 onenand_release_device(mtd);
852 *retlen = read;
853 return ret;
857 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
858 * @mtd: MTD device structure
859 * @from: offset to read from
860 * @ops: oob operation description structure
862 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
863 struct mtd_oob_ops *ops)
865 BUG_ON(ops->mode != MTD_OOB_PLACE);
867 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
868 &ops->oobretlen, ops->oobbuf);
871 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
873 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
874 * @param mtd MTD device structure
875 * @param buf the databuffer to verify
876 * @param to offset to read from
877 * @param len number of bytes to read and compare
880 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
882 struct onenand_chip *this = mtd->priv;
883 char *readp = this->page_buf;
884 int column = to & (mtd->oobsize - 1);
885 int status, i;
887 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
888 onenand_update_bufferram(mtd, to, 0);
889 status = this->wait(mtd, FL_READING);
890 if (status)
891 return status;
893 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
895 for(i = 0; i < len; i++)
896 if (buf[i] != 0xFF && buf[i] != readp[i])
897 return -EBADMSG;
899 return 0;
903 * onenand_verify_page - [GENERIC] verify the chip contents after a write
904 * @param mtd MTD device structure
905 * @param buf the databuffer to verify
907 * Check DataRAM area directly
909 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
911 struct onenand_chip *this = mtd->priv;
912 void __iomem *dataram0, *dataram1;
913 int ret = 0;
915 /* In partial page write, just skip it */
916 if ((addr & (mtd->writesize - 1)) != 0)
917 return 0;
919 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
921 ret = this->wait(mtd, FL_READING);
922 if (ret)
923 return ret;
925 onenand_update_bufferram(mtd, addr, 1);
927 /* Check, if the two dataram areas are same */
928 dataram0 = this->base + ONENAND_DATARAM;
929 dataram1 = dataram0 + mtd->writesize;
931 if (memcmp(dataram0, dataram1, mtd->writesize))
932 return -EBADMSG;
934 return 0;
936 #else
937 #define onenand_verify_page(...) (0)
938 #define onenand_verify_oob(...) (0)
939 #endif
941 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
944 * onenand_write - [MTD Interface] write buffer to FLASH
945 * @param mtd MTD device structure
946 * @param to offset to write to
947 * @param len number of bytes to write
948 * @param retlen pointer to variable to store the number of written bytes
949 * @param buf the data to write
951 * Write with ECC
953 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
954 size_t *retlen, const u_char *buf)
956 struct onenand_chip *this = mtd->priv;
957 int written = 0;
958 int ret = 0;
959 int column, subpage;
961 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
963 /* Initialize retlen, in case of early exit */
964 *retlen = 0;
966 /* Do not allow writes past end of device */
967 if (unlikely((to + len) > mtd->size)) {
968 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
969 return -EINVAL;
972 /* Reject writes, which are not page aligned */
973 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
974 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
975 return -EINVAL;
978 column = to & (mtd->writesize - 1);
979 subpage = column || (len & (mtd->writesize - 1));
981 /* Grab the lock and see if the device is available */
982 onenand_get_device(mtd, FL_WRITING);
984 /* Loop until all data write */
985 while (written < len) {
986 int bytes = mtd->writesize;
987 int thislen = min_t(int, bytes, len - written);
988 u_char *wbuf = (u_char *) buf;
990 cond_resched();
992 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
994 /* Partial page write */
995 if (subpage) {
996 bytes = min_t(int, bytes - column, (int) len);
997 memset(this->page_buf, 0xff, mtd->writesize);
998 memcpy(this->page_buf + column, buf, bytes);
999 wbuf = this->page_buf;
1000 /* Even though partial write, we need page size */
1001 thislen = mtd->writesize;
1004 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1005 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1007 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1009 /* In partial page write we don't update bufferram */
1010 onenand_update_bufferram(mtd, to, !subpage);
1012 ret = this->wait(mtd, FL_WRITING);
1013 if (ret) {
1014 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1015 break;
1018 /* Only check verify write turn on */
1019 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1020 if (ret) {
1021 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1022 break;
1025 written += thislen;
1027 if (written == len)
1028 break;
1030 column = 0;
1031 to += thislen;
1032 buf += thislen;
1035 /* Deselect and wake up anyone waiting on the device */
1036 onenand_release_device(mtd);
1038 *retlen = written;
1040 return ret;
1044 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1045 * @param mtd MTD device structure
1046 * @param to offset to write to
1047 * @param len number of bytes to write
1048 * @param retlen pointer to variable to store the number of written bytes
1049 * @param buf the data to write
1051 * OneNAND write out-of-band
1053 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1054 size_t *retlen, const u_char *buf)
1056 struct onenand_chip *this = mtd->priv;
1057 int column, ret = 0;
1058 int written = 0;
1060 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1062 /* Initialize retlen, in case of early exit */
1063 *retlen = 0;
1065 /* Do not allow writes past end of device */
1066 if (unlikely((to + len) > mtd->size)) {
1067 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1068 return -EINVAL;
1071 /* Grab the lock and see if the device is available */
1072 onenand_get_device(mtd, FL_WRITING);
1074 /* Loop until all data write */
1075 while (written < len) {
1076 int thislen = min_t(int, mtd->oobsize, len - written);
1078 cond_resched();
1080 column = to & (mtd->oobsize - 1);
1082 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1084 /* We send data to spare ram with oobsize
1085 * to prevent byte access */
1086 memset(this->page_buf, 0xff, mtd->oobsize);
1087 memcpy(this->page_buf + column, buf, thislen);
1088 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1090 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1092 onenand_update_bufferram(mtd, to, 0);
1094 ret = this->wait(mtd, FL_WRITING);
1095 if (ret) {
1096 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1097 goto out;
1100 ret = onenand_verify_oob(mtd, buf, to, thislen);
1101 if (ret) {
1102 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1103 goto out;
1106 written += thislen;
1108 if (written == len)
1109 break;
1111 to += thislen;
1112 buf += thislen;
1115 out:
1116 /* Deselect and wake up anyone waiting on the device */
1117 onenand_release_device(mtd);
1119 *retlen = written;
1121 return ret;
1125 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1126 * @mtd: MTD device structure
1127 * @from: offset to read from
1128 * @ops: oob operation description structure
1130 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1131 struct mtd_oob_ops *ops)
1133 BUG_ON(ops->mode != MTD_OOB_PLACE);
1135 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1136 &ops->oobretlen, ops->oobbuf);
1140 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1141 * @param mtd MTD device structure
1142 * @param ofs offset from device start
1143 * @param getchip 0, if the chip is already selected
1144 * @param allowbbt 1, if its allowed to access the bbt area
1146 * Check, if the block is bad. Either by reading the bad block table or
1147 * calling of the scan function.
1149 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1151 struct onenand_chip *this = mtd->priv;
1152 struct bbm_info *bbm = this->bbm;
1154 /* Return info from the table */
1155 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1159 * onenand_erase - [MTD Interface] erase block(s)
1160 * @param mtd MTD device structure
1161 * @param instr erase instruction
1163 * Erase one ore more blocks
1165 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1167 struct onenand_chip *this = mtd->priv;
1168 unsigned int block_size;
1169 loff_t addr;
1170 int len;
1171 int ret = 0;
1173 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1175 block_size = (1 << this->erase_shift);
1177 /* Start address must align on block boundary */
1178 if (unlikely(instr->addr & (block_size - 1))) {
1179 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1180 return -EINVAL;
1183 /* Length must align on block boundary */
1184 if (unlikely(instr->len & (block_size - 1))) {
1185 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1186 return -EINVAL;
1189 /* Do not allow erase past end of device */
1190 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1191 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1192 return -EINVAL;
1195 instr->fail_addr = 0xffffffff;
1197 /* Grab the lock and see if the device is available */
1198 onenand_get_device(mtd, FL_ERASING);
1200 /* Loop throught the pages */
1201 len = instr->len;
1202 addr = instr->addr;
1204 instr->state = MTD_ERASING;
1206 while (len) {
1207 cond_resched();
1209 /* Check if we have a bad block, we do not erase bad blocks */
1210 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1211 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1212 instr->state = MTD_ERASE_FAILED;
1213 goto erase_exit;
1216 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1218 ret = this->wait(mtd, FL_ERASING);
1219 /* Check, if it is write protected */
1220 if (ret) {
1221 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1222 instr->state = MTD_ERASE_FAILED;
1223 instr->fail_addr = addr;
1224 goto erase_exit;
1227 len -= block_size;
1228 addr += block_size;
1231 instr->state = MTD_ERASE_DONE;
1233 erase_exit:
1235 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1236 /* Do call back function */
1237 if (!ret)
1238 mtd_erase_callback(instr);
1240 /* Deselect and wake up anyone waiting on the device */
1241 onenand_release_device(mtd);
1243 return ret;
1247 * onenand_sync - [MTD Interface] sync
1248 * @param mtd MTD device structure
1250 * Sync is actually a wait for chip ready function
1252 static void onenand_sync(struct mtd_info *mtd)
1254 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1256 /* Grab the lock and see if the device is available */
1257 onenand_get_device(mtd, FL_SYNCING);
1259 /* Release it and go back */
1260 onenand_release_device(mtd);
1264 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1265 * @param mtd MTD device structure
1266 * @param ofs offset relative to mtd start
1268 * Check whether the block is bad
1270 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1272 /* Check for invalid offset */
1273 if (ofs > mtd->size)
1274 return -EINVAL;
1276 return onenand_block_checkbad(mtd, ofs, 1, 0);
1280 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1281 * @param mtd MTD device structure
1282 * @param ofs offset from device start
1284 * This is the default implementation, which can be overridden by
1285 * a hardware specific driver.
1287 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1289 struct onenand_chip *this = mtd->priv;
1290 struct bbm_info *bbm = this->bbm;
1291 u_char buf[2] = {0, 0};
1292 size_t retlen;
1293 int block;
1295 /* Get block number */
1296 block = ((int) ofs) >> bbm->bbt_erase_shift;
1297 if (bbm->bbt)
1298 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1300 /* We write two bytes, so we dont have to mess with 16 bit access */
1301 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1302 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1306 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1307 * @param mtd MTD device structure
1308 * @param ofs offset relative to mtd start
1310 * Mark the block as bad
1312 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1314 struct onenand_chip *this = mtd->priv;
1315 int ret;
1317 ret = onenand_block_isbad(mtd, ofs);
1318 if (ret) {
1319 /* If it was bad already, return success and do nothing */
1320 if (ret > 0)
1321 return 0;
1322 return ret;
1325 return this->block_markbad(mtd, ofs);
1329 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1330 * @param mtd MTD device structure
1331 * @param ofs offset relative to mtd start
1332 * @param len number of bytes to lock or unlock
1334 * Lock or unlock one or more blocks
1336 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1338 struct onenand_chip *this = mtd->priv;
1339 int start, end, block, value, status;
1340 int wp_status_mask;
1342 start = ofs >> this->erase_shift;
1343 end = len >> this->erase_shift;
1345 if (cmd == ONENAND_CMD_LOCK)
1346 wp_status_mask = ONENAND_WP_LS;
1347 else
1348 wp_status_mask = ONENAND_WP_US;
1350 /* Continuous lock scheme */
1351 if (this->options & ONENAND_HAS_CONT_LOCK) {
1352 /* Set start block address */
1353 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1354 /* Set end block address */
1355 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1356 /* Write lock command */
1357 this->command(mtd, cmd, 0, 0);
1359 /* There's no return value */
1360 this->wait(mtd, FL_LOCKING);
1362 /* Sanity check */
1363 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1364 & ONENAND_CTRL_ONGO)
1365 continue;
1367 /* Check lock status */
1368 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1369 if (!(status & wp_status_mask))
1370 printk(KERN_ERR "wp status = 0x%x\n", status);
1372 return 0;
1375 /* Block lock scheme */
1376 for (block = start; block < start + end; block++) {
1377 /* Set block address */
1378 value = onenand_block_address(this, block);
1379 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1380 /* Select DataRAM for DDP */
1381 value = onenand_bufferram_address(this, block);
1382 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1383 /* Set start block address */
1384 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1385 /* Write lock command */
1386 this->command(mtd, cmd, 0, 0);
1388 /* There's no return value */
1389 this->wait(mtd, FL_LOCKING);
1391 /* Sanity check */
1392 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1393 & ONENAND_CTRL_ONGO)
1394 continue;
1396 /* Check lock status */
1397 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1398 if (!(status & wp_status_mask))
1399 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1402 return 0;
1406 * onenand_lock - [MTD Interface] Lock block(s)
1407 * @param mtd MTD device structure
1408 * @param ofs offset relative to mtd start
1409 * @param len number of bytes to unlock
1411 * Lock one or more blocks
1413 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1415 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1419 * onenand_unlock - [MTD Interface] Unlock block(s)
1420 * @param mtd MTD device structure
1421 * @param ofs offset relative to mtd start
1422 * @param len number of bytes to unlock
1424 * Unlock one or more blocks
1426 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1428 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1432 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1433 * @param this onenand chip data structure
1435 * Check lock status
1437 static void onenand_check_lock_status(struct onenand_chip *this)
1439 unsigned int value, block, status;
1440 unsigned int end;
1442 end = this->chipsize >> this->erase_shift;
1443 for (block = 0; block < end; block++) {
1444 /* Set block address */
1445 value = onenand_block_address(this, block);
1446 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1447 /* Select DataRAM for DDP */
1448 value = onenand_bufferram_address(this, block);
1449 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1450 /* Set start block address */
1451 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1453 /* Check lock status */
1454 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1455 if (!(status & ONENAND_WP_US))
1456 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1461 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1462 * @param mtd MTD device structure
1464 * Unlock all blocks
1466 static int onenand_unlock_all(struct mtd_info *mtd)
1468 struct onenand_chip *this = mtd->priv;
1470 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1471 /* Write unlock command */
1472 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1474 /* There's no return value */
1475 this->wait(mtd, FL_LOCKING);
1477 /* Sanity check */
1478 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1479 & ONENAND_CTRL_ONGO)
1480 continue;
1482 /* Workaround for all block unlock in DDP */
1483 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1484 loff_t ofs;
1485 size_t len;
1487 /* 1st block on another chip */
1488 ofs = this->chipsize >> 1;
1489 len = 1 << this->erase_shift;
1491 onenand_unlock(mtd, ofs, len);
1494 onenand_check_lock_status(this);
1496 return 0;
1499 onenand_unlock(mtd, 0x0, this->chipsize);
1501 return 0;
1504 #ifdef CONFIG_MTD_ONENAND_OTP
1506 /* Interal OTP operation */
1507 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1508 size_t *retlen, u_char *buf);
1511 * do_otp_read - [DEFAULT] Read OTP block area
1512 * @param mtd MTD device structure
1513 * @param from The offset to read
1514 * @param len number of bytes to read
1515 * @param retlen pointer to variable to store the number of readbytes
1516 * @param buf the databuffer to put/get data
1518 * Read OTP block area.
1520 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1521 size_t *retlen, u_char *buf)
1523 struct onenand_chip *this = mtd->priv;
1524 int ret;
1526 /* Enter OTP access mode */
1527 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1528 this->wait(mtd, FL_OTPING);
1530 ret = mtd->read(mtd, from, len, retlen, buf);
1532 /* Exit OTP access mode */
1533 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1534 this->wait(mtd, FL_RESETING);
1536 return ret;
1540 * do_otp_write - [DEFAULT] Write OTP block area
1541 * @param mtd MTD device structure
1542 * @param from The offset to write
1543 * @param len number of bytes to write
1544 * @param retlen pointer to variable to store the number of write bytes
1545 * @param buf the databuffer to put/get data
1547 * Write OTP block area.
1549 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1550 size_t *retlen, u_char *buf)
1552 struct onenand_chip *this = mtd->priv;
1553 unsigned char *pbuf = buf;
1554 int ret;
1556 /* Force buffer page aligned */
1557 if (len < mtd->writesize) {
1558 memcpy(this->page_buf, buf, len);
1559 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1560 pbuf = this->page_buf;
1561 len = mtd->writesize;
1564 /* Enter OTP access mode */
1565 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1566 this->wait(mtd, FL_OTPING);
1568 ret = mtd->write(mtd, from, len, retlen, pbuf);
1570 /* Exit OTP access mode */
1571 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1572 this->wait(mtd, FL_RESETING);
1574 return ret;
1578 * do_otp_lock - [DEFAULT] Lock OTP block area
1579 * @param mtd MTD device structure
1580 * @param from The offset to lock
1581 * @param len number of bytes to lock
1582 * @param retlen pointer to variable to store the number of lock bytes
1583 * @param buf the databuffer to put/get data
1585 * Lock OTP block area.
1587 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1588 size_t *retlen, u_char *buf)
1590 struct onenand_chip *this = mtd->priv;
1591 int ret;
1593 /* Enter OTP access mode */
1594 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1595 this->wait(mtd, FL_OTPING);
1597 ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1599 /* Exit OTP access mode */
1600 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1601 this->wait(mtd, FL_RESETING);
1603 return ret;
1607 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1608 * @param mtd MTD device structure
1609 * @param from The offset to read/write
1610 * @param len number of bytes to read/write
1611 * @param retlen pointer to variable to store the number of read bytes
1612 * @param buf the databuffer to put/get data
1613 * @param action do given action
1614 * @param mode specify user and factory
1616 * Handle OTP operation.
1618 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1619 size_t *retlen, u_char *buf,
1620 otp_op_t action, int mode)
1622 struct onenand_chip *this = mtd->priv;
1623 int otp_pages;
1624 int density;
1625 int ret = 0;
1627 *retlen = 0;
1629 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1630 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1631 otp_pages = 20;
1632 else
1633 otp_pages = 10;
1635 if (mode == MTD_OTP_FACTORY) {
1636 from += mtd->writesize * otp_pages;
1637 otp_pages = 64 - otp_pages;
1640 /* Check User/Factory boundary */
1641 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1642 return 0;
1644 while (len > 0 && otp_pages > 0) {
1645 if (!action) { /* OTP Info functions */
1646 struct otp_info *otpinfo;
1648 len -= sizeof(struct otp_info);
1649 if (len <= 0)
1650 return -ENOSPC;
1652 otpinfo = (struct otp_info *) buf;
1653 otpinfo->start = from;
1654 otpinfo->length = mtd->writesize;
1655 otpinfo->locked = 0;
1657 from += mtd->writesize;
1658 buf += sizeof(struct otp_info);
1659 *retlen += sizeof(struct otp_info);
1660 } else {
1661 size_t tmp_retlen;
1662 int size = len;
1664 ret = action(mtd, from, len, &tmp_retlen, buf);
1666 buf += size;
1667 len -= size;
1668 *retlen += size;
1670 if (ret < 0)
1671 return ret;
1673 otp_pages--;
1676 return 0;
1680 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1681 * @param mtd MTD device structure
1682 * @param buf the databuffer to put/get data
1683 * @param len number of bytes to read
1685 * Read factory OTP info.
1687 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1688 struct otp_info *buf, size_t len)
1690 size_t retlen;
1691 int ret;
1693 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1695 return ret ? : retlen;
1699 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1700 * @param mtd MTD device structure
1701 * @param from The offset to read
1702 * @param len number of bytes to read
1703 * @param retlen pointer to variable to store the number of read bytes
1704 * @param buf the databuffer to put/get data
1706 * Read factory OTP area.
1708 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1709 size_t len, size_t *retlen, u_char *buf)
1711 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1715 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1716 * @param mtd MTD device structure
1717 * @param buf the databuffer to put/get data
1718 * @param len number of bytes to read
1720 * Read user OTP info.
1722 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1723 struct otp_info *buf, size_t len)
1725 size_t retlen;
1726 int ret;
1728 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1730 return ret ? : retlen;
1734 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1735 * @param mtd MTD device structure
1736 * @param from The offset to read
1737 * @param len number of bytes to read
1738 * @param retlen pointer to variable to store the number of read bytes
1739 * @param buf the databuffer to put/get data
1741 * Read user OTP area.
1743 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1744 size_t len, size_t *retlen, u_char *buf)
1746 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1750 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1751 * @param mtd MTD device structure
1752 * @param from The offset to write
1753 * @param len number of bytes to write
1754 * @param retlen pointer to variable to store the number of write bytes
1755 * @param buf the databuffer to put/get data
1757 * Write user OTP area.
1759 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1760 size_t len, size_t *retlen, u_char *buf)
1762 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1766 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1767 * @param mtd MTD device structure
1768 * @param from The offset to lock
1769 * @param len number of bytes to unlock
1771 * Write lock mark on spare area in page 0 in OTP block
1773 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1774 size_t len)
1776 unsigned char oob_buf[64];
1777 size_t retlen;
1778 int ret;
1780 memset(oob_buf, 0xff, mtd->oobsize);
1782 * Note: OTP lock operation
1783 * OTP block : 0xXXFC
1784 * 1st block : 0xXXF3 (If chip support)
1785 * Both : 0xXXF0 (If chip support)
1787 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1790 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1791 * We write 16 bytes spare area instead of 2 bytes.
1793 from = 0;
1794 len = 16;
1796 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1798 return ret ? : retlen;
1800 #endif /* CONFIG_MTD_ONENAND_OTP */
1803 * onenand_lock_scheme - Check and set OneNAND lock scheme
1804 * @param mtd MTD data structure
1806 * Check and set OneNAND lock scheme
1808 static void onenand_lock_scheme(struct mtd_info *mtd)
1810 struct onenand_chip *this = mtd->priv;
1811 unsigned int density, process;
1813 /* Lock scheme depends on density and process */
1814 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1815 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1817 /* Lock scheme */
1818 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1819 /* A-Die has all block unlock */
1820 if (process) {
1821 printk(KERN_DEBUG "Chip support all block unlock\n");
1822 this->options |= ONENAND_HAS_UNLOCK_ALL;
1824 } else {
1825 /* Some OneNAND has continues lock scheme */
1826 if (!process) {
1827 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1828 this->options |= ONENAND_HAS_CONT_LOCK;
1834 * onenand_print_device_info - Print device ID
1835 * @param device device ID
1837 * Print device ID
1839 static void onenand_print_device_info(int device, int version)
1841 int vcc, demuxed, ddp, density;
1843 vcc = device & ONENAND_DEVICE_VCC_MASK;
1844 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1845 ddp = device & ONENAND_DEVICE_IS_DDP;
1846 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1847 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1848 demuxed ? "" : "Muxed ",
1849 ddp ? "(DDP)" : "",
1850 (16 << density),
1851 vcc ? "2.65/3.3" : "1.8",
1852 device);
1853 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1856 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1857 {ONENAND_MFR_SAMSUNG, "Samsung"},
1861 * onenand_check_maf - Check manufacturer ID
1862 * @param manuf manufacturer ID
1864 * Check manufacturer ID
1866 static int onenand_check_maf(int manuf)
1868 int size = ARRAY_SIZE(onenand_manuf_ids);
1869 char *name;
1870 int i;
1872 for (i = 0; i < size; i++)
1873 if (manuf == onenand_manuf_ids[i].id)
1874 break;
1876 if (i < size)
1877 name = onenand_manuf_ids[i].name;
1878 else
1879 name = "Unknown";
1881 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1883 return (i == size);
1887 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1888 * @param mtd MTD device structure
1890 * OneNAND detection method:
1891 * Compare the the values from command with ones from register
1893 static int onenand_probe(struct mtd_info *mtd)
1895 struct onenand_chip *this = mtd->priv;
1896 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1897 int density;
1898 int syscfg;
1900 /* Save system configuration 1 */
1901 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1902 /* Clear Sync. Burst Read mode to read BootRAM */
1903 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1905 /* Send the command for reading device ID from BootRAM */
1906 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1908 /* Read manufacturer and device IDs from BootRAM */
1909 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1910 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1912 /* Reset OneNAND to read default register values */
1913 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1914 /* Wait reset */
1915 this->wait(mtd, FL_RESETING);
1917 /* Restore system configuration 1 */
1918 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1920 /* Check manufacturer ID */
1921 if (onenand_check_maf(bram_maf_id))
1922 return -ENXIO;
1924 /* Read manufacturer and device IDs from Register */
1925 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1926 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1927 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1929 /* Check OneNAND device */
1930 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1931 return -ENXIO;
1933 /* Flash device information */
1934 onenand_print_device_info(dev_id, ver_id);
1935 this->device_id = dev_id;
1936 this->version_id = ver_id;
1938 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1939 this->chipsize = (16 << density) << 20;
1940 /* Set density mask. it is used for DDP */
1941 this->density_mask = (1 << (density + 6));
1943 /* OneNAND page size & block size */
1944 /* The data buffer size is equal to page size */
1945 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1946 mtd->oobsize = mtd->writesize >> 5;
1947 /* Pagers per block is always 64 in OneNAND */
1948 mtd->erasesize = mtd->writesize << 6;
1950 this->erase_shift = ffs(mtd->erasesize) - 1;
1951 this->page_shift = ffs(mtd->writesize) - 1;
1952 this->ppb_shift = (this->erase_shift - this->page_shift);
1953 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1955 /* REVIST: Multichip handling */
1957 mtd->size = this->chipsize;
1959 /* Check OneNAND lock scheme */
1960 onenand_lock_scheme(mtd);
1962 return 0;
1966 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1967 * @param mtd MTD device structure
1969 static int onenand_suspend(struct mtd_info *mtd)
1971 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1975 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1976 * @param mtd MTD device structure
1978 static void onenand_resume(struct mtd_info *mtd)
1980 struct onenand_chip *this = mtd->priv;
1982 if (this->state == FL_PM_SUSPENDED)
1983 onenand_release_device(mtd);
1984 else
1985 printk(KERN_ERR "resume() called for the chip which is not"
1986 "in suspended state\n");
1990 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1991 * @param mtd MTD device structure
1992 * @param maxchips Number of chips to scan for
1994 * This fills out all the not initialized function pointers
1995 * with the defaults.
1996 * The flash ID is read and the mtd/chip structures are
1997 * filled with the appropriate values.
1999 int onenand_scan(struct mtd_info *mtd, int maxchips)
2001 struct onenand_chip *this = mtd->priv;
2003 if (!this->read_word)
2004 this->read_word = onenand_readw;
2005 if (!this->write_word)
2006 this->write_word = onenand_writew;
2008 if (!this->command)
2009 this->command = onenand_command;
2010 if (!this->wait)
2011 onenand_setup_wait(mtd);
2013 if (!this->read_bufferram)
2014 this->read_bufferram = onenand_read_bufferram;
2015 if (!this->write_bufferram)
2016 this->write_bufferram = onenand_write_bufferram;
2018 if (!this->block_markbad)
2019 this->block_markbad = onenand_default_block_markbad;
2020 if (!this->scan_bbt)
2021 this->scan_bbt = onenand_default_bbt;
2023 if (onenand_probe(mtd))
2024 return -ENXIO;
2026 /* Set Sync. Burst Read after probing */
2027 if (this->mmcontrol) {
2028 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2029 this->read_bufferram = onenand_sync_read_bufferram;
2032 /* Allocate buffers, if necessary */
2033 if (!this->page_buf) {
2034 size_t len;
2035 len = mtd->writesize + mtd->oobsize;
2036 this->page_buf = kmalloc(len, GFP_KERNEL);
2037 if (!this->page_buf) {
2038 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2039 return -ENOMEM;
2041 this->options |= ONENAND_PAGEBUF_ALLOC;
2044 this->state = FL_READY;
2045 init_waitqueue_head(&this->wq);
2046 spin_lock_init(&this->chip_lock);
2049 * Allow subpage writes up to oobsize.
2051 switch (mtd->oobsize) {
2052 case 64:
2053 this->ecclayout = &onenand_oob_64;
2054 mtd->subpage_sft = 2;
2055 break;
2057 case 32:
2058 this->ecclayout = &onenand_oob_32;
2059 mtd->subpage_sft = 1;
2060 break;
2062 default:
2063 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2064 mtd->oobsize);
2065 mtd->subpage_sft = 0;
2066 /* To prevent kernel oops */
2067 this->ecclayout = &onenand_oob_32;
2068 break;
2071 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2072 mtd->ecclayout = this->ecclayout;
2074 /* Fill in remaining MTD driver data */
2075 mtd->type = MTD_NANDFLASH;
2076 mtd->flags = MTD_CAP_NANDFLASH;
2077 mtd->ecctype = MTD_ECC_SW;
2078 mtd->erase = onenand_erase;
2079 mtd->point = NULL;
2080 mtd->unpoint = NULL;
2081 mtd->read = onenand_read;
2082 mtd->write = onenand_write;
2083 mtd->read_oob = onenand_read_oob;
2084 mtd->write_oob = onenand_write_oob;
2085 #ifdef CONFIG_MTD_ONENAND_OTP
2086 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2087 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2088 mtd->get_user_prot_info = onenand_get_user_prot_info;
2089 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2090 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2091 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2092 #endif
2093 mtd->sync = onenand_sync;
2094 mtd->lock = onenand_lock;
2095 mtd->unlock = onenand_unlock;
2096 mtd->suspend = onenand_suspend;
2097 mtd->resume = onenand_resume;
2098 mtd->block_isbad = onenand_block_isbad;
2099 mtd->block_markbad = onenand_block_markbad;
2100 mtd->owner = THIS_MODULE;
2102 /* Unlock whole block */
2103 onenand_unlock_all(mtd);
2105 return this->scan_bbt(mtd);
2109 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2110 * @param mtd MTD device structure
2112 void onenand_release(struct mtd_info *mtd)
2114 struct onenand_chip *this = mtd->priv;
2116 #ifdef CONFIG_MTD_PARTITIONS
2117 /* Deregister partitions */
2118 del_mtd_partitions (mtd);
2119 #endif
2120 /* Deregister the device */
2121 del_mtd_device (mtd);
2123 /* Free bad block table memory, if allocated */
2124 if (this->bbm)
2125 kfree(this->bbm);
2126 /* Buffer allocated by onenand_scan */
2127 if (this->options & ONENAND_PAGEBUF_ALLOC)
2128 kfree(this->page_buf);
2131 EXPORT_SYMBOL_GPL(onenand_scan);
2132 EXPORT_SYMBOL_GPL(onenand_release);
2134 MODULE_LICENSE("GPL");
2135 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2136 MODULE_DESCRIPTION("Generic OneNAND flash driver code");