5 * All Intel Core family
7 CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
8 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
9 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield)
10 Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
11 Volume 3A: System Programming Guide
12 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
18 This driver permits reading the DTS (Digital Temperature Sensor) embedded
19 inside Intel CPUs. This driver can read both the per-core and per-package
20 temperature using the appropriate sensors. The per-package sensor is new;
21 as of now, it is present only in the SandyBridge platform. The driver will
22 show the temperature of all cores inside a package under a single device
23 directory inside hwmon.
25 Temperature is measured in degrees Celsius and measurement resolution is
26 1 degree C. Valid temperatures are from 0 to TjMax degrees C, because
27 the actual value of temperature register is in fact a delta from TjMax.
29 Temperature known as TjMax is the maximum junction temperature of processor,
30 which depends on the CPU model. See table below. At this temperature, protection
31 mechanism will perform actions to forcibly cool down the processor. Alarm
32 may be raised, if the temperature grows enough (more than TjMax) to trigger
33 the Out-Of-Spec bit. Following table summarizes the exported sysfs files:
35 All Sysfs entries are named with their core_id (represented here by 'X').
36 tempX_input - Core temperature (in millidegrees Celsius).
37 tempX_max - All cooling devices should be turned on (on Core2).
38 Initialized with IA32_THERM_INTERRUPT. When the CPU
39 temperature reaches this temperature, an interrupt is
40 generated and tempX_max_alarm is set.
41 tempX_max_hyst - If the CPU temperature falls below than temperature,
42 an interrupt is generated and tempX_max_alarm is reset.
43 tempX_max_alarm - Set if the temperature reaches or exceeds tempX_max.
44 Reset if the temperature drops to or below tempX_max_hyst.
45 tempX_crit - Maximum junction temperature (in millidegrees Celsius).
46 tempX_crit_alarm - Set when Out-of-spec bit is set, never clears.
47 Correct CPU operation is no longer guaranteed.
48 tempX_label - Contains string "Core X", where X is processor
49 number. For Package temp, this will be "Physical id Y",
50 where Y is the package number.
52 The TjMax temperature is set to 85 degrees C if undocumented model specific
53 register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as
54 (sometimes) documented in processor datasheet.
56 Appendix A. Known TjMax lists (TBD):
57 Some information comes from ark.intel.com
59 Process Processor TjMax(C)
61 32nm Core i3/i5/i7 Processors
62 i7 660UM/640/620, 640LM/620, 620M, 610E 105
63 i5 540UM/520/430, 540M/520/450/430 105
64 i3 330E, 370M/350/330 90 rPGA, 105 BGA
67 32nm Core i7 Extreme Processors
70 32nm Celeron Processors
74 45nm Xeon Processors 5400 Quad-Core
75 X5492, X5482, X5472, X5470, X5460, X5450 85
76 E5472, E5462, E5450/40/30/20/10/05 85
78 L5430, L5420, L5410 70
80 45nm Xeon Processors 5200 Dual-Core
81 X5282, X5272, X5270, X5260 90
89 Z560/550/540/530P/530/520PT/520/515/510PT/510P 90
96 Solo ULV SU3500/3300 100
97 T9900/9800/9600/9550/9500/9400/9300/8300/8100 105
102 SL9600/9400/9380/9300 105
103 P9700/9600/9500/8800/8700/8600/8400/7570 105
106 45nm Core2 Quad Processors
109 45nm Core2 Extreme Processors
113 45nm Core i3/i5/i7 Processors
115 i7 840QM/820/740/720 100
117 45nm Celeron Processors
121 65nm Core2 Duo Processors
122 Solo U2200, U2100 100
124 T7800/7700/7600/7500/7400/7300/7250/7200/7100 100
125 T5870/5670/5600/5550/5500/5470/5450/5300/5270 100
128 L7700/7500/7400/7300/7200 100
130 65nm Core2 Extreme Processors
133 65nm Core Duo Processors
135 T2700/2600/2450/2400/2350/2300E/2300/2250/2050 100
138 65nm Core Solo Processors
140 T1400/1350/1300/1250 100
142 65nm Xeon Processors 5000 Quad-Core
148 65nm Xeon Processors 5000 Dual-Core
149 5080, 5063, 5060, 5050, 5030 80-90
150 5160, 5150, 5148, 5140, 5130, 5120, 5110 80
153 65nm Celeron Processors