drivers/net/phy/marvell.c

   1 /*
   2  * drivers/net/phy/marvell.c
   3  *
   4  * Driver for Marvell PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/errno.h>
  19 #include <linux/unistd.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/delay.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/etherdevice.h>
  25 #include <linux/skbuff.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/mm.h>
  28 #include <linux/module.h>
  29 #include <linux/mii.h>
  30 #include <linux/ethtool.h>
  31 #include <linux/phy.h>
  32 #include <linux/marvell_phy.h>
  33
  34 #include <asm/io.h>
  35 #include <asm/irq.h>
  36 #include <asm/uaccess.h>
  37
  38 #define MII_M1011_IEVENT                0x13
  39 #define MII_M1011_IEVENT_CLEAR          0x0000
  40
  41 #define MII_M1011_IMASK                 0x12
  42 #define MII_M1011_IMASK_INIT            0x6400
  43 #define MII_M1011_IMASK_CLEAR           0x0000
  44
  45 #define MII_M1011_PHY_SCR               0x10
  46 #define MII_M1011_PHY_SCR_AUTO_CROSS    0x0060
  47
  48 #define MII_M1145_PHY_EXT_CR            0x14
  49 #define MII_M1145_RGMII_RX_DELAY        0x0080
  50 #define MII_M1145_RGMII_TX_DELAY        0x0002
  51
  52 #define MII_M1111_PHY_LED_CONTROL       0x18
  53 #define MII_M1111_PHY_LED_DIRECT        0x4100
  54 #define MII_M1111_PHY_LED_COMBINE       0x411c
  55 #define MII_M1111_PHY_EXT_CR            0x14
  56 #define MII_M1111_RX_DELAY              0x80
  57 #define MII_M1111_TX_DELAY              0x2
  58 #define MII_M1111_PHY_EXT_SR            0x1b
  59
  60 #define MII_M1111_HWCFG_MODE_MASK               0xf
  61 #define MII_M1111_HWCFG_MODE_COPPER_RGMII       0xb
  62 #define MII_M1111_HWCFG_MODE_FIBER_RGMII        0x3
  63 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK       0x4
  64 #define MII_M1111_HWCFG_MODE_COPPER_RTBI        0x9
  65 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO       0x8000
  66 #define MII_M1111_HWCFG_FIBER_COPPER_RES        0x2000
  67
  68 #define MII_M1111_COPPER                0
  69 #define MII_M1111_FIBER                 1
  70
  71 #define MII_88E1121_PHY_LED_CTRL        16
  72 #define MII_88E1121_PHY_LED_PAGE        3
  73 #define MII_88E1121_PHY_LED_DEF         0x0030
  74 #define MII_88E1121_PHY_PAGE            22
  75
  76 #define MII_M1011_PHY_STATUS            0x11
  77 #define MII_M1011_PHY_STATUS_1000       0x8000
  78 #define MII_M1011_PHY_STATUS_100        0x4000
  79 #define MII_M1011_PHY_STATUS_SPD_MASK   0xc000
  80 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  81 #define MII_M1011_PHY_STATUS_RESOLVED   0x0800
  82 #define MII_M1011_PHY_STATUS_LINK       0x0400
  83
  84
  85 MODULE_DESCRIPTION("Marvell PHY driver");
  86 MODULE_AUTHOR("Andy Fleming");
  87 MODULE_LICENSE("GPL");
  88
  89 static int marvell_ack_interrupt(struct phy_device *phydev)
  90 {
  91         int err;
  92
  93         /* Clear the interrupts by reading the reg */
  94         err = phy_read(phydev, MII_M1011_IEVENT);
  95
  96         if (err < 0)
  97                 return err;
  98
  99         return 0;
 100 }
 101
 102 static int marvell_config_intr(struct phy_device *phydev)
 103 {
 104         int err;
 105
 106         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 107                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
 108         else
 109                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
 110
 111         return err;
 112 }
 113
 114 static int marvell_config_aneg(struct phy_device *phydev)
 115 {
 116         int err;
 117
 118         /* The Marvell PHY has an errata which requires
 119          * that certain registers get written in order
 120          * to restart autonegotiation */
 121         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 122
 123         if (err < 0)
 124                 return err;
 125
 126         err = phy_write(phydev, 0x1d, 0x1f);
 127         if (err < 0)
 128                 return err;
 129
 130         err = phy_write(phydev, 0x1e, 0x200c);
 131         if (err < 0)
 132                 return err;
 133
 134         err = phy_write(phydev, 0x1d, 0x5);
 135         if (err < 0)
 136                 return err;
 137
 138         err = phy_write(phydev, 0x1e, 0);
 139         if (err < 0)
 140                 return err;
 141
 142         err = phy_write(phydev, 0x1e, 0x100);
 143         if (err < 0)
 144                 return err;
 145
 146         err = phy_write(phydev, MII_M1011_PHY_SCR,
 147                         MII_M1011_PHY_SCR_AUTO_CROSS);
 148         if (err < 0)
 149                 return err;
 150
 151         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 152                         MII_M1111_PHY_LED_DIRECT);
 153         if (err < 0)
 154                 return err;
 155
 156         err = genphy_config_aneg(phydev);
 157         if (err < 0)
 158                 return err;
 159
 160         if (phydev->autoneg != AUTONEG_ENABLE) {
 161                 int bmcr;
 162
 163                 /*
 164                  * A write to speed/duplex bits (that is performed by
 165                  * genphy_config_aneg() call above) must be followed by
 166                  * a software reset. Otherwise, the write has no effect.
 167                  */
 168                 bmcr = phy_read(phydev, MII_BMCR);
 169                 if (bmcr < 0)
 170                         return bmcr;
 171
 172                 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
 173                 if (err < 0)
 174                         return err;
 175         }
 176
 177         return 0;
 178 }
 179
 180 static int m88e1121_config_aneg(struct phy_device *phydev)
 181 {
 182         int err, temp;
 183
 184         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 185         if (err < 0)
 186                 return err;
 187
 188         err = phy_write(phydev, MII_M1011_PHY_SCR,
 189                         MII_M1011_PHY_SCR_AUTO_CROSS);
 190         if (err < 0)
 191                 return err;
 192
 193         temp = phy_read(phydev, MII_88E1121_PHY_PAGE);
 194
 195         phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
 196         phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
 197         phy_write(phydev, MII_88E1121_PHY_PAGE, temp);
 198
 199         err = genphy_config_aneg(phydev);
 200
 201         return err;
 202 }
 203
 204 static int m88e1111_config_init(struct phy_device *phydev)
 205 {
 206         int err;
 207         int temp;
 208
 209         /* Enable Fiber/Copper auto selection */
 210         temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 211         temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 212         phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 213
 214         temp = phy_read(phydev, MII_BMCR);
 215         temp |= BMCR_RESET;
 216         phy_write(phydev, MII_BMCR, temp);
 217
 218         if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
 219             (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
 220             (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
 221             (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
 222
 223                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 224                 if (temp < 0)
 225                         return temp;
 226
 227                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 228                         temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 229                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 230                         temp &= ~MII_M1111_TX_DELAY;
 231                         temp |= MII_M1111_RX_DELAY;
 232                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 233                         temp &= ~MII_M1111_RX_DELAY;
 234                         temp |= MII_M1111_TX_DELAY;
 235                 }
 236
 237                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 238                 if (err < 0)
 239                         return err;
 240
 241                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 242                 if (temp < 0)
 243                         return temp;
 244
 245                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 246
 247                 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
 248                         temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
 249                 else
 250                         temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
 251
 252                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 253                 if (err < 0)
 254                         return err;
 255         }
 256
 257         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 258                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 259                 if (temp < 0)
 260                         return temp;
 261
 262                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 263                 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
 264                 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 265
 266                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 267                 if (err < 0)
 268                         return err;
 269         }
 270
 271         if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
 272                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 273                 if (temp < 0)
 274                         return temp;
 275                 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 276                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 277                 if (err < 0)
 278                         return err;
 279
 280                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 281                 if (temp < 0)
 282                         return temp;
 283                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 284                 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 285                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 286                 if (err < 0)
 287                         return err;
 288
 289                 /* soft reset */
 290                 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 291                 if (err < 0)
 292                         return err;
 293                 do
 294                         temp = phy_read(phydev, MII_BMCR);
 295                 while (temp & BMCR_RESET);
 296
 297                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 298                 if (temp < 0)
 299                         return temp;
 300                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 301                 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 302                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 303                 if (err < 0)
 304                         return err;
 305         }
 306
 307
 308         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 309         if (err < 0)
 310                 return err;
 311
 312         return 0;
 313 }
 314
 315 static int m88e1118_config_aneg(struct phy_device *phydev)
 316 {
 317         int err;
 318
 319         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 320         if (err < 0)
 321                 return err;
 322
 323         err = phy_write(phydev, MII_M1011_PHY_SCR,
 324                         MII_M1011_PHY_SCR_AUTO_CROSS);
 325         if (err < 0)
 326                 return err;
 327
 328         err = genphy_config_aneg(phydev);
 329         return 0;
 330 }
 331
 332 static int m88e1118_config_init(struct phy_device *phydev)
 333 {
 334         int err;
 335
 336         /* Change address */
 337         err = phy_write(phydev, 0x16, 0x0002);
 338         if (err < 0)
 339                 return err;
 340
 341         /* Enable 1000 Mbit */
 342         err = phy_write(phydev, 0x15, 0x1070);
 343         if (err < 0)
 344                 return err;
 345
 346         /* Change address */
 347         err = phy_write(phydev, 0x16, 0x0003);
 348         if (err < 0)
 349                 return err;
 350
 351         /* Adjust LED Control */
 352         if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
 353                 err = phy_write(phydev, 0x10, 0x1100);
 354         else
 355                 err = phy_write(phydev, 0x10, 0x021e);
 356         if (err < 0)
 357                 return err;
 358
 359         /* Reset address */
 360         err = phy_write(phydev, 0x16, 0x0);
 361         if (err < 0)
 362                 return err;
 363
 364         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 365         if (err < 0)
 366                 return err;
 367
 368         return 0;
 369 }
 370
 371 static int m88e1145_config_init(struct phy_device *phydev)
 372 {
 373         int err;
 374
 375         /* Take care of errata E0 & E1 */
 376         err = phy_write(phydev, 0x1d, 0x001b);
 377         if (err < 0)
 378                 return err;
 379
 380         err = phy_write(phydev, 0x1e, 0x418f);
 381         if (err < 0)
 382                 return err;
 383
 384         err = phy_write(phydev, 0x1d, 0x0016);
 385         if (err < 0)
 386                 return err;
 387
 388         err = phy_write(phydev, 0x1e, 0xa2da);
 389         if (err < 0)
 390                 return err;
 391
 392         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 393                 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
 394                 if (temp < 0)
 395                         return temp;
 396
 397                 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
 398
 399                 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
 400                 if (err < 0)
 401                         return err;
 402
 403                 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
 404                         err = phy_write(phydev, 0x1d, 0x0012);
 405                         if (err < 0)
 406                                 return err;
 407
 408                         temp = phy_read(phydev, 0x1e);
 409                         if (temp < 0)
 410                                 return temp;
 411
 412                         temp &= 0xf03f;
 413                         temp |= 2 << 9; /* 36 ohm */
 414                         temp |= 2 << 6; /* 39 ohm */
 415
 416                         err = phy_write(phydev, 0x1e, temp);
 417                         if (err < 0)
 418                                 return err;
 419
 420                         err = phy_write(phydev, 0x1d, 0x3);
 421                         if (err < 0)
 422                                 return err;
 423
 424                         err = phy_write(phydev, 0x1e, 0x8000);
 425                         if (err < 0)
 426                                 return err;
 427                 }
 428         }
 429
 430         return 0;
 431 }
 432
 433 /* marvell_read_status
 434  *
 435  * Generic status code does not detect Fiber correctly!
 436  * Description:
 437  *   Check the link, then figure out the current state
 438  *   by comparing what we advertise with what the link partner
 439  *   advertises.  Start by checking the gigabit possibilities,
 440  *   then move on to 10/100.
 441  */
 442 static int marvell_read_status(struct phy_device *phydev)
 443 {
 444         int adv;
 445         int err;
 446         int lpa;
 447         int status = 0;
 448
 449         /* Update the link, but return if there
 450          * was an error */
 451         err = genphy_update_link(phydev);
 452         if (err)
 453                 return err;
 454
 455         if (AUTONEG_ENABLE == phydev->autoneg) {
 456                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
 457                 if (status < 0)
 458                         return status;
 459
 460                 lpa = phy_read(phydev, MII_LPA);
 461                 if (lpa < 0)
 462                         return lpa;
 463
 464                 adv = phy_read(phydev, MII_ADVERTISE);
 465                 if (adv < 0)
 466                         return adv;
 467
 468                 lpa &= adv;
 469
 470                 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
 471                         phydev->duplex = DUPLEX_FULL;
 472                 else
 473                         phydev->duplex = DUPLEX_HALF;
 474
 475                 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
 476                 phydev->pause = phydev->asym_pause = 0;
 477
 478                 switch (status) {
 479                 case MII_M1011_PHY_STATUS_1000:
 480                         phydev->speed = SPEED_1000;
 481                         break;
 482
 483                 case MII_M1011_PHY_STATUS_100:
 484                         phydev->speed = SPEED_100;
 485                         break;
 486
 487                 default:
 488                         phydev->speed = SPEED_10;
 489                         break;
 490                 }
 491
 492                 if (phydev->duplex == DUPLEX_FULL) {
 493                         phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
 494                         phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
 495                 }
 496         } else {
 497                 int bmcr = phy_read(phydev, MII_BMCR);
 498
 499                 if (bmcr < 0)
 500                         return bmcr;
 501
 502                 if (bmcr & BMCR_FULLDPLX)
 503                         phydev->duplex = DUPLEX_FULL;
 504                 else
 505                         phydev->duplex = DUPLEX_HALF;
 506
 507                 if (bmcr & BMCR_SPEED1000)
 508                         phydev->speed = SPEED_1000;
 509                 else if (bmcr & BMCR_SPEED100)
 510                         phydev->speed = SPEED_100;
 511                 else
 512                         phydev->speed = SPEED_10;
 513
 514                 phydev->pause = phydev->asym_pause = 0;
 515         }
 516
 517         return 0;
 518 }
 519
 520 static int m88e1121_did_interrupt(struct phy_device *phydev)
 521 {
 522         int imask;
 523
 524         imask = phy_read(phydev, MII_M1011_IEVENT);
 525
 526         if (imask & MII_M1011_IMASK_INIT)
 527                 return 1;
 528
 529         return 0;
 530 }
 531
 532 static struct phy_driver marvell_drivers[] = {
 533         {
 534                 .phy_id = MARVELL_PHY_ID_88E1101,
 535                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 536                 .name = "Marvell 88E1101",
 537                 .features = PHY_GBIT_FEATURES,
 538                 .flags = PHY_HAS_INTERRUPT,
 539                 .config_aneg = &marvell_config_aneg,
 540                 .read_status = &genphy_read_status,
 541                 .ack_interrupt = &marvell_ack_interrupt,
 542                 .config_intr = &marvell_config_intr,
 543                 .driver = { .owner = THIS_MODULE },
 544         },
 545         {
 546                 .phy_id = MARVELL_PHY_ID_88E1112,
 547                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 548                 .name = "Marvell 88E1112",
 549                 .features = PHY_GBIT_FEATURES,
 550                 .flags = PHY_HAS_INTERRUPT,
 551                 .config_init = &m88e1111_config_init,
 552                 .config_aneg = &marvell_config_aneg,
 553                 .read_status = &genphy_read_status,
 554                 .ack_interrupt = &marvell_ack_interrupt,
 555                 .config_intr = &marvell_config_intr,
 556                 .driver = { .owner = THIS_MODULE },
 557         },
 558         {
 559                 .phy_id = MARVELL_PHY_ID_88E1111,
 560                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 561                 .name = "Marvell 88E1111",
 562                 .features = PHY_GBIT_FEATURES,
 563                 .flags = PHY_HAS_INTERRUPT,
 564                 .config_init = &m88e1111_config_init,
 565                 .config_aneg = &marvell_config_aneg,
 566                 .read_status = &marvell_read_status,
 567                 .ack_interrupt = &marvell_ack_interrupt,
 568                 .config_intr = &marvell_config_intr,
 569                 .driver = { .owner = THIS_MODULE },
 570         },
 571         {
 572                 .phy_id = MARVELL_PHY_ID_88E1118,
 573                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 574                 .name = "Marvell 88E1118",
 575                 .features = PHY_GBIT_FEATURES,
 576                 .flags = PHY_HAS_INTERRUPT,
 577                 .config_init = &m88e1118_config_init,
 578                 .config_aneg = &m88e1118_config_aneg,
 579                 .read_status = &genphy_read_status,
 580                 .ack_interrupt = &marvell_ack_interrupt,
 581                 .config_intr = &marvell_config_intr,
 582                 .driver = {.owner = THIS_MODULE,},
 583         },
 584         {
 585                 .phy_id = MARVELL_PHY_ID_88E1121R,
 586                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 587                 .name = "Marvell 88E1121R",
 588                 .features = PHY_GBIT_FEATURES,
 589                 .flags = PHY_HAS_INTERRUPT,
 590                 .config_aneg = &m88e1121_config_aneg,
 591                 .read_status = &marvell_read_status,
 592                 .ack_interrupt = &marvell_ack_interrupt,
 593                 .config_intr = &marvell_config_intr,
 594                 .did_interrupt = &m88e1121_did_interrupt,
 595                 .driver = { .owner = THIS_MODULE },
 596         },
 597         {
 598                 .phy_id = MARVELL_PHY_ID_88E1145,
 599                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 600                 .name = "Marvell 88E1145",
 601                 .features = PHY_GBIT_FEATURES,
 602                 .flags = PHY_HAS_INTERRUPT,
 603                 .config_init = &m88e1145_config_init,
 604                 .config_aneg = &marvell_config_aneg,
 605                 .read_status = &genphy_read_status,
 606                 .ack_interrupt = &marvell_ack_interrupt,
 607                 .config_intr = &marvell_config_intr,
 608                 .driver = { .owner = THIS_MODULE },
 609         },
 610         {
 611                 .phy_id = MARVELL_PHY_ID_88E1240,
 612                 .phy_id_mask = MARVELL_PHY_ID_MASK,
 613                 .name = "Marvell 88E1240",
 614                 .features = PHY_GBIT_FEATURES,
 615                 .flags = PHY_HAS_INTERRUPT,
 616                 .config_init = &m88e1111_config_init,
 617                 .config_aneg = &marvell_config_aneg,
 618                 .read_status = &genphy_read_status,
 619                 .ack_interrupt = &marvell_ack_interrupt,
 620                 .config_intr = &marvell_config_intr,
 621                 .driver = { .owner = THIS_MODULE },
 622         },
 623 };
 624
 625 static int __init marvell_init(void)
 626 {
 627         int ret;
 628         int i;
 629
 630         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
 631                 ret = phy_driver_register(&marvell_drivers[i]);
 632
 633                 if (ret) {
 634                         while (i-- > 0)
 635                                 phy_driver_unregister(&marvell_drivers[i]);
 636                         return ret;
 637                 }
 638         }
 639
 640         return 0;
 641 }
 642
 643 static void __exit marvell_exit(void)
 644 {
 645         int i;
 646
 647         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
 648                 phy_driver_unregister(&marvell_drivers[i]);
 649 }
 650
 651 module_init(marvell_init);
 652 module_exit(marvell_exit);
 653
 654 static struct mdio_device_id marvell_tbl[] = {
 655         { 0x01410c60, 0xfffffff0 },
 656         { 0x01410c90, 0xfffffff0 },
 657         { 0x01410cc0, 0xfffffff0 },
 658         { 0x01410e10, 0xfffffff0 },
 659         { 0x01410cb0, 0xfffffff0 },
 660         { 0x01410cd0, 0xfffffff0 },
 661         { 0x01410e30, 0xfffffff0 },
 662         { }
 663 };
 664
 665 MODULE_DEVICE_TABLE(mdio, marvell_tbl);