Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / video / sh_mobile_lcdcfb.c
blob9b1364723c65e2fcff4dcec661d59ab50b960ee1
1 /*
2 * SuperH Mobile LCDC Framebuffer
4 * Copyright (c) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/mm.h>
15 #include <linux/clk.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/interrupt.h>
20 #include <linux/vmalloc.h>
21 #include <linux/ioctl.h>
22 #include <linux/slab.h>
23 #include <linux/console.h>
24 #include <video/sh_mobile_lcdc.h>
25 #include <asm/atomic.h>
27 #include "sh_mobile_lcdcfb.h"
29 #define SIDE_B_OFFSET 0x1000
30 #define MIRROR_OFFSET 0x2000
32 /* shared registers */
33 #define _LDDCKR 0x410
34 #define _LDDCKSTPR 0x414
35 #define _LDINTR 0x468
36 #define _LDSR 0x46c
37 #define _LDCNT1R 0x470
38 #define _LDCNT2R 0x474
39 #define _LDRCNTR 0x478
40 #define _LDDDSR 0x47c
41 #define _LDDWD0R 0x800
42 #define _LDDRDR 0x840
43 #define _LDDWAR 0x900
44 #define _LDDRAR 0x904
46 /* shared registers and their order for context save/restore */
47 static int lcdc_shared_regs[] = {
48 _LDDCKR,
49 _LDDCKSTPR,
50 _LDINTR,
51 _LDDDSR,
52 _LDCNT1R,
53 _LDCNT2R,
55 #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
57 #define DEFAULT_XRES 1280
58 #define DEFAULT_YRES 1024
60 static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
61 [LDDCKPAT1R] = 0x400,
62 [LDDCKPAT2R] = 0x404,
63 [LDMT1R] = 0x418,
64 [LDMT2R] = 0x41c,
65 [LDMT3R] = 0x420,
66 [LDDFR] = 0x424,
67 [LDSM1R] = 0x428,
68 [LDSM2R] = 0x42c,
69 [LDSA1R] = 0x430,
70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
76 [LDHAJR] = 0x4a0,
79 static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
87 [LDSM2R] = 0x614,
88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
97 #define START_LCDC 0x00000001
98 #define LCDC_RESET 0x00000100
99 #define DISPLAY_BEU 0x00000008
100 #define LCDC_ENABLE 0x00000001
101 #define LDINTR_FE 0x00000400
102 #define LDINTR_VSE 0x00000200
103 #define LDINTR_VEE 0x00000100
104 #define LDINTR_FS 0x00000004
105 #define LDINTR_VSS 0x00000002
106 #define LDINTR_VES 0x00000001
107 #define LDRCNTR_SRS 0x00020000
108 #define LDRCNTR_SRC 0x00010000
109 #define LDRCNTR_MRS 0x00000002
110 #define LDRCNTR_MRC 0x00000001
111 #define LDSR_MRS 0x00000100
113 static const struct fb_videomode default_720p = {
114 .name = "HDMI 720p",
115 .xres = 1280,
116 .yres = 720,
118 .left_margin = 220,
119 .right_margin = 110,
120 .hsync_len = 40,
122 .upper_margin = 20,
123 .lower_margin = 5,
124 .vsync_len = 5,
126 .pixclock = 13468,
127 .refresh = 60,
128 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
131 struct sh_mobile_lcdc_priv {
132 void __iomem *base;
133 int irq;
134 atomic_t hw_usecnt;
135 struct device *dev;
136 struct clk *dot_clk;
137 unsigned long lddckr;
138 struct sh_mobile_lcdc_chan ch[2];
139 struct notifier_block notifier;
140 unsigned long saved_shared_regs[NR_SHARED_REGS];
141 int started;
144 static bool banked(int reg_nr)
146 switch (reg_nr) {
147 case LDMT1R:
148 case LDMT2R:
149 case LDMT3R:
150 case LDDFR:
151 case LDSM1R:
152 case LDSA1R:
153 case LDMLSR:
154 case LDHCNR:
155 case LDHSYNR:
156 case LDVLNR:
157 case LDVSYNR:
158 return true;
160 return false;
163 static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
164 int reg_nr, unsigned long data)
166 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
167 if (banked(reg_nr))
168 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
169 SIDE_B_OFFSET);
172 static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
173 int reg_nr, unsigned long data)
175 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
176 MIRROR_OFFSET);
179 static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
180 int reg_nr)
182 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
185 static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
186 unsigned long reg_offs, unsigned long data)
188 iowrite32(data, priv->base + reg_offs);
191 static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
192 unsigned long reg_offs)
194 return ioread32(priv->base + reg_offs);
197 static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
198 unsigned long reg_offs,
199 unsigned long mask, unsigned long until)
201 while ((lcdc_read(priv, reg_offs) & mask) != until)
202 cpu_relax();
205 static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
207 return chan->cfg.chan == LCDC_CHAN_SUBLCD;
210 static void lcdc_sys_write_index(void *handle, unsigned long data)
212 struct sh_mobile_lcdc_chan *ch = handle;
214 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
215 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
216 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
217 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
220 static void lcdc_sys_write_data(void *handle, unsigned long data)
222 struct sh_mobile_lcdc_chan *ch = handle;
224 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
225 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
226 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
227 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
230 static unsigned long lcdc_sys_read_data(void *handle)
232 struct sh_mobile_lcdc_chan *ch = handle;
234 lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
235 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
236 lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
237 udelay(1);
238 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
240 return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
243 struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
244 lcdc_sys_write_index,
245 lcdc_sys_write_data,
246 lcdc_sys_read_data,
249 static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
251 if (atomic_inc_and_test(&priv->hw_usecnt)) {
252 pm_runtime_get_sync(priv->dev);
253 if (priv->dot_clk)
254 clk_enable(priv->dot_clk);
258 static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
260 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
261 if (priv->dot_clk)
262 clk_disable(priv->dot_clk);
263 pm_runtime_put(priv->dev);
267 static int sh_mobile_lcdc_sginit(struct fb_info *info,
268 struct list_head *pagelist)
270 struct sh_mobile_lcdc_chan *ch = info->par;
271 unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
272 struct page *page;
273 int nr_pages = 0;
275 sg_init_table(ch->sglist, nr_pages_max);
277 list_for_each_entry(page, pagelist, lru)
278 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
280 return nr_pages;
283 static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
284 struct list_head *pagelist)
286 struct sh_mobile_lcdc_chan *ch = info->par;
287 struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
289 /* enable clocks before accessing hardware */
290 sh_mobile_lcdc_clk_on(ch->lcdc);
293 * It's possible to get here without anything on the pagelist via
294 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
295 * invocation. In the former case, the acceleration routines are
296 * stepped in to when using the framebuffer console causing the
297 * workqueue to be scheduled without any dirty pages on the list.
299 * Despite this, a panel update is still needed given that the
300 * acceleration routines have their own methods for writing in
301 * that still need to be updated.
303 * The fsync() and empty pagelist case could be optimized for,
304 * but we don't bother, as any application exhibiting such
305 * behaviour is fundamentally broken anyways.
307 if (!list_empty(pagelist)) {
308 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
310 /* trigger panel update */
311 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
312 if (bcfg->start_transfer)
313 bcfg->start_transfer(bcfg->board_data, ch,
314 &sh_mobile_lcdc_sys_bus_ops);
315 lcdc_write_chan(ch, LDSM2R, 1);
316 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
317 } else {
318 if (bcfg->start_transfer)
319 bcfg->start_transfer(bcfg->board_data, ch,
320 &sh_mobile_lcdc_sys_bus_ops);
321 lcdc_write_chan(ch, LDSM2R, 1);
325 static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
327 struct fb_deferred_io *fbdefio = info->fbdefio;
329 if (fbdefio)
330 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
333 static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
335 struct sh_mobile_lcdc_priv *priv = data;
336 struct sh_mobile_lcdc_chan *ch;
337 unsigned long tmp;
338 unsigned long ldintr;
339 int is_sub;
340 int k;
342 /* acknowledge interrupt */
343 ldintr = tmp = lcdc_read(priv, _LDINTR);
345 * disable further VSYNC End IRQs, preserve all other enabled IRQs,
346 * write 0 to bits 0-6 to ack all triggered IRQs.
348 tmp &= 0xffffff00 & ~LDINTR_VEE;
349 lcdc_write(priv, _LDINTR, tmp);
351 /* figure out if this interrupt is for main or sub lcd */
352 is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
354 /* wake up channel and disable clocks */
355 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
356 ch = &priv->ch[k];
358 if (!ch->enabled)
359 continue;
361 /* Frame Start */
362 if (ldintr & LDINTR_FS) {
363 if (is_sub == lcdc_chan_is_sublcd(ch)) {
364 ch->frame_end = 1;
365 wake_up(&ch->frame_end_wait);
367 sh_mobile_lcdc_clk_off(priv);
371 /* VSYNC End */
372 if (ldintr & LDINTR_VES)
373 complete(&ch->vsync_completion);
376 return IRQ_HANDLED;
379 static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
380 int start)
382 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
383 int k;
385 /* start or stop the lcdc */
386 if (start)
387 lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
388 else
389 lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
391 /* wait until power is applied/stopped on all channels */
392 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
393 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
394 while (1) {
395 tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
396 if (start && tmp == 3)
397 break;
398 if (!start && tmp == 0)
399 break;
400 cpu_relax();
403 if (!start)
404 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
407 static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
409 struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
410 unsigned long h_total, hsync_pos, display_h_total;
411 u32 tmp;
413 tmp = ch->ldmt1r_value;
414 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
415 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
416 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
417 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
418 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
419 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
420 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
421 lcdc_write_chan(ch, LDMT1R, tmp);
423 /* setup SYS bus */
424 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
425 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
427 /* horizontal configuration */
428 h_total = display_var->xres + display_var->hsync_len +
429 display_var->left_margin + display_var->right_margin;
430 tmp = h_total / 8; /* HTCN */
431 tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
432 lcdc_write_chan(ch, LDHCNR, tmp);
434 hsync_pos = display_var->xres + display_var->right_margin;
435 tmp = hsync_pos / 8; /* HSYNP */
436 tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
437 lcdc_write_chan(ch, LDHSYNR, tmp);
439 /* vertical configuration */
440 tmp = display_var->yres + display_var->vsync_len +
441 display_var->upper_margin + display_var->lower_margin; /* VTLN */
442 tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
443 lcdc_write_chan(ch, LDVLNR, tmp);
445 tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
446 tmp |= display_var->vsync_len << 16; /* VSYNW */
447 lcdc_write_chan(ch, LDVSYNR, tmp);
449 /* Adjust horizontal synchronisation for HDMI */
450 display_h_total = display_var->xres + display_var->hsync_len +
451 display_var->left_margin + display_var->right_margin;
452 tmp = ((display_var->xres & 7) << 24) |
453 ((display_h_total & 7) << 16) |
454 ((display_var->hsync_len & 7) << 8) |
455 hsync_pos;
456 lcdc_write_chan(ch, LDHAJR, tmp);
459 static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
461 struct sh_mobile_lcdc_chan *ch;
462 struct sh_mobile_lcdc_board_cfg *board_cfg;
463 unsigned long tmp;
464 int k, m;
465 int ret = 0;
467 /* enable clocks before accessing the hardware */
468 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
469 if (priv->ch[k].enabled)
470 sh_mobile_lcdc_clk_on(priv);
472 /* reset */
473 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
474 lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
476 /* enable LCDC channels */
477 tmp = lcdc_read(priv, _LDCNT2R);
478 tmp |= priv->ch[0].enabled;
479 tmp |= priv->ch[1].enabled;
480 lcdc_write(priv, _LDCNT2R, tmp);
482 /* read data from external memory, avoid using the BEU for now */
483 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
485 /* stop the lcdc first */
486 sh_mobile_lcdc_start_stop(priv, 0);
488 /* configure clocks */
489 tmp = priv->lddckr;
490 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
491 ch = &priv->ch[k];
493 if (!priv->ch[k].enabled)
494 continue;
496 m = ch->cfg.clock_divider;
497 if (!m)
498 continue;
500 if (m == 1)
501 m = 1 << 6;
502 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
504 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
505 lcdc_write_chan(ch, LDDCKPAT1R, 0);
506 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
509 lcdc_write(priv, _LDDCKR, tmp);
511 /* start dotclock again */
512 lcdc_write(priv, _LDDCKSTPR, 0);
513 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
515 /* interrupts are disabled to begin with */
516 lcdc_write(priv, _LDINTR, 0);
518 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
519 ch = &priv->ch[k];
521 if (!ch->enabled)
522 continue;
524 sh_mobile_lcdc_geometry(ch);
526 /* power supply */
527 lcdc_write_chan(ch, LDPMR, 0);
529 board_cfg = &ch->cfg.board_cfg;
530 if (board_cfg->setup_sys)
531 ret = board_cfg->setup_sys(board_cfg->board_data, ch,
532 &sh_mobile_lcdc_sys_bus_ops);
533 if (ret)
534 return ret;
537 /* word and long word swap */
538 lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
540 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
541 ch = &priv->ch[k];
543 if (!priv->ch[k].enabled)
544 continue;
546 /* set bpp format in PKF[4:0] */
547 tmp = lcdc_read_chan(ch, LDDFR);
548 tmp &= ~0x0001001f;
549 tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
550 lcdc_write_chan(ch, LDDFR, tmp);
552 /* point out our frame buffer */
553 lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
555 /* set line size */
556 lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
558 /* setup deferred io if SYS bus */
559 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
560 if (ch->ldmt1r_value & (1 << 12) && tmp) {
561 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
562 ch->defio.delay = msecs_to_jiffies(tmp);
563 ch->info->fbdefio = &ch->defio;
564 fb_deferred_io_init(ch->info);
566 /* one-shot mode */
567 lcdc_write_chan(ch, LDSM1R, 1);
569 /* enable "Frame End Interrupt Enable" bit */
570 lcdc_write(priv, _LDINTR, LDINTR_FE);
572 } else {
573 /* continuous read mode */
574 lcdc_write_chan(ch, LDSM1R, 0);
578 /* display output */
579 lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
581 /* start the lcdc */
582 sh_mobile_lcdc_start_stop(priv, 1);
583 priv->started = 1;
585 /* tell the board code to enable the panel */
586 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
587 ch = &priv->ch[k];
588 if (!ch->enabled)
589 continue;
591 board_cfg = &ch->cfg.board_cfg;
592 if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
593 board_cfg->display_on(board_cfg->board_data, ch->info);
594 module_put(board_cfg->owner);
598 return 0;
601 static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
603 struct sh_mobile_lcdc_chan *ch;
604 struct sh_mobile_lcdc_board_cfg *board_cfg;
605 int k;
607 /* clean up deferred io and ask board code to disable panel */
608 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
609 ch = &priv->ch[k];
610 if (!ch->enabled)
611 continue;
613 /* deferred io mode:
614 * flush frame, and wait for frame end interrupt
615 * clean up deferred io and enable clock
617 if (ch->info && ch->info->fbdefio) {
618 ch->frame_end = 0;
619 schedule_delayed_work(&ch->info->deferred_work, 0);
620 wait_event(ch->frame_end_wait, ch->frame_end);
621 fb_deferred_io_cleanup(ch->info);
622 ch->info->fbdefio = NULL;
623 sh_mobile_lcdc_clk_on(priv);
626 board_cfg = &ch->cfg.board_cfg;
627 if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
628 board_cfg->display_off(board_cfg->board_data);
629 module_put(board_cfg->owner);
633 /* stop the lcdc */
634 if (priv->started) {
635 sh_mobile_lcdc_start_stop(priv, 0);
636 priv->started = 0;
639 /* stop clocks */
640 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
641 if (priv->ch[k].enabled)
642 sh_mobile_lcdc_clk_off(priv);
645 static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
647 int ifm, miftyp;
649 switch (ch->cfg.interface_type) {
650 case RGB8: ifm = 0; miftyp = 0; break;
651 case RGB9: ifm = 0; miftyp = 4; break;
652 case RGB12A: ifm = 0; miftyp = 5; break;
653 case RGB12B: ifm = 0; miftyp = 6; break;
654 case RGB16: ifm = 0; miftyp = 7; break;
655 case RGB18: ifm = 0; miftyp = 10; break;
656 case RGB24: ifm = 0; miftyp = 11; break;
657 case SYS8A: ifm = 1; miftyp = 0; break;
658 case SYS8B: ifm = 1; miftyp = 1; break;
659 case SYS8C: ifm = 1; miftyp = 2; break;
660 case SYS8D: ifm = 1; miftyp = 3; break;
661 case SYS9: ifm = 1; miftyp = 4; break;
662 case SYS12: ifm = 1; miftyp = 5; break;
663 case SYS16A: ifm = 1; miftyp = 7; break;
664 case SYS16B: ifm = 1; miftyp = 8; break;
665 case SYS16C: ifm = 1; miftyp = 9; break;
666 case SYS18: ifm = 1; miftyp = 10; break;
667 case SYS24: ifm = 1; miftyp = 11; break;
668 default: goto bad;
671 /* SUBLCD only supports SYS interface */
672 if (lcdc_chan_is_sublcd(ch)) {
673 if (ifm == 0)
674 goto bad;
675 else
676 ifm = 0;
679 ch->ldmt1r_value = (ifm << 12) | miftyp;
680 return 0;
681 bad:
682 return -EINVAL;
685 static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
686 int clock_source,
687 struct sh_mobile_lcdc_priv *priv)
689 char *str;
690 int icksel;
692 switch (clock_source) {
693 case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
694 case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
695 case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
696 default:
697 return -EINVAL;
700 priv->lddckr = icksel << 16;
702 if (str) {
703 priv->dot_clk = clk_get(&pdev->dev, str);
704 if (IS_ERR(priv->dot_clk)) {
705 dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
706 return PTR_ERR(priv->dot_clk);
710 /* Runtime PM support involves two step for this driver:
711 * 1) Enable Runtime PM
712 * 2) Force Runtime PM Resume since hardware is accessed from probe()
714 priv->dev = &pdev->dev;
715 pm_runtime_enable(priv->dev);
716 pm_runtime_resume(priv->dev);
717 return 0;
720 static int sh_mobile_lcdc_setcolreg(u_int regno,
721 u_int red, u_int green, u_int blue,
722 u_int transp, struct fb_info *info)
724 u32 *palette = info->pseudo_palette;
726 if (regno >= PALETTE_NR)
727 return -EINVAL;
729 /* only FB_VISUAL_TRUECOLOR supported */
731 red >>= 16 - info->var.red.length;
732 green >>= 16 - info->var.green.length;
733 blue >>= 16 - info->var.blue.length;
734 transp >>= 16 - info->var.transp.length;
736 palette[regno] = (red << info->var.red.offset) |
737 (green << info->var.green.offset) |
738 (blue << info->var.blue.offset) |
739 (transp << info->var.transp.offset);
741 return 0;
744 static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
745 .id = "SH Mobile LCDC",
746 .type = FB_TYPE_PACKED_PIXELS,
747 .visual = FB_VISUAL_TRUECOLOR,
748 .accel = FB_ACCEL_NONE,
749 .xpanstep = 0,
750 .ypanstep = 1,
751 .ywrapstep = 0,
754 static void sh_mobile_lcdc_fillrect(struct fb_info *info,
755 const struct fb_fillrect *rect)
757 sys_fillrect(info, rect);
758 sh_mobile_lcdc_deferred_io_touch(info);
761 static void sh_mobile_lcdc_copyarea(struct fb_info *info,
762 const struct fb_copyarea *area)
764 sys_copyarea(info, area);
765 sh_mobile_lcdc_deferred_io_touch(info);
768 static void sh_mobile_lcdc_imageblit(struct fb_info *info,
769 const struct fb_image *image)
771 sys_imageblit(info, image);
772 sh_mobile_lcdc_deferred_io_touch(info);
775 static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
776 struct fb_info *info)
778 struct sh_mobile_lcdc_chan *ch = info->par;
779 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
780 unsigned long ldrcntr;
781 unsigned long new_pan_offset;
783 new_pan_offset = (var->yoffset * info->fix.line_length) +
784 (var->xoffset * (info->var.bits_per_pixel / 8));
786 if (new_pan_offset == ch->pan_offset)
787 return 0; /* No change, do nothing */
789 ldrcntr = lcdc_read(priv, _LDRCNTR);
791 /* Set the source address for the next refresh */
792 lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
793 if (lcdc_chan_is_sublcd(ch))
794 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
795 else
796 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
798 ch->pan_offset = new_pan_offset;
800 sh_mobile_lcdc_deferred_io_touch(info);
802 return 0;
805 static int sh_mobile_wait_for_vsync(struct fb_info *info)
807 struct sh_mobile_lcdc_chan *ch = info->par;
808 unsigned long ldintr;
809 int ret;
811 /* Enable VSync End interrupt */
812 ldintr = lcdc_read(ch->lcdc, _LDINTR);
813 ldintr |= LDINTR_VEE;
814 lcdc_write(ch->lcdc, _LDINTR, ldintr);
816 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
817 msecs_to_jiffies(100));
818 if (!ret)
819 return -ETIMEDOUT;
821 return 0;
824 static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
825 unsigned long arg)
827 int retval;
829 switch (cmd) {
830 case FBIO_WAITFORVSYNC:
831 retval = sh_mobile_wait_for_vsync(info);
832 break;
834 default:
835 retval = -ENOIOCTLCMD;
836 break;
838 return retval;
841 static void sh_mobile_fb_reconfig(struct fb_info *info)
843 struct sh_mobile_lcdc_chan *ch = info->par;
844 struct fb_videomode mode1, mode2;
845 struct fb_event event;
846 int evnt = FB_EVENT_MODE_CHANGE_ALL;
848 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
849 /* More framebuffer users are active */
850 return;
852 fb_var_to_videomode(&mode1, &ch->display_var);
853 fb_var_to_videomode(&mode2, &info->var);
855 if (fb_mode_is_equal(&mode1, &mode2))
856 return;
858 /* Display has been re-plugged, framebuffer is free now, reconfigure */
859 if (fb_set_var(info, &ch->display_var) < 0)
860 /* Couldn't reconfigure, hopefully, can continue as before */
861 return;
863 info->fix.line_length = mode2.xres * (ch->cfg.bpp / 8);
866 * fb_set_var() calls the notifier change internally, only if
867 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
868 * user event, we have to call the chain ourselves.
870 event.info = info;
871 event.data = &mode2;
872 fb_notifier_call_chain(evnt, &event);
876 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
877 * user == 1, or with console sem held, if user == 0.
879 static int sh_mobile_release(struct fb_info *info, int user)
881 struct sh_mobile_lcdc_chan *ch = info->par;
883 mutex_lock(&ch->open_lock);
884 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
886 ch->use_count--;
888 /* Nothing to reconfigure, when called from fbcon */
889 if (user) {
890 acquire_console_sem();
891 sh_mobile_fb_reconfig(info);
892 release_console_sem();
895 mutex_unlock(&ch->open_lock);
897 return 0;
900 static int sh_mobile_open(struct fb_info *info, int user)
902 struct sh_mobile_lcdc_chan *ch = info->par;
904 mutex_lock(&ch->open_lock);
905 ch->use_count++;
907 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
908 mutex_unlock(&ch->open_lock);
910 return 0;
913 static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
915 struct sh_mobile_lcdc_chan *ch = info->par;
917 if (var->xres < 160 || var->xres > 1920 ||
918 var->yres < 120 || var->yres > 1080 ||
919 var->left_margin < 32 || var->left_margin > 320 ||
920 var->right_margin < 12 || var->right_margin > 240 ||
921 var->upper_margin < 12 || var->upper_margin > 120 ||
922 var->lower_margin < 1 || var->lower_margin > 64 ||
923 var->hsync_len < 32 || var->hsync_len > 240 ||
924 var->vsync_len < 2 || var->vsync_len > 64 ||
925 var->pixclock < 6000 || var->pixclock > 40000 ||
926 var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
927 dev_warn(info->dev, "Invalid info: %u %u %u %u %u %u %u %u %u!\n",
928 var->xres, var->yres,
929 var->left_margin, var->right_margin,
930 var->upper_margin, var->lower_margin,
931 var->hsync_len, var->vsync_len,
932 var->pixclock);
933 return -EINVAL;
935 return 0;
938 static struct fb_ops sh_mobile_lcdc_ops = {
939 .owner = THIS_MODULE,
940 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
941 .fb_read = fb_sys_read,
942 .fb_write = fb_sys_write,
943 .fb_fillrect = sh_mobile_lcdc_fillrect,
944 .fb_copyarea = sh_mobile_lcdc_copyarea,
945 .fb_imageblit = sh_mobile_lcdc_imageblit,
946 .fb_pan_display = sh_mobile_fb_pan_display,
947 .fb_ioctl = sh_mobile_ioctl,
948 .fb_open = sh_mobile_open,
949 .fb_release = sh_mobile_release,
950 .fb_check_var = sh_mobile_check_var,
953 static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
955 switch (bpp) {
956 case 16: /* PKF[4:0] = 00011 - RGB 565 */
957 var->red.offset = 11;
958 var->red.length = 5;
959 var->green.offset = 5;
960 var->green.length = 6;
961 var->blue.offset = 0;
962 var->blue.length = 5;
963 var->transp.offset = 0;
964 var->transp.length = 0;
965 break;
967 case 32: /* PKF[4:0] = 00000 - RGB 888
968 * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
969 * this may be because LDDDSR has word swap enabled..
971 var->red.offset = 0;
972 var->red.length = 8;
973 var->green.offset = 24;
974 var->green.length = 8;
975 var->blue.offset = 16;
976 var->blue.length = 8;
977 var->transp.offset = 0;
978 var->transp.length = 0;
979 break;
980 default:
981 return -EINVAL;
983 var->bits_per_pixel = bpp;
984 var->red.msb_right = 0;
985 var->green.msb_right = 0;
986 var->blue.msb_right = 0;
987 var->transp.msb_right = 0;
988 return 0;
991 static int sh_mobile_lcdc_suspend(struct device *dev)
993 struct platform_device *pdev = to_platform_device(dev);
995 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
996 return 0;
999 static int sh_mobile_lcdc_resume(struct device *dev)
1001 struct platform_device *pdev = to_platform_device(dev);
1003 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1006 static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1008 struct platform_device *pdev = to_platform_device(dev);
1009 struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
1010 struct sh_mobile_lcdc_chan *ch;
1011 int k, n;
1013 /* save per-channel registers */
1014 for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
1015 ch = &p->ch[k];
1016 if (!ch->enabled)
1017 continue;
1018 for (n = 0; n < NR_CH_REGS; n++)
1019 ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
1022 /* save shared registers */
1023 for (n = 0; n < NR_SHARED_REGS; n++)
1024 p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
1026 /* turn off LCDC hardware */
1027 lcdc_write(p, _LDCNT1R, 0);
1028 return 0;
1031 static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1033 struct platform_device *pdev = to_platform_device(dev);
1034 struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
1035 struct sh_mobile_lcdc_chan *ch;
1036 int k, n;
1038 /* restore per-channel registers */
1039 for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
1040 ch = &p->ch[k];
1041 if (!ch->enabled)
1042 continue;
1043 for (n = 0; n < NR_CH_REGS; n++)
1044 lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
1047 /* restore shared registers */
1048 for (n = 0; n < NR_SHARED_REGS; n++)
1049 lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
1051 return 0;
1054 static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
1055 .suspend = sh_mobile_lcdc_suspend,
1056 .resume = sh_mobile_lcdc_resume,
1057 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1058 .runtime_resume = sh_mobile_lcdc_runtime_resume,
1061 /* locking: called with info->lock held */
1062 static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1063 unsigned long action, void *data)
1065 struct fb_event *event = data;
1066 struct fb_info *info = event->info;
1067 struct sh_mobile_lcdc_chan *ch = info->par;
1068 struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
1069 int ret;
1071 if (&ch->lcdc->notifier != nb)
1072 return NOTIFY_DONE;
1074 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1075 __func__, action, event->data);
1077 switch(action) {
1078 case FB_EVENT_SUSPEND:
1079 if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
1080 board_cfg->display_off(board_cfg->board_data);
1081 module_put(board_cfg->owner);
1083 pm_runtime_put(info->device);
1084 sh_mobile_lcdc_stop(ch->lcdc);
1085 break;
1086 case FB_EVENT_RESUME:
1087 mutex_lock(&ch->open_lock);
1088 sh_mobile_fb_reconfig(info);
1089 mutex_unlock(&ch->open_lock);
1091 /* HDMI must be enabled before LCDC configuration */
1092 if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
1093 board_cfg->display_on(board_cfg->board_data, info);
1094 module_put(board_cfg->owner);
1097 ret = sh_mobile_lcdc_start(ch->lcdc);
1098 if (!ret)
1099 pm_runtime_get_sync(info->device);
1102 return NOTIFY_OK;
1105 static int sh_mobile_lcdc_remove(struct platform_device *pdev);
1107 static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1109 struct fb_info *info;
1110 struct sh_mobile_lcdc_priv *priv;
1111 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
1112 struct resource *res;
1113 int error;
1114 void *buf;
1115 int i, j;
1117 if (!pdata) {
1118 dev_err(&pdev->dev, "no platform data defined\n");
1119 return -EINVAL;
1122 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1123 i = platform_get_irq(pdev, 0);
1124 if (!res || i < 0) {
1125 dev_err(&pdev->dev, "cannot get platform resources\n");
1126 return -ENOENT;
1129 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1130 if (!priv) {
1131 dev_err(&pdev->dev, "cannot allocate device data\n");
1132 return -ENOMEM;
1135 platform_set_drvdata(pdev, priv);
1137 error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
1138 dev_name(&pdev->dev), priv);
1139 if (error) {
1140 dev_err(&pdev->dev, "unable to request irq\n");
1141 goto err1;
1144 priv->irq = i;
1145 atomic_set(&priv->hw_usecnt, -1);
1147 j = 0;
1148 for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1149 struct sh_mobile_lcdc_chan *ch = priv->ch + j;
1151 ch->lcdc = priv;
1152 memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
1154 error = sh_mobile_lcdc_check_interface(ch);
1155 if (error) {
1156 dev_err(&pdev->dev, "unsupported interface type\n");
1157 goto err1;
1159 init_waitqueue_head(&ch->frame_end_wait);
1160 init_completion(&ch->vsync_completion);
1161 ch->pan_offset = 0;
1163 switch (pdata->ch[i].chan) {
1164 case LCDC_CHAN_MAINLCD:
1165 ch->enabled = 1 << 1;
1166 ch->reg_offs = lcdc_offs_mainlcd;
1167 j++;
1168 break;
1169 case LCDC_CHAN_SUBLCD:
1170 ch->enabled = 1 << 2;
1171 ch->reg_offs = lcdc_offs_sublcd;
1172 j++;
1173 break;
1177 if (!j) {
1178 dev_err(&pdev->dev, "no channels defined\n");
1179 error = -EINVAL;
1180 goto err1;
1183 priv->base = ioremap_nocache(res->start, resource_size(res));
1184 if (!priv->base)
1185 goto err1;
1187 error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
1188 if (error) {
1189 dev_err(&pdev->dev, "unable to setup clocks\n");
1190 goto err1;
1193 for (i = 0; i < j; i++) {
1194 struct fb_var_screeninfo *var;
1195 const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
1196 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1197 struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
1198 const struct fb_videomode *mode = cfg->lcd_cfg;
1199 unsigned long max_size = 0;
1200 int k;
1201 int num_cfg;
1203 ch->info = framebuffer_alloc(0, &pdev->dev);
1204 if (!ch->info) {
1205 dev_err(&pdev->dev, "unable to allocate fb_info\n");
1206 error = -ENOMEM;
1207 break;
1210 info = ch->info;
1211 var = &info->var;
1212 info->fbops = &sh_mobile_lcdc_ops;
1213 info->par = ch;
1215 mutex_init(&ch->open_lock);
1217 for (k = 0, lcd_cfg = mode;
1218 k < cfg->num_cfg && lcd_cfg;
1219 k++, lcd_cfg++) {
1220 unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
1222 if (size > max_size) {
1223 max_cfg = lcd_cfg;
1224 max_size = size;
1228 if (!mode)
1229 max_size = DEFAULT_XRES * DEFAULT_YRES;
1230 else if (max_cfg)
1231 dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
1232 max_cfg->xres, max_cfg->yres);
1234 info->fix = sh_mobile_lcdc_fix;
1235 info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
1237 if (!mode) {
1238 mode = &default_720p;
1239 num_cfg = 1;
1240 } else {
1241 num_cfg = ch->cfg.num_cfg;
1244 fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
1246 fb_videomode_to_var(var, mode);
1247 /* Default Y virtual resolution is 2x panel size */
1248 var->yres_virtual = var->yres * 2;
1249 var->activate = FB_ACTIVATE_NOW;
1251 error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
1252 if (error)
1253 break;
1255 buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
1256 &ch->dma_handle, GFP_KERNEL);
1257 if (!buf) {
1258 dev_err(&pdev->dev, "unable to allocate buffer\n");
1259 error = -ENOMEM;
1260 break;
1263 info->pseudo_palette = &ch->pseudo_palette;
1264 info->flags = FBINFO_FLAG_DEFAULT;
1266 error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1267 if (error < 0) {
1268 dev_err(&pdev->dev, "unable to allocate cmap\n");
1269 dma_free_coherent(&pdev->dev, info->fix.smem_len,
1270 buf, ch->dma_handle);
1271 break;
1274 info->fix.smem_start = ch->dma_handle;
1275 info->fix.line_length = var->xres * (cfg->bpp / 8);
1276 info->screen_base = buf;
1277 info->device = &pdev->dev;
1278 ch->display_var = *var;
1281 if (error)
1282 goto err1;
1284 error = sh_mobile_lcdc_start(priv);
1285 if (error) {
1286 dev_err(&pdev->dev, "unable to start hardware\n");
1287 goto err1;
1290 for (i = 0; i < j; i++) {
1291 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1293 info = ch->info;
1295 if (info->fbdefio) {
1296 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1297 info->fix.smem_len >> PAGE_SHIFT);
1298 if (!ch->sglist) {
1299 dev_err(&pdev->dev, "cannot allocate sglist\n");
1300 goto err1;
1304 error = register_framebuffer(info);
1305 if (error < 0)
1306 goto err1;
1308 dev_info(info->dev,
1309 "registered %s/%s as %dx%d %dbpp.\n",
1310 pdev->name,
1311 (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
1312 "mainlcd" : "sublcd",
1313 info->var.xres, info->var.yres,
1314 ch->cfg.bpp);
1316 /* deferred io mode: disable clock to save power */
1317 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
1318 sh_mobile_lcdc_clk_off(priv);
1321 /* Failure ignored */
1322 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
1323 fb_register_client(&priv->notifier);
1325 return 0;
1326 err1:
1327 sh_mobile_lcdc_remove(pdev);
1329 return error;
1332 static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1334 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
1335 struct fb_info *info;
1336 int i;
1338 fb_unregister_client(&priv->notifier);
1340 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
1341 if (priv->ch[i].info && priv->ch[i].info->dev)
1342 unregister_framebuffer(priv->ch[i].info);
1344 sh_mobile_lcdc_stop(priv);
1346 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1347 info = priv->ch[i].info;
1349 if (!info || !info->device)
1350 continue;
1352 if (priv->ch[i].sglist)
1353 vfree(priv->ch[i].sglist);
1355 if (info->screen_base)
1356 dma_free_coherent(&pdev->dev, info->fix.smem_len,
1357 info->screen_base,
1358 priv->ch[i].dma_handle);
1359 fb_dealloc_cmap(&info->cmap);
1360 framebuffer_release(info);
1363 if (priv->dot_clk)
1364 clk_put(priv->dot_clk);
1366 if (priv->dev)
1367 pm_runtime_disable(priv->dev);
1369 if (priv->base)
1370 iounmap(priv->base);
1372 if (priv->irq)
1373 free_irq(priv->irq, priv);
1374 kfree(priv);
1375 return 0;
1378 static struct platform_driver sh_mobile_lcdc_driver = {
1379 .driver = {
1380 .name = "sh_mobile_lcdc_fb",
1381 .owner = THIS_MODULE,
1382 .pm = &sh_mobile_lcdc_dev_pm_ops,
1384 .probe = sh_mobile_lcdc_probe,
1385 .remove = sh_mobile_lcdc_remove,
1388 static int __init sh_mobile_lcdc_init(void)
1390 return platform_driver_register(&sh_mobile_lcdc_driver);
1393 static void __exit sh_mobile_lcdc_exit(void)
1395 platform_driver_unregister(&sh_mobile_lcdc_driver);
1398 module_init(sh_mobile_lcdc_init);
1399 module_exit(sh_mobile_lcdc_exit);
1401 MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
1402 MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
1403 MODULE_LICENSE("GPL v2");