2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
21 #include <linux/netdevice.h>
22 #include <linux/skbuff.h>
23 #include <linux/ethtool.h>
24 #include <linux/rtnetlink.h>
30 #define BNAD_NUM_TXF_COUNTERS 12
31 #define BNAD_NUM_RXF_COUNTERS 10
32 #define BNAD_NUM_CQ_COUNTERS 3
33 #define BNAD_NUM_RXQ_COUNTERS 6
34 #define BNAD_NUM_TXQ_COUNTERS 5
36 #define BNAD_ETHTOOL_STATS_NUM \
37 (sizeof(struct rtnl_link_stats64) / sizeof(u64) + \
38 sizeof(struct bnad_drv_stats) / sizeof(u64) + \
39 offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64))
41 static char *bnad_net_stats_strings
[BNAD_ETHTOOL_STATS_NUM
] = {
63 "tx_heartbeat_errors",
86 "rxp_info_alloc_failed",
89 "tx_unmap_q_alloc_failed",
90 "rx_unmap_q_alloc_failed",
98 "mac_frame_1024_1518",
99 "mac_frame_1518_1522",
105 "mac_rx_control_frames",
107 "mac_rx_unknown_opcode",
108 "mac_rx_alignment_error",
109 "mac_rx_frame_length_error",
111 "mac_rx_carrier_sense_error",
124 "mac_tx_excessive_deferral",
125 "mac_tx_single_collision",
126 "mac_tx_muliple_collision",
127 "mac_tx_late_collision",
128 "mac_tx_excessive_collision",
129 "mac_tx_total_collision",
130 "mac_tx_pause_honored",
134 "mac_tx_control_frame",
147 "bpc_tx_zero_pause_0",
148 "bpc_tx_zero_pause_1",
149 "bpc_tx_zero_pause_2",
150 "bpc_tx_zero_pause_3",
151 "bpc_tx_zero_pause_4",
152 "bpc_tx_zero_pause_5",
153 "bpc_tx_zero_pause_6",
154 "bpc_tx_zero_pause_7",
155 "bpc_tx_first_pause_0",
156 "bpc_tx_first_pause_1",
157 "bpc_tx_first_pause_2",
158 "bpc_tx_first_pause_3",
159 "bpc_tx_first_pause_4",
160 "bpc_tx_first_pause_5",
161 "bpc_tx_first_pause_6",
162 "bpc_tx_first_pause_7",
172 "bpc_rx_zero_pause_0",
173 "bpc_rx_zero_pause_1",
174 "bpc_rx_zero_pause_2",
175 "bpc_rx_zero_pause_3",
176 "bpc_rx_zero_pause_4",
177 "bpc_rx_zero_pause_5",
178 "bpc_rx_zero_pause_6",
179 "bpc_rx_zero_pause_7",
180 "bpc_rx_first_pause_0",
181 "bpc_rx_first_pause_1",
182 "bpc_rx_first_pause_2",
183 "bpc_rx_first_pause_3",
184 "bpc_rx_first_pause_4",
185 "bpc_rx_first_pause_5",
186 "bpc_rx_first_pause_6",
187 "bpc_rx_first_pause_7",
191 "rad_rx_vlan_frames",
193 "rad_rx_ucast_octets",
196 "rad_rx_mcast_octets",
199 "rad_rx_bcast_octets",
203 "fc_rx_ucast_octets",
206 "fc_rx_mcast_octets",
209 "fc_rx_bcast_octets",
213 "fc_tx_ucast_octets",
216 "fc_tx_mcast_octets",
219 "fc_tx_bcast_octets",
222 "fc_tx_parity_errors",
224 "fc_tx_fid_parity_errors",
228 bnad_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
230 cmd
->supported
= SUPPORTED_10000baseT_Full
;
231 cmd
->advertising
= ADVERTISED_10000baseT_Full
;
232 cmd
->autoneg
= AUTONEG_DISABLE
;
233 cmd
->supported
|= SUPPORTED_FIBRE
;
234 cmd
->advertising
|= ADVERTISED_FIBRE
;
235 cmd
->port
= PORT_FIBRE
;
236 cmd
->phy_address
= 0;
238 if (netif_carrier_ok(netdev
)) {
239 cmd
->speed
= SPEED_10000
;
240 cmd
->duplex
= DUPLEX_FULL
;
245 cmd
->transceiver
= XCVR_EXTERNAL
;
253 bnad_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
255 /* 10G full duplex setting supported only */
256 if (cmd
->autoneg
== AUTONEG_ENABLE
)
257 return -EOPNOTSUPP
; else {
258 if ((cmd
->speed
== SPEED_10000
) && (cmd
->duplex
== DUPLEX_FULL
))
266 bnad_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*drvinfo
)
268 struct bnad
*bnad
= netdev_priv(netdev
);
269 struct bfa_ioc_attr
*ioc_attr
;
272 strcpy(drvinfo
->driver
, BNAD_NAME
);
273 strcpy(drvinfo
->version
, BNAD_VERSION
);
275 ioc_attr
= kzalloc(sizeof(*ioc_attr
), GFP_KERNEL
);
277 memset(ioc_attr
, 0, sizeof(*ioc_attr
));
278 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
279 bfa_nw_ioc_get_attr(&bnad
->bna
.device
.ioc
, ioc_attr
);
280 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
282 strncpy(drvinfo
->fw_version
, ioc_attr
->adapter_attr
.fw_ver
,
283 sizeof(drvinfo
->fw_version
) - 1);
287 strncpy(drvinfo
->bus_info
, pci_name(bnad
->pcidev
), ETHTOOL_BUSINFO_LEN
);
291 get_regs(struct bnad
*bnad
, u32
* regs
)
297 #define BNAD_GET_REG(addr) \
300 regs[num++] = readl(bnad->bar0 + (addr)); \
305 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
307 /* DMA Block Internal Registers */
308 BNAD_GET_REG(DMA_CTRL_REG0
);
309 BNAD_GET_REG(DMA_CTRL_REG1
);
310 BNAD_GET_REG(DMA_ERR_INT_STATUS
);
311 BNAD_GET_REG(DMA_ERR_INT_ENABLE
);
312 BNAD_GET_REG(DMA_ERR_INT_STATUS_SET
);
314 /* APP Block Register Address Offset from BAR0 */
315 BNAD_GET_REG(HOSTFN0_INT_STATUS
);
316 BNAD_GET_REG(HOSTFN0_INT_MASK
);
317 BNAD_GET_REG(HOST_PAGE_NUM_FN0
);
318 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN0
);
319 BNAD_GET_REG(FN0_PCIE_ERR_REG
);
320 BNAD_GET_REG(FN0_ERR_TYPE_STATUS_REG
);
321 BNAD_GET_REG(FN0_ERR_TYPE_MSK_STATUS_REG
);
323 BNAD_GET_REG(HOSTFN1_INT_STATUS
);
324 BNAD_GET_REG(HOSTFN1_INT_MASK
);
325 BNAD_GET_REG(HOST_PAGE_NUM_FN1
);
326 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN1
);
327 BNAD_GET_REG(FN1_PCIE_ERR_REG
);
328 BNAD_GET_REG(FN1_ERR_TYPE_STATUS_REG
);
329 BNAD_GET_REG(FN1_ERR_TYPE_MSK_STATUS_REG
);
331 BNAD_GET_REG(PCIE_MISC_REG
);
333 BNAD_GET_REG(HOST_SEM0_REG
);
334 BNAD_GET_REG(HOST_SEM1_REG
);
335 BNAD_GET_REG(HOST_SEM2_REG
);
336 BNAD_GET_REG(HOST_SEM3_REG
);
337 BNAD_GET_REG(HOST_SEM0_INFO_REG
);
338 BNAD_GET_REG(HOST_SEM1_INFO_REG
);
339 BNAD_GET_REG(HOST_SEM2_INFO_REG
);
340 BNAD_GET_REG(HOST_SEM3_INFO_REG
);
342 BNAD_GET_REG(TEMPSENSE_CNTL_REG
);
343 BNAD_GET_REG(TEMPSENSE_STAT_REG
);
345 BNAD_GET_REG(APP_LOCAL_ERR_STAT
);
346 BNAD_GET_REG(APP_LOCAL_ERR_MSK
);
348 BNAD_GET_REG(PCIE_LNK_ERR_STAT
);
349 BNAD_GET_REG(PCIE_LNK_ERR_MSK
);
351 BNAD_GET_REG(FCOE_FIP_ETH_TYPE
);
352 BNAD_GET_REG(RESV_ETH_TYPE
);
354 BNAD_GET_REG(HOSTFN2_INT_STATUS
);
355 BNAD_GET_REG(HOSTFN2_INT_MASK
);
356 BNAD_GET_REG(HOST_PAGE_NUM_FN2
);
357 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN2
);
358 BNAD_GET_REG(FN2_PCIE_ERR_REG
);
359 BNAD_GET_REG(FN2_ERR_TYPE_STATUS_REG
);
360 BNAD_GET_REG(FN2_ERR_TYPE_MSK_STATUS_REG
);
362 BNAD_GET_REG(HOSTFN3_INT_STATUS
);
363 BNAD_GET_REG(HOSTFN3_INT_MASK
);
364 BNAD_GET_REG(HOST_PAGE_NUM_FN3
);
365 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN3
);
366 BNAD_GET_REG(FN3_PCIE_ERR_REG
);
367 BNAD_GET_REG(FN3_ERR_TYPE_STATUS_REG
);
368 BNAD_GET_REG(FN3_ERR_TYPE_MSK_STATUS_REG
);
370 /* Host Command Status Registers */
371 reg_addr
= HOST_CMDSTS0_CLR_REG
;
372 for (i
= 0; i
< 16; i
++) {
373 BNAD_GET_REG(reg_addr
);
374 BNAD_GET_REG(reg_addr
+ 4);
375 BNAD_GET_REG(reg_addr
+ 8);
379 /* Function ID register */
380 BNAD_GET_REG(FNC_ID_REG
);
382 /* Function personality register */
383 BNAD_GET_REG(FNC_PERS_REG
);
385 /* Operation mode register */
386 BNAD_GET_REG(OP_MODE
);
389 BNAD_GET_REG(LPU0_MBOX_CTL_REG
);
390 BNAD_GET_REG(LPU0_MBOX_CMD_REG
);
391 BNAD_GET_REG(LPU0_MBOX_LINK_0REG
);
392 BNAD_GET_REG(LPU1_MBOX_LINK_0REG
);
393 BNAD_GET_REG(LPU0_MBOX_STATUS_0REG
);
394 BNAD_GET_REG(LPU1_MBOX_STATUS_0REG
);
395 BNAD_GET_REG(LPU0_ERR_STATUS_REG
);
396 BNAD_GET_REG(LPU0_ERR_SET_REG
);
399 BNAD_GET_REG(LPU1_MBOX_CTL_REG
);
400 BNAD_GET_REG(LPU1_MBOX_CMD_REG
);
401 BNAD_GET_REG(LPU0_MBOX_LINK_1REG
);
402 BNAD_GET_REG(LPU1_MBOX_LINK_1REG
);
403 BNAD_GET_REG(LPU0_MBOX_STATUS_1REG
);
404 BNAD_GET_REG(LPU1_MBOX_STATUS_1REG
);
405 BNAD_GET_REG(LPU1_ERR_STATUS_REG
);
406 BNAD_GET_REG(LPU1_ERR_SET_REG
);
409 BNAD_GET_REG(PSS_CTL_REG
);
410 BNAD_GET_REG(PSS_ERR_STATUS_REG
);
411 BNAD_GET_REG(ERR_STATUS_SET
);
412 BNAD_GET_REG(PSS_RAM_ERR_STATUS_REG
);
414 /* Catapult CPQ Registers */
415 BNAD_GET_REG(HOSTFN0_LPU0_MBOX0_CMD_STAT
);
416 BNAD_GET_REG(HOSTFN0_LPU1_MBOX0_CMD_STAT
);
417 BNAD_GET_REG(LPU0_HOSTFN0_MBOX0_CMD_STAT
);
418 BNAD_GET_REG(LPU1_HOSTFN0_MBOX0_CMD_STAT
);
420 BNAD_GET_REG(HOSTFN0_LPU0_MBOX1_CMD_STAT
);
421 BNAD_GET_REG(HOSTFN0_LPU1_MBOX1_CMD_STAT
);
422 BNAD_GET_REG(LPU0_HOSTFN0_MBOX1_CMD_STAT
);
423 BNAD_GET_REG(LPU1_HOSTFN0_MBOX1_CMD_STAT
);
425 BNAD_GET_REG(HOSTFN1_LPU0_MBOX0_CMD_STAT
);
426 BNAD_GET_REG(HOSTFN1_LPU1_MBOX0_CMD_STAT
);
427 BNAD_GET_REG(LPU0_HOSTFN1_MBOX0_CMD_STAT
);
428 BNAD_GET_REG(LPU1_HOSTFN1_MBOX0_CMD_STAT
);
430 BNAD_GET_REG(HOSTFN1_LPU0_MBOX1_CMD_STAT
);
431 BNAD_GET_REG(HOSTFN1_LPU1_MBOX1_CMD_STAT
);
432 BNAD_GET_REG(LPU0_HOSTFN1_MBOX1_CMD_STAT
);
433 BNAD_GET_REG(LPU1_HOSTFN1_MBOX1_CMD_STAT
);
435 BNAD_GET_REG(HOSTFN2_LPU0_MBOX0_CMD_STAT
);
436 BNAD_GET_REG(HOSTFN2_LPU1_MBOX0_CMD_STAT
);
437 BNAD_GET_REG(LPU0_HOSTFN2_MBOX0_CMD_STAT
);
438 BNAD_GET_REG(LPU1_HOSTFN2_MBOX0_CMD_STAT
);
440 BNAD_GET_REG(HOSTFN2_LPU0_MBOX1_CMD_STAT
);
441 BNAD_GET_REG(HOSTFN2_LPU1_MBOX1_CMD_STAT
);
442 BNAD_GET_REG(LPU0_HOSTFN2_MBOX1_CMD_STAT
);
443 BNAD_GET_REG(LPU1_HOSTFN2_MBOX1_CMD_STAT
);
445 BNAD_GET_REG(HOSTFN3_LPU0_MBOX0_CMD_STAT
);
446 BNAD_GET_REG(HOSTFN3_LPU1_MBOX0_CMD_STAT
);
447 BNAD_GET_REG(LPU0_HOSTFN3_MBOX0_CMD_STAT
);
448 BNAD_GET_REG(LPU1_HOSTFN3_MBOX0_CMD_STAT
);
450 BNAD_GET_REG(HOSTFN3_LPU0_MBOX1_CMD_STAT
);
451 BNAD_GET_REG(HOSTFN3_LPU1_MBOX1_CMD_STAT
);
452 BNAD_GET_REG(LPU0_HOSTFN3_MBOX1_CMD_STAT
);
453 BNAD_GET_REG(LPU1_HOSTFN3_MBOX1_CMD_STAT
);
455 /* Host Function Force Parity Error Registers */
456 BNAD_GET_REG(HOSTFN0_LPU_FORCE_PERR
);
457 BNAD_GET_REG(HOSTFN1_LPU_FORCE_PERR
);
458 BNAD_GET_REG(HOSTFN2_LPU_FORCE_PERR
);
459 BNAD_GET_REG(HOSTFN3_LPU_FORCE_PERR
);
461 /* LL Port[0|1] Halt Mask Registers */
462 BNAD_GET_REG(LL_HALT_MSK_P0
);
463 BNAD_GET_REG(LL_HALT_MSK_P1
);
465 /* LL Port[0|1] Error Mask Registers */
466 BNAD_GET_REG(LL_ERR_MSK_P0
);
467 BNAD_GET_REG(LL_ERR_MSK_P1
);
469 /* EMC FLI Registers */
470 BNAD_GET_REG(FLI_CMD_REG
);
471 BNAD_GET_REG(FLI_ADDR_REG
);
472 BNAD_GET_REG(FLI_CTL_REG
);
473 BNAD_GET_REG(FLI_WRDATA_REG
);
474 BNAD_GET_REG(FLI_RDDATA_REG
);
475 BNAD_GET_REG(FLI_DEV_STATUS_REG
);
476 BNAD_GET_REG(FLI_SIG_WD_REG
);
478 BNAD_GET_REG(FLI_DEV_VENDOR_REG
);
479 BNAD_GET_REG(FLI_ERR_STATUS_REG
);
481 /* RxAdm 0 Registers */
482 BNAD_GET_REG(RAD0_CTL_REG
);
483 BNAD_GET_REG(RAD0_PE_PARM_REG
);
484 BNAD_GET_REG(RAD0_BCN_REG
);
485 BNAD_GET_REG(RAD0_DEFAULT_REG
);
486 BNAD_GET_REG(RAD0_PROMISC_REG
);
487 BNAD_GET_REG(RAD0_BCNQ_REG
);
488 BNAD_GET_REG(RAD0_DEFAULTQ_REG
);
490 BNAD_GET_REG(RAD0_ERR_STS
);
491 BNAD_GET_REG(RAD0_SET_ERR_STS
);
492 BNAD_GET_REG(RAD0_ERR_INT_EN
);
493 BNAD_GET_REG(RAD0_FIRST_ERR
);
494 BNAD_GET_REG(RAD0_FORCE_ERR
);
496 BNAD_GET_REG(RAD0_MAC_MAN_1H
);
497 BNAD_GET_REG(RAD0_MAC_MAN_1L
);
498 BNAD_GET_REG(RAD0_MAC_MAN_2H
);
499 BNAD_GET_REG(RAD0_MAC_MAN_2L
);
500 BNAD_GET_REG(RAD0_MAC_MAN_3H
);
501 BNAD_GET_REG(RAD0_MAC_MAN_3L
);
502 BNAD_GET_REG(RAD0_MAC_MAN_4H
);
503 BNAD_GET_REG(RAD0_MAC_MAN_4L
);
505 BNAD_GET_REG(RAD0_LAST4_IP
);
507 /* RxAdm 1 Registers */
508 BNAD_GET_REG(RAD1_CTL_REG
);
509 BNAD_GET_REG(RAD1_PE_PARM_REG
);
510 BNAD_GET_REG(RAD1_BCN_REG
);
511 BNAD_GET_REG(RAD1_DEFAULT_REG
);
512 BNAD_GET_REG(RAD1_PROMISC_REG
);
513 BNAD_GET_REG(RAD1_BCNQ_REG
);
514 BNAD_GET_REG(RAD1_DEFAULTQ_REG
);
516 BNAD_GET_REG(RAD1_ERR_STS
);
517 BNAD_GET_REG(RAD1_SET_ERR_STS
);
518 BNAD_GET_REG(RAD1_ERR_INT_EN
);
521 BNAD_GET_REG(TXA0_CTRL_REG
);
522 /* TxA0 TSO Sequence # Registers (RO) */
523 for (i
= 0; i
< 8; i
++) {
524 BNAD_GET_REG(TXA0_TSO_TCP_SEQ_REG(i
));
525 BNAD_GET_REG(TXA0_TSO_IP_INFO_REG(i
));
529 BNAD_GET_REG(TXA1_CTRL_REG
);
530 /* TxA1 TSO Sequence # Registers (RO) */
531 for (i
= 0; i
< 8; i
++) {
532 BNAD_GET_REG(TXA1_TSO_TCP_SEQ_REG(i
));
533 BNAD_GET_REG(TXA1_TSO_IP_INFO_REG(i
));
537 BNAD_GET_REG(RXA0_CTL_REG
);
538 BNAD_GET_REG(RXA1_CTL_REG
);
541 BNAD_GET_REG(PLB0_ECM_TIMER_REG
);
542 BNAD_GET_REG(PLB0_RL_CTL
);
543 for (i
= 0; i
< 8; i
++)
544 BNAD_GET_REG(PLB0_RL_MAX_BC(i
));
545 BNAD_GET_REG(PLB0_RL_TU_PRIO
);
546 for (i
= 0; i
< 8; i
++)
547 BNAD_GET_REG(PLB0_RL_BYTE_CNT(i
));
548 BNAD_GET_REG(PLB0_RL_MIN_REG
);
549 BNAD_GET_REG(PLB0_RL_MAX_REG
);
550 BNAD_GET_REG(PLB0_EMS_ADD_REG
);
553 BNAD_GET_REG(PLB1_ECM_TIMER_REG
);
554 BNAD_GET_REG(PLB1_RL_CTL
);
555 for (i
= 0; i
< 8; i
++)
556 BNAD_GET_REG(PLB1_RL_MAX_BC(i
));
557 BNAD_GET_REG(PLB1_RL_TU_PRIO
);
558 for (i
= 0; i
< 8; i
++)
559 BNAD_GET_REG(PLB1_RL_BYTE_CNT(i
));
560 BNAD_GET_REG(PLB1_RL_MIN_REG
);
561 BNAD_GET_REG(PLB1_RL_MAX_REG
);
562 BNAD_GET_REG(PLB1_EMS_ADD_REG
);
564 /* HQM Control Register */
565 BNAD_GET_REG(HQM0_CTL_REG
);
566 BNAD_GET_REG(HQM0_RXQ_STOP_SEM
);
567 BNAD_GET_REG(HQM0_TXQ_STOP_SEM
);
568 BNAD_GET_REG(HQM1_CTL_REG
);
569 BNAD_GET_REG(HQM1_RXQ_STOP_SEM
);
570 BNAD_GET_REG(HQM1_TXQ_STOP_SEM
);
573 BNAD_GET_REG(LUT0_ERR_STS
);
574 BNAD_GET_REG(LUT0_SET_ERR_STS
);
575 BNAD_GET_REG(LUT1_ERR_STS
);
576 BNAD_GET_REG(LUT1_SET_ERR_STS
);
579 BNAD_GET_REG(TRC_CTL_REG
);
580 BNAD_GET_REG(TRC_MODS_REG
);
581 BNAD_GET_REG(TRC_TRGC_REG
);
582 BNAD_GET_REG(TRC_CNT1_REG
);
583 BNAD_GET_REG(TRC_CNT2_REG
);
584 BNAD_GET_REG(TRC_NXTS_REG
);
585 BNAD_GET_REG(TRC_DIRR_REG
);
586 for (i
= 0; i
< 10; i
++)
587 BNAD_GET_REG(TRC_TRGM_REG(i
));
588 for (i
= 0; i
< 10; i
++)
589 BNAD_GET_REG(TRC_NXTM_REG(i
));
590 for (i
= 0; i
< 10; i
++)
591 BNAD_GET_REG(TRC_STRM_REG(i
));
593 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
598 bnad_get_regs_len(struct net_device
*netdev
)
600 int ret
= get_regs(netdev_priv(netdev
), NULL
) * sizeof(u32
);
605 bnad_get_regs(struct net_device
*netdev
, struct ethtool_regs
*regs
, void *buf
)
607 memset(buf
, 0, bnad_get_regs_len(netdev
));
608 get_regs(netdev_priv(netdev
), buf
);
612 bnad_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wolinfo
)
614 wolinfo
->supported
= 0;
615 wolinfo
->wolopts
= 0;
619 bnad_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coalesce
)
621 struct bnad
*bnad
= netdev_priv(netdev
);
624 /* Lock rqd. to access bnad->bna_lock */
625 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
626 coalesce
->use_adaptive_rx_coalesce
=
627 (bnad
->cfg_flags
& BNAD_CF_DIM_ENABLED
) ? true : false;
628 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
630 coalesce
->rx_coalesce_usecs
= bnad
->rx_coalescing_timeo
*
631 BFI_COALESCING_TIMER_UNIT
;
632 coalesce
->tx_coalesce_usecs
= bnad
->tx_coalescing_timeo
*
633 BFI_COALESCING_TIMER_UNIT
;
634 coalesce
->tx_max_coalesced_frames
= BFI_TX_INTERPKT_COUNT
;
640 bnad_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coalesce
)
642 struct bnad
*bnad
= netdev_priv(netdev
);
644 int dim_timer_del
= 0;
646 if (coalesce
->rx_coalesce_usecs
== 0 ||
647 coalesce
->rx_coalesce_usecs
>
648 BFI_MAX_COALESCING_TIMEO
* BFI_COALESCING_TIMER_UNIT
)
651 if (coalesce
->tx_coalesce_usecs
== 0 ||
652 coalesce
->tx_coalesce_usecs
>
653 BFI_MAX_COALESCING_TIMEO
* BFI_COALESCING_TIMER_UNIT
)
656 mutex_lock(&bnad
->conf_mutex
);
658 * Do not need to store rx_coalesce_usecs here
659 * Every time DIM is disabled, we can get it from the
662 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
663 if (coalesce
->use_adaptive_rx_coalesce
) {
664 if (!(bnad
->cfg_flags
& BNAD_CF_DIM_ENABLED
)) {
665 bnad
->cfg_flags
|= BNAD_CF_DIM_ENABLED
;
666 bnad_dim_timer_start(bnad
);
669 if (bnad
->cfg_flags
& BNAD_CF_DIM_ENABLED
) {
670 bnad
->cfg_flags
&= ~BNAD_CF_DIM_ENABLED
;
671 dim_timer_del
= bnad_dim_timer_running(bnad
);
673 clear_bit(BNAD_RF_DIM_TIMER_RUNNING
,
675 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
676 del_timer_sync(&bnad
->dim_timer
);
677 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
679 bnad_rx_coalescing_timeo_set(bnad
);
682 if (bnad
->tx_coalescing_timeo
!= coalesce
->tx_coalesce_usecs
/
683 BFI_COALESCING_TIMER_UNIT
) {
684 bnad
->tx_coalescing_timeo
= coalesce
->tx_coalesce_usecs
/
685 BFI_COALESCING_TIMER_UNIT
;
686 bnad_tx_coalescing_timeo_set(bnad
);
689 if (bnad
->rx_coalescing_timeo
!= coalesce
->rx_coalesce_usecs
/
690 BFI_COALESCING_TIMER_UNIT
) {
691 bnad
->rx_coalescing_timeo
= coalesce
->rx_coalesce_usecs
/
692 BFI_COALESCING_TIMER_UNIT
;
694 if (!(bnad
->cfg_flags
& BNAD_CF_DIM_ENABLED
))
695 bnad_rx_coalescing_timeo_set(bnad
);
699 /* Add Tx Inter-pkt DMA count? */
701 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
703 mutex_unlock(&bnad
->conf_mutex
);
708 bnad_get_ringparam(struct net_device
*netdev
,
709 struct ethtool_ringparam
*ringparam
)
711 struct bnad
*bnad
= netdev_priv(netdev
);
713 ringparam
->rx_max_pending
= BNAD_MAX_Q_DEPTH
/ bnad_rxqs_per_cq
;
714 ringparam
->rx_mini_max_pending
= 0;
715 ringparam
->rx_jumbo_max_pending
= 0;
716 ringparam
->tx_max_pending
= BNAD_MAX_Q_DEPTH
;
718 ringparam
->rx_pending
= bnad
->rxq_depth
;
719 ringparam
->rx_mini_max_pending
= 0;
720 ringparam
->rx_jumbo_max_pending
= 0;
721 ringparam
->tx_pending
= bnad
->txq_depth
;
725 bnad_set_ringparam(struct net_device
*netdev
,
726 struct ethtool_ringparam
*ringparam
)
728 int i
, current_err
, err
= 0;
729 struct bnad
*bnad
= netdev_priv(netdev
);
731 mutex_lock(&bnad
->conf_mutex
);
732 if (ringparam
->rx_pending
== bnad
->rxq_depth
&&
733 ringparam
->tx_pending
== bnad
->txq_depth
) {
734 mutex_unlock(&bnad
->conf_mutex
);
738 if (ringparam
->rx_pending
< BNAD_MIN_Q_DEPTH
||
739 ringparam
->rx_pending
> BNAD_MAX_Q_DEPTH
/ bnad_rxqs_per_cq
||
740 !BNA_POWER_OF_2(ringparam
->rx_pending
)) {
741 mutex_unlock(&bnad
->conf_mutex
);
744 if (ringparam
->tx_pending
< BNAD_MIN_Q_DEPTH
||
745 ringparam
->tx_pending
> BNAD_MAX_Q_DEPTH
||
746 !BNA_POWER_OF_2(ringparam
->tx_pending
)) {
747 mutex_unlock(&bnad
->conf_mutex
);
751 if (ringparam
->rx_pending
!= bnad
->rxq_depth
) {
752 bnad
->rxq_depth
= ringparam
->rx_pending
;
753 for (i
= 0; i
< bnad
->num_rx
; i
++) {
754 if (!bnad
->rx_info
[i
].rx
)
756 bnad_cleanup_rx(bnad
, i
);
757 current_err
= bnad_setup_rx(bnad
, i
);
758 if (current_err
&& !err
)
762 if (ringparam
->tx_pending
!= bnad
->txq_depth
) {
763 bnad
->txq_depth
= ringparam
->tx_pending
;
764 for (i
= 0; i
< bnad
->num_tx
; i
++) {
765 if (!bnad
->tx_info
[i
].tx
)
767 bnad_cleanup_tx(bnad
, i
);
768 current_err
= bnad_setup_tx(bnad
, i
);
769 if (current_err
&& !err
)
774 mutex_unlock(&bnad
->conf_mutex
);
779 bnad_get_pauseparam(struct net_device
*netdev
,
780 struct ethtool_pauseparam
*pauseparam
)
782 struct bnad
*bnad
= netdev_priv(netdev
);
784 pauseparam
->autoneg
= 0;
785 pauseparam
->rx_pause
= bnad
->bna
.port
.pause_config
.rx_pause
;
786 pauseparam
->tx_pause
= bnad
->bna
.port
.pause_config
.tx_pause
;
790 bnad_set_pauseparam(struct net_device
*netdev
,
791 struct ethtool_pauseparam
*pauseparam
)
793 struct bnad
*bnad
= netdev_priv(netdev
);
794 struct bna_pause_config pause_config
;
797 if (pauseparam
->autoneg
== AUTONEG_ENABLE
)
800 mutex_lock(&bnad
->conf_mutex
);
801 if (pauseparam
->rx_pause
!= bnad
->bna
.port
.pause_config
.rx_pause
||
802 pauseparam
->tx_pause
!= bnad
->bna
.port
.pause_config
.tx_pause
) {
803 pause_config
.rx_pause
= pauseparam
->rx_pause
;
804 pause_config
.tx_pause
= pauseparam
->tx_pause
;
805 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
806 bna_port_pause_config(&bnad
->bna
.port
, &pause_config
, NULL
);
807 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
809 mutex_unlock(&bnad
->conf_mutex
);
814 bnad_get_rx_csum(struct net_device
*netdev
)
817 struct bnad
*bnad
= netdev_priv(netdev
);
819 rx_csum
= bnad
->rx_csum
;
824 bnad_set_rx_csum(struct net_device
*netdev
, u32 rx_csum
)
826 struct bnad
*bnad
= netdev_priv(netdev
);
828 mutex_lock(&bnad
->conf_mutex
);
829 bnad
->rx_csum
= rx_csum
;
830 mutex_unlock(&bnad
->conf_mutex
);
835 bnad_set_tx_csum(struct net_device
*netdev
, u32 tx_csum
)
837 struct bnad
*bnad
= netdev_priv(netdev
);
839 mutex_lock(&bnad
->conf_mutex
);
841 netdev
->features
|= NETIF_F_IP_CSUM
;
842 netdev
->features
|= NETIF_F_IPV6_CSUM
;
844 netdev
->features
&= ~NETIF_F_IP_CSUM
;
845 netdev
->features
&= ~NETIF_F_IPV6_CSUM
;
847 mutex_unlock(&bnad
->conf_mutex
);
852 bnad_set_tso(struct net_device
*netdev
, u32 tso
)
854 struct bnad
*bnad
= netdev_priv(netdev
);
856 mutex_lock(&bnad
->conf_mutex
);
858 netdev
->features
|= NETIF_F_TSO
;
859 netdev
->features
|= NETIF_F_TSO6
;
861 netdev
->features
&= ~NETIF_F_TSO
;
862 netdev
->features
&= ~NETIF_F_TSO6
;
864 mutex_unlock(&bnad
->conf_mutex
);
869 bnad_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* string
)
871 struct bnad
*bnad
= netdev_priv(netdev
);
875 mutex_lock(&bnad
->conf_mutex
);
879 for (i
= 0; i
< BNAD_ETHTOOL_STATS_NUM
; i
++) {
880 BUG_ON(!(strlen(bnad_net_stats_strings
[i
]) <
882 memcpy(string
, bnad_net_stats_strings
[i
],
884 string
+= ETH_GSTRING_LEN
;
886 bmap
= (u64
)bnad
->bna
.tx_mod
.txf_bmap
[0] |
887 ((u64
)bnad
->bna
.tx_mod
.txf_bmap
[1] << 32);
888 for (i
= 0; bmap
&& (i
< BFI_LL_TXF_ID_MAX
); i
++) {
890 sprintf(string
, "txf%d_ucast_octets", i
);
891 string
+= ETH_GSTRING_LEN
;
892 sprintf(string
, "txf%d_ucast", i
);
893 string
+= ETH_GSTRING_LEN
;
894 sprintf(string
, "txf%d_ucast_vlan", i
);
895 string
+= ETH_GSTRING_LEN
;
896 sprintf(string
, "txf%d_mcast_octets", i
);
897 string
+= ETH_GSTRING_LEN
;
898 sprintf(string
, "txf%d_mcast", i
);
899 string
+= ETH_GSTRING_LEN
;
900 sprintf(string
, "txf%d_mcast_vlan", i
);
901 string
+= ETH_GSTRING_LEN
;
902 sprintf(string
, "txf%d_bcast_octets", i
);
903 string
+= ETH_GSTRING_LEN
;
904 sprintf(string
, "txf%d_bcast", i
);
905 string
+= ETH_GSTRING_LEN
;
906 sprintf(string
, "txf%d_bcast_vlan", i
);
907 string
+= ETH_GSTRING_LEN
;
908 sprintf(string
, "txf%d_errors", i
);
909 string
+= ETH_GSTRING_LEN
;
910 sprintf(string
, "txf%d_filter_vlan", i
);
911 string
+= ETH_GSTRING_LEN
;
912 sprintf(string
, "txf%d_filter_mac_sa", i
);
913 string
+= ETH_GSTRING_LEN
;
918 bmap
= (u64
)bnad
->bna
.rx_mod
.rxf_bmap
[0] |
919 ((u64
)bnad
->bna
.rx_mod
.rxf_bmap
[1] << 32);
920 for (i
= 0; bmap
&& (i
< BFI_LL_RXF_ID_MAX
); i
++) {
922 sprintf(string
, "rxf%d_ucast_octets", i
);
923 string
+= ETH_GSTRING_LEN
;
924 sprintf(string
, "rxf%d_ucast", i
);
925 string
+= ETH_GSTRING_LEN
;
926 sprintf(string
, "rxf%d_ucast_vlan", i
);
927 string
+= ETH_GSTRING_LEN
;
928 sprintf(string
, "rxf%d_mcast_octets", i
);
929 string
+= ETH_GSTRING_LEN
;
930 sprintf(string
, "rxf%d_mcast", i
);
931 string
+= ETH_GSTRING_LEN
;
932 sprintf(string
, "rxf%d_mcast_vlan", i
);
933 string
+= ETH_GSTRING_LEN
;
934 sprintf(string
, "rxf%d_bcast_octets", i
);
935 string
+= ETH_GSTRING_LEN
;
936 sprintf(string
, "rxf%d_bcast", i
);
937 string
+= ETH_GSTRING_LEN
;
938 sprintf(string
, "rxf%d_bcast_vlan", i
);
939 string
+= ETH_GSTRING_LEN
;
940 sprintf(string
, "rxf%d_frame_drops", i
);
941 string
+= ETH_GSTRING_LEN
;
947 for (i
= 0; i
< bnad
->num_rx
; i
++) {
948 if (!bnad
->rx_info
[i
].rx
)
950 for (j
= 0; j
< bnad
->num_rxp_per_rx
; j
++) {
951 sprintf(string
, "cq%d_producer_index", q_num
);
952 string
+= ETH_GSTRING_LEN
;
953 sprintf(string
, "cq%d_consumer_index", q_num
);
954 string
+= ETH_GSTRING_LEN
;
955 sprintf(string
, "cq%d_hw_producer_index",
957 string
+= ETH_GSTRING_LEN
;
963 for (i
= 0; i
< bnad
->num_rx
; i
++) {
964 if (!bnad
->rx_info
[i
].rx
)
966 for (j
= 0; j
< bnad
->num_rxp_per_rx
; j
++) {
967 sprintf(string
, "rxq%d_packets", q_num
);
968 string
+= ETH_GSTRING_LEN
;
969 sprintf(string
, "rxq%d_bytes", q_num
);
970 string
+= ETH_GSTRING_LEN
;
971 sprintf(string
, "rxq%d_packets_with_error",
973 string
+= ETH_GSTRING_LEN
;
974 sprintf(string
, "rxq%d_allocbuf_failed", q_num
);
975 string
+= ETH_GSTRING_LEN
;
976 sprintf(string
, "rxq%d_producer_index", q_num
);
977 string
+= ETH_GSTRING_LEN
;
978 sprintf(string
, "rxq%d_consumer_index", q_num
);
979 string
+= ETH_GSTRING_LEN
;
981 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
&&
982 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->
984 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->
986 sprintf(string
, "rxq%d_packets", q_num
);
987 string
+= ETH_GSTRING_LEN
;
988 sprintf(string
, "rxq%d_bytes", q_num
);
989 string
+= ETH_GSTRING_LEN
;
991 "rxq%d_packets_with_error", q_num
);
992 string
+= ETH_GSTRING_LEN
;
993 sprintf(string
, "rxq%d_allocbuf_failed",
995 string
+= ETH_GSTRING_LEN
;
996 sprintf(string
, "rxq%d_producer_index",
998 string
+= ETH_GSTRING_LEN
;
999 sprintf(string
, "rxq%d_consumer_index",
1001 string
+= ETH_GSTRING_LEN
;
1008 for (i
= 0; i
< bnad
->num_tx
; i
++) {
1009 if (!bnad
->tx_info
[i
].tx
)
1011 for (j
= 0; j
< bnad
->num_txq_per_tx
; j
++) {
1012 sprintf(string
, "txq%d_packets", q_num
);
1013 string
+= ETH_GSTRING_LEN
;
1014 sprintf(string
, "txq%d_bytes", q_num
);
1015 string
+= ETH_GSTRING_LEN
;
1016 sprintf(string
, "txq%d_producer_index", q_num
);
1017 string
+= ETH_GSTRING_LEN
;
1018 sprintf(string
, "txq%d_consumer_index", q_num
);
1019 string
+= ETH_GSTRING_LEN
;
1020 sprintf(string
, "txq%d_hw_consumer_index",
1022 string
+= ETH_GSTRING_LEN
;
1033 mutex_unlock(&bnad
->conf_mutex
);
1037 bnad_get_stats_count_locked(struct net_device
*netdev
)
1039 struct bnad
*bnad
= netdev_priv(netdev
);
1040 int i
, j
, count
, rxf_active_num
= 0, txf_active_num
= 0;
1043 bmap
= (u64
)bnad
->bna
.tx_mod
.txf_bmap
[0] |
1044 ((u64
)bnad
->bna
.tx_mod
.txf_bmap
[1] << 32);
1045 for (i
= 0; bmap
&& (i
< BFI_LL_TXF_ID_MAX
); i
++) {
1050 bmap
= (u64
)bnad
->bna
.rx_mod
.rxf_bmap
[0] |
1051 ((u64
)bnad
->bna
.rx_mod
.rxf_bmap
[1] << 32);
1052 for (i
= 0; bmap
&& (i
< BFI_LL_RXF_ID_MAX
); i
++) {
1057 count
= BNAD_ETHTOOL_STATS_NUM
+
1058 txf_active_num
* BNAD_NUM_TXF_COUNTERS
+
1059 rxf_active_num
* BNAD_NUM_RXF_COUNTERS
;
1061 for (i
= 0; i
< bnad
->num_rx
; i
++) {
1062 if (!bnad
->rx_info
[i
].rx
)
1064 count
+= bnad
->num_rxp_per_rx
* BNAD_NUM_CQ_COUNTERS
;
1065 count
+= bnad
->num_rxp_per_rx
* BNAD_NUM_RXQ_COUNTERS
;
1066 for (j
= 0; j
< bnad
->num_rxp_per_rx
; j
++)
1067 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
&&
1068 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[1] &&
1069 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[1]->rxq
)
1070 count
+= BNAD_NUM_RXQ_COUNTERS
;
1073 for (i
= 0; i
< bnad
->num_tx
; i
++) {
1074 if (!bnad
->tx_info
[i
].tx
)
1076 count
+= bnad
->num_txq_per_tx
* BNAD_NUM_TXQ_COUNTERS
;
1082 bnad_per_q_stats_fill(struct bnad
*bnad
, u64
*buf
, int bi
)
1085 struct bna_rcb
*rcb
= NULL
;
1086 struct bna_tcb
*tcb
= NULL
;
1088 for (i
= 0; i
< bnad
->num_rx
; i
++) {
1089 if (!bnad
->rx_info
[i
].rx
)
1091 for (j
= 0; j
< bnad
->num_rxp_per_rx
; j
++)
1092 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
&&
1093 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[0] &&
1094 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[0]->rxq
) {
1095 buf
[bi
++] = bnad
->rx_info
[i
].rx_ctrl
[j
].
1096 ccb
->producer_index
;
1097 buf
[bi
++] = 0; /* ccb->consumer_index */
1098 buf
[bi
++] = *(bnad
->rx_info
[i
].rx_ctrl
[j
].
1099 ccb
->hw_producer_index
);
1102 for (i
= 0; i
< bnad
->num_rx
; i
++) {
1103 if (!bnad
->rx_info
[i
].rx
)
1105 for (j
= 0; j
< bnad
->num_rxp_per_rx
; j
++)
1106 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
) {
1107 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[0] &&
1108 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->
1110 rcb
= bnad
->rx_info
[i
].rx_ctrl
[j
].
1112 buf
[bi
++] = rcb
->rxq
->rx_packets
;
1113 buf
[bi
++] = rcb
->rxq
->rx_bytes
;
1114 buf
[bi
++] = rcb
->rxq
->
1115 rx_packets_with_error
;
1116 buf
[bi
++] = rcb
->rxq
->
1118 buf
[bi
++] = rcb
->producer_index
;
1119 buf
[bi
++] = rcb
->consumer_index
;
1121 if (bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->rcb
[1] &&
1122 bnad
->rx_info
[i
].rx_ctrl
[j
].ccb
->
1124 rcb
= bnad
->rx_info
[i
].rx_ctrl
[j
].
1126 buf
[bi
++] = rcb
->rxq
->rx_packets
;
1127 buf
[bi
++] = rcb
->rxq
->rx_bytes
;
1128 buf
[bi
++] = rcb
->rxq
->
1129 rx_packets_with_error
;
1130 buf
[bi
++] = rcb
->rxq
->
1132 buf
[bi
++] = rcb
->producer_index
;
1133 buf
[bi
++] = rcb
->consumer_index
;
1138 for (i
= 0; i
< bnad
->num_tx
; i
++) {
1139 if (!bnad
->tx_info
[i
].tx
)
1141 for (j
= 0; j
< bnad
->num_txq_per_tx
; j
++)
1142 if (bnad
->tx_info
[i
].tcb
[j
] &&
1143 bnad
->tx_info
[i
].tcb
[j
]->txq
) {
1144 tcb
= bnad
->tx_info
[i
].tcb
[j
];
1145 buf
[bi
++] = tcb
->txq
->tx_packets
;
1146 buf
[bi
++] = tcb
->txq
->tx_bytes
;
1147 buf
[bi
++] = tcb
->producer_index
;
1148 buf
[bi
++] = tcb
->consumer_index
;
1149 buf
[bi
++] = *(tcb
->hw_consumer_index
);
1157 bnad_get_ethtool_stats(struct net_device
*netdev
, struct ethtool_stats
*stats
,
1160 struct bnad
*bnad
= netdev_priv(netdev
);
1162 unsigned long flags
;
1163 struct rtnl_link_stats64
*net_stats64
;
1167 mutex_lock(&bnad
->conf_mutex
);
1168 if (bnad_get_stats_count_locked(netdev
) != stats
->n_stats
) {
1169 mutex_unlock(&bnad
->conf_mutex
);
1174 * Used bna_lock to sync reads from bna_stats, which is written
1175 * under the same lock
1177 spin_lock_irqsave(&bnad
->bna_lock
, flags
);
1179 memset(buf
, 0, stats
->n_stats
* sizeof(u64
));
1181 net_stats64
= (struct rtnl_link_stats64
*)buf
;
1182 bnad_netdev_qstats_fill(bnad
, net_stats64
);
1183 bnad_netdev_hwstats_fill(bnad
, net_stats64
);
1185 bi
= sizeof(*net_stats64
) / sizeof(u64
);
1187 /* Fill driver stats into ethtool buffers */
1188 stats64
= (u64
*)&bnad
->stats
.drv_stats
;
1189 for (i
= 0; i
< sizeof(struct bnad_drv_stats
) / sizeof(u64
); i
++)
1190 buf
[bi
++] = stats64
[i
];
1192 /* Fill hardware stats excluding the rxf/txf into ethtool bufs */
1193 stats64
= (u64
*) bnad
->stats
.bna_stats
->hw_stats
;
1195 i
< offsetof(struct bfi_ll_stats
, rxf_stats
[0]) / sizeof(u64
);
1197 buf
[bi
++] = stats64
[i
];
1199 /* Fill txf stats into ethtool buffers */
1200 bmap
= (u64
)bnad
->bna
.tx_mod
.txf_bmap
[0] |
1201 ((u64
)bnad
->bna
.tx_mod
.txf_bmap
[1] << 32);
1202 for (i
= 0; bmap
&& (i
< BFI_LL_TXF_ID_MAX
); i
++) {
1204 stats64
= (u64
*)&bnad
->stats
.bna_stats
->
1205 hw_stats
->txf_stats
[i
];
1206 for (j
= 0; j
< sizeof(struct bfi_ll_stats_txf
) /
1208 buf
[bi
++] = stats64
[j
];
1213 /* Fill rxf stats into ethtool buffers */
1214 bmap
= (u64
)bnad
->bna
.rx_mod
.rxf_bmap
[0] |
1215 ((u64
)bnad
->bna
.rx_mod
.rxf_bmap
[1] << 32);
1216 for (i
= 0; bmap
&& (i
< BFI_LL_RXF_ID_MAX
); i
++) {
1218 stats64
= (u64
*)&bnad
->stats
.bna_stats
->
1219 hw_stats
->rxf_stats
[i
];
1220 for (j
= 0; j
< sizeof(struct bfi_ll_stats_rxf
) /
1222 buf
[bi
++] = stats64
[j
];
1227 /* Fill per Q stats into ethtool buffers */
1228 bi
= bnad_per_q_stats_fill(bnad
, buf
, bi
);
1230 spin_unlock_irqrestore(&bnad
->bna_lock
, flags
);
1232 mutex_unlock(&bnad
->conf_mutex
);
1236 bnad_get_sset_count(struct net_device
*netdev
, int sset
)
1240 return bnad_get_stats_count_locked(netdev
);
1246 static struct ethtool_ops bnad_ethtool_ops
= {
1247 .get_settings
= bnad_get_settings
,
1248 .set_settings
= bnad_set_settings
,
1249 .get_drvinfo
= bnad_get_drvinfo
,
1250 .get_regs_len
= bnad_get_regs_len
,
1251 .get_regs
= bnad_get_regs
,
1252 .get_wol
= bnad_get_wol
,
1253 .get_link
= ethtool_op_get_link
,
1254 .get_coalesce
= bnad_get_coalesce
,
1255 .set_coalesce
= bnad_set_coalesce
,
1256 .get_ringparam
= bnad_get_ringparam
,
1257 .set_ringparam
= bnad_set_ringparam
,
1258 .get_pauseparam
= bnad_get_pauseparam
,
1259 .set_pauseparam
= bnad_set_pauseparam
,
1260 .get_rx_csum
= bnad_get_rx_csum
,
1261 .set_rx_csum
= bnad_set_rx_csum
,
1262 .get_tx_csum
= ethtool_op_get_tx_csum
,
1263 .set_tx_csum
= bnad_set_tx_csum
,
1264 .get_sg
= ethtool_op_get_sg
,
1265 .set_sg
= ethtool_op_set_sg
,
1266 .get_tso
= ethtool_op_get_tso
,
1267 .set_tso
= bnad_set_tso
,
1268 .get_strings
= bnad_get_strings
,
1269 .get_ethtool_stats
= bnad_get_ethtool_stats
,
1270 .get_sset_count
= bnad_get_sset_count
1274 bnad_set_ethtool_ops(struct net_device
*netdev
)
1276 SET_ETHTOOL_OPS(netdev
, &bnad_ethtool_ops
);