ieee1394: video1394: DMA fix
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / ieee1394 / video1394.c
blob2e80e90998a00c689dfb3683ee301a8ebe4999ac
1 /*
2 * video1394.c - video driver for OHCI 1394 boards
3 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4 * Peter Schlaile <udbz@rz.uni-karlsruhe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 * NOTES:
22 * ioctl return codes:
23 * EFAULT is only for invalid address for the argp
24 * EINVAL for out of range values
25 * EBUSY when trying to use an already used resource
26 * ESRCH when trying to free/stop a not used resource
27 * EAGAIN for resource allocation failure that could perhaps succeed later
28 * ENOTTY for unsupported ioctl request
31 #include <linux/config.h>
32 #include <linux/kernel.h>
33 #include <linux/list.h>
34 #include <linux/slab.h>
35 #include <linux/interrupt.h>
36 #include <linux/wait.h>
37 #include <linux/errno.h>
38 #include <linux/module.h>
39 #include <linux/init.h>
40 #include <linux/pci.h>
41 #include <linux/fs.h>
42 #include <linux/poll.h>
43 #include <linux/smp_lock.h>
44 #include <linux/delay.h>
45 #include <linux/devfs_fs_kernel.h>
46 #include <linux/bitops.h>
47 #include <linux/types.h>
48 #include <linux/vmalloc.h>
49 #include <linux/timex.h>
50 #include <linux/mm.h>
51 #include <linux/compat.h>
52 #include <linux/cdev.h>
54 #include "ieee1394.h"
55 #include "ieee1394_types.h"
56 #include "hosts.h"
57 #include "ieee1394_core.h"
58 #include "highlevel.h"
59 #include "video1394.h"
60 #include "nodemgr.h"
61 #include "dma.h"
63 #include "ohci1394.h"
65 #define ISO_CHANNELS 64
67 struct it_dma_prg {
68 struct dma_cmd begin;
69 quadlet_t data[4];
70 struct dma_cmd end;
71 quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
74 struct dma_iso_ctx {
75 struct ti_ohci *ohci;
76 int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
77 struct ohci1394_iso_tasklet iso_tasklet;
78 int channel;
79 int ctx;
80 int last_buffer;
81 int * next_buffer; /* For ISO Transmit of video packets
82 to write the correct SYT field
83 into the next block */
84 unsigned int num_desc;
85 unsigned int buf_size;
86 unsigned int frame_size;
87 unsigned int packet_size;
88 unsigned int left_size;
89 unsigned int nb_cmd;
91 struct dma_region dma;
93 struct dma_prog_region *prg_reg;
95 struct dma_cmd **ir_prg;
96 struct it_dma_prg **it_prg;
98 unsigned int *buffer_status;
99 unsigned int *buffer_prg_assignment;
100 struct timeval *buffer_time; /* time when the buffer was received */
101 unsigned int *last_used_cmd; /* For ISO Transmit with
102 variable sized packets only ! */
103 int ctrlClear;
104 int ctrlSet;
105 int cmdPtr;
106 int ctxMatch;
107 wait_queue_head_t waitq;
108 spinlock_t lock;
109 unsigned int syt_offset;
110 int flags;
112 struct list_head link;
116 struct file_ctx {
117 struct ti_ohci *ohci;
118 struct list_head context_list;
119 struct dma_iso_ctx *current_ctx;
122 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
123 #define VIDEO1394_DEBUG
124 #endif
126 #ifdef DBGMSG
127 #undef DBGMSG
128 #endif
130 #ifdef VIDEO1394_DEBUG
131 #define DBGMSG(card, fmt, args...) \
132 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
133 #else
134 #define DBGMSG(card, fmt, args...)
135 #endif
137 /* print general (card independent) information */
138 #define PRINT_G(level, fmt, args...) \
139 printk(level "video1394: " fmt "\n" , ## args)
141 /* print card specific information */
142 #define PRINT(level, card, fmt, args...) \
143 printk(level "video1394_%d: " fmt "\n" , card , ## args)
145 static void wakeup_dma_ir_ctx(unsigned long l);
146 static void wakeup_dma_it_ctx(unsigned long l);
148 static struct hpsb_highlevel video1394_highlevel;
150 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
152 int i;
154 DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
156 ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
157 if (d->iso_tasklet.link.next != NULL)
158 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
160 dma_region_free(&d->dma);
162 if (d->prg_reg) {
163 for (i = 0; i < d->num_desc; i++)
164 dma_prog_region_free(&d->prg_reg[i]);
165 kfree(d->prg_reg);
168 kfree(d->ir_prg);
169 kfree(d->it_prg);
170 kfree(d->buffer_status);
171 kfree(d->buffer_prg_assignment);
172 kfree(d->buffer_time);
173 kfree(d->last_used_cmd);
174 kfree(d->next_buffer);
175 list_del(&d->link);
176 kfree(d);
178 return 0;
181 static struct dma_iso_ctx *
182 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
183 int buf_size, int channel, unsigned int packet_size)
185 struct dma_iso_ctx *d;
186 int i;
188 d = kzalloc(sizeof(*d), GFP_KERNEL);
189 if (!d) {
190 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
191 return NULL;
194 d->ohci = ohci;
195 d->type = type;
196 d->channel = channel;
197 d->num_desc = num_desc;
198 d->frame_size = buf_size;
199 d->buf_size = PAGE_ALIGN(buf_size);
200 d->last_buffer = -1;
201 INIT_LIST_HEAD(&d->link);
202 init_waitqueue_head(&d->waitq);
204 /* Init the regions for easy cleanup */
205 dma_region_init(&d->dma);
207 if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
208 PCI_DMA_BIDIRECTIONAL)) {
209 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
210 free_dma_iso_ctx(d);
211 return NULL;
214 if (type == OHCI_ISO_RECEIVE)
215 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
216 wakeup_dma_ir_ctx,
217 (unsigned long) d);
218 else
219 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
220 wakeup_dma_it_ctx,
221 (unsigned long) d);
223 if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
224 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
225 type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
226 free_dma_iso_ctx(d);
227 return NULL;
229 d->ctx = d->iso_tasklet.context;
231 d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
232 if (!d->prg_reg) {
233 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
234 free_dma_iso_ctx(d);
235 return NULL;
237 /* Makes for easier cleanup */
238 for (i = 0; i < d->num_desc; i++)
239 dma_prog_region_init(&d->prg_reg[i]);
241 if (type == OHCI_ISO_RECEIVE) {
242 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
243 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
244 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
245 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
247 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
248 GFP_KERNEL);
250 if (!d->ir_prg) {
251 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
252 free_dma_iso_ctx(d);
253 return NULL;
256 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
257 d->left_size = (d->frame_size % PAGE_SIZE) ?
258 d->frame_size % PAGE_SIZE : PAGE_SIZE;
260 for (i = 0;i < d->num_desc; i++) {
261 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
262 sizeof(struct dma_cmd), ohci->dev)) {
263 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
264 free_dma_iso_ctx(d);
265 return NULL;
267 d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
270 } else { /* OHCI_ISO_TRANSMIT */
271 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
272 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
273 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
275 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
276 GFP_KERNEL);
278 if (!d->it_prg) {
279 PRINT(KERN_ERR, ohci->host->id,
280 "Failed to allocate dma it prg");
281 free_dma_iso_ctx(d);
282 return NULL;
285 d->packet_size = packet_size;
287 if (PAGE_SIZE % packet_size || packet_size>4096) {
288 PRINT(KERN_ERR, ohci->host->id,
289 "Packet size %d (page_size: %ld) "
290 "not yet supported\n",
291 packet_size, PAGE_SIZE);
292 free_dma_iso_ctx(d);
293 return NULL;
296 d->nb_cmd = d->frame_size / d->packet_size;
297 if (d->frame_size % d->packet_size) {
298 d->nb_cmd++;
299 d->left_size = d->frame_size % d->packet_size;
300 } else
301 d->left_size = d->packet_size;
303 for (i = 0; i < d->num_desc; i++) {
304 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
305 sizeof(struct it_dma_prg), ohci->dev)) {
306 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
307 free_dma_iso_ctx(d);
308 return NULL;
310 d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
314 d->buffer_status =
315 kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
316 d->buffer_prg_assignment =
317 kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
318 d->buffer_time =
319 kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
320 d->last_used_cmd =
321 kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
322 d->next_buffer =
323 kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
325 if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
326 !d->last_used_cmd || !d->next_buffer) {
327 PRINT(KERN_ERR, ohci->host->id,
328 "Failed to allocate dma_iso_ctx member");
329 free_dma_iso_ctx(d);
330 return NULL;
333 spin_lock_init(&d->lock);
335 PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
336 "of size %d allocated for a frame size %d, each with %d prgs",
337 (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
338 d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
340 return d;
343 static void reset_ir_status(struct dma_iso_ctx *d, int n)
345 int i;
346 d->ir_prg[n][0].status = cpu_to_le32(4);
347 d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
348 for (i = 2; i < d->nb_cmd - 1; i++)
349 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
350 d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
353 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
355 struct dma_cmd *ir_prg = d->ir_prg[n];
356 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
357 int i;
359 d->buffer_prg_assignment[n] = buffer;
361 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
362 (unsigned long)d->dma.kvirt));
363 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
364 (buf + 4) - (unsigned long)d->dma.kvirt));
366 for (i=2;i<d->nb_cmd-1;i++) {
367 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
368 (buf+(i-1)*PAGE_SIZE) -
369 (unsigned long)d->dma.kvirt));
372 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
373 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
374 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
375 (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
378 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
380 struct dma_cmd *ir_prg = d->ir_prg[n];
381 struct dma_prog_region *ir_reg = &d->prg_reg[n];
382 unsigned long buf = (unsigned long)d->dma.kvirt;
383 int i;
385 /* the first descriptor will read only 4 bytes */
386 ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
387 DMA_CTL_BRANCH | 4);
389 /* set the sync flag */
390 if (flags & VIDEO1394_SYNC_FRAMES)
391 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
393 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
394 (unsigned long)d->dma.kvirt));
395 ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
396 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
398 /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
399 if (d->nb_cmd > 2) {
400 /* The second descriptor will read PAGE_SIZE-4 bytes */
401 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
402 DMA_CTL_BRANCH | (PAGE_SIZE-4));
403 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
404 (unsigned long)d->dma.kvirt));
405 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
406 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
408 for (i = 2; i < d->nb_cmd - 1; i++) {
409 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
410 DMA_CTL_BRANCH | PAGE_SIZE);
411 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
412 (buf+(i-1)*PAGE_SIZE) -
413 (unsigned long)d->dma.kvirt));
415 ir_prg[i].branchAddress =
416 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
417 (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
420 /* The last descriptor will generate an interrupt */
421 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
422 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
423 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
424 (buf+(i-1)*PAGE_SIZE) -
425 (unsigned long)d->dma.kvirt));
426 } else {
427 /* Only one DMA page is used. Read d->left_size immediately and */
428 /* generate an interrupt as this is also the last page. */
429 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
430 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
431 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
432 (buf + 4) - (unsigned long)d->dma.kvirt));
436 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
438 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
439 int i;
441 d->flags = flags;
443 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
445 for (i=0;i<d->num_desc;i++) {
446 initialize_dma_ir_prg(d, i, flags);
447 reset_ir_status(d, i);
450 /* reset the ctrl register */
451 reg_write(ohci, d->ctrlClear, 0xf0000000);
453 /* Set bufferFill */
454 reg_write(ohci, d->ctrlSet, 0x80000000);
456 /* Set isoch header */
457 if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
458 reg_write(ohci, d->ctrlSet, 0x40000000);
460 /* Set the context match register to match on all tags,
461 sync for sync tag, and listen to d->channel */
462 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
464 /* Set up isoRecvIntMask to generate interrupts */
465 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
468 /* find which context is listening to this channel */
469 static struct dma_iso_ctx *
470 find_ctx(struct list_head *list, int type, int channel)
472 struct dma_iso_ctx *ctx;
474 list_for_each_entry(ctx, list, link) {
475 if (ctx->type == type && ctx->channel == channel)
476 return ctx;
479 return NULL;
482 static void wakeup_dma_ir_ctx(unsigned long l)
484 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
485 int i;
487 spin_lock(&d->lock);
489 for (i = 0; i < d->num_desc; i++) {
490 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
491 reset_ir_status(d, i);
492 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
493 do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
494 dma_region_sync_for_cpu(&d->dma,
495 d->buffer_prg_assignment[i] * d->buf_size,
496 d->buf_size);
500 spin_unlock(&d->lock);
502 if (waitqueue_active(&d->waitq))
503 wake_up_interruptible(&d->waitq);
506 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
507 int n)
509 unsigned char* buf = d->dma.kvirt + n * d->buf_size;
510 u32 cycleTimer;
511 u32 timeStamp;
513 if (n == -1) {
514 return;
517 cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
519 timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
520 timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
521 + (cycleTimer & 0xf000)) & 0xffff;
523 buf[6] = timeStamp >> 8;
524 buf[7] = timeStamp & 0xff;
526 /* if first packet is empty packet, then put timestamp into the next full one too */
527 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
528 buf += d->packet_size;
529 buf[6] = timeStamp >> 8;
530 buf[7] = timeStamp & 0xff;
533 /* do the next buffer frame too in case of irq latency */
534 n = d->next_buffer[n];
535 if (n == -1) {
536 return;
538 buf = d->dma.kvirt + n * d->buf_size;
540 timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
542 buf[6] = timeStamp >> 8;
543 buf[7] = timeStamp & 0xff;
545 /* if first packet is empty packet, then put timestamp into the next full one too */
546 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
547 buf += d->packet_size;
548 buf[6] = timeStamp >> 8;
549 buf[7] = timeStamp & 0xff;
552 #if 0
553 printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
554 curr, n, cycleTimer, timeStamp);
555 #endif
558 static void wakeup_dma_it_ctx(unsigned long l)
560 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
561 struct ti_ohci *ohci = d->ohci;
562 int i;
564 spin_lock(&d->lock);
566 for (i = 0; i < d->num_desc; i++) {
567 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
568 cpu_to_le32(0xFFFF0000)) {
569 int next = d->next_buffer[i];
570 put_timestamp(ohci, d, next);
571 d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
572 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
576 spin_unlock(&d->lock);
578 if (waitqueue_active(&d->waitq))
579 wake_up_interruptible(&d->waitq);
582 static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
584 struct it_dma_prg *it_prg = d->it_prg[n];
585 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
586 int i;
588 d->buffer_prg_assignment[n] = buffer;
589 for (i=0;i<d->nb_cmd;i++) {
590 it_prg[i].end.address =
591 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
592 (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
596 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
598 struct it_dma_prg *it_prg = d->it_prg[n];
599 struct dma_prog_region *it_reg = &d->prg_reg[n];
600 unsigned long buf = (unsigned long)d->dma.kvirt;
601 int i;
602 d->last_used_cmd[n] = d->nb_cmd - 1;
603 for (i=0;i<d->nb_cmd;i++) {
605 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
606 DMA_CTL_IMMEDIATE | 8) ;
607 it_prg[i].begin.address = 0;
609 it_prg[i].begin.status = 0;
611 it_prg[i].data[0] = cpu_to_le32(
612 (IEEE1394_SPEED_100 << 16)
613 | (/* tag */ 1 << 14)
614 | (d->channel << 8)
615 | (TCODE_ISO_DATA << 4));
616 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
617 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
618 it_prg[i].data[2] = 0;
619 it_prg[i].data[3] = 0;
621 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
622 DMA_CTL_BRANCH);
623 it_prg[i].end.address =
624 cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
625 (unsigned long)d->dma.kvirt));
627 if (i<d->nb_cmd-1) {
628 it_prg[i].end.control |= cpu_to_le32(d->packet_size);
629 it_prg[i].begin.branchAddress =
630 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
631 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
632 it_prg[i].end.branchAddress =
633 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
634 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
635 } else {
636 /* the last prg generates an interrupt */
637 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
638 DMA_CTL_IRQ | d->left_size);
639 /* the last prg doesn't branch */
640 it_prg[i].begin.branchAddress = 0;
641 it_prg[i].end.branchAddress = 0;
643 it_prg[i].end.status = 0;
647 static void initialize_dma_it_prg_var_packet_queue(
648 struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
649 struct ti_ohci *ohci)
651 struct it_dma_prg *it_prg = d->it_prg[n];
652 struct dma_prog_region *it_reg = &d->prg_reg[n];
653 int i;
655 #if 0
656 if (n != -1) {
657 put_timestamp(ohci, d, n);
659 #endif
660 d->last_used_cmd[n] = d->nb_cmd - 1;
662 for (i = 0; i < d->nb_cmd; i++) {
663 unsigned int size;
664 if (packet_sizes[i] > d->packet_size) {
665 size = d->packet_size;
666 } else {
667 size = packet_sizes[i];
669 it_prg[i].data[1] = cpu_to_le32(size << 16);
670 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
672 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
673 it_prg[i].end.control |= cpu_to_le32(size);
674 it_prg[i].begin.branchAddress =
675 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
676 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
677 it_prg[i].end.branchAddress =
678 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
679 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
680 } else {
681 /* the last prg generates an interrupt */
682 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
683 DMA_CTL_IRQ | size);
684 /* the last prg doesn't branch */
685 it_prg[i].begin.branchAddress = 0;
686 it_prg[i].end.branchAddress = 0;
687 d->last_used_cmd[n] = i;
688 break;
693 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
694 unsigned int syt_offset, int flags)
696 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
697 int i;
699 d->flags = flags;
700 d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
702 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
704 for (i=0;i<d->num_desc;i++)
705 initialize_dma_it_prg(d, i, sync_tag);
707 /* Set up isoRecvIntMask to generate interrupts */
708 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
711 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
712 unsigned int buffer)
714 unsigned long flags;
715 unsigned int ret;
716 spin_lock_irqsave(&d->lock, flags);
717 ret = d->buffer_status[buffer];
718 spin_unlock_irqrestore(&d->lock, flags);
719 return ret;
722 static int __video1394_ioctl(struct file *file,
723 unsigned int cmd, unsigned long arg)
725 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
726 struct ti_ohci *ohci = ctx->ohci;
727 unsigned long flags;
728 void __user *argp = (void __user *)arg;
730 switch(cmd)
732 case VIDEO1394_IOC_LISTEN_CHANNEL:
733 case VIDEO1394_IOC_TALK_CHANNEL:
735 struct video1394_mmap v;
736 u64 mask;
737 struct dma_iso_ctx *d;
738 int i;
740 if (copy_from_user(&v, argp, sizeof(v)))
741 return -EFAULT;
743 /* if channel < 0, find lowest available one */
744 if (v.channel < 0) {
745 mask = (u64)0x1;
746 for (i=0; ; i++) {
747 if (i == ISO_CHANNELS) {
748 PRINT(KERN_ERR, ohci->host->id,
749 "No free channel found");
750 return -EAGAIN;
752 if (!(ohci->ISO_channel_usage & mask)) {
753 v.channel = i;
754 PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
755 break;
757 mask = mask << 1;
759 } else if (v.channel >= ISO_CHANNELS) {
760 PRINT(KERN_ERR, ohci->host->id,
761 "Iso channel %d out of bounds", v.channel);
762 return -EINVAL;
763 } else {
764 mask = (u64)0x1<<v.channel;
766 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
767 (u32)(mask>>32),(u32)(mask&0xffffffff),
768 (u32)(ohci->ISO_channel_usage>>32),
769 (u32)(ohci->ISO_channel_usage&0xffffffff));
770 if (ohci->ISO_channel_usage & mask) {
771 PRINT(KERN_ERR, ohci->host->id,
772 "Channel %d is already taken", v.channel);
773 return -EBUSY;
776 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
777 PRINT(KERN_ERR, ohci->host->id,
778 "Invalid %d length buffer requested",v.buf_size);
779 return -EINVAL;
782 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
783 PRINT(KERN_ERR, ohci->host->id,
784 "Invalid %d buffers requested",v.nb_buffers);
785 return -EINVAL;
788 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
789 PRINT(KERN_ERR, ohci->host->id,
790 "%d buffers of size %d bytes is too big",
791 v.nb_buffers, v.buf_size);
792 return -EINVAL;
795 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
796 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
797 v.nb_buffers + 1, v.buf_size,
798 v.channel, 0);
800 if (d == NULL) {
801 PRINT(KERN_ERR, ohci->host->id,
802 "Couldn't allocate ir context");
803 return -EAGAIN;
805 initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
807 ctx->current_ctx = d;
809 v.buf_size = d->buf_size;
810 list_add_tail(&d->link, &ctx->context_list);
812 PRINT(KERN_INFO, ohci->host->id,
813 "iso context %d listen on channel %d",
814 d->ctx, v.channel);
816 else {
817 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
818 v.nb_buffers + 1, v.buf_size,
819 v.channel, v.packet_size);
821 if (d == NULL) {
822 PRINT(KERN_ERR, ohci->host->id,
823 "Couldn't allocate it context");
824 return -EAGAIN;
826 initialize_dma_it_ctx(d, v.sync_tag,
827 v.syt_offset, v.flags);
829 ctx->current_ctx = d;
831 v.buf_size = d->buf_size;
833 list_add_tail(&d->link, &ctx->context_list);
835 PRINT(KERN_INFO, ohci->host->id,
836 "Iso context %d talk on channel %d", d->ctx,
837 v.channel);
840 if (copy_to_user(argp, &v, sizeof(v))) {
841 /* FIXME : free allocated dma resources */
842 return -EFAULT;
845 ohci->ISO_channel_usage |= mask;
847 return 0;
849 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
850 case VIDEO1394_IOC_UNTALK_CHANNEL:
852 int channel;
853 u64 mask;
854 struct dma_iso_ctx *d;
856 if (copy_from_user(&channel, argp, sizeof(int)))
857 return -EFAULT;
859 if (channel < 0 || channel >= ISO_CHANNELS) {
860 PRINT(KERN_ERR, ohci->host->id,
861 "Iso channel %d out of bound", channel);
862 return -EINVAL;
864 mask = (u64)0x1<<channel;
865 if (!(ohci->ISO_channel_usage & mask)) {
866 PRINT(KERN_ERR, ohci->host->id,
867 "Channel %d is not being used", channel);
868 return -ESRCH;
871 /* Mark this channel as unused */
872 ohci->ISO_channel_usage &= ~mask;
874 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
875 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
876 else
877 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
879 if (d == NULL) return -ESRCH;
880 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
881 "stop talking on channel %d", d->ctx, channel);
882 free_dma_iso_ctx(d);
884 return 0;
886 case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
888 struct video1394_wait v;
889 struct dma_iso_ctx *d;
890 int next_prg;
892 if (copy_from_user(&v, argp, sizeof(v)))
893 return -EFAULT;
895 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
896 if (d == NULL) return -EFAULT;
898 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
899 PRINT(KERN_ERR, ohci->host->id,
900 "Buffer %d out of range",v.buffer);
901 return -EINVAL;
904 spin_lock_irqsave(&d->lock,flags);
906 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
907 PRINT(KERN_ERR, ohci->host->id,
908 "Buffer %d is already used",v.buffer);
909 spin_unlock_irqrestore(&d->lock,flags);
910 return -EBUSY;
913 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
915 next_prg = (d->last_buffer + 1) % d->num_desc;
916 if (d->last_buffer>=0)
917 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
918 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
919 & 0xfffffff0) | 0x1);
921 d->last_buffer = next_prg;
922 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
924 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
926 spin_unlock_irqrestore(&d->lock,flags);
928 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
930 DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
932 /* Tell the controller where the first program is */
933 reg_write(ohci, d->cmdPtr,
934 dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
936 /* Run IR context */
937 reg_write(ohci, d->ctrlSet, 0x8000);
939 else {
940 /* Wake up dma context if necessary */
941 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
942 PRINT(KERN_INFO, ohci->host->id,
943 "Waking up iso dma ctx=%d", d->ctx);
944 reg_write(ohci, d->ctrlSet, 0x1000);
947 return 0;
950 case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
951 case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
953 struct video1394_wait v;
954 struct dma_iso_ctx *d;
955 int i = 0;
957 if (copy_from_user(&v, argp, sizeof(v)))
958 return -EFAULT;
960 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
961 if (d == NULL) return -EFAULT;
963 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
964 PRINT(KERN_ERR, ohci->host->id,
965 "Buffer %d out of range",v.buffer);
966 return -EINVAL;
970 * I change the way it works so that it returns
971 * the last received frame.
973 spin_lock_irqsave(&d->lock, flags);
974 switch(d->buffer_status[v.buffer]) {
975 case VIDEO1394_BUFFER_READY:
976 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
977 break;
978 case VIDEO1394_BUFFER_QUEUED:
979 if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
980 /* for polling, return error code EINTR */
981 spin_unlock_irqrestore(&d->lock, flags);
982 return -EINTR;
985 spin_unlock_irqrestore(&d->lock, flags);
986 wait_event_interruptible(d->waitq,
987 video1394_buffer_state(d, v.buffer) ==
988 VIDEO1394_BUFFER_READY);
989 if (signal_pending(current))
990 return -EINTR;
991 spin_lock_irqsave(&d->lock, flags);
992 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
993 break;
994 default:
995 PRINT(KERN_ERR, ohci->host->id,
996 "Buffer %d is not queued",v.buffer);
997 spin_unlock_irqrestore(&d->lock, flags);
998 return -ESRCH;
1001 /* set time of buffer */
1002 v.filltime = d->buffer_time[v.buffer];
1005 * Look ahead to see how many more buffers have been received
1007 i=0;
1008 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1009 VIDEO1394_BUFFER_READY) {
1010 v.buffer=(v.buffer+1)%(d->num_desc - 1);
1011 i++;
1013 spin_unlock_irqrestore(&d->lock, flags);
1015 v.buffer=i;
1016 if (copy_to_user(argp, &v, sizeof(v)))
1017 return -EFAULT;
1019 return 0;
1021 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1023 struct video1394_wait v;
1024 unsigned int *psizes = NULL;
1025 struct dma_iso_ctx *d;
1026 int next_prg;
1028 if (copy_from_user(&v, argp, sizeof(v)))
1029 return -EFAULT;
1031 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1032 if (d == NULL) return -EFAULT;
1034 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1035 PRINT(KERN_ERR, ohci->host->id,
1036 "Buffer %d out of range",v.buffer);
1037 return -EINVAL;
1040 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1041 int buf_size = d->nb_cmd * sizeof(*psizes);
1042 struct video1394_queue_variable __user *p = argp;
1043 unsigned int __user *qv;
1045 if (get_user(qv, &p->packet_sizes))
1046 return -EFAULT;
1048 psizes = kmalloc(buf_size, GFP_KERNEL);
1049 if (!psizes)
1050 return -ENOMEM;
1052 if (copy_from_user(psizes, qv, buf_size)) {
1053 kfree(psizes);
1054 return -EFAULT;
1058 spin_lock_irqsave(&d->lock,flags);
1060 /* last_buffer is last_prg */
1061 next_prg = (d->last_buffer + 1) % d->num_desc;
1062 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1063 PRINT(KERN_ERR, ohci->host->id,
1064 "Buffer %d is already used",v.buffer);
1065 spin_unlock_irqrestore(&d->lock,flags);
1066 kfree(psizes);
1067 return -EBUSY;
1070 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1071 initialize_dma_it_prg_var_packet_queue(
1072 d, next_prg, psizes, ohci);
1075 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1077 if (d->last_buffer >= 0) {
1078 d->it_prg[d->last_buffer]
1079 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1080 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1081 0) & 0xfffffff0) | 0x3);
1083 d->it_prg[d->last_buffer]
1084 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1085 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1086 0) & 0xfffffff0) | 0x3);
1087 d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1089 d->last_buffer = next_prg;
1090 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1091 d->next_buffer[d->last_buffer] = -1;
1093 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1095 spin_unlock_irqrestore(&d->lock,flags);
1097 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1099 DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1100 d->ctx);
1101 put_timestamp(ohci, d, d->last_buffer);
1102 dma_region_sync_for_device(&d->dma,
1103 v.buffer * d->buf_size, d->buf_size);
1105 /* Tell the controller where the first program is */
1106 reg_write(ohci, d->cmdPtr,
1107 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1109 /* Run IT context */
1110 reg_write(ohci, d->ctrlSet, 0x8000);
1112 else {
1113 /* Wake up dma context if necessary */
1114 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1115 PRINT(KERN_INFO, ohci->host->id,
1116 "Waking up iso transmit dma ctx=%d",
1117 d->ctx);
1118 put_timestamp(ohci, d, d->last_buffer);
1119 dma_region_sync_for_device(&d->dma,
1120 v.buffer * d->buf_size, d->buf_size);
1122 reg_write(ohci, d->ctrlSet, 0x1000);
1126 kfree(psizes);
1127 return 0;
1130 case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1132 struct video1394_wait v;
1133 struct dma_iso_ctx *d;
1135 if (copy_from_user(&v, argp, sizeof(v)))
1136 return -EFAULT;
1138 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1139 if (d == NULL) return -EFAULT;
1141 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1142 PRINT(KERN_ERR, ohci->host->id,
1143 "Buffer %d out of range",v.buffer);
1144 return -EINVAL;
1147 switch(d->buffer_status[v.buffer]) {
1148 case VIDEO1394_BUFFER_READY:
1149 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1150 return 0;
1151 case VIDEO1394_BUFFER_QUEUED:
1152 wait_event_interruptible(d->waitq,
1153 (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1154 if (signal_pending(current))
1155 return -EINTR;
1156 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1157 return 0;
1158 default:
1159 PRINT(KERN_ERR, ohci->host->id,
1160 "Buffer %d is not queued",v.buffer);
1161 return -ESRCH;
1164 default:
1165 return -ENOTTY;
1169 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1171 int err;
1172 lock_kernel();
1173 err = __video1394_ioctl(file, cmd, arg);
1174 unlock_kernel();
1175 return err;
1179 * This maps the vmalloced and reserved buffer to user space.
1181 * FIXME:
1182 * - PAGE_READONLY should suffice!?
1183 * - remap_pfn_range is kind of inefficient for page by page remapping.
1184 * But e.g. pte_alloc() does not work in modules ... :-(
1187 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1189 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1190 int res = -EINVAL;
1192 lock_kernel();
1193 if (ctx->current_ctx == NULL) {
1194 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1195 } else
1196 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1197 unlock_kernel();
1199 return res;
1202 static int video1394_open(struct inode *inode, struct file *file)
1204 int i = ieee1394_file_to_instance(file);
1205 struct ti_ohci *ohci;
1206 struct file_ctx *ctx;
1208 ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1209 if (ohci == NULL)
1210 return -EIO;
1212 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1213 if (!ctx) {
1214 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1215 return -ENOMEM;
1218 ctx->ohci = ohci;
1219 INIT_LIST_HEAD(&ctx->context_list);
1220 ctx->current_ctx = NULL;
1221 file->private_data = ctx;
1223 return 0;
1226 static int video1394_release(struct inode *inode, struct file *file)
1228 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1229 struct ti_ohci *ohci = ctx->ohci;
1230 struct list_head *lh, *next;
1231 u64 mask;
1233 lock_kernel();
1234 list_for_each_safe(lh, next, &ctx->context_list) {
1235 struct dma_iso_ctx *d;
1236 d = list_entry(lh, struct dma_iso_ctx, link);
1237 mask = (u64) 1 << d->channel;
1239 if (!(ohci->ISO_channel_usage & mask))
1240 PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1241 "is not being used", d->channel);
1242 else
1243 ohci->ISO_channel_usage &= ~mask;
1244 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1245 "%d stop listening on channel %d",
1246 d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1247 d->ctx, d->channel);
1248 free_dma_iso_ctx(d);
1251 kfree(ctx);
1252 file->private_data = NULL;
1254 unlock_kernel();
1255 return 0;
1258 #ifdef CONFIG_COMPAT
1259 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1260 #endif
1262 static struct cdev video1394_cdev;
1263 static struct file_operations video1394_fops=
1265 .owner = THIS_MODULE,
1266 .unlocked_ioctl = video1394_ioctl,
1267 #ifdef CONFIG_COMPAT
1268 .compat_ioctl = video1394_compat_ioctl,
1269 #endif
1270 .mmap = video1394_mmap,
1271 .open = video1394_open,
1272 .release = video1394_release
1275 /*** HOTPLUG STUFF **********************************************************/
1277 * Export information about protocols/devices supported by this driver.
1279 static struct ieee1394_device_id video1394_id_table[] = {
1281 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1282 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1283 .version = CAMERA_SW_VERSION_ENTRY & 0xffffff
1286 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1287 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1288 .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1291 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1292 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1293 .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1298 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1300 static struct hpsb_protocol_driver video1394_driver = {
1301 .name = "1394 Digital Camera Driver",
1302 .id_table = video1394_id_table,
1303 .driver = {
1304 .name = VIDEO1394_DRIVER_NAME,
1305 .bus = &ieee1394_bus_type,
1310 static void video1394_add_host (struct hpsb_host *host)
1312 struct ti_ohci *ohci;
1313 int minor;
1315 /* We only work with the OHCI-1394 driver */
1316 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1317 return;
1319 ohci = (struct ti_ohci *)host->hostdata;
1321 if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1322 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1323 return;
1326 hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1327 hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1329 minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1330 class_device_create(hpsb_protocol_class, NULL, MKDEV(
1331 IEEE1394_MAJOR, minor),
1332 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1333 devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1334 S_IFCHR | S_IRUSR | S_IWUSR,
1335 "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1339 static void video1394_remove_host (struct hpsb_host *host)
1341 struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1343 if (ohci) {
1344 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1345 IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1346 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1349 return;
1353 static struct hpsb_highlevel video1394_highlevel = {
1354 .name = VIDEO1394_DRIVER_NAME,
1355 .add_host = video1394_add_host,
1356 .remove_host = video1394_remove_host,
1359 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1360 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1361 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1362 MODULE_LICENSE("GPL");
1364 #ifdef CONFIG_COMPAT
1366 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \
1367 _IOW ('#', 0x12, struct video1394_wait32)
1368 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \
1369 _IOWR('#', 0x13, struct video1394_wait32)
1370 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \
1371 _IOW ('#', 0x17, struct video1394_wait32)
1372 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \
1373 _IOWR('#', 0x18, struct video1394_wait32)
1375 struct video1394_wait32 {
1376 u32 channel;
1377 u32 buffer;
1378 struct compat_timeval filltime;
1381 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1383 struct video1394_wait32 __user *argp = (void __user *)arg;
1384 struct video1394_wait32 wait32;
1385 struct video1394_wait wait;
1386 mm_segment_t old_fs;
1387 int ret;
1389 if (copy_from_user(&wait32, argp, sizeof(wait32)))
1390 return -EFAULT;
1392 wait.channel = wait32.channel;
1393 wait.buffer = wait32.buffer;
1394 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1395 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1397 old_fs = get_fs();
1398 set_fs(KERNEL_DS);
1399 if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1400 ret = video1394_ioctl(file,
1401 VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1402 (unsigned long) &wait);
1403 else
1404 ret = video1394_ioctl(file,
1405 VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1406 (unsigned long) &wait);
1407 set_fs(old_fs);
1409 if (!ret) {
1410 wait32.channel = wait.channel;
1411 wait32.buffer = wait.buffer;
1412 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1413 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1415 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1416 ret = -EFAULT;
1419 return ret;
1422 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1424 struct video1394_wait32 wait32;
1425 struct video1394_wait wait;
1426 mm_segment_t old_fs;
1427 int ret;
1429 if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1430 return -EFAULT;
1432 wait.channel = wait32.channel;
1433 wait.buffer = wait32.buffer;
1434 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1435 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1437 old_fs = get_fs();
1438 set_fs(KERNEL_DS);
1439 if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1440 ret = video1394_ioctl(file,
1441 VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1442 (unsigned long) &wait);
1443 else
1444 ret = video1394_ioctl(file,
1445 VIDEO1394_IOC_TALK_WAIT_BUFFER,
1446 (unsigned long) &wait);
1447 set_fs(old_fs);
1449 return ret;
1452 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1454 return -EFAULT; /* ??? was there before. */
1456 return video1394_ioctl(file,
1457 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1460 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1462 switch (cmd) {
1463 case VIDEO1394_IOC_LISTEN_CHANNEL:
1464 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1465 case VIDEO1394_IOC_TALK_CHANNEL:
1466 case VIDEO1394_IOC_UNTALK_CHANNEL:
1467 return video1394_ioctl(f, cmd, arg);
1469 case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1470 return video1394_w_wait32(f, cmd, arg);
1471 case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1472 return video1394_wr_wait32(f, cmd, arg);
1473 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1474 return video1394_queue_buf32(f, cmd, arg);
1475 case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1476 return video1394_w_wait32(f, cmd, arg);
1477 case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1478 return video1394_wr_wait32(f, cmd, arg);
1479 default:
1480 return -ENOIOCTLCMD;
1484 #endif /* CONFIG_COMPAT */
1486 static void __exit video1394_exit_module (void)
1488 hpsb_unregister_protocol(&video1394_driver);
1490 hpsb_unregister_highlevel(&video1394_highlevel);
1492 devfs_remove(VIDEO1394_DRIVER_NAME);
1493 cdev_del(&video1394_cdev);
1495 PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1498 static int __init video1394_init_module (void)
1500 int ret;
1502 cdev_init(&video1394_cdev, &video1394_fops);
1503 video1394_cdev.owner = THIS_MODULE;
1504 kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1505 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1506 if (ret) {
1507 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1508 return ret;
1511 devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1513 hpsb_register_highlevel(&video1394_highlevel);
1515 ret = hpsb_register_protocol(&video1394_driver);
1516 if (ret) {
1517 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1518 hpsb_unregister_highlevel(&video1394_highlevel);
1519 devfs_remove(VIDEO1394_DRIVER_NAME);
1520 cdev_del(&video1394_cdev);
1521 return ret;
1524 PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1525 return 0;
1529 module_init(video1394_init_module);
1530 module_exit(video1394_exit_module);