x86: SB600: skip IRQ0 override if it is not routed to INT2 of IOAPIC
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / parisc / kernel / smp.c
blobd47f3975c9c6b683d4e0cfaf21dcf9156d68988d
1 /*
2 ** SMP Support
3 **
4 ** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
5 ** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
6 ** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
7 **
8 ** Lots of stuff stolen from arch/alpha/kernel/smp.c
9 ** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
11 ** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
12 ** -grant (1/12/2001)
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License as published by
16 ** the Free Software Foundation; either version 2 of the License, or
17 ** (at your option) any later version.
19 #include <linux/types.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/smp.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/mm.h>
31 #include <linux/err.h>
32 #include <linux/delay.h>
33 #include <linux/bitops.h>
35 #include <asm/system.h>
36 #include <asm/atomic.h>
37 #include <asm/current.h>
38 #include <asm/delay.h>
39 #include <asm/tlbflush.h>
41 #include <asm/io.h>
42 #include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
43 #include <asm/mmu_context.h>
44 #include <asm/page.h>
45 #include <asm/pgtable.h>
46 #include <asm/pgalloc.h>
47 #include <asm/processor.h>
48 #include <asm/ptrace.h>
49 #include <asm/unistd.h>
50 #include <asm/cacheflush.h>
52 #undef DEBUG_SMP
53 #ifdef DEBUG_SMP
54 static int smp_debug_lvl = 0;
55 #define smp_debug(lvl, printargs...) \
56 if (lvl >= smp_debug_lvl) \
57 printk(printargs);
58 #else
59 #define smp_debug(lvl, ...)
60 #endif /* DEBUG_SMP */
62 DEFINE_SPINLOCK(smp_lock);
64 volatile struct task_struct *smp_init_current_idle_task;
66 static volatile int cpu_now_booting __read_mostly = 0; /* track which CPU is booting */
68 static int parisc_max_cpus __read_mostly = 1;
70 /* online cpus are ones that we've managed to bring up completely
71 * possible cpus are all valid cpu
72 * present cpus are all detected cpu
74 * On startup we bring up the "possible" cpus. Since we discover
75 * CPUs later, we add them as hotplug, so the possible cpu mask is
76 * empty in the beginning.
79 cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; /* Bitmap of online CPUs */
80 cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; /* Bitmap of Present CPUs */
82 EXPORT_SYMBOL(cpu_online_map);
83 EXPORT_SYMBOL(cpu_possible_map);
85 DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
87 enum ipi_message_type {
88 IPI_NOP=0,
89 IPI_RESCHEDULE=1,
90 IPI_CALL_FUNC,
91 IPI_CALL_FUNC_SINGLE,
92 IPI_CPU_START,
93 IPI_CPU_STOP,
94 IPI_CPU_TEST
98 /********** SMP inter processor interrupt and communication routines */
100 #undef PER_CPU_IRQ_REGION
101 #ifdef PER_CPU_IRQ_REGION
102 /* XXX REVISIT Ignore for now.
103 ** *May* need this "hook" to register IPI handler
104 ** once we have perCPU ExtIntr switch tables.
106 static void
107 ipi_init(int cpuid)
109 #error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region
111 if(cpu_online(cpuid) )
113 switch_to_idle_task(current);
116 return;
118 #endif
122 ** Yoink this CPU from the runnable list...
125 static void
126 halt_processor(void)
128 /* REVISIT : redirect I/O Interrupts to another CPU? */
129 /* REVISIT : does PM *know* this CPU isn't available? */
130 cpu_clear(smp_processor_id(), cpu_online_map);
131 local_irq_disable();
132 for (;;)
137 irqreturn_t
138 ipi_interrupt(int irq, void *dev_id)
140 int this_cpu = smp_processor_id();
141 struct cpuinfo_parisc *p = &cpu_data[this_cpu];
142 unsigned long ops;
143 unsigned long flags;
145 /* Count this now; we may make a call that never returns. */
146 p->ipi_count++;
148 mb(); /* Order interrupt and bit testing. */
150 for (;;) {
151 spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
152 spin_lock_irqsave(lock, flags);
153 ops = p->pending_ipi;
154 p->pending_ipi = 0;
155 spin_unlock_irqrestore(lock, flags);
157 mb(); /* Order bit clearing and data access. */
159 if (!ops)
160 break;
162 while (ops) {
163 unsigned long which = ffz(~ops);
165 ops &= ~(1 << which);
167 switch (which) {
168 case IPI_NOP:
169 smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
170 break;
172 case IPI_RESCHEDULE:
173 smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
175 * Reschedule callback. Everything to be
176 * done is done by the interrupt return path.
178 break;
180 case IPI_CALL_FUNC:
181 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
182 generic_smp_call_function_interrupt();
183 break;
185 case IPI_CALL_FUNC_SINGLE:
186 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
187 generic_smp_call_function_single_interrupt();
188 break;
190 case IPI_CPU_START:
191 smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
192 break;
194 case IPI_CPU_STOP:
195 smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
196 halt_processor();
197 break;
199 case IPI_CPU_TEST:
200 smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
201 break;
203 default:
204 printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
205 this_cpu, which);
206 return IRQ_NONE;
207 } /* Switch */
208 /* let in any pending interrupts */
209 local_irq_enable();
210 local_irq_disable();
211 } /* while (ops) */
213 return IRQ_HANDLED;
217 static inline void
218 ipi_send(int cpu, enum ipi_message_type op)
220 struct cpuinfo_parisc *p = &cpu_data[cpu];
221 spinlock_t *lock = &per_cpu(ipi_lock, cpu);
222 unsigned long flags;
224 spin_lock_irqsave(lock, flags);
225 p->pending_ipi |= 1 << op;
226 gsc_writel(IPI_IRQ - CPU_IRQ_BASE, cpu_data[cpu].hpa);
227 spin_unlock_irqrestore(lock, flags);
230 static void
231 send_IPI_mask(cpumask_t mask, enum ipi_message_type op)
233 int cpu;
235 for_each_cpu_mask(cpu, mask)
236 ipi_send(cpu, op);
239 static inline void
240 send_IPI_single(int dest_cpu, enum ipi_message_type op)
242 if (dest_cpu == NO_PROC_ID) {
243 BUG();
244 return;
247 ipi_send(dest_cpu, op);
250 static inline void
251 send_IPI_allbutself(enum ipi_message_type op)
253 int i;
255 for_each_online_cpu(i) {
256 if (i != smp_processor_id())
257 send_IPI_single(i, op);
262 inline void
263 smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); }
265 static inline void
266 smp_send_start(void) { send_IPI_allbutself(IPI_CPU_START); }
268 void
269 smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }
271 void
272 smp_send_all_nop(void)
274 send_IPI_allbutself(IPI_NOP);
277 void arch_send_call_function_ipi(cpumask_t mask)
279 send_IPI_mask(mask, IPI_CALL_FUNC);
282 void arch_send_call_function_single_ipi(int cpu)
284 send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
288 * Flush all other CPU's tlb and then mine. Do this with on_each_cpu()
289 * as we want to ensure all TLB's flushed before proceeding.
292 void
293 smp_flush_tlb_all(void)
295 on_each_cpu(flush_tlb_all_local, NULL, 1);
299 * Called by secondaries to update state and initialize CPU registers.
301 static void __init
302 smp_cpu_init(int cpunum)
304 extern int init_per_cpu(int); /* arch/parisc/kernel/processor.c */
305 extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
306 extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
308 /* Set modes and Enable floating point coprocessor */
309 (void) init_per_cpu(cpunum);
311 disable_sr_hashing();
313 mb();
315 /* Well, support 2.4 linux scheme as well. */
316 if (cpu_test_and_set(cpunum, cpu_online_map))
318 extern void machine_halt(void); /* arch/parisc.../process.c */
320 printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
321 machine_halt();
324 /* Initialise the idle task for this CPU */
325 atomic_inc(&init_mm.mm_count);
326 current->active_mm = &init_mm;
327 if(current->mm)
328 BUG();
329 enter_lazy_tlb(&init_mm, current);
331 init_IRQ(); /* make sure no IRQs are enabled or pending */
332 start_cpu_itimer();
337 * Slaves start using C here. Indirectly called from smp_slave_stext.
338 * Do what start_kernel() and main() do for boot strap processor (aka monarch)
340 void __init smp_callin(void)
342 int slave_id = cpu_now_booting;
344 smp_cpu_init(slave_id);
345 preempt_disable();
347 flush_cache_all_local(); /* start with known state */
348 flush_tlb_all_local(NULL);
350 local_irq_enable(); /* Interrupts have been off until now */
352 cpu_idle(); /* Wait for timer to schedule some work */
354 /* NOTREACHED */
355 panic("smp_callin() AAAAaaaaahhhh....\n");
359 * Bring one cpu online.
361 int __cpuinit smp_boot_one_cpu(int cpuid)
363 struct task_struct *idle;
364 long timeout;
367 * Create an idle task for this CPU. Note the address wed* give
368 * to kernel_thread is irrelevant -- it's going to start
369 * where OS_BOOT_RENDEVZ vector in SAL says to start. But
370 * this gets all the other task-y sort of data structures set
371 * up like we wish. We need to pull the just created idle task
372 * off the run queue and stuff it into the init_tasks[] array.
373 * Sheesh . . .
376 idle = fork_idle(cpuid);
377 if (IS_ERR(idle))
378 panic("SMP: fork failed for CPU:%d", cpuid);
380 task_thread_info(idle)->cpu = cpuid;
382 /* Let _start know what logical CPU we're booting
383 ** (offset into init_tasks[],cpu_data[])
385 cpu_now_booting = cpuid;
388 ** boot strap code needs to know the task address since
389 ** it also contains the process stack.
391 smp_init_current_idle_task = idle ;
392 mb();
394 printk("Releasing cpu %d now, hpa=%lx\n", cpuid, cpu_data[cpuid].hpa);
397 ** This gets PDC to release the CPU from a very tight loop.
399 ** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
400 ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which
401 ** is executed after receiving the rendezvous signal (an interrupt to
402 ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the
403 ** contents of memory are valid."
405 gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, cpu_data[cpuid].hpa);
406 mb();
409 * OK, wait a bit for that CPU to finish staggering about.
410 * Slave will set a bit when it reaches smp_cpu_init().
411 * Once the "monarch CPU" sees the bit change, it can move on.
413 for (timeout = 0; timeout < 10000; timeout++) {
414 if(cpu_online(cpuid)) {
415 /* Which implies Slave has started up */
416 cpu_now_booting = 0;
417 smp_init_current_idle_task = NULL;
418 goto alive ;
420 udelay(100);
421 barrier();
424 put_task_struct(idle);
425 idle = NULL;
427 printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
428 return -1;
430 alive:
431 /* Remember the Slave data */
432 smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
433 cpuid, timeout * 100);
434 return 0;
437 void __devinit smp_prepare_boot_cpu(void)
439 int bootstrap_processor=cpu_data[0].cpuid; /* CPU ID of BSP */
441 /* Setup BSP mappings */
442 printk("SMP: bootstrap CPU ID is %d\n",bootstrap_processor);
444 cpu_set(bootstrap_processor, cpu_online_map);
445 cpu_set(bootstrap_processor, cpu_present_map);
451 ** inventory.c:do_inventory() hasn't yet been run and thus we
452 ** don't 'discover' the additional CPUs until later.
454 void __init smp_prepare_cpus(unsigned int max_cpus)
456 cpus_clear(cpu_present_map);
457 cpu_set(0, cpu_present_map);
459 parisc_max_cpus = max_cpus;
460 if (!max_cpus)
461 printk(KERN_INFO "SMP mode deactivated.\n");
465 void smp_cpus_done(unsigned int cpu_max)
467 return;
471 int __cpuinit __cpu_up(unsigned int cpu)
473 if (cpu != 0 && cpu < parisc_max_cpus)
474 smp_boot_one_cpu(cpu);
476 return cpu_online(cpu) ? 0 : -ENOSYS;
479 #ifdef CONFIG_PROC_FS
480 int __init
481 setup_profiling_timer(unsigned int multiplier)
483 return -EINVAL;
485 #endif