arch/x86/kernel/vmiclock_32.c

   1 /*
   2  * VMI paravirtual timer support routines.
   3  *
   4  * Copyright (C) 2007, VMware, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  14  * NON INFRINGEMENT.  See the GNU General Public License for more
  15  * details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  *
  21  */
  22
  23 #include <linux/smp.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/cpumask.h>
  26 #include <linux/clocksource.h>
  27 #include <linux/clockchips.h>
  28
  29 #include <asm/vmi.h>
  30 #include <asm/vmi_time.h>
  31 #include <asm/apicdef.h>
  32 #include <asm/apic.h>
  33 #include <asm/timer.h>
  34 #include <asm/i8253.h>
  35 #include <asm/irq_vectors.h>
  36
  37 #define VMI_ONESHOT  (VMI_ALARM_IS_ONESHOT  | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
  38 #define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
  39
  40 static DEFINE_PER_CPU(struct clock_event_device, local_events);
  41
  42 static inline u32 vmi_counter(u32 flags)
  43 {
  44         /* Given VMI_ONESHOT or VMI_PERIODIC, return the corresponding
  45          * cycle counter. */
  46         return flags & VMI_ALARM_COUNTER_MASK;
  47 }
  48
  49 /* paravirt_ops.get_wallclock = vmi_get_wallclock */
  50 unsigned long vmi_get_wallclock(void)
  51 {
  52         unsigned long long wallclock;
  53         wallclock = vmi_timer_ops.get_wallclock(); // nsec
  54         (void)do_div(wallclock, 1000000000);       // sec
  55
  56         return wallclock;
  57 }
  58
  59 /* paravirt_ops.set_wallclock = vmi_set_wallclock */
  60 int vmi_set_wallclock(unsigned long now)
  61 {
  62         return 0;
  63 }
  64
  65 /* paravirt_ops.sched_clock = vmi_sched_clock */
  66 unsigned long long vmi_sched_clock(void)
  67 {
  68         return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE));
  69 }
  70
  71 /* paravirt_ops.get_tsc_khz = vmi_tsc_khz */
  72 unsigned long vmi_tsc_khz(void)
  73 {
  74         unsigned long long khz;
  75         khz = vmi_timer_ops.get_cycle_frequency();
  76         (void)do_div(khz, 1000);
  77         return khz;
  78 }
  79
  80 static inline unsigned int vmi_get_timer_vector(void)
  81 {
  82 #ifdef CONFIG_X86_IO_APIC
  83         return FIRST_DEVICE_VECTOR;
  84 #else
  85         return FIRST_EXTERNAL_VECTOR;
  86 #endif
  87 }
  88
  89 /** vmi clockchip */
  90 #ifdef CONFIG_X86_LOCAL_APIC
  91 static unsigned int startup_timer_irq(unsigned int irq)
  92 {
  93         unsigned long val = apic_read(APIC_LVTT);
  94         apic_write(APIC_LVTT, vmi_get_timer_vector());
  95
  96         return (val & APIC_SEND_PENDING);
  97 }
  98
  99 static void mask_timer_irq(unsigned int irq)
 100 {
 101         unsigned long val = apic_read(APIC_LVTT);
 102         apic_write(APIC_LVTT, val | APIC_LVT_MASKED);
 103 }
 104
 105 static void unmask_timer_irq(unsigned int irq)
 106 {
 107         unsigned long val = apic_read(APIC_LVTT);
 108         apic_write(APIC_LVTT, val & ~APIC_LVT_MASKED);
 109 }
 110
 111 static void ack_timer_irq(unsigned int irq)
 112 {
 113         ack_APIC_irq();
 114 }
 115
 116 static struct irq_chip vmi_chip __read_mostly = {
 117         .name           = "VMI-LOCAL",
 118         .startup        = startup_timer_irq,
 119         .mask           = mask_timer_irq,
 120         .unmask         = unmask_timer_irq,
 121         .ack            = ack_timer_irq
 122 };
 123 #endif
 124
 125 /** vmi clockevent */
 126 #define VMI_ALARM_WIRED_IRQ0    0x00000000
 127 #define VMI_ALARM_WIRED_LVTT    0x00010000
 128 static int vmi_wiring = VMI_ALARM_WIRED_IRQ0;
 129
 130 static inline int vmi_get_alarm_wiring(void)
 131 {
 132         return vmi_wiring;
 133 }
 134
 135 static void vmi_timer_set_mode(enum clock_event_mode mode,
 136                                struct clock_event_device *evt)
 137 {
 138         cycle_t now, cycles_per_hz;
 139         BUG_ON(!irqs_disabled());
 140
 141         switch (mode) {
 142         case CLOCK_EVT_MODE_ONESHOT:
 143         case CLOCK_EVT_MODE_RESUME:
 144                 break;
 145         case CLOCK_EVT_MODE_PERIODIC:
 146                 cycles_per_hz = vmi_timer_ops.get_cycle_frequency();
 147                 (void)do_div(cycles_per_hz, HZ);
 148                 now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_PERIODIC));
 149                 vmi_timer_ops.set_alarm(VMI_PERIODIC, now, cycles_per_hz);
 150                 break;
 151         case CLOCK_EVT_MODE_UNUSED:
 152         case CLOCK_EVT_MODE_SHUTDOWN:
 153                 switch (evt->mode) {
 154                 case CLOCK_EVT_MODE_ONESHOT:
 155                         vmi_timer_ops.cancel_alarm(VMI_ONESHOT);
 156                         break;
 157                 case CLOCK_EVT_MODE_PERIODIC:
 158                         vmi_timer_ops.cancel_alarm(VMI_PERIODIC);
 159                         break;
 160                 default:
 161                         break;
 162                 }
 163                 break;
 164         default:
 165                 break;
 166         }
 167 }
 168
 169 static int vmi_timer_next_event(unsigned long delta,
 170                                 struct clock_event_device *evt)
 171 {
 172         /* Unfortunately, set_next_event interface only passes relative
 173          * expiry, but we want absolute expiry.  It'd be better if were
 174          * were passed an aboslute expiry, since a bunch of time may
 175          * have been stolen between the time the delta is computed and
 176          * when we set the alarm below. */
 177         cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));
 178
 179         BUG_ON(evt->mode != CLOCK_EVT_MODE_ONESHOT);
 180         vmi_timer_ops.set_alarm(VMI_ONESHOT, now + delta, 0);
 181         return 0;
 182 }
 183
 184 static struct clock_event_device vmi_clockevent = {
 185         .name           = "vmi-timer",
 186         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 187         .shift          = 22,
 188         .set_mode       = vmi_timer_set_mode,
 189         .set_next_event = vmi_timer_next_event,
 190         .rating         = 1000,
 191         .irq            = 0,
 192 };
 193
 194 static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id)
 195 {
 196         struct clock_event_device *evt = &__get_cpu_var(local_events);
 197         evt->event_handler(evt);
 198         return IRQ_HANDLED;
 199 }
 200
 201 static struct irqaction vmi_clock_action  = {
 202         .name           = "vmi-timer",
 203         .handler        = vmi_timer_interrupt,
 204         .flags          = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
 205         .mask           = CPU_MASK_ALL,
 206 };
 207
 208 static void __devinit vmi_time_init_clockevent(void)
 209 {
 210         cycle_t cycles_per_msec;
 211         struct clock_event_device *evt;
 212
 213         int cpu = smp_processor_id();
 214         evt = &__get_cpu_var(local_events);
 215
 216         /* Use cycles_per_msec since div_sc params are 32-bits. */
 217         cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
 218         (void)do_div(cycles_per_msec, 1000);
 219
 220         memcpy(evt, &vmi_clockevent, sizeof(*evt));
 221         /* Must pick .shift such that .mult fits in 32-bits.  Choosing
 222          * .shift to be 22 allows 2^(32-22) cycles per nano-seconds
 223          * before overflow. */
 224         evt->mult = div_sc(cycles_per_msec, NSEC_PER_MSEC, evt->shift);
 225         /* Upper bound is clockevent's use of ulong for cycle deltas. */
 226         evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt);
 227         evt->min_delta_ns = clockevent_delta2ns(1, evt);
 228         evt->cpumask = cpumask_of(cpu);
 229
 230         printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n",
 231                evt->name, evt->mult, evt->shift);
 232         clockevents_register_device(evt);
 233 }
 234
 235 void __init vmi_time_init(void)
 236 {
 237         unsigned int cpu;
 238         /* Disable PIT: BIOSes start PIT CH0 with 18.2hz peridic. */
 239         outb_pit(0x3a, PIT_MODE); /* binary, mode 5, LSB/MSB, ch 0 */
 240
 241         vmi_time_init_clockevent();
 242         setup_irq(0, &vmi_clock_action);
 243         for_each_possible_cpu(cpu)
 244                 per_cpu(vector_irq, cpu)[vmi_get_timer_vector()] = 0;
 245 }
 246
 247 #ifdef CONFIG_X86_LOCAL_APIC
 248 void __devinit vmi_time_bsp_init(void)
 249 {
 250         /*
 251          * On APIC systems, we want local timers to fire on each cpu.  We do
 252          * this by programming LVTT to deliver timer events to the IRQ handler
 253          * for IRQ-0, since we can't re-use the APIC local timer handler
 254          * without interfering with that code.
 255          */
 256         clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
 257         local_irq_disable();
 258 #ifdef CONFIG_SMP
 259         /*
 260          * XXX handle_percpu_irq only defined for SMP; we need to switch over
 261          * to using it, since this is a local interrupt, which each CPU must
 262          * handle individually without locking out or dropping simultaneous
 263          * local timers on other CPUs.  We also don't want to trigger the
 264          * quirk workaround code for interrupts which gets invoked from
 265          * handle_percpu_irq via eoi, so we use our own IRQ chip.
 266          */
 267         set_irq_chip_and_handler_name(0, &vmi_chip, handle_percpu_irq, "lvtt");
 268 #else
 269         set_irq_chip_and_handler_name(0, &vmi_chip, handle_edge_irq, "lvtt");
 270 #endif
 271         vmi_wiring = VMI_ALARM_WIRED_LVTT;
 272         apic_write(APIC_LVTT, vmi_get_timer_vector());
 273         local_irq_enable();
 274         clockevents_notify(CLOCK_EVT_NOTIFY_RESUME, NULL);
 275 }
 276
 277 void __devinit vmi_time_ap_init(void)
 278 {
 279         vmi_time_init_clockevent();
 280         apic_write(APIC_LVTT, vmi_get_timer_vector());
 281 }
 282 #endif
 283
 284 /** vmi clocksource */
 285 static struct clocksource clocksource_vmi;
 286
 287 static cycle_t read_real_cycles(void)
 288 {
 289         cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
 290         return max(ret, clocksource_vmi.cycle_last);
 291 }
 292
 293 static struct clocksource clocksource_vmi = {
 294         .name                   = "vmi-timer",
 295         .rating                 = 450,
 296         .read                   = read_real_cycles,
 297         .mask                   = CLOCKSOURCE_MASK(64),
 298         .mult                   = 0, /* to be set */
 299         .shift                  = 22,
 300         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS,
 301 };
 302
 303 static int __init init_vmi_clocksource(void)
 304 {
 305         cycle_t cycles_per_msec;
 306
 307         if (!vmi_timer_ops.get_cycle_frequency)
 308                 return 0;
 309         /* Use khz2mult rather than hz2mult since hz arg is only 32-bits. */
 310         cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
 311         (void)do_div(cycles_per_msec, 1000);
 312
 313         /* Note that clocksource.{mult, shift} converts in the opposite direction
 314          * as clockevents.  */
 315         clocksource_vmi.mult = clocksource_khz2mult(cycles_per_msec,
 316                                                     clocksource_vmi.shift);
 317
 318         printk(KERN_WARNING "vmi: registering clock source khz=%lld\n", cycles_per_msec);
 319         return clocksource_register(&clocksource_vmi);
 320
 321 }
 322 module_init(init_vmi_clocksource);