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[SCSI] qla4xxx: added support to update initiator iscsi port
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / qla4xxx / ql4_mbx.c
blobe843758da3d42fc34004b0828d953683a9806e1f
1 /*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2010 QLogic Corporation
4 *
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
7
8 #include "ql4_def.h"
9 #include "ql4_glbl.h"
10 #include "ql4_dbg.h"
11 #include "ql4_inline.h"
12
13
14 /**
15 * qla4xxx_mailbox_command - issues mailbox commands
16 * @ha: Pointer to host adapter structure.
17 * @inCount: number of mailbox registers to load.
18 * @outCount: number of mailbox registers to return.
19 * @mbx_cmd: data pointer for mailbox in registers.
20 * @mbx_sts: data pointer for mailbox out registers.
21 *
22 * This routine issue mailbox commands and waits for completion.
23 * If outCount is 0, this routine completes successfully WITHOUT waiting
24 * for the mailbox command to complete.
25 **/
26 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
27 uint8_t outCount, uint32_t *mbx_cmd,
28 uint32_t *mbx_sts)
29 {
30 int status = QLA_ERROR;
31 uint8_t i;
32 u_long wait_count;
33 uint32_t intr_status;
34 unsigned long flags = 0;
35 uint32_t dev_state;
36
37 /* Make sure that pointers are valid */
38 if (!mbx_cmd || !mbx_sts) {
39 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
40 "pointer\n", ha->host_no, __func__));
41 return status;
42 }
43
44 if (is_qla8022(ha)) {
45 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
47 "prematurely completing mbx cmd as firmware "
48 "recovery detected\n", ha->host_no, __func__));
49 return status;
50 }
51 /* Do not send any mbx cmd if h/w is in failed state*/
52 qla4_8xxx_idc_lock(ha);
53 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
54 qla4_8xxx_idc_unlock(ha);
55 if (dev_state == QLA82XX_DEV_FAILED) {
56 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: H/W is in "
57 "failed state, do not send any mailbox commands\n",
58 ha->host_no, __func__);
59 return status;
60 }
61 }
62
63 if ((is_aer_supported(ha)) &&
64 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
65 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
66 "timeout MBX Exiting.\n", ha->host_no, __func__));
67 return status;
68 }
69
70 /* Mailbox code active */
71 wait_count = MBOX_TOV * 100;
72
73 while (wait_count--) {
74 mutex_lock(&ha->mbox_sem);
75 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
76 set_bit(AF_MBOX_COMMAND, &ha->flags);
77 mutex_unlock(&ha->mbox_sem);
78 break;
79 }
80 mutex_unlock(&ha->mbox_sem);
81 if (!wait_count) {
82 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
83 ha->host_no, __func__));
84 return status;
85 }
86 msleep(10);
87 }
88
89 spin_lock_irqsave(&ha->hardware_lock, flags);
90
91 ha->mbox_status_count = outCount;
92 for (i = 0; i < outCount; i++)
93 ha->mbox_status[i] = 0;
94
95 if (is_qla8022(ha)) {
96 /* Load all mailbox registers, except mailbox 0. */
97 DEBUG5(
98 printk("scsi%ld: %s: Cmd ", ha->host_no, __func__);
99 for (i = 0; i < inCount; i++)
100 printk("mb%d=%04x ", i, mbx_cmd[i]);
101 printk("\n"));
102
103 for (i = 1; i < inCount; i++)
104 writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]);
105 writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]);
106 readl(&ha->qla4_8xxx_reg->mailbox_in[0]);
107 writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint);
108 } else {
109 /* Load all mailbox registers, except mailbox 0. */
110 for (i = 1; i < inCount; i++)
111 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
112
113 /* Wakeup firmware */
114 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
115 readl(&ha->reg->mailbox[0]);
116 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
117 readl(&ha->reg->ctrl_status);
118 }
119
120 spin_unlock_irqrestore(&ha->hardware_lock, flags);
121
122 /* Wait for completion */
123
124 /*
125 * If we don't want status, don't wait for the mailbox command to
126 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
127 * you must poll the inbound Interrupt Mask for completion.
128 */
129 if (outCount == 0) {
130 status = QLA_SUCCESS;
131 goto mbox_exit;
132 }
133
134 /*
135 * Wait for completion: Poll or completion queue
136 */
137 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
138 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
139 test_bit(AF_ONLINE, &ha->flags) &&
140 !test_bit(AF_HA_REMOVAL, &ha->flags)) {
141 /* Do not poll for completion. Use completion queue */
142 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
143 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
144 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
145 } else {
146 /* Poll for command to complete */
147 wait_count = jiffies + MBOX_TOV * HZ;
148 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
149 if (time_after_eq(jiffies, wait_count))
150 break;
151
152 /*
153 * Service the interrupt.
154 * The ISR will save the mailbox status registers
155 * to a temporary storage location in the adapter
156 * structure.
157 */
158
159 spin_lock_irqsave(&ha->hardware_lock, flags);
160 if (is_qla8022(ha)) {
161 intr_status =
162 readl(&ha->qla4_8xxx_reg->host_int);
163 if (intr_status & ISRX_82XX_RISC_INT) {
164 ha->mbox_status_count = outCount;
165 intr_status =
166 readl(&ha->qla4_8xxx_reg->host_status);
167 ha->isp_ops->interrupt_service_routine(
168 ha, intr_status);
169 if (test_bit(AF_INTERRUPTS_ON,
170 &ha->flags) &&
171 test_bit(AF_INTx_ENABLED,
172 &ha->flags))
173 qla4_8xxx_wr_32(ha,
174 ha->nx_legacy_intr.tgt_mask_reg,
175 0xfbff);
176 }
177 } else {
178 intr_status = readl(&ha->reg->ctrl_status);
179 if (intr_status & INTR_PENDING) {
180 /*
181 * Service the interrupt.
182 * The ISR will save the mailbox status
183 * registers to a temporary storage
184 * location in the adapter structure.
185 */
186 ha->mbox_status_count = outCount;
187 ha->isp_ops->interrupt_service_routine(
188 ha, intr_status);
189 }
190 }
191 spin_unlock_irqrestore(&ha->hardware_lock, flags);
192 msleep(10);
193 }
194 }
195
196 /* Check for mailbox timeout. */
197 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
198 if (is_qla8022(ha) &&
199 test_bit(AF_FW_RECOVERY, &ha->flags)) {
200 DEBUG2(ql4_printk(KERN_INFO, ha,
201 "scsi%ld: %s: prematurely completing mbx cmd as "
202 "firmware recovery detected\n",
203 ha->host_no, __func__));
204 goto mbox_exit;
205 }
206 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
207 " Scheduling Adapter Reset\n", ha->host_no,
208 mbx_cmd[0]));
209 ha->mailbox_timeout_count++;
210 mbx_sts[0] = (-1);
211 set_bit(DPC_RESET_HA, &ha->dpc_flags);
212 goto mbox_exit;
213 }
214
215 /*
216 * Copy the mailbox out registers to the caller's mailbox in/out
217 * structure.
218 */
219 spin_lock_irqsave(&ha->hardware_lock, flags);
220 for (i = 0; i < outCount; i++)
221 mbx_sts[i] = ha->mbox_status[i];
222
223 /* Set return status and error flags (if applicable). */
224 switch (ha->mbox_status[0]) {
225 case MBOX_STS_COMMAND_COMPLETE:
226 status = QLA_SUCCESS;
227 break;
228
229 case MBOX_STS_INTERMEDIATE_COMPLETION:
230 status = QLA_SUCCESS;
231 break;
232
233 case MBOX_STS_BUSY:
234 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
235 ha->host_no, __func__, mbx_cmd[0]));
236 ha->mailbox_timeout_count++;
237 break;
238
239 default:
240 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
241 "sts = %08X ****\n", ha->host_no, __func__,
242 mbx_cmd[0], mbx_sts[0]));
243 break;
244 }
245 spin_unlock_irqrestore(&ha->hardware_lock, flags);
246
247 mbox_exit:
248 mutex_lock(&ha->mbox_sem);
249 clear_bit(AF_MBOX_COMMAND, &ha->flags);
250 mutex_unlock(&ha->mbox_sem);
251 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
252
253 return status;
254 }
255
256 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
257 {
258 set_bit(AF_FW_RECOVERY, &ha->flags);
259 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
260 ha->host_no, __func__);
261
262 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
263 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
264 complete(&ha->mbx_intr_comp);
265 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
266 "recovery, doing premature completion of "
267 "mbx cmd\n", ha->host_no, __func__);
268
269 } else {
270 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
271 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
272 "recovery, doing premature completion of "
273 "polling mbx cmd\n", ha->host_no, __func__);
274 }
275 }
276 }
277
278 static uint8_t
279 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
280 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
281 {
282 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
283 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
284
285 if (is_qla8022(ha))
286 qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, 0);
287
288 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
289 mbox_cmd[1] = 0;
290 mbox_cmd[2] = LSDW(init_fw_cb_dma);
291 mbox_cmd[3] = MSDW(init_fw_cb_dma);
292 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
293 mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
294
295 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
296 QLA_SUCCESS) {
297 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
298 "MBOX_CMD_INITIALIZE_FIRMWARE"
299 " failed w/ status %04X\n",
300 ha->host_no, __func__, mbox_sts[0]));
301 return QLA_ERROR;
302 }
303 return QLA_SUCCESS;
304 }
305
306 uint8_t
307 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
308 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
309 {
310 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
311 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
312 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
313 mbox_cmd[2] = LSDW(init_fw_cb_dma);
314 mbox_cmd[3] = MSDW(init_fw_cb_dma);
315 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
316
317 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
318 QLA_SUCCESS) {
319 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
320 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
321 " failed w/ status %04X\n",
322 ha->host_no, __func__, mbox_sts[0]));
323 return QLA_ERROR;
324 }
325 return QLA_SUCCESS;
326 }
327
328 static void
329 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
330 struct addr_ctrl_blk *init_fw_cb)
331 {
332 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
333 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
334 ha->ip_config.ipv4_addr_state =
335 le16_to_cpu(init_fw_cb->ipv4_addr_state);
336 ha->ip_config.eth_mtu_size =
337 le16_to_cpu(init_fw_cb->eth_mtu_size);
338 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
339
340 if (ha->acb_version == ACB_SUPPORTED) {
341 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
342 ha->ip_config.ipv6_addl_options =
343 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
344 }
345
346 /* Save IPv4 Address Info */
347 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
348 min(sizeof(ha->ip_config.ip_address),
349 sizeof(init_fw_cb->ipv4_addr)));
350 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
351 min(sizeof(ha->ip_config.subnet_mask),
352 sizeof(init_fw_cb->ipv4_subnet)));
353 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
354 min(sizeof(ha->ip_config.gateway),
355 sizeof(init_fw_cb->ipv4_gw_addr)));
356
357 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
358
359 if (is_ipv6_enabled(ha)) {
360 /* Save IPv6 Address */
361 ha->ip_config.ipv6_link_local_state =
362 le16_to_cpu(init_fw_cb->ipv6_lnk_lcl_addr_state);
363 ha->ip_config.ipv6_addr0_state =
364 le16_to_cpu(init_fw_cb->ipv6_addr0_state);
365 ha->ip_config.ipv6_addr1_state =
366 le16_to_cpu(init_fw_cb->ipv6_addr1_state);
367 ha->ip_config.ipv6_default_router_state =
368 le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state);
369 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
370 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
371
372 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
373 init_fw_cb->ipv6_if_id,
374 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
375 sizeof(init_fw_cb->ipv6_if_id)));
376 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
377 min(sizeof(ha->ip_config.ipv6_addr0),
378 sizeof(init_fw_cb->ipv6_addr0)));
379 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
380 min(sizeof(ha->ip_config.ipv6_addr1),
381 sizeof(init_fw_cb->ipv6_addr1)));
382 memcpy(&ha->ip_config.ipv6_default_router_addr,
383 init_fw_cb->ipv6_dflt_rtr_addr,
384 min(sizeof(ha->ip_config.ipv6_default_router_addr),
385 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
386 ha->ip_config.ipv6_vlan_tag =
387 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
388 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
389 }
390 }
391
392 uint8_t
393 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
394 uint32_t *mbox_cmd,
395 uint32_t *mbox_sts,
396 struct addr_ctrl_blk *init_fw_cb,
397 dma_addr_t init_fw_cb_dma)
398 {
399 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
400 != QLA_SUCCESS) {
401 DEBUG2(printk(KERN_WARNING
402 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
403 ha->host_no, __func__));
404 return QLA_ERROR;
405 }
406
407 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
408
409 /* Save some info in adapter structure. */
410 ha->acb_version = init_fw_cb->acb_version;
411 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
412 ha->heartbeat_interval = init_fw_cb->hb_interval;
413 memcpy(ha->name_string, init_fw_cb->iscsi_name,
414 min(sizeof(ha->name_string),
415 sizeof(init_fw_cb->iscsi_name)));
416 /*memcpy(ha->alias, init_fw_cb->Alias,
417 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
418
419 qla4xxx_update_local_ip(ha, init_fw_cb);
420
421 return QLA_SUCCESS;
422 }
423
424 /**
425 * qla4xxx_initialize_fw_cb - initializes firmware control block.
426 * @ha: Pointer to host adapter structure.
427 **/
428 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
429 {
430 struct addr_ctrl_blk *init_fw_cb;
431 dma_addr_t init_fw_cb_dma;
432 uint32_t mbox_cmd[MBOX_REG_COUNT];
433 uint32_t mbox_sts[MBOX_REG_COUNT];
434 int status = QLA_ERROR;
435
436 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
437 sizeof(struct addr_ctrl_blk),
438 &init_fw_cb_dma, GFP_KERNEL);
439 if (init_fw_cb == NULL) {
440 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
441 ha->host_no, __func__));
442 goto exit_init_fw_cb_no_free;
443 }
444 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
445
446 /* Get Initialize Firmware Control Block. */
447 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
448 memset(&mbox_sts, 0, sizeof(mbox_sts));
449
450 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
451 QLA_SUCCESS) {
452 dma_free_coherent(&ha->pdev->dev,
453 sizeof(struct addr_ctrl_blk),
454 init_fw_cb, init_fw_cb_dma);
455 goto exit_init_fw_cb;
456 }
457
458 /* Initialize request and response queues. */
459 qla4xxx_init_rings(ha);
460
461 /* Fill in the request and response queue information. */
462 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
463 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
464 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
465 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
466 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
467 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
468 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
469 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
470 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
471 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
472
473 /* Set up required options. */
474 init_fw_cb->fw_options |=
475 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
476 FWOPT_INITIATOR_MODE);
477
478 if (is_qla8022(ha))
479 init_fw_cb->fw_options |=
480 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
481
482 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
483
484 init_fw_cb->add_fw_options = 0;
485 init_fw_cb->add_fw_options |=
486 __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
487 init_fw_cb->add_fw_options |=
488 __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
489
490 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
491 != QLA_SUCCESS) {
492 DEBUG2(printk(KERN_WARNING
493 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
494 ha->host_no, __func__));
495 goto exit_init_fw_cb;
496 }
497
498 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
499 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
500 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
501 ha->host_no, __func__));
502 goto exit_init_fw_cb;
503 }
504 status = QLA_SUCCESS;
505
506 exit_init_fw_cb:
507 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
508 init_fw_cb, init_fw_cb_dma);
509 exit_init_fw_cb_no_free:
510 return status;
511 }
512
513 /**
514 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
515 * @ha: Pointer to host adapter structure.
516 **/
517 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
518 {
519 struct addr_ctrl_blk *init_fw_cb;
520 dma_addr_t init_fw_cb_dma;
521 uint32_t mbox_cmd[MBOX_REG_COUNT];
522 uint32_t mbox_sts[MBOX_REG_COUNT];
523
524 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
525 sizeof(struct addr_ctrl_blk),
526 &init_fw_cb_dma, GFP_KERNEL);
527 if (init_fw_cb == NULL) {
528 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
529 __func__);
530 return QLA_ERROR;
531 }
532
533 /* Get Initialize Firmware Control Block. */
534 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
535 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
536 QLA_SUCCESS) {
537 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
538 ha->host_no, __func__));
539 dma_free_coherent(&ha->pdev->dev,
540 sizeof(struct addr_ctrl_blk),
541 init_fw_cb, init_fw_cb_dma);
542 return QLA_ERROR;
543 }
544
545 /* Save IP Address. */
546 qla4xxx_update_local_ip(ha, init_fw_cb);
547 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
548 init_fw_cb, init_fw_cb_dma);
549
550 return QLA_SUCCESS;
551 }
552
553 /**
554 * qla4xxx_get_firmware_state - gets firmware state of HBA
555 * @ha: Pointer to host adapter structure.
556 **/
557 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
558 {
559 uint32_t mbox_cmd[MBOX_REG_COUNT];
560 uint32_t mbox_sts[MBOX_REG_COUNT];
561
562 /* Get firmware version */
563 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
564 memset(&mbox_sts, 0, sizeof(mbox_sts));
565
566 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
567
568 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
569 QLA_SUCCESS) {
570 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
571 "status %04X\n", ha->host_no, __func__,
572 mbox_sts[0]));
573 return QLA_ERROR;
574 }
575 ha->firmware_state = mbox_sts[1];
576 ha->board_id = mbox_sts[2];
577 ha->addl_fw_state = mbox_sts[3];
578 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
579 ha->host_no, __func__, ha->firmware_state);)
580
581 return QLA_SUCCESS;
582 }
583
584 /**
585 * qla4xxx_get_firmware_status - retrieves firmware status
586 * @ha: Pointer to host adapter structure.
587 **/
588 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
589 {
590 uint32_t mbox_cmd[MBOX_REG_COUNT];
591 uint32_t mbox_sts[MBOX_REG_COUNT];
592
593 /* Get firmware version */
594 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
595 memset(&mbox_sts, 0, sizeof(mbox_sts));
596
597 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
598
599 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
600 QLA_SUCCESS) {
601 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
602 "status %04X\n", ha->host_no, __func__,
603 mbox_sts[0]));
604 return QLA_ERROR;
605 }
606
607 ql4_printk(KERN_INFO, ha, "%ld firmare IOCBs available (%d).\n",
608 ha->host_no, mbox_sts[2]);
609
610 return QLA_SUCCESS;
611 }
612
613 /**
614 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
615 * @ha: Pointer to host adapter structure.
616 * @fw_ddb_index: Firmware's device database index
617 * @fw_ddb_entry: Pointer to firmware's device database entry structure
618 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
619 * @next_ddb_index: Pointer to next valid device database index
620 * @fw_ddb_device_state: Pointer to device state
621 **/
622 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
623 uint16_t fw_ddb_index,
624 struct dev_db_entry *fw_ddb_entry,
625 dma_addr_t fw_ddb_entry_dma,
626 uint32_t *num_valid_ddb_entries,
627 uint32_t *next_ddb_index,
628 uint32_t *fw_ddb_device_state,
629 uint32_t *conn_err_detail,
630 uint16_t *tcp_source_port_num,
631 uint16_t *connection_id)
632 {
633 int status = QLA_ERROR;
634 uint16_t options;
635 uint32_t mbox_cmd[MBOX_REG_COUNT];
636 uint32_t mbox_sts[MBOX_REG_COUNT];
637
638 /* Make sure the device index is valid */
639 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
640 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
641 ha->host_no, __func__, fw_ddb_index));
642 goto exit_get_fwddb;
643 }
644 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
645 memset(&mbox_sts, 0, sizeof(mbox_sts));
646
647 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
648 mbox_cmd[1] = (uint32_t) fw_ddb_index;
649 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
650 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
651 mbox_cmd[4] = sizeof(struct dev_db_entry);
652
653 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
654 QLA_ERROR) {
655 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
656 " with status 0x%04X\n", ha->host_no, __func__,
657 mbox_sts[0]));
658 goto exit_get_fwddb;
659 }
660 if (fw_ddb_index != mbox_sts[1]) {
661 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
662 ha->host_no, __func__, fw_ddb_index,
663 mbox_sts[1]));
664 goto exit_get_fwddb;
665 }
666 if (fw_ddb_entry) {
667 options = le16_to_cpu(fw_ddb_entry->options);
668 if (options & DDB_OPT_IPV6_DEVICE) {
669 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
670 "Next %d State %04x ConnErr %08x %pI6 "
671 ":%04d \"%s\"\n", __func__, fw_ddb_index,
672 mbox_sts[0], mbox_sts[2], mbox_sts[3],
673 mbox_sts[4], mbox_sts[5],
674 fw_ddb_entry->ip_addr,
675 le16_to_cpu(fw_ddb_entry->port),
676 fw_ddb_entry->iscsi_name);
677 } else {
678 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
679 "Next %d State %04x ConnErr %08x %pI4 "
680 ":%04d \"%s\"\n", __func__, fw_ddb_index,
681 mbox_sts[0], mbox_sts[2], mbox_sts[3],
682 mbox_sts[4], mbox_sts[5],
683 fw_ddb_entry->ip_addr,
684 le16_to_cpu(fw_ddb_entry->port),
685 fw_ddb_entry->iscsi_name);
686 }
687 }
688 if (num_valid_ddb_entries)
689 *num_valid_ddb_entries = mbox_sts[2];
690 if (next_ddb_index)
691 *next_ddb_index = mbox_sts[3];
692 if (fw_ddb_device_state)
693 *fw_ddb_device_state = mbox_sts[4];
694
695 /*
696 * RA: This mailbox has been changed to pass connection error and
697 * details. Its true for ISP4010 as per Version E - Not sure when it
698 * was changed. Get the time2wait from the fw_dd_entry field :
699 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
700 * struct.
701 */
702 if (conn_err_detail)
703 *conn_err_detail = mbox_sts[5];
704 if (tcp_source_port_num)
705 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
706 if (connection_id)
707 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
708 status = QLA_SUCCESS;
709
710 exit_get_fwddb:
711 return status;
712 }
713
714 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
715 {
716 uint32_t mbox_cmd[MBOX_REG_COUNT];
717 uint32_t mbox_sts[MBOX_REG_COUNT];
718 int status;
719
720 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
721 memset(&mbox_sts, 0, sizeof(mbox_sts));
722
723 mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
724 mbox_cmd[1] = fw_ddb_index;
725
726 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
727 &mbox_sts[0]);
728 DEBUG2(ql4_printk(KERN_INFO, ha,
729 "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
730 __func__, status, mbox_sts[0], mbox_sts[1]));
731 return status;
732 }
733
734 /**
735 * qla4xxx_set_fwddb_entry - sets a ddb entry.
736 * @ha: Pointer to host adapter structure.
737 * @fw_ddb_index: Firmware's device database index
738 * @fw_ddb_entry_dma: dma address of ddb entry
739 * @mbx_sts: mailbox 0 to be returned or NULL
740 *
741 * This routine initializes or updates the adapter's device database
742 * entry for the specified device.
743 **/
744 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
745 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
746 {
747 uint32_t mbox_cmd[MBOX_REG_COUNT];
748 uint32_t mbox_sts[MBOX_REG_COUNT];
749 int status;
750
751 /* Do not wait for completion. The firmware will send us an
752 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
753 */
754 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
755 memset(&mbox_sts, 0, sizeof(mbox_sts));
756
757 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
758 mbox_cmd[1] = (uint32_t) fw_ddb_index;
759 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
760 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
761 mbox_cmd[4] = sizeof(struct dev_db_entry);
762
763 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
764 &mbox_sts[0]);
765 if (mbx_sts)
766 *mbx_sts = mbox_sts[0];
767 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
768 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
769
770 return status;
771 }
772
773 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
774 struct ddb_entry *ddb_entry, int options)
775 {
776 int status;
777 uint32_t mbox_cmd[MBOX_REG_COUNT];
778 uint32_t mbox_sts[MBOX_REG_COUNT];
779
780 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
781 memset(&mbox_sts, 0, sizeof(mbox_sts));
782
783 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
784 mbox_cmd[1] = ddb_entry->fw_ddb_index;
785 mbox_cmd[3] = options;
786
787 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
788 &mbox_sts[0]);
789 if (status != QLA_SUCCESS) {
790 DEBUG2(ql4_printk(KERN_INFO, ha,
791 "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
792 "failed sts %04X %04X", __func__,
793 mbox_sts[0], mbox_sts[1]));
794 }
795
796 return status;
797 }
798
799 /**
800 * qla4xxx_get_crash_record - retrieves crash record.
801 * @ha: Pointer to host adapter structure.
802 *
803 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
804 **/
805 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
806 {
807 uint32_t mbox_cmd[MBOX_REG_COUNT];
808 uint32_t mbox_sts[MBOX_REG_COUNT];
809 struct crash_record *crash_record = NULL;
810 dma_addr_t crash_record_dma = 0;
811 uint32_t crash_record_size = 0;
812
813 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
814 memset(&mbox_sts, 0, sizeof(mbox_cmd));
815
816 /* Get size of crash record. */
817 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
818
819 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
820 QLA_SUCCESS) {
821 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
822 ha->host_no, __func__));
823 goto exit_get_crash_record;
824 }
825 crash_record_size = mbox_sts[4];
826 if (crash_record_size == 0) {
827 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
828 ha->host_no, __func__));
829 goto exit_get_crash_record;
830 }
831
832 /* Alloc Memory for Crash Record. */
833 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
834 &crash_record_dma, GFP_KERNEL);
835 if (crash_record == NULL)
836 goto exit_get_crash_record;
837
838 /* Get Crash Record. */
839 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
840 memset(&mbox_sts, 0, sizeof(mbox_cmd));
841
842 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
843 mbox_cmd[2] = LSDW(crash_record_dma);
844 mbox_cmd[3] = MSDW(crash_record_dma);
845 mbox_cmd[4] = crash_record_size;
846
847 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
848 QLA_SUCCESS)
849 goto exit_get_crash_record;
850
851 /* Dump Crash Record. */
852
853 exit_get_crash_record:
854 if (crash_record)
855 dma_free_coherent(&ha->pdev->dev, crash_record_size,
856 crash_record, crash_record_dma);
857 }
858
859 /**
860 * qla4xxx_get_conn_event_log - retrieves connection event log
861 * @ha: Pointer to host adapter structure.
862 **/
863 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
864 {
865 uint32_t mbox_cmd[MBOX_REG_COUNT];
866 uint32_t mbox_sts[MBOX_REG_COUNT];
867 struct conn_event_log_entry *event_log = NULL;
868 dma_addr_t event_log_dma = 0;
869 uint32_t event_log_size = 0;
870 uint32_t num_valid_entries;
871 uint32_t oldest_entry = 0;
872 uint32_t max_event_log_entries;
873 uint8_t i;
874
875
876 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
877 memset(&mbox_sts, 0, sizeof(mbox_cmd));
878
879 /* Get size of crash record. */
880 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
881
882 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
883 QLA_SUCCESS)
884 goto exit_get_event_log;
885
886 event_log_size = mbox_sts[4];
887 if (event_log_size == 0)
888 goto exit_get_event_log;
889
890 /* Alloc Memory for Crash Record. */
891 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
892 &event_log_dma, GFP_KERNEL);
893 if (event_log == NULL)
894 goto exit_get_event_log;
895
896 /* Get Crash Record. */
897 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
898 memset(&mbox_sts, 0, sizeof(mbox_cmd));
899
900 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
901 mbox_cmd[2] = LSDW(event_log_dma);
902 mbox_cmd[3] = MSDW(event_log_dma);
903
904 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
905 QLA_SUCCESS) {
906 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
907 "log!\n", ha->host_no, __func__));
908 goto exit_get_event_log;
909 }
910
911 /* Dump Event Log. */
912 num_valid_entries = mbox_sts[1];
913
914 max_event_log_entries = event_log_size /
915 sizeof(struct conn_event_log_entry);
916
917 if (num_valid_entries > max_event_log_entries)
918 oldest_entry = num_valid_entries % max_event_log_entries;
919
920 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
921 ha->host_no, num_valid_entries));
922
923 if (ql4xextended_error_logging == 3) {
924 if (oldest_entry == 0) {
925 /* Circular Buffer has not wrapped around */
926 for (i=0; i < num_valid_entries; i++) {
927 qla4xxx_dump_buffer((uint8_t *)event_log+
928 (i*sizeof(*event_log)),
929 sizeof(*event_log));
930 }
931 }
932 else {
933 /* Circular Buffer has wrapped around -
934 * display accordingly*/
935 for (i=oldest_entry; i < max_event_log_entries; i++) {
936 qla4xxx_dump_buffer((uint8_t *)event_log+
937 (i*sizeof(*event_log)),
938 sizeof(*event_log));
939 }
940 for (i=0; i < oldest_entry; i++) {
941 qla4xxx_dump_buffer((uint8_t *)event_log+
942 (i*sizeof(*event_log)),
943 sizeof(*event_log));
944 }
945 }
946 }
947
948 exit_get_event_log:
949 if (event_log)
950 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
951 event_log_dma);
952 }
953
954 /**
955 * qla4xxx_abort_task - issues Abort Task
956 * @ha: Pointer to host adapter structure.
957 * @srb: Pointer to srb entry
958 *
959 * This routine performs a LUN RESET on the specified target/lun.
960 * The caller must ensure that the ddb_entry and lun_entry pointers
961 * are valid before calling this routine.
962 **/
963 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
964 {
965 uint32_t mbox_cmd[MBOX_REG_COUNT];
966 uint32_t mbox_sts[MBOX_REG_COUNT];
967 struct scsi_cmnd *cmd = srb->cmd;
968 int status = QLA_SUCCESS;
969 unsigned long flags = 0;
970 uint32_t index;
971
972 /*
973 * Send abort task command to ISP, so that the ISP will return
974 * request with ABORT status
975 */
976 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
977 memset(&mbox_sts, 0, sizeof(mbox_sts));
978
979 spin_lock_irqsave(&ha->hardware_lock, flags);
980 index = (unsigned long)(unsigned char *)cmd->host_scribble;
981 spin_unlock_irqrestore(&ha->hardware_lock, flags);
982
983 /* Firmware already posted completion on response queue */
984 if (index == MAX_SRBS)
985 return status;
986
987 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
988 mbox_cmd[1] = srb->ddb->fw_ddb_index;
989 mbox_cmd[2] = index;
990 /* Immediate Command Enable */
991 mbox_cmd[5] = 0x01;
992
993 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
994 &mbox_sts[0]);
995 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
996 status = QLA_ERROR;
997
998 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
999 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1000 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1001 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1002 }
1003
1004 return status;
1005 }
1006
1007 /**
1008 * qla4xxx_reset_lun - issues LUN Reset
1009 * @ha: Pointer to host adapter structure.
1010 * @ddb_entry: Pointer to device database entry
1011 * @lun: lun number
1012 *
1013 * This routine performs a LUN RESET on the specified target/lun.
1014 * The caller must ensure that the ddb_entry and lun_entry pointers
1015 * are valid before calling this routine.
1016 **/
1017 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1018 int lun)
1019 {
1020 uint32_t mbox_cmd[MBOX_REG_COUNT];
1021 uint32_t mbox_sts[MBOX_REG_COUNT];
1022 int status = QLA_SUCCESS;
1023
1024 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
1025 ddb_entry->fw_ddb_index, lun));
1026
1027 /*
1028 * Send lun reset command to ISP, so that the ISP will return all
1029 * outstanding requests with RESET status
1030 */
1031 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1032 memset(&mbox_sts, 0, sizeof(mbox_sts));
1033
1034 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1035 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1036 mbox_cmd[2] = lun << 8;
1037 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1038
1039 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1040 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1041 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1042 status = QLA_ERROR;
1043
1044 return status;
1045 }
1046
1047 /**
1048 * qla4xxx_reset_target - issues target Reset
1049 * @ha: Pointer to host adapter structure.
1050 * @db_entry: Pointer to device database entry
1051 * @un_entry: Pointer to lun entry structure
1052 *
1053 * This routine performs a TARGET RESET on the specified target.
1054 * The caller must ensure that the ddb_entry pointers
1055 * are valid before calling this routine.
1056 **/
1057 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1058 struct ddb_entry *ddb_entry)
1059 {
1060 uint32_t mbox_cmd[MBOX_REG_COUNT];
1061 uint32_t mbox_sts[MBOX_REG_COUNT];
1062 int status = QLA_SUCCESS;
1063
1064 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1065 ddb_entry->fw_ddb_index));
1066
1067 /*
1068 * Send target reset command to ISP, so that the ISP will return all
1069 * outstanding requests with RESET status
1070 */
1071 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1072 memset(&mbox_sts, 0, sizeof(mbox_sts));
1073
1074 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1075 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1076 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1077
1078 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1079 &mbox_sts[0]);
1080 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1081 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1082 status = QLA_ERROR;
1083
1084 return status;
1085 }
1086
1087 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1088 uint32_t offset, uint32_t len)
1089 {
1090 uint32_t mbox_cmd[MBOX_REG_COUNT];
1091 uint32_t mbox_sts[MBOX_REG_COUNT];
1092
1093 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1094 memset(&mbox_sts, 0, sizeof(mbox_sts));
1095
1096 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1097 mbox_cmd[1] = LSDW(dma_addr);
1098 mbox_cmd[2] = MSDW(dma_addr);
1099 mbox_cmd[3] = offset;
1100 mbox_cmd[4] = len;
1101
1102 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1103 QLA_SUCCESS) {
1104 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1105 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1106 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1107 return QLA_ERROR;
1108 }
1109 return QLA_SUCCESS;
1110 }
1111
1112 /**
1113 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1114 * @ha: Pointer to host adapter structure.
1115 *
1116 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1117 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1118 * those mailboxes, if unused.
1119 **/
1120 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1121 {
1122 struct about_fw_info *about_fw = NULL;
1123 dma_addr_t about_fw_dma;
1124 uint32_t mbox_cmd[MBOX_REG_COUNT];
1125 uint32_t mbox_sts[MBOX_REG_COUNT];
1126 int status = QLA_ERROR;
1127
1128 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1129 sizeof(struct about_fw_info),
1130 &about_fw_dma, GFP_KERNEL);
1131 if (!about_fw) {
1132 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1133 "for about_fw\n", __func__));
1134 return status;
1135 }
1136
1137 memset(about_fw, 0, sizeof(struct about_fw_info));
1138 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1139 memset(&mbox_sts, 0, sizeof(mbox_sts));
1140
1141 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1142 mbox_cmd[2] = LSDW(about_fw_dma);
1143 mbox_cmd[3] = MSDW(about_fw_dma);
1144 mbox_cmd[4] = sizeof(struct about_fw_info);
1145
1146 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1147 &mbox_cmd[0], &mbox_sts[0]);
1148 if (status != QLA_SUCCESS) {
1149 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1150 "failed w/ status %04X\n", __func__,
1151 mbox_sts[0]));
1152 goto exit_about_fw;
1153 }
1154
1155 /* Save version information. */
1156 ha->firmware_version[0] = le16_to_cpu(about_fw->fw_major);
1157 ha->firmware_version[1] = le16_to_cpu(about_fw->fw_minor);
1158 ha->patch_number = le16_to_cpu(about_fw->fw_patch);
1159 ha->build_number = le16_to_cpu(about_fw->fw_build);
1160 ha->iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1161 ha->iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1162 ha->bootload_major = le16_to_cpu(about_fw->bootload_major);
1163 ha->bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1164 ha->bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1165 ha->bootload_build = le16_to_cpu(about_fw->bootload_build);
1166 status = QLA_SUCCESS;
1167
1168 exit_about_fw:
1169 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1170 about_fw, about_fw_dma);
1171 return status;
1172 }
1173
1174 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1175 dma_addr_t dma_addr)
1176 {
1177 uint32_t mbox_cmd[MBOX_REG_COUNT];
1178 uint32_t mbox_sts[MBOX_REG_COUNT];
1179
1180 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1181 memset(&mbox_sts, 0, sizeof(mbox_sts));
1182
1183 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1184 mbox_cmd[1] = options;
1185 mbox_cmd[2] = LSDW(dma_addr);
1186 mbox_cmd[3] = MSDW(dma_addr);
1187
1188 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1189 QLA_SUCCESS) {
1190 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1191 ha->host_no, __func__, mbox_sts[0]));
1192 return QLA_ERROR;
1193 }
1194 return QLA_SUCCESS;
1195 }
1196
1197 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1198 uint32_t *mbx_sts)
1199 {
1200 int status;
1201 uint32_t mbox_cmd[MBOX_REG_COUNT];
1202 uint32_t mbox_sts[MBOX_REG_COUNT];
1203
1204 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1205 memset(&mbox_sts, 0, sizeof(mbox_sts));
1206
1207 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1208 mbox_cmd[1] = ddb_index;
1209
1210 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1211 &mbox_sts[0]);
1212 if (status != QLA_SUCCESS) {
1213 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1214 __func__, mbox_sts[0]));
1215 }
1216
1217 *mbx_sts = mbox_sts[0];
1218 return status;
1219 }
1220
1221 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1222 {
1223 int status;
1224 uint32_t mbox_cmd[MBOX_REG_COUNT];
1225 uint32_t mbox_sts[MBOX_REG_COUNT];
1226
1227 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1228 memset(&mbox_sts, 0, sizeof(mbox_sts));
1229
1230 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1231 mbox_cmd[1] = ddb_index;
1232
1233 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1234 &mbox_sts[0]);
1235 if (status != QLA_SUCCESS) {
1236 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1237 __func__, mbox_sts[0]));
1238 }
1239
1240 return status;
1241 }
1242
1243 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1244 uint32_t offset, uint32_t length, uint32_t options)
1245 {
1246 uint32_t mbox_cmd[MBOX_REG_COUNT];
1247 uint32_t mbox_sts[MBOX_REG_COUNT];
1248 int status = QLA_SUCCESS;
1249
1250 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1251 memset(&mbox_sts, 0, sizeof(mbox_sts));
1252
1253 mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1254 mbox_cmd[1] = LSDW(dma_addr);
1255 mbox_cmd[2] = MSDW(dma_addr);
1256 mbox_cmd[3] = offset;
1257 mbox_cmd[4] = length;
1258 mbox_cmd[5] = options;
1259
1260 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1261 if (status != QLA_SUCCESS) {
1262 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1263 "failed w/ status %04X, mbx1 %04X\n",
1264 __func__, mbox_sts[0], mbox_sts[1]));
1265 }
1266 return status;
1267 }
1268
1269 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1270 struct dev_db_entry *fw_ddb_entry,
1271 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1272 {
1273 uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1274 uint32_t dev_db_end_offset;
1275 int status = QLA_ERROR;
1276
1277 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1278
1279 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1280 dev_db_end_offset = FLASH_OFFSET_DB_END;
1281
1282 if (dev_db_start_offset > dev_db_end_offset) {
1283 DEBUG2(ql4_printk(KERN_ERR, ha,
1284 "%s:Invalid DDB index %d", __func__,
1285 ddb_index));
1286 goto exit_bootdb_failed;
1287 }
1288
1289 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1290 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1291 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1292 "failed\n", ha->host_no, __func__);
1293 goto exit_bootdb_failed;
1294 }
1295
1296 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1297 status = QLA_SUCCESS;
1298
1299 exit_bootdb_failed:
1300 return status;
1301 }
1302
1303 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1304 uint16_t idx)
1305 {
1306 int ret = 0;
1307 int rval = QLA_ERROR;
1308 uint32_t offset = 0;
1309 struct ql4_chap_table *chap_table;
1310 dma_addr_t chap_dma;
1311
1312 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1313 if (chap_table == NULL) {
1314 ret = -ENOMEM;
1315 goto exit_get_chap;
1316 }
1317
1318 memset(chap_table, 0, sizeof(struct ql4_chap_table));
1319
1320 offset = 0x06000000 | (idx * sizeof(struct ql4_chap_table));
1321
1322 rval = qla4xxx_get_flash(ha, chap_dma, offset,
1323 sizeof(struct ql4_chap_table));
1324 if (rval != QLA_SUCCESS) {
1325 ret = -EINVAL;
1326 goto exit_get_chap;
1327 }
1328
1329 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1330 __le16_to_cpu(chap_table->cookie)));
1331
1332 if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1333 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1334 goto exit_get_chap;
1335 }
1336
1337 strncpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1338 strncpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1339 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1340
1341 exit_get_chap:
1342 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1343 return ret;
1344 }
1345
1346 static int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username,
1347 char *password, uint16_t idx, int bidi)
1348 {
1349 int ret = 0;
1350 int rval = QLA_ERROR;
1351 uint32_t offset = 0;
1352 struct ql4_chap_table *chap_table;
1353 dma_addr_t chap_dma;
1354
1355 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1356 if (chap_table == NULL) {
1357 ret = -ENOMEM;
1358 goto exit_set_chap;
1359 }
1360
1361 memset(chap_table, 0, sizeof(struct ql4_chap_table));
1362 if (bidi)
1363 chap_table->flags |= BIT_6; /* peer */
1364 else
1365 chap_table->flags |= BIT_7; /* local */
1366 chap_table->secret_len = strlen(password);
1367 strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN);
1368 strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN);
1369 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1370 offset = 0x06000000 | (idx * sizeof(struct ql4_chap_table));
1371 rval = qla4xxx_set_flash(ha, chap_dma, offset,
1372 sizeof(struct ql4_chap_table),
1373 FLASH_OPT_RMW_COMMIT);
1374 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1375 if (rval != QLA_SUCCESS)
1376 ret = -EINVAL;
1377
1378 exit_set_chap:
1379 return ret;
1380 }
1381
1382 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1383 uint16_t fw_ddb_index,
1384 uint16_t connection_id,
1385 uint16_t option)
1386 {
1387 uint32_t mbox_cmd[MBOX_REG_COUNT];
1388 uint32_t mbox_sts[MBOX_REG_COUNT];
1389 int status = QLA_SUCCESS;
1390
1391 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1392 memset(&mbox_sts, 0, sizeof(mbox_sts));
1393
1394 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1395 mbox_cmd[1] = fw_ddb_index;
1396 mbox_cmd[2] = connection_id;
1397 mbox_cmd[3] = option;
1398
1399 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1400 if (status != QLA_SUCCESS) {
1401 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1402 "option %04x failed w/ status %04X %04X\n",
1403 __func__, option, mbox_sts[0], mbox_sts[1]));
1404 }
1405 return status;
1406 }
1407
1408 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1409 {
1410 uint32_t mbox_cmd[MBOX_REG_COUNT];
1411 uint32_t mbox_sts[MBOX_REG_COUNT];
1412 int status = QLA_SUCCESS;
1413
1414 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1415 memset(&mbox_sts, 0, sizeof(mbox_sts));
1416
1417 mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1418
1419 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1420 if (status != QLA_SUCCESS) {
1421 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1422 "failed w/ status %04X %04X %04X", __func__,
1423 mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1424 }
1425 return status;
1426 }
1427
1428 int qla4xxx_get_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1429 uint32_t *mbox_sts, dma_addr_t acb_dma)
1430 {
1431 int status = QLA_SUCCESS;
1432
1433 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1434 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1435 mbox_cmd[0] = MBOX_CMD_GET_ACB;
1436 mbox_cmd[1] = 0; /* Primary ACB */
1437 mbox_cmd[2] = LSDW(acb_dma);
1438 mbox_cmd[3] = MSDW(acb_dma);
1439 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1440
1441 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1442 if (status != QLA_SUCCESS) {
1443 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1444 "failed w/ status %04X\n", __func__,
1445 mbox_sts[0]));
1446 }
1447 return status;
1448 }
1449
1450 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1451 uint32_t *mbox_sts, dma_addr_t acb_dma)
1452 {
1453 int status = QLA_SUCCESS;
1454
1455 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1456 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1457 mbox_cmd[0] = MBOX_CMD_SET_ACB;
1458 mbox_cmd[1] = 0; /* Primary ACB */
1459 mbox_cmd[2] = LSDW(acb_dma);
1460 mbox_cmd[3] = MSDW(acb_dma);
1461 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1462
1463 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1464 if (status != QLA_SUCCESS) {
1465 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB "
1466 "failed w/ status %04X\n", __func__,
1467 mbox_sts[0]));
1468 }
1469 return status;
1470 }
1471
1472 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1473 struct ddb_entry *ddb_entry,
1474 struct iscsi_cls_conn *cls_conn,
1475 uint32_t *mbx_sts)
1476 {
1477 struct dev_db_entry *fw_ddb_entry;
1478 struct iscsi_conn *conn;
1479 struct iscsi_session *sess;
1480 struct qla_conn *qla_conn;
1481 struct sockaddr *dst_addr;
1482 dma_addr_t fw_ddb_entry_dma;
1483 int status = QLA_SUCCESS;
1484 int rval = 0;
1485 struct sockaddr_in *addr;
1486 struct sockaddr_in6 *addr6;
1487 char *ip;
1488 uint16_t iscsi_opts = 0;
1489 uint32_t options = 0;
1490 uint16_t idx;
1491 int max_chap_entries = 0;
1492
1493 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1494 &fw_ddb_entry_dma, GFP_KERNEL);
1495 if (!fw_ddb_entry) {
1496 DEBUG2(ql4_printk(KERN_ERR, ha,
1497 "%s: Unable to allocate dma buffer.\n",
1498 __func__));
1499 rval = -ENOMEM;
1500 goto exit_set_param_no_free;
1501 }
1502
1503 conn = cls_conn->dd_data;
1504 qla_conn = conn->dd_data;
1505 sess = conn->session;
1506 dst_addr = &qla_conn->qla_ep->dst_addr;
1507
1508 if (dst_addr->sa_family == AF_INET6)
1509 options |= IPV6_DEFAULT_DDB_ENTRY;
1510
1511 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
1512 if (status == QLA_ERROR) {
1513 rval = -EINVAL;
1514 goto exit_set_param;
1515 }
1516
1517 iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
1518 memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
1519
1520 memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
1521
1522 if (sess->targetname != NULL) {
1523 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
1524 min(strlen(sess->targetname),
1525 sizeof(fw_ddb_entry->iscsi_name)));
1526 }
1527
1528 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
1529 memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
1530
1531 fw_ddb_entry->options = DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
1532
1533 if (dst_addr->sa_family == AF_INET) {
1534 addr = (struct sockaddr_in *)dst_addr;
1535 ip = (char *)&addr->sin_addr;
1536 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
1537 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
1538 DEBUG2(ql4_printk(KERN_INFO, ha,
1539 "%s: Destination Address [%pI4]: index [%d]\n",
1540 __func__, fw_ddb_entry->ip_addr,
1541 ddb_entry->fw_ddb_index));
1542 } else if (dst_addr->sa_family == AF_INET6) {
1543 addr6 = (struct sockaddr_in6 *)dst_addr;
1544 ip = (char *)&addr6->sin6_addr;
1545 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
1546 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
1547 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
1548 DEBUG2(ql4_printk(KERN_INFO, ha,
1549 "%s: Destination Address [%pI6]: index [%d]\n",
1550 __func__, fw_ddb_entry->ip_addr,
1551 ddb_entry->fw_ddb_index));
1552 } else {
1553 ql4_printk(KERN_ERR, ha,
1554 "%s: Failed to get IP Address\n",
1555 __func__);
1556 rval = -EINVAL;
1557 goto exit_set_param;
1558 }
1559
1560 if (is_qla8022(ha))
1561 max_chap_entries = MAX_CHAP_ENTRIES_82XX;
1562 else
1563 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1564 /* CHAP */
1565 if (sess->username != NULL && sess->password != NULL) {
1566 if (strlen(sess->username) && strlen(sess->password)) {
1567 iscsi_opts |= BIT_7;
1568 idx = ddb_entry->fw_ddb_index * 2;
1569 if (idx > max_chap_entries) {
1570 ql4_printk(KERN_ERR, ha,
1571 "%s: Invalid ddb or chap index\n",
1572 __func__);
1573 rval = -EINVAL;
1574 goto exit_set_param;
1575 }
1576
1577 rval = qla4xxx_set_chap(ha, sess->username,
1578 sess->password, idx, 0);
1579 if (rval)
1580 goto exit_set_param;
1581
1582 fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
1583 }
1584 }
1585
1586 if (sess->username_in != NULL && sess->password_in != NULL) {
1587 /* Check if BIDI CHAP */
1588 if (strlen(sess->username_in) && strlen(sess->password_in)) {
1589 iscsi_opts |= BIT_4;
1590 idx = (ddb_entry->fw_ddb_index * 2) + 1;
1591 if (idx > max_chap_entries) {
1592 ql4_printk(KERN_ERR, ha,
1593 "%s: Invalid ddb or bidi chap "
1594 "index\n", __func__);
1595 rval = -EINVAL;
1596 goto exit_set_param;
1597 }
1598 rval = qla4xxx_set_chap(ha, sess->username_in,
1599 sess->password_in, idx, 0);
1600 if (rval)
1601 goto exit_set_param;
1602 }
1603 }
1604
1605 if (sess->initial_r2t_en)
1606 iscsi_opts |= BIT_10;
1607
1608 if (sess->imm_data_en)
1609 iscsi_opts |= BIT_11;
1610
1611 fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
1612
1613 if (conn->max_recv_dlength)
1614 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
1615 __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
1616
1617 if (sess->max_r2t)
1618 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
1619
1620 if (sess->first_burst)
1621 fw_ddb_entry->iscsi_first_burst_len =
1622 __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
1623
1624 if (sess->max_burst)
1625 fw_ddb_entry->iscsi_max_burst_len =
1626 __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
1627
1628 if (sess->time2wait)
1629 fw_ddb_entry->iscsi_def_time2wait =
1630 cpu_to_le16(sess->time2wait);
1631
1632 if (sess->time2retain)
1633 fw_ddb_entry->iscsi_def_time2retain =
1634 cpu_to_le16(sess->time2retain);
1635
1636 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
1637 fw_ddb_entry_dma, mbx_sts);
1638
1639 if (status != QLA_SUCCESS)
1640 rval = -EINVAL;
1641 exit_set_param:
1642 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1643 fw_ddb_entry, fw_ddb_entry_dma);
1644 exit_set_param_no_free:
1645 return rval;
1646 }
1647
1648 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
1649 uint16_t stats_size, dma_addr_t stats_dma)
1650 {
1651 int status = QLA_SUCCESS;
1652 uint32_t mbox_cmd[MBOX_REG_COUNT];
1653 uint32_t mbox_sts[MBOX_REG_COUNT];
1654
1655 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1656 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1657 mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
1658 mbox_cmd[1] = fw_ddb_index;
1659 mbox_cmd[2] = LSDW(stats_dma);
1660 mbox_cmd[3] = MSDW(stats_dma);
1661 mbox_cmd[4] = stats_size;
1662
1663 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
1664 if (status != QLA_SUCCESS) {
1665 DEBUG2(ql4_printk(KERN_WARNING, ha,
1666 "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
1667 "failed w/ status %04X\n", __func__,
1668 mbox_sts[0]));
1669 }
1670 return status;
1671 }
1672
1673 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
1674 uint32_t ip_idx, uint32_t *sts)
1675 {
1676 uint32_t mbox_cmd[MBOX_REG_COUNT];
1677 uint32_t mbox_sts[MBOX_REG_COUNT];
1678 int status = QLA_SUCCESS;
1679
1680 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1681 memset(&mbox_sts, 0, sizeof(mbox_sts));
1682 mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
1683 mbox_cmd[1] = acb_idx;
1684 mbox_cmd[2] = ip_idx;
1685
1686 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
1687 if (status != QLA_SUCCESS) {
1688 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: "
1689 "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
1690 "status %04X\n", __func__, mbox_sts[0]));
1691 }
1692 memcpy(sts, mbox_sts, sizeof(mbox_sts));
1693 return status;
1694 }
1695
1696 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1697 uint32_t offset, uint32_t size)
1698 {
1699 int status = QLA_SUCCESS;
1700 uint32_t mbox_cmd[MBOX_REG_COUNT];
1701 uint32_t mbox_sts[MBOX_REG_COUNT];
1702
1703 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1704 memset(&mbox_sts, 0, sizeof(mbox_sts));
1705
1706 mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
1707 mbox_cmd[1] = LSDW(nvram_dma);
1708 mbox_cmd[2] = MSDW(nvram_dma);
1709 mbox_cmd[3] = offset;
1710 mbox_cmd[4] = size;
1711
1712 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1713 &mbox_sts[0]);
1714 if (status != QLA_SUCCESS) {
1715 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1716 "status %04X\n", ha->host_no, __func__,
1717 mbox_sts[0]));
1718 }
1719 return status;
1720 }
1721
1722 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1723 uint32_t offset, uint32_t size)
1724 {
1725 int status = QLA_SUCCESS;
1726 uint32_t mbox_cmd[MBOX_REG_COUNT];
1727 uint32_t mbox_sts[MBOX_REG_COUNT];
1728
1729 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1730 memset(&mbox_sts, 0, sizeof(mbox_sts));
1731
1732 mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
1733 mbox_cmd[1] = LSDW(nvram_dma);
1734 mbox_cmd[2] = MSDW(nvram_dma);
1735 mbox_cmd[3] = offset;
1736 mbox_cmd[4] = size;
1737
1738 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1739 &mbox_sts[0]);
1740 if (status != QLA_SUCCESS) {
1741 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1742 "status %04X\n", ha->host_no, __func__,
1743 mbox_sts[0]));
1744 }
1745 return status;
1746 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree