1 /* cpwd.c - driver implementation for hardware watchdog
2 * timers found on Sun Microsystems CP1400 and CP1500 boards.
4 * This device supports both the generic Linux watchdog
5 * interface and Solaris-compatible ioctls as best it is
8 * NOTE: CP1400 systems appear to have a defective intr_mask
9 * register on the PLD, preventing the disabling of
10 * timer interrupts. We use a timer to periodically
11 * reset 'stopped' watchdogs on affected platforms.
13 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
14 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
20 #include <linux/errno.h>
21 #include <linux/major.h>
22 #include <linux/init.h>
23 #include <linux/miscdevice.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/timer.h>
27 #include <linux/slab.h>
28 #include <linux/mutex.h>
31 #include <linux/of_device.h>
32 #include <linux/uaccess.h>
35 #include <asm/watchdog.h>
37 #define DRIVER_NAME "cpwd"
38 #define PFX DRIVER_NAME ": "
40 #define WD_OBPNAME "watchdog"
41 #define WD_BADMODEL "SUNW,501-5336"
42 #define WD_BTIMEOUT (jiffies + (HZ * 1000))
43 #define WD_BLIMIT 0xFFFF
49 /* Internal driver definitions. */
58 #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
59 #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
60 #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
62 /* Register value definitions
64 #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
65 #define WD1_INTR_MASK 0x02
66 #define WD2_INTR_MASK 0x04
68 #define WD_S_RUNNING 0x01 /* Watchdog device status running */
69 #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
77 unsigned long timeout
;
84 struct miscdevice misc
;
92 static DEFINE_MUTEX(cpwd_mutex
);
93 static struct cpwd
*cpwd_device
;
95 /* Sun uses Altera PLD EPF8820ATC144-4
96 * providing three hardware watchdogs:
98 * 1) RIC - sends an interrupt when triggered
99 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
100 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
102 *** Timer register block definition (struct wd_timer_regblk)
104 * dcntr and limit registers (halfword access):
105 * -------------------
106 * | 15 | ...| 1 | 0 |
107 * -------------------
109 * -------------------
110 * dcntr - Current 16-bit downcounter value.
111 * When downcounter reaches '0' watchdog expires.
112 * Reading this register resets downcounter with
114 * limit - 16-bit countdown value in 1/10th second increments.
115 * Writing this register begins countdown with input value.
116 * Reading from this register does not affect counter.
117 * NOTES: After watchdog reset, dcntr and limit contain '1'
119 * status register (byte access):
120 * ---------------------------
121 * | 7 | ... | 2 | 1 | 0 |
122 * --------------+------------
123 * |- UNUSED -| EXP | RUN |
124 * ---------------------------
125 * status- Bit 0 - Watchdog is running
126 * Bit 1 - Watchdog has expired
128 *** PLD register block definition (struct wd_pld_regblk)
130 * intr_mask register (byte access):
131 * ---------------------------------
132 * | 7 | ... | 3 | 2 | 1 | 0 |
133 * +-------------+------------------
134 * |- UNUSED -| WD3 | WD2 | WD1 |
135 * ---------------------------------
136 * WD3 - 1 == Interrupt disabled for watchdog 3
137 * WD2 - 1 == Interrupt disabled for watchdog 2
138 * WD1 - 1 == Interrupt disabled for watchdog 1
140 * pld_status register (byte access):
141 * UNKNOWN, MAGICAL MYSTERY REGISTER
144 #define WD_TIMER_REGSZ 16
146 #define WD1_OFF (WD_TIMER_REGSZ * 1)
147 #define WD2_OFF (WD_TIMER_REGSZ * 2)
148 #define PLD_OFF (WD_TIMER_REGSZ * 3)
150 #define WD_DCNTR 0x00
151 #define WD_LIMIT 0x04
152 #define WD_STATUS 0x08
154 #define PLD_IMASK (PLD_OFF + 0x00)
155 #define PLD_STATUS (PLD_OFF + 0x04)
157 static struct timer_list cpwd_timer
;
159 static int wd0_timeout
;
160 static int wd1_timeout
;
161 static int wd2_timeout
;
163 module_param(wd0_timeout
, int, 0);
164 MODULE_PARM_DESC(wd0_timeout
, "Default watchdog0 timeout in 1/10secs");
165 module_param(wd1_timeout
, int, 0);
166 MODULE_PARM_DESC(wd1_timeout
, "Default watchdog1 timeout in 1/10secs");
167 module_param(wd2_timeout
, int, 0);
168 MODULE_PARM_DESC(wd2_timeout
, "Default watchdog2 timeout in 1/10secs");
170 MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
171 MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
172 MODULE_LICENSE("GPL");
173 MODULE_SUPPORTED_DEVICE("watchdog");
175 static void cpwd_writew(u16 val
, void __iomem
*addr
)
177 writew(cpu_to_le16(val
), addr
);
179 static u16
cpwd_readw(void __iomem
*addr
)
181 u16 val
= readw(addr
);
183 return le16_to_cpu(val
);
186 static void cpwd_writeb(u8 val
, void __iomem
*addr
)
191 static u8
cpwd_readb(void __iomem
*addr
)
196 /* Enable or disable watchdog interrupts
197 * Because of the CP1400 defect this should only be
198 * called during initialzation or by wd_[start|stop]timer()
200 * index - sub-device index, or -1 for 'all'
201 * enable - non-zero to enable interrupts, zero to disable
203 static void cpwd_toggleintr(struct cpwd
*p
, int index
, int enable
)
205 unsigned char curregs
= cpwd_readb(p
->regs
+ PLD_IMASK
);
206 unsigned char setregs
=
208 (WD0_INTR_MASK
| WD1_INTR_MASK
| WD2_INTR_MASK
) :
209 (p
->devs
[index
].intr_mask
);
211 if (enable
== WD_INTR_ON
)
216 cpwd_writeb(curregs
, p
->regs
+ PLD_IMASK
);
219 /* Restarts timer with maximum limit value and
220 * does not unset 'brokenstop' value.
222 static void cpwd_resetbrokentimer(struct cpwd
*p
, int index
)
224 cpwd_toggleintr(p
, index
, WD_INTR_ON
);
225 cpwd_writew(WD_BLIMIT
, p
->devs
[index
].regs
+ WD_LIMIT
);
228 /* Timer method called to reset stopped watchdogs--
229 * because of the PLD bug on CP1400, we cannot mask
230 * interrupts within the PLD so me must continually
231 * reset the timers ad infinitum.
233 static void cpwd_brokentimer(unsigned long data
)
235 struct cpwd
*p
= (struct cpwd
*) data
;
238 /* kill a running timer instance, in case we
239 * were called directly instead of by kernel timer
241 if (timer_pending(&cpwd_timer
))
242 del_timer(&cpwd_timer
);
244 for (id
= 0; id
< WD_NUMDEVS
; id
++) {
245 if (p
->devs
[id
].runstatus
& WD_STAT_BSTOP
) {
247 cpwd_resetbrokentimer(p
, id
);
252 /* there is at least one timer brokenstopped-- reschedule */
253 cpwd_timer
.expires
= WD_BTIMEOUT
;
254 add_timer(&cpwd_timer
);
258 /* Reset countdown timer with 'limit' value and continue countdown.
259 * This will not start a stopped timer.
261 static void cpwd_pingtimer(struct cpwd
*p
, int index
)
263 if (cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
) & WD_S_RUNNING
)
264 cpwd_readw(p
->devs
[index
].regs
+ WD_DCNTR
);
267 /* Stop a running watchdog timer-- the timer actually keeps
268 * running, but the interrupt is masked so that no action is
269 * taken upon expiration.
271 static void cpwd_stoptimer(struct cpwd
*p
, int index
)
273 if (cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
) & WD_S_RUNNING
) {
274 cpwd_toggleintr(p
, index
, WD_INTR_OFF
);
277 p
->devs
[index
].runstatus
|= WD_STAT_BSTOP
;
278 cpwd_brokentimer((unsigned long) p
);
283 /* Start a watchdog timer with the specified limit value
284 * If the watchdog is running, it will be restarted with
285 * the provided limit value.
287 * This function will enable interrupts on the specified
290 static void cpwd_starttimer(struct cpwd
*p
, int index
)
293 p
->devs
[index
].runstatus
&= ~WD_STAT_BSTOP
;
295 p
->devs
[index
].runstatus
&= ~WD_STAT_SVCD
;
297 cpwd_writew(p
->devs
[index
].timeout
, p
->devs
[index
].regs
+ WD_LIMIT
);
298 cpwd_toggleintr(p
, index
, WD_INTR_ON
);
301 static int cpwd_getstatus(struct cpwd
*p
, int index
)
303 unsigned char stat
= cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
);
304 unsigned char intr
= cpwd_readb(p
->devs
[index
].regs
+ PLD_IMASK
);
305 unsigned char ret
= WD_STOPPED
;
307 /* determine STOPPED */
311 /* determine EXPIRED vs FREERUN vs RUNNING */
312 else if (WD_S_EXPIRED
& stat
) {
314 } else if (WD_S_RUNNING
& stat
) {
315 if (intr
& p
->devs
[index
].intr_mask
) {
318 /* Fudge WD_EXPIRED status for defective CP1400--
319 * IF timer is running
320 * AND brokenstop is set
321 * AND an interrupt has been serviced
324 * IF timer is running
325 * AND brokenstop is set
326 * AND no interrupt has been serviced
330 (p
->devs
[index
].runstatus
& WD_STAT_BSTOP
)) {
331 if (p
->devs
[index
].runstatus
& WD_STAT_SVCD
) {
334 /* we could as well pretend
344 /* determine SERVICED */
345 if (p
->devs
[index
].runstatus
& WD_STAT_SVCD
)
351 static irqreturn_t
cpwd_interrupt(int irq
, void *dev_id
)
353 struct cpwd
*p
= dev_id
;
355 /* Only WD0 will interrupt-- others are NMI and we won't
358 spin_lock_irq(&p
->lock
);
360 cpwd_stoptimer(p
, WD0_ID
);
361 p
->devs
[WD0_ID
].runstatus
|= WD_STAT_SVCD
;
363 spin_unlock_irq(&p
->lock
);
368 static int cpwd_open(struct inode
*inode
, struct file
*f
)
370 struct cpwd
*p
= cpwd_device
;
372 mutex_lock(&cpwd_mutex
);
373 switch (iminor(inode
)) {
380 mutex_unlock(&cpwd_mutex
);
384 /* Register IRQ on first open of device */
385 if (!p
->initialized
) {
386 if (request_irq(p
->irq
, &cpwd_interrupt
,
387 IRQF_SHARED
, DRIVER_NAME
, p
)) {
388 printk(KERN_ERR PFX
"Cannot register IRQ %d\n",
390 mutex_unlock(&cpwd_mutex
);
393 p
->initialized
= true;
396 mutex_unlock(&cpwd_mutex
);
398 return nonseekable_open(inode
, f
);
401 static int cpwd_release(struct inode
*inode
, struct file
*file
)
406 static long cpwd_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
408 static const struct watchdog_info info
= {
409 .options
= WDIOF_SETTIMEOUT
,
410 .firmware_version
= 1,
411 .identity
= DRIVER_NAME
,
413 void __user
*argp
= (void __user
*)arg
;
414 struct inode
*inode
= file
->f_path
.dentry
->d_inode
;
415 int index
= iminor(inode
) - WD0_MINOR
;
416 struct cpwd
*p
= cpwd_device
;
420 /* Generic Linux IOCTLs */
421 case WDIOC_GETSUPPORT
:
422 if (copy_to_user(argp
, &info
, sizeof(struct watchdog_info
)))
426 case WDIOC_GETSTATUS
:
427 case WDIOC_GETBOOTSTATUS
:
428 if (put_user(0, (int __user
*)argp
))
432 case WDIOC_KEEPALIVE
:
433 cpwd_pingtimer(p
, index
);
436 case WDIOC_SETOPTIONS
:
437 if (copy_from_user(&setopt
, argp
, sizeof(unsigned int)))
440 if (setopt
& WDIOS_DISABLECARD
) {
443 cpwd_stoptimer(p
, index
);
444 } else if (setopt
& WDIOS_ENABLECARD
) {
445 cpwd_starttimer(p
, index
);
451 /* Solaris-compatible IOCTLs */
453 setopt
= cpwd_getstatus(p
, index
);
454 if (copy_to_user(argp
, &setopt
, sizeof(unsigned int)))
459 cpwd_starttimer(p
, index
);
466 cpwd_stoptimer(p
, index
);
476 static long cpwd_compat_ioctl(struct file
*file
, unsigned int cmd
,
479 int rval
= -ENOIOCTLCMD
;
482 /* solaris ioctls are specific to this driver */
486 mutex_lock(&cpwd_mutex
);
487 rval
= cpwd_ioctl(file
, cmd
, arg
);
488 mutex_unlock(&cpwd_mutex
);
491 /* everything else is handled by the generic compat layer */
499 static ssize_t
cpwd_write(struct file
*file
, const char __user
*buf
,
500 size_t count
, loff_t
*ppos
)
502 struct inode
*inode
= file
->f_path
.dentry
->d_inode
;
503 struct cpwd
*p
= cpwd_device
;
504 int index
= iminor(inode
);
507 cpwd_pingtimer(p
, index
);
514 static ssize_t
cpwd_read(struct file
*file
, char __user
*buffer
,
515 size_t count
, loff_t
*ppos
)
520 static const struct file_operations cpwd_fops
= {
521 .owner
= THIS_MODULE
,
522 .unlocked_ioctl
= cpwd_ioctl
,
523 .compat_ioctl
= cpwd_compat_ioctl
,
527 .release
= cpwd_release
,
531 static int __devinit
cpwd_probe(struct platform_device
*op
,
532 const struct of_device_id
*match
)
534 struct device_node
*options
;
535 const char *str_prop
;
536 const void *prop_val
;
537 int i
, err
= -EINVAL
;
543 p
= kzalloc(sizeof(*p
), GFP_KERNEL
);
546 printk(KERN_ERR PFX
"Unable to allocate struct cpwd.\n");
550 p
->irq
= op
->archdata
.irqs
[0];
552 spin_lock_init(&p
->lock
);
554 p
->regs
= of_ioremap(&op
->resource
[0], 0,
555 4 * WD_TIMER_REGSZ
, DRIVER_NAME
);
557 printk(KERN_ERR PFX
"Unable to map registers.\n");
561 options
= of_find_node_by_path("/options");
564 printk(KERN_ERR PFX
"Unable to find /options node.\n");
568 prop_val
= of_get_property(options
, "watchdog-enable?", NULL
);
569 p
->enabled
= (prop_val
? true : false);
571 prop_val
= of_get_property(options
, "watchdog-reboot?", NULL
);
572 p
->reboot
= (prop_val
? true : false);
574 str_prop
= of_get_property(options
, "watchdog-timeout", NULL
);
576 p
->timeout
= simple_strtoul(str_prop
, NULL
, 10);
578 /* CP1400s seem to have broken PLD implementations-- the
579 * interrupt_mask register cannot be written, so no timer
580 * interrupts can be masked within the PLD.
582 str_prop
= of_get_property(op
->dev
.of_node
, "model", NULL
);
583 p
->broken
= (str_prop
&& !strcmp(str_prop
, WD_BADMODEL
));
586 cpwd_toggleintr(p
, -1, WD_INTR_OFF
);
588 for (i
= 0; i
< WD_NUMDEVS
; i
++) {
589 static const char *cpwd_names
[] = { "RIC", "XIR", "POR" };
590 static int *parms
[] = { &wd0_timeout
,
593 struct miscdevice
*mp
= &p
->devs
[i
].misc
;
595 mp
->minor
= WD0_MINOR
+ i
;
596 mp
->name
= cpwd_names
[i
];
597 mp
->fops
= &cpwd_fops
;
599 p
->devs
[i
].regs
= p
->regs
+ (i
* WD_TIMER_REGSZ
);
600 p
->devs
[i
].intr_mask
= (WD0_INTR_MASK
<< i
);
601 p
->devs
[i
].runstatus
&= ~WD_STAT_BSTOP
;
602 p
->devs
[i
].runstatus
|= WD_STAT_INIT
;
603 p
->devs
[i
].timeout
= p
->timeout
;
605 p
->devs
[i
].timeout
= *parms
[i
];
607 err
= misc_register(&p
->devs
[i
].misc
);
609 printk(KERN_ERR
"Could not register misc device for "
616 init_timer(&cpwd_timer
);
617 cpwd_timer
.function
= cpwd_brokentimer
;
618 cpwd_timer
.data
= (unsigned long) p
;
619 cpwd_timer
.expires
= WD_BTIMEOUT
;
621 printk(KERN_INFO PFX
"PLD defect workaround enabled for "
622 "model " WD_BADMODEL
".\n");
625 dev_set_drvdata(&op
->dev
, p
);
633 for (i
--; i
>= 0; i
--)
634 misc_deregister(&p
->devs
[i
].misc
);
637 of_iounmap(&op
->resource
[0], p
->regs
, 4 * WD_TIMER_REGSZ
);
644 static int __devexit
cpwd_remove(struct platform_device
*op
)
646 struct cpwd
*p
= dev_get_drvdata(&op
->dev
);
649 for (i
= 0; i
< 4; i
++) {
650 misc_deregister(&p
->devs
[i
].misc
);
653 cpwd_stoptimer(p
, i
);
654 if (p
->devs
[i
].runstatus
& WD_STAT_BSTOP
)
655 cpwd_resetbrokentimer(p
, i
);
660 del_timer_sync(&cpwd_timer
);
665 of_iounmap(&op
->resource
[0], p
->regs
, 4 * WD_TIMER_REGSZ
);
673 static const struct of_device_id cpwd_match
[] = {
679 MODULE_DEVICE_TABLE(of
, cpwd_match
);
681 static struct of_platform_driver cpwd_driver
= {
684 .owner
= THIS_MODULE
,
685 .of_match_table
= cpwd_match
,
688 .remove
= __devexit_p(cpwd_remove
),
691 static int __init
cpwd_init(void)
693 return of_register_platform_driver(&cpwd_driver
);
696 static void __exit
cpwd_exit(void)
698 of_unregister_platform_driver(&cpwd_driver
);
701 module_init(cpwd_init
);
702 module_exit(cpwd_exit
);