?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
xen: add kconfig menu
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / usb / asix.c
blob20e34608fa4a47ab7d8de9ddba4d9e408801fc9b
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37
38 #define DRIVER_VERSION "14-Jun-2006"
39 static const char driver_name [] = "asix";
40
41 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
42
43 #define AX_CMD_SET_SW_MII 0x06
44 #define AX_CMD_READ_MII_REG 0x07
45 #define AX_CMD_WRITE_MII_REG 0x08
46 #define AX_CMD_SET_HW_MII 0x0a
47 #define AX_CMD_READ_EEPROM 0x0b
48 #define AX_CMD_WRITE_EEPROM 0x0c
49 #define AX_CMD_WRITE_ENABLE 0x0d
50 #define AX_CMD_WRITE_DISABLE 0x0e
51 #define AX_CMD_READ_RX_CTL 0x0f
52 #define AX_CMD_WRITE_RX_CTL 0x10
53 #define AX_CMD_READ_IPG012 0x11
54 #define AX_CMD_WRITE_IPG0 0x12
55 #define AX_CMD_WRITE_IPG1 0x13
56 #define AX_CMD_READ_NODE_ID 0x13
57 #define AX_CMD_WRITE_IPG2 0x14
58 #define AX_CMD_WRITE_MULTI_FILTER 0x16
59 #define AX88172_CMD_READ_NODE_ID 0x17
60 #define AX_CMD_READ_PHY_ID 0x19
61 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
62 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
63 #define AX_CMD_READ_MONITOR_MODE 0x1c
64 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
65 #define AX_CMD_READ_GPIOS 0x1e
66 #define AX_CMD_WRITE_GPIOS 0x1f
67 #define AX_CMD_SW_RESET 0x20
68 #define AX_CMD_SW_PHY_STATUS 0x21
69 #define AX_CMD_SW_PHY_SELECT 0x22
70
71 #define AX_MONITOR_MODE 0x01
72 #define AX_MONITOR_LINK 0x02
73 #define AX_MONITOR_MAGIC 0x04
74 #define AX_MONITOR_HSFS 0x10
75
76 /* AX88172 Medium Status Register values */
77 #define AX88172_MEDIUM_FD 0x02
78 #define AX88172_MEDIUM_TX 0x04
79 #define AX88172_MEDIUM_FC 0x10
80 #define AX88172_MEDIUM_DEFAULT \
81 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
82
83 #define AX_MCAST_FILTER_SIZE 8
84 #define AX_MAX_MCAST 64
85
86 #define AX_SWRESET_CLEAR 0x00
87 #define AX_SWRESET_RR 0x01
88 #define AX_SWRESET_RT 0x02
89 #define AX_SWRESET_PRTE 0x04
90 #define AX_SWRESET_PRL 0x08
91 #define AX_SWRESET_BZ 0x10
92 #define AX_SWRESET_IPRL 0x20
93 #define AX_SWRESET_IPPD 0x40
94
95 #define AX88772_IPG0_DEFAULT 0x15
96 #define AX88772_IPG1_DEFAULT 0x0c
97 #define AX88772_IPG2_DEFAULT 0x12
98
99 /* AX88772 & AX88178 Medium Mode Register */
100 #define AX_MEDIUM_PF 0x0080
101 #define AX_MEDIUM_JFE 0x0040
102 #define AX_MEDIUM_TFC 0x0020
103 #define AX_MEDIUM_RFC 0x0010
104 #define AX_MEDIUM_ENCK 0x0008
105 #define AX_MEDIUM_AC 0x0004
106 #define AX_MEDIUM_FD 0x0002
107 #define AX_MEDIUM_GM 0x0001
108 #define AX_MEDIUM_SM 0x1000
109 #define AX_MEDIUM_SBP 0x0800
110 #define AX_MEDIUM_PS 0x0200
111 #define AX_MEDIUM_RE 0x0100
112
113 #define AX88178_MEDIUM_DEFAULT \
114 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
115 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
116 AX_MEDIUM_RE )
117
118 #define AX88772_MEDIUM_DEFAULT \
119 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
120 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
121 AX_MEDIUM_AC | AX_MEDIUM_RE )
122
123 /* AX88772 & AX88178 RX_CTL values */
124 #define AX_RX_CTL_SO 0x0080
125 #define AX_RX_CTL_AP 0x0020
126 #define AX_RX_CTL_AM 0x0010
127 #define AX_RX_CTL_AB 0x0008
128 #define AX_RX_CTL_SEP 0x0004
129 #define AX_RX_CTL_AMALL 0x0002
130 #define AX_RX_CTL_PRO 0x0001
131 #define AX_RX_CTL_MFB_2048 0x0000
132 #define AX_RX_CTL_MFB_4096 0x0100
133 #define AX_RX_CTL_MFB_8192 0x0200
134 #define AX_RX_CTL_MFB_16384 0x0300
135
136 #define AX_DEFAULT_RX_CTL \
137 (AX_RX_CTL_SO | AX_RX_CTL_AB )
138
139 /* GPIO 0 .. 2 toggles */
140 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
141 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
142 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
143 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
144 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
145 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
146 #define AX_GPIO_RESERVED 0x40 /* Reserved */
147 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
148
149 #define AX_EEPROM_MAGIC 0xdeadbeef
150 #define AX88172_EEPROM_LEN 0x40
151 #define AX88772_EEPROM_LEN 0xff
152
153 #define PHY_MODE_MARVELL 0x0000
154 #define MII_MARVELL_LED_CTRL 0x0018
155 #define MII_MARVELL_STATUS 0x001b
156 #define MII_MARVELL_CTRL 0x0014
157
158 #define MARVELL_LED_MANUAL 0x0019
159
160 #define MARVELL_STATUS_HWCFG 0x0004
161
162 #define MARVELL_CTRL_TXDELAY 0x0002
163 #define MARVELL_CTRL_RXDELAY 0x0080
164
165 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
166 struct asix_data {
167 u8 multi_filter[AX_MCAST_FILTER_SIZE];
168 u8 phymode;
169 u8 ledmode;
170 u8 eeprom_len;
171 };
172
173 struct ax88172_int_data {
174 __le16 res1;
175 u8 link;
176 __le16 res2;
177 u8 status;
178 __le16 res3;
179 } __attribute__ ((packed));
180
181 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
182 u16 size, void *data)
183 {
184 void *buf;
185 int err = -ENOMEM;
186
187 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
188 cmd, value, index, size);
189
190 buf = kmalloc(size, GFP_KERNEL);
191 if (!buf)
192 goto out;
193
194 err = usb_control_msg(
195 dev->udev,
196 usb_rcvctrlpipe(dev->udev, 0),
197 cmd,
198 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
199 value,
200 index,
201 buf,
202 size,
203 USB_CTRL_GET_TIMEOUT);
204 if (err == size)
205 memcpy(data, buf, size);
206 else if (err >= 0)
207 err = -EINVAL;
208 kfree(buf);
209
210 out:
211 return err;
212 }
213
214 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
215 u16 size, void *data)
216 {
217 void *buf = NULL;
218 int err = -ENOMEM;
219
220 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
221 cmd, value, index, size);
222
223 if (data) {
224 buf = kmalloc(size, GFP_KERNEL);
225 if (!buf)
226 goto out;
227 memcpy(buf, data, size);
228 }
229
230 err = usb_control_msg(
231 dev->udev,
232 usb_sndctrlpipe(dev->udev, 0),
233 cmd,
234 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
235 value,
236 index,
237 buf,
238 size,
239 USB_CTRL_SET_TIMEOUT);
240 kfree(buf);
241
242 out:
243 return err;
244 }
245
246 static void asix_async_cmd_callback(struct urb *urb)
247 {
248 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
249 int status = urb->status;
250
251 if (status < 0)
252 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
253 status);
254
255 kfree(req);
256 usb_free_urb(urb);
257 }
258
259 static void
260 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
261 u16 size, void *data)
262 {
263 struct usb_ctrlrequest *req;
264 int status;
265 struct urb *urb;
266
267 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
268 cmd, value, index, size);
269 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
270 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
271 return;
272 }
273
274 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
275 netdev_err(dev->net, "Failed to allocate memory for control request\n");
276 usb_free_urb(urb);
277 return;
278 }
279
280 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
281 req->bRequest = cmd;
282 req->wValue = cpu_to_le16(value);
283 req->wIndex = cpu_to_le16(index);
284 req->wLength = cpu_to_le16(size);
285
286 usb_fill_control_urb(urb, dev->udev,
287 usb_sndctrlpipe(dev->udev, 0),
288 (void *)req, data, size,
289 asix_async_cmd_callback, req);
290
291 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
292 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
293 status);
294 kfree(req);
295 usb_free_urb(urb);
296 }
297 }
298
299 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
300 {
301 u8 *head;
302 u32 header;
303 char *packet;
304 struct sk_buff *ax_skb;
305 u16 size;
306
307 head = (u8 *) skb->data;
308 memcpy(&header, head, sizeof(header));
309 le32_to_cpus(&header);
310 packet = head + sizeof(header);
311
312 skb_pull(skb, 4);
313
314 while (skb->len > 0) {
315 if ((short)(header & 0x0000ffff) !=
316 ~((short)((header & 0xffff0000) >> 16))) {
317 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
318 }
319 /* get the packet length */
320 size = (u16) (header & 0x0000ffff);
321
322 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
323 return 2;
324 if (size > ETH_FRAME_LEN) {
325 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
326 size);
327 return 0;
328 }
329 ax_skb = skb_clone(skb, GFP_ATOMIC);
330 if (ax_skb) {
331 ax_skb->len = size;
332 ax_skb->data = packet;
333 skb_set_tail_pointer(ax_skb, size);
334 usbnet_skb_return(dev, ax_skb);
335 } else {
336 return 0;
337 }
338
339 skb_pull(skb, (size + 1) & 0xfffe);
340
341 if (skb->len == 0)
342 break;
343
344 head = (u8 *) skb->data;
345 memcpy(&header, head, sizeof(header));
346 le32_to_cpus(&header);
347 packet = head + sizeof(header);
348 skb_pull(skb, 4);
349 }
350
351 if (skb->len < 0) {
352 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
353 skb->len);
354 return 0;
355 }
356 return 1;
357 }
358
359 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
360 gfp_t flags)
361 {
362 int padlen;
363 int headroom = skb_headroom(skb);
364 int tailroom = skb_tailroom(skb);
365 u32 packet_len;
366 u32 padbytes = 0xffff0000;
367
368 padlen = ((skb->len + 4) % 512) ? 0 : 4;
369
370 if ((!skb_cloned(skb)) &&
371 ((headroom + tailroom) >= (4 + padlen))) {
372 if ((headroom < 4) || (tailroom < padlen)) {
373 skb->data = memmove(skb->head + 4, skb->data, skb->len);
374 skb_set_tail_pointer(skb, skb->len);
375 }
376 } else {
377 struct sk_buff *skb2;
378 skb2 = skb_copy_expand(skb, 4, padlen, flags);
379 dev_kfree_skb_any(skb);
380 skb = skb2;
381 if (!skb)
382 return NULL;
383 }
384
385 skb_push(skb, 4);
386 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
387 cpu_to_le32s(&packet_len);
388 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
389
390 if ((skb->len % 512) == 0) {
391 cpu_to_le32s(&padbytes);
392 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
393 skb_put(skb, sizeof(padbytes));
394 }
395 return skb;
396 }
397
398 static void asix_status(struct usbnet *dev, struct urb *urb)
399 {
400 struct ax88172_int_data *event;
401 int link;
402
403 if (urb->actual_length < 8)
404 return;
405
406 event = urb->transfer_buffer;
407 link = event->link & 0x01;
408 if (netif_carrier_ok(dev->net) != link) {
409 if (link) {
410 netif_carrier_on(dev->net);
411 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
412 } else
413 netif_carrier_off(dev->net);
414 netdev_dbg(dev->net, "Link Status is: %d\n", link);
415 }
416 }
417
418 static inline int asix_set_sw_mii(struct usbnet *dev)
419 {
420 int ret;
421 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
422 if (ret < 0)
423 netdev_err(dev->net, "Failed to enable software MII access\n");
424 return ret;
425 }
426
427 static inline int asix_set_hw_mii(struct usbnet *dev)
428 {
429 int ret;
430 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
431 if (ret < 0)
432 netdev_err(dev->net, "Failed to enable hardware MII access\n");
433 return ret;
434 }
435
436 static inline int asix_get_phy_addr(struct usbnet *dev)
437 {
438 u8 buf[2];
439 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
440
441 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
442
443 if (ret < 0) {
444 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
445 goto out;
446 }
447 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
448 *((__le16 *)buf));
449 ret = buf[1];
450
451 out:
452 return ret;
453 }
454
455 static int asix_sw_reset(struct usbnet *dev, u8 flags)
456 {
457 int ret;
458
459 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
460 if (ret < 0)
461 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
462
463 return ret;
464 }
465
466 static u16 asix_read_rx_ctl(struct usbnet *dev)
467 {
468 __le16 v;
469 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
470
471 if (ret < 0) {
472 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
473 goto out;
474 }
475 ret = le16_to_cpu(v);
476 out:
477 return ret;
478 }
479
480 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
481 {
482 int ret;
483
484 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
485 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
486 if (ret < 0)
487 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
488 mode, ret);
489
490 return ret;
491 }
492
493 static u16 asix_read_medium_status(struct usbnet *dev)
494 {
495 __le16 v;
496 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
497
498 if (ret < 0) {
499 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
500 ret);
501 goto out;
502 }
503 ret = le16_to_cpu(v);
504 out:
505 return ret;
506 }
507
508 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
509 {
510 int ret;
511
512 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
513 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
514 if (ret < 0)
515 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
516 mode, ret);
517
518 return ret;
519 }
520
521 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
522 {
523 int ret;
524
525 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
526 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
527 if (ret < 0)
528 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
529 value, ret);
530
531 if (sleep)
532 msleep(sleep);
533
534 return ret;
535 }
536
537 /*
538 * AX88772 & AX88178 have a 16-bit RX_CTL value
539 */
540 static void asix_set_multicast(struct net_device *net)
541 {
542 struct usbnet *dev = netdev_priv(net);
543 struct asix_data *data = (struct asix_data *)&dev->data;
544 u16 rx_ctl = AX_DEFAULT_RX_CTL;
545
546 if (net->flags & IFF_PROMISC) {
547 rx_ctl |= AX_RX_CTL_PRO;
548 } else if (net->flags & IFF_ALLMULTI ||
549 netdev_mc_count(net) > AX_MAX_MCAST) {
550 rx_ctl |= AX_RX_CTL_AMALL;
551 } else if (netdev_mc_empty(net)) {
552 /* just broadcast and directed */
553 } else {
554 /* We use the 20 byte dev->data
555 * for our 8 byte filter buffer
556 * to avoid allocating memory that
557 * is tricky to free later */
558 struct dev_mc_list *mc_list;
559 u32 crc_bits;
560
561 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
562
563 /* Build the multicast hash filter. */
564 netdev_for_each_mc_addr(mc_list, net) {
565 crc_bits =
566 ether_crc(ETH_ALEN,
567 mc_list->dmi_addr) >> 26;
568 data->multi_filter[crc_bits >> 3] |=
569 1 << (crc_bits & 7);
570 }
571
572 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
573 AX_MCAST_FILTER_SIZE, data->multi_filter);
574
575 rx_ctl |= AX_RX_CTL_AM;
576 }
577
578 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
579 }
580
581 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
582 {
583 struct usbnet *dev = netdev_priv(netdev);
584 __le16 res;
585
586 mutex_lock(&dev->phy_mutex);
587 asix_set_sw_mii(dev);
588 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
589 (__u16)loc, 2, &res);
590 asix_set_hw_mii(dev);
591 mutex_unlock(&dev->phy_mutex);
592
593 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
594 phy_id, loc, le16_to_cpu(res));
595
596 return le16_to_cpu(res);
597 }
598
599 static void
600 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
601 {
602 struct usbnet *dev = netdev_priv(netdev);
603 __le16 res = cpu_to_le16(val);
604
605 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
606 phy_id, loc, val);
607 mutex_lock(&dev->phy_mutex);
608 asix_set_sw_mii(dev);
609 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
610 asix_set_hw_mii(dev);
611 mutex_unlock(&dev->phy_mutex);
612 }
613
614 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
615 static u32 asix_get_phyid(struct usbnet *dev)
616 {
617 int phy_reg;
618 u32 phy_id;
619
620 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
621 if (phy_reg < 0)
622 return 0;
623
624 phy_id = (phy_reg & 0xffff) << 16;
625
626 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
627 if (phy_reg < 0)
628 return 0;
629
630 phy_id |= (phy_reg & 0xffff);
631
632 return phy_id;
633 }
634
635 static void
636 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
637 {
638 struct usbnet *dev = netdev_priv(net);
639 u8 opt;
640
641 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
642 wolinfo->supported = 0;
643 wolinfo->wolopts = 0;
644 return;
645 }
646 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
647 wolinfo->wolopts = 0;
648 if (opt & AX_MONITOR_MODE) {
649 if (opt & AX_MONITOR_LINK)
650 wolinfo->wolopts |= WAKE_PHY;
651 if (opt & AX_MONITOR_MAGIC)
652 wolinfo->wolopts |= WAKE_MAGIC;
653 }
654 }
655
656 static int
657 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
658 {
659 struct usbnet *dev = netdev_priv(net);
660 u8 opt = 0;
661
662 if (wolinfo->wolopts & WAKE_PHY)
663 opt |= AX_MONITOR_LINK;
664 if (wolinfo->wolopts & WAKE_MAGIC)
665 opt |= AX_MONITOR_MAGIC;
666 if (opt != 0)
667 opt |= AX_MONITOR_MODE;
668
669 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
670 opt, 0, 0, NULL) < 0)
671 return -EINVAL;
672
673 return 0;
674 }
675
676 static int asix_get_eeprom_len(struct net_device *net)
677 {
678 struct usbnet *dev = netdev_priv(net);
679 struct asix_data *data = (struct asix_data *)&dev->data;
680
681 return data->eeprom_len;
682 }
683
684 static int asix_get_eeprom(struct net_device *net,
685 struct ethtool_eeprom *eeprom, u8 *data)
686 {
687 struct usbnet *dev = netdev_priv(net);
688 __le16 *ebuf = (__le16 *)data;
689 int i;
690
691 /* Crude hack to ensure that we don't overwrite memory
692 * if an odd length is supplied
693 */
694 if (eeprom->len % 2)
695 return -EINVAL;
696
697 eeprom->magic = AX_EEPROM_MAGIC;
698
699 /* ax8817x returns 2 bytes from eeprom on read */
700 for (i=0; i < eeprom->len / 2; i++) {
701 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
702 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
703 return -EINVAL;
704 }
705 return 0;
706 }
707
708 static void asix_get_drvinfo (struct net_device *net,
709 struct ethtool_drvinfo *info)
710 {
711 struct usbnet *dev = netdev_priv(net);
712 struct asix_data *data = (struct asix_data *)&dev->data;
713
714 /* Inherit standard device info */
715 usbnet_get_drvinfo(net, info);
716 strncpy (info->driver, driver_name, sizeof info->driver);
717 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
718 info->eedump_len = data->eeprom_len;
719 }
720
721 static u32 asix_get_link(struct net_device *net)
722 {
723 struct usbnet *dev = netdev_priv(net);
724
725 return mii_link_ok(&dev->mii);
726 }
727
728 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
729 {
730 struct usbnet *dev = netdev_priv(net);
731
732 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
733 }
734
735 /* We need to override some ethtool_ops so we require our
736 own structure so we don't interfere with other usbnet
737 devices that may be connected at the same time. */
738 static const struct ethtool_ops ax88172_ethtool_ops = {
739 .get_drvinfo = asix_get_drvinfo,
740 .get_link = asix_get_link,
741 .get_msglevel = usbnet_get_msglevel,
742 .set_msglevel = usbnet_set_msglevel,
743 .get_wol = asix_get_wol,
744 .set_wol = asix_set_wol,
745 .get_eeprom_len = asix_get_eeprom_len,
746 .get_eeprom = asix_get_eeprom,
747 .get_settings = usbnet_get_settings,
748 .set_settings = usbnet_set_settings,
749 .nway_reset = usbnet_nway_reset,
750 };
751
752 static void ax88172_set_multicast(struct net_device *net)
753 {
754 struct usbnet *dev = netdev_priv(net);
755 struct asix_data *data = (struct asix_data *)&dev->data;
756 u8 rx_ctl = 0x8c;
757
758 if (net->flags & IFF_PROMISC) {
759 rx_ctl |= 0x01;
760 } else if (net->flags & IFF_ALLMULTI ||
761 netdev_mc_count(net) > AX_MAX_MCAST) {
762 rx_ctl |= 0x02;
763 } else if (netdev_mc_empty(net)) {
764 /* just broadcast and directed */
765 } else {
766 /* We use the 20 byte dev->data
767 * for our 8 byte filter buffer
768 * to avoid allocating memory that
769 * is tricky to free later */
770 struct dev_mc_list *mc_list;
771 u32 crc_bits;
772
773 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
774
775 /* Build the multicast hash filter. */
776 netdev_for_each_mc_addr(mc_list, net) {
777 crc_bits =
778 ether_crc(ETH_ALEN,
779 mc_list->dmi_addr) >> 26;
780 data->multi_filter[crc_bits >> 3] |=
781 1 << (crc_bits & 7);
782 }
783
784 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
785 AX_MCAST_FILTER_SIZE, data->multi_filter);
786
787 rx_ctl |= 0x10;
788 }
789
790 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
791 }
792
793 static int ax88172_link_reset(struct usbnet *dev)
794 {
795 u8 mode;
796 struct ethtool_cmd ecmd;
797
798 mii_check_media(&dev->mii, 1, 1);
799 mii_ethtool_gset(&dev->mii, &ecmd);
800 mode = AX88172_MEDIUM_DEFAULT;
801
802 if (ecmd.duplex != DUPLEX_FULL)
803 mode |= ~AX88172_MEDIUM_FD;
804
805 netdev_dbg(dev->net, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
806 ecmd.speed, ecmd.duplex, mode);
807
808 asix_write_medium_mode(dev, mode);
809
810 return 0;
811 }
812
813 static const struct net_device_ops ax88172_netdev_ops = {
814 .ndo_open = usbnet_open,
815 .ndo_stop = usbnet_stop,
816 .ndo_start_xmit = usbnet_start_xmit,
817 .ndo_tx_timeout = usbnet_tx_timeout,
818 .ndo_change_mtu = usbnet_change_mtu,
819 .ndo_set_mac_address = eth_mac_addr,
820 .ndo_validate_addr = eth_validate_addr,
821 .ndo_do_ioctl = asix_ioctl,
822 .ndo_set_multicast_list = ax88172_set_multicast,
823 };
824
825 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
826 {
827 int ret = 0;
828 u8 buf[ETH_ALEN];
829 int i;
830 unsigned long gpio_bits = dev->driver_info->data;
831 struct asix_data *data = (struct asix_data *)&dev->data;
832
833 data->eeprom_len = AX88172_EEPROM_LEN;
834
835 usbnet_get_endpoints(dev,intf);
836
837 /* Toggle the GPIOs in a manufacturer/model specific way */
838 for (i = 2; i >= 0; i--) {
839 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
840 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
841 NULL)) < 0)
842 goto out;
843 msleep(5);
844 }
845
846 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
847 goto out;
848
849 /* Get the MAC address */
850 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
851 0, 0, ETH_ALEN, buf)) < 0) {
852 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
853 goto out;
854 }
855 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
856
857 /* Initialize MII structure */
858 dev->mii.dev = dev->net;
859 dev->mii.mdio_read = asix_mdio_read;
860 dev->mii.mdio_write = asix_mdio_write;
861 dev->mii.phy_id_mask = 0x3f;
862 dev->mii.reg_num_mask = 0x1f;
863 dev->mii.phy_id = asix_get_phy_addr(dev);
864
865 dev->net->netdev_ops = &ax88172_netdev_ops;
866 dev->net->ethtool_ops = &ax88172_ethtool_ops;
867
868 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
869 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
870 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
871 mii_nway_restart(&dev->mii);
872
873 return 0;
874
875 out:
876 return ret;
877 }
878
879 static const struct ethtool_ops ax88772_ethtool_ops = {
880 .get_drvinfo = asix_get_drvinfo,
881 .get_link = asix_get_link,
882 .get_msglevel = usbnet_get_msglevel,
883 .set_msglevel = usbnet_set_msglevel,
884 .get_wol = asix_get_wol,
885 .set_wol = asix_set_wol,
886 .get_eeprom_len = asix_get_eeprom_len,
887 .get_eeprom = asix_get_eeprom,
888 .get_settings = usbnet_get_settings,
889 .set_settings = usbnet_set_settings,
890 .nway_reset = usbnet_nway_reset,
891 };
892
893 static int ax88772_link_reset(struct usbnet *dev)
894 {
895 u16 mode;
896 struct ethtool_cmd ecmd;
897
898 mii_check_media(&dev->mii, 1, 1);
899 mii_ethtool_gset(&dev->mii, &ecmd);
900 mode = AX88772_MEDIUM_DEFAULT;
901
902 if (ecmd.speed != SPEED_100)
903 mode &= ~AX_MEDIUM_PS;
904
905 if (ecmd.duplex != DUPLEX_FULL)
906 mode &= ~AX_MEDIUM_FD;
907
908 netdev_dbg(dev->net, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
909 ecmd.speed, ecmd.duplex, mode);
910
911 asix_write_medium_mode(dev, mode);
912
913 return 0;
914 }
915
916 static const struct net_device_ops ax88772_netdev_ops = {
917 .ndo_open = usbnet_open,
918 .ndo_stop = usbnet_stop,
919 .ndo_start_xmit = usbnet_start_xmit,
920 .ndo_tx_timeout = usbnet_tx_timeout,
921 .ndo_change_mtu = usbnet_change_mtu,
922 .ndo_set_mac_address = eth_mac_addr,
923 .ndo_validate_addr = eth_validate_addr,
924 .ndo_do_ioctl = asix_ioctl,
925 .ndo_set_multicast_list = asix_set_multicast,
926 };
927
928 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
929 {
930 int ret, embd_phy;
931 u16 rx_ctl;
932 struct asix_data *data = (struct asix_data *)&dev->data;
933 u8 buf[ETH_ALEN];
934 u32 phyid;
935
936 data->eeprom_len = AX88772_EEPROM_LEN;
937
938 usbnet_get_endpoints(dev,intf);
939
940 if ((ret = asix_write_gpio(dev,
941 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
942 goto out;
943
944 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
945 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
946 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
947 embd_phy, 0, 0, NULL)) < 0) {
948 dbg("Select PHY #1 failed: %d", ret);
949 goto out;
950 }
951
952 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
953 goto out;
954
955 msleep(150);
956 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
957 goto out;
958
959 msleep(150);
960 if (embd_phy) {
961 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
962 goto out;
963 }
964 else {
965 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
966 goto out;
967 }
968
969 msleep(150);
970 rx_ctl = asix_read_rx_ctl(dev);
971 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
972 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
973 goto out;
974
975 rx_ctl = asix_read_rx_ctl(dev);
976 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
977
978 /* Get the MAC address */
979 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
980 0, 0, ETH_ALEN, buf)) < 0) {
981 dbg("Failed to read MAC address: %d", ret);
982 goto out;
983 }
984 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
985
986 /* Initialize MII structure */
987 dev->mii.dev = dev->net;
988 dev->mii.mdio_read = asix_mdio_read;
989 dev->mii.mdio_write = asix_mdio_write;
990 dev->mii.phy_id_mask = 0x1f;
991 dev->mii.reg_num_mask = 0x1f;
992 dev->mii.phy_id = asix_get_phy_addr(dev);
993
994 phyid = asix_get_phyid(dev);
995 dbg("PHYID=0x%08x", phyid);
996
997 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
998 goto out;
999
1000 msleep(150);
1001
1002 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1003 goto out;
1004
1005 msleep(150);
1006
1007 dev->net->netdev_ops = &ax88772_netdev_ops;
1008 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1009
1010 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1011 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1012 ADVERTISE_ALL | ADVERTISE_CSMA);
1013 mii_nway_restart(&dev->mii);
1014
1015 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1016 goto out;
1017
1018 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1019 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1020 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1021 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1022 goto out;
1023 }
1024
1025 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1026 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1027 goto out;
1028
1029 rx_ctl = asix_read_rx_ctl(dev);
1030 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1031
1032 rx_ctl = asix_read_medium_status(dev);
1033 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1034
1035 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1036 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1037 /* hard_mtu is still the default - the device does not support
1038 jumbo eth frames */
1039 dev->rx_urb_size = 2048;
1040 }
1041 return 0;
1042
1043 out:
1044 return ret;
1045 }
1046
1047 static struct ethtool_ops ax88178_ethtool_ops = {
1048 .get_drvinfo = asix_get_drvinfo,
1049 .get_link = asix_get_link,
1050 .get_msglevel = usbnet_get_msglevel,
1051 .set_msglevel = usbnet_set_msglevel,
1052 .get_wol = asix_get_wol,
1053 .set_wol = asix_set_wol,
1054 .get_eeprom_len = asix_get_eeprom_len,
1055 .get_eeprom = asix_get_eeprom,
1056 .get_settings = usbnet_get_settings,
1057 .set_settings = usbnet_set_settings,
1058 .nway_reset = usbnet_nway_reset,
1059 };
1060
1061 static int marvell_phy_init(struct usbnet *dev)
1062 {
1063 struct asix_data *data = (struct asix_data *)&dev->data;
1064 u16 reg;
1065
1066 netdev_dbg(dev->net, "marvell_phy_init()\n");
1067
1068 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1069 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1070
1071 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1072 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1073
1074 if (data->ledmode) {
1075 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1076 MII_MARVELL_LED_CTRL);
1077 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1078
1079 reg &= 0xf8ff;
1080 reg |= (1 + 0x0100);
1081 asix_mdio_write(dev->net, dev->mii.phy_id,
1082 MII_MARVELL_LED_CTRL, reg);
1083
1084 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1085 MII_MARVELL_LED_CTRL);
1086 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1087 reg &= 0xfc0f;
1088 }
1089
1090 return 0;
1091 }
1092
1093 static int marvell_led_status(struct usbnet *dev, u16 speed)
1094 {
1095 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1096
1097 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1098
1099 /* Clear out the center LED bits - 0x03F0 */
1100 reg &= 0xfc0f;
1101
1102 switch (speed) {
1103 case SPEED_1000:
1104 reg |= 0x03e0;
1105 break;
1106 case SPEED_100:
1107 reg |= 0x03b0;
1108 break;
1109 default:
1110 reg |= 0x02f0;
1111 }
1112
1113 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1114 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1115
1116 return 0;
1117 }
1118
1119 static int ax88178_link_reset(struct usbnet *dev)
1120 {
1121 u16 mode;
1122 struct ethtool_cmd ecmd;
1123 struct asix_data *data = (struct asix_data *)&dev->data;
1124
1125 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1126
1127 mii_check_media(&dev->mii, 1, 1);
1128 mii_ethtool_gset(&dev->mii, &ecmd);
1129 mode = AX88178_MEDIUM_DEFAULT;
1130
1131 if (ecmd.speed == SPEED_1000)
1132 mode |= AX_MEDIUM_GM;
1133 else if (ecmd.speed == SPEED_100)
1134 mode |= AX_MEDIUM_PS;
1135 else
1136 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1137
1138 mode |= AX_MEDIUM_ENCK;
1139
1140 if (ecmd.duplex == DUPLEX_FULL)
1141 mode |= AX_MEDIUM_FD;
1142 else
1143 mode &= ~AX_MEDIUM_FD;
1144
1145 netdev_dbg(dev->net, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
1146 ecmd.speed, ecmd.duplex, mode);
1147
1148 asix_write_medium_mode(dev, mode);
1149
1150 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1151 marvell_led_status(dev, ecmd.speed);
1152
1153 return 0;
1154 }
1155
1156 static void ax88178_set_mfb(struct usbnet *dev)
1157 {
1158 u16 mfb = AX_RX_CTL_MFB_16384;
1159 u16 rxctl;
1160 u16 medium;
1161 int old_rx_urb_size = dev->rx_urb_size;
1162
1163 if (dev->hard_mtu < 2048) {
1164 dev->rx_urb_size = 2048;
1165 mfb = AX_RX_CTL_MFB_2048;
1166 } else if (dev->hard_mtu < 4096) {
1167 dev->rx_urb_size = 4096;
1168 mfb = AX_RX_CTL_MFB_4096;
1169 } else if (dev->hard_mtu < 8192) {
1170 dev->rx_urb_size = 8192;
1171 mfb = AX_RX_CTL_MFB_8192;
1172 } else if (dev->hard_mtu < 16384) {
1173 dev->rx_urb_size = 16384;
1174 mfb = AX_RX_CTL_MFB_16384;
1175 }
1176
1177 rxctl = asix_read_rx_ctl(dev);
1178 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1179
1180 medium = asix_read_medium_status(dev);
1181 if (dev->net->mtu > 1500)
1182 medium |= AX_MEDIUM_JFE;
1183 else
1184 medium &= ~AX_MEDIUM_JFE;
1185 asix_write_medium_mode(dev, medium);
1186
1187 if (dev->rx_urb_size > old_rx_urb_size)
1188 usbnet_unlink_rx_urbs(dev);
1189 }
1190
1191 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1192 {
1193 struct usbnet *dev = netdev_priv(net);
1194 int ll_mtu = new_mtu + net->hard_header_len + 4;
1195
1196 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1197
1198 if (new_mtu <= 0 || ll_mtu > 16384)
1199 return -EINVAL;
1200
1201 if ((ll_mtu % dev->maxpacket) == 0)
1202 return -EDOM;
1203
1204 net->mtu = new_mtu;
1205 dev->hard_mtu = net->mtu + net->hard_header_len;
1206 ax88178_set_mfb(dev);
1207
1208 return 0;
1209 }
1210
1211 static const struct net_device_ops ax88178_netdev_ops = {
1212 .ndo_open = usbnet_open,
1213 .ndo_stop = usbnet_stop,
1214 .ndo_start_xmit = usbnet_start_xmit,
1215 .ndo_tx_timeout = usbnet_tx_timeout,
1216 .ndo_set_mac_address = eth_mac_addr,
1217 .ndo_validate_addr = eth_validate_addr,
1218 .ndo_set_multicast_list = asix_set_multicast,
1219 .ndo_do_ioctl = asix_ioctl,
1220 .ndo_change_mtu = ax88178_change_mtu,
1221 };
1222
1223 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1224 {
1225 struct asix_data *data = (struct asix_data *)&dev->data;
1226 int ret;
1227 u8 buf[ETH_ALEN];
1228 __le16 eeprom;
1229 u8 status;
1230 int gpio0 = 0;
1231 u32 phyid;
1232
1233 usbnet_get_endpoints(dev,intf);
1234
1235 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1236 dbg("GPIO Status: 0x%04x", status);
1237
1238 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1239 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1240 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1241
1242 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1243
1244 if (eeprom == cpu_to_le16(0xffff)) {
1245 data->phymode = PHY_MODE_MARVELL;
1246 data->ledmode = 0;
1247 gpio0 = 1;
1248 } else {
1249 data->phymode = le16_to_cpu(eeprom) & 7;
1250 data->ledmode = le16_to_cpu(eeprom) >> 8;
1251 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1252 }
1253 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1254
1255 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1256 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1257 asix_write_gpio(dev, 0x003c, 30);
1258 asix_write_gpio(dev, 0x001c, 300);
1259 asix_write_gpio(dev, 0x003c, 30);
1260 } else {
1261 dbg("gpio phymode == 1 path");
1262 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1263 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1264 }
1265
1266 asix_sw_reset(dev, 0);
1267 msleep(150);
1268
1269 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1270 msleep(150);
1271
1272 asix_write_rx_ctl(dev, 0);
1273
1274 /* Get the MAC address */
1275 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1276 0, 0, ETH_ALEN, buf)) < 0) {
1277 dbg("Failed to read MAC address: %d", ret);
1278 goto out;
1279 }
1280 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1281
1282 /* Initialize MII structure */
1283 dev->mii.dev = dev->net;
1284 dev->mii.mdio_read = asix_mdio_read;
1285 dev->mii.mdio_write = asix_mdio_write;
1286 dev->mii.phy_id_mask = 0x1f;
1287 dev->mii.reg_num_mask = 0xff;
1288 dev->mii.supports_gmii = 1;
1289 dev->mii.phy_id = asix_get_phy_addr(dev);
1290
1291 dev->net->netdev_ops = &ax88178_netdev_ops;
1292 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1293
1294 phyid = asix_get_phyid(dev);
1295 dbg("PHYID=0x%08x", phyid);
1296
1297 if (data->phymode == PHY_MODE_MARVELL) {
1298 marvell_phy_init(dev);
1299 msleep(60);
1300 }
1301
1302 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1303 BMCR_RESET | BMCR_ANENABLE);
1304 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1305 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1306 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1307 ADVERTISE_1000FULL);
1308
1309 mii_nway_restart(&dev->mii);
1310
1311 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1312 goto out;
1313
1314 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1315 goto out;
1316
1317 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1318 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1319 /* hard_mtu is still the default - the device does not support
1320 jumbo eth frames */
1321 dev->rx_urb_size = 2048;
1322 }
1323 return 0;
1324
1325 out:
1326 return ret;
1327 }
1328
1329 static const struct driver_info ax8817x_info = {
1330 .description = "ASIX AX8817x USB 2.0 Ethernet",
1331 .bind = ax88172_bind,
1332 .status = asix_status,
1333 .link_reset = ax88172_link_reset,
1334 .reset = ax88172_link_reset,
1335 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1336 .data = 0x00130103,
1337 };
1338
1339 static const struct driver_info dlink_dub_e100_info = {
1340 .description = "DLink DUB-E100 USB Ethernet",
1341 .bind = ax88172_bind,
1342 .status = asix_status,
1343 .link_reset = ax88172_link_reset,
1344 .reset = ax88172_link_reset,
1345 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1346 .data = 0x009f9d9f,
1347 };
1348
1349 static const struct driver_info netgear_fa120_info = {
1350 .description = "Netgear FA-120 USB Ethernet",
1351 .bind = ax88172_bind,
1352 .status = asix_status,
1353 .link_reset = ax88172_link_reset,
1354 .reset = ax88172_link_reset,
1355 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1356 .data = 0x00130103,
1357 };
1358
1359 static const struct driver_info hawking_uf200_info = {
1360 .description = "Hawking UF200 USB Ethernet",
1361 .bind = ax88172_bind,
1362 .status = asix_status,
1363 .link_reset = ax88172_link_reset,
1364 .reset = ax88172_link_reset,
1365 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1366 .data = 0x001f1d1f,
1367 };
1368
1369 static const struct driver_info ax88772_info = {
1370 .description = "ASIX AX88772 USB 2.0 Ethernet",
1371 .bind = ax88772_bind,
1372 .status = asix_status,
1373 .link_reset = ax88772_link_reset,
1374 .reset = ax88772_link_reset,
1375 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1376 .rx_fixup = asix_rx_fixup,
1377 .tx_fixup = asix_tx_fixup,
1378 };
1379
1380 static const struct driver_info ax88178_info = {
1381 .description = "ASIX AX88178 USB 2.0 Ethernet",
1382 .bind = ax88178_bind,
1383 .status = asix_status,
1384 .link_reset = ax88178_link_reset,
1385 .reset = ax88178_link_reset,
1386 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1387 .rx_fixup = asix_rx_fixup,
1388 .tx_fixup = asix_tx_fixup,
1389 };
1390
1391 static const struct usb_device_id products [] = {
1392 {
1393 // Linksys USB200M
1394 USB_DEVICE (0x077b, 0x2226),
1395 .driver_info = (unsigned long) &ax8817x_info,
1396 }, {
1397 // Netgear FA120
1398 USB_DEVICE (0x0846, 0x1040),
1399 .driver_info = (unsigned long) &netgear_fa120_info,
1400 }, {
1401 // DLink DUB-E100
1402 USB_DEVICE (0x2001, 0x1a00),
1403 .driver_info = (unsigned long) &dlink_dub_e100_info,
1404 }, {
1405 // Intellinet, ST Lab USB Ethernet
1406 USB_DEVICE (0x0b95, 0x1720),
1407 .driver_info = (unsigned long) &ax8817x_info,
1408 }, {
1409 // Hawking UF200, TrendNet TU2-ET100
1410 USB_DEVICE (0x07b8, 0x420a),
1411 .driver_info = (unsigned long) &hawking_uf200_info,
1412 }, {
1413 // Billionton Systems, USB2AR
1414 USB_DEVICE (0x08dd, 0x90ff),
1415 .driver_info = (unsigned long) &ax8817x_info,
1416 }, {
1417 // ATEN UC210T
1418 USB_DEVICE (0x0557, 0x2009),
1419 .driver_info = (unsigned long) &ax8817x_info,
1420 }, {
1421 // Buffalo LUA-U2-KTX
1422 USB_DEVICE (0x0411, 0x003d),
1423 .driver_info = (unsigned long) &ax8817x_info,
1424 }, {
1425 // Buffalo LUA-U2-GT 10/100/1000
1426 USB_DEVICE (0x0411, 0x006e),
1427 .driver_info = (unsigned long) &ax88178_info,
1428 }, {
1429 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1430 USB_DEVICE (0x6189, 0x182d),
1431 .driver_info = (unsigned long) &ax8817x_info,
1432 }, {
1433 // corega FEther USB2-TX
1434 USB_DEVICE (0x07aa, 0x0017),
1435 .driver_info = (unsigned long) &ax8817x_info,
1436 }, {
1437 // Surecom EP-1427X-2
1438 USB_DEVICE (0x1189, 0x0893),
1439 .driver_info = (unsigned long) &ax8817x_info,
1440 }, {
1441 // goodway corp usb gwusb2e
1442 USB_DEVICE (0x1631, 0x6200),
1443 .driver_info = (unsigned long) &ax8817x_info,
1444 }, {
1445 // JVC MP-PRX1 Port Replicator
1446 USB_DEVICE (0x04f1, 0x3008),
1447 .driver_info = (unsigned long) &ax8817x_info,
1448 }, {
1449 // ASIX AX88772 10/100
1450 USB_DEVICE (0x0b95, 0x7720),
1451 .driver_info = (unsigned long) &ax88772_info,
1452 }, {
1453 // ASIX AX88178 10/100/1000
1454 USB_DEVICE (0x0b95, 0x1780),
1455 .driver_info = (unsigned long) &ax88178_info,
1456 }, {
1457 // Linksys USB200M Rev 2
1458 USB_DEVICE (0x13b1, 0x0018),
1459 .driver_info = (unsigned long) &ax88772_info,
1460 }, {
1461 // 0Q0 cable ethernet
1462 USB_DEVICE (0x1557, 0x7720),
1463 .driver_info = (unsigned long) &ax88772_info,
1464 }, {
1465 // DLink DUB-E100 H/W Ver B1
1466 USB_DEVICE (0x07d1, 0x3c05),
1467 .driver_info = (unsigned long) &ax88772_info,
1468 }, {
1469 // DLink DUB-E100 H/W Ver B1 Alternate
1470 USB_DEVICE (0x2001, 0x3c05),
1471 .driver_info = (unsigned long) &ax88772_info,
1472 }, {
1473 // Linksys USB1000
1474 USB_DEVICE (0x1737, 0x0039),
1475 .driver_info = (unsigned long) &ax88178_info,
1476 }, {
1477 // IO-DATA ETG-US2
1478 USB_DEVICE (0x04bb, 0x0930),
1479 .driver_info = (unsigned long) &ax88178_info,
1480 }, {
1481 // Belkin F5D5055
1482 USB_DEVICE(0x050d, 0x5055),
1483 .driver_info = (unsigned long) &ax88178_info,
1484 }, {
1485 // Apple USB Ethernet Adapter
1486 USB_DEVICE(0x05ac, 0x1402),
1487 .driver_info = (unsigned long) &ax88772_info,
1488 }, {
1489 // Cables-to-Go USB Ethernet Adapter
1490 USB_DEVICE(0x0b95, 0x772a),
1491 .driver_info = (unsigned long) &ax88772_info,
1492 }, {
1493 // ABOCOM for pci
1494 USB_DEVICE(0x14ea, 0xab11),
1495 .driver_info = (unsigned long) &ax88178_info,
1496 }, {
1497 // ASIX 88772a
1498 USB_DEVICE(0x0db0, 0xa877),
1499 .driver_info = (unsigned long) &ax88772_info,
1500 },
1501 { }, // END
1502 };
1503 MODULE_DEVICE_TABLE(usb, products);
1504
1505 static struct usb_driver asix_driver = {
1506 .name = "asix",
1507 .id_table = products,
1508 .probe = usbnet_probe,
1509 .suspend = usbnet_suspend,
1510 .resume = usbnet_resume,
1511 .disconnect = usbnet_disconnect,
1512 .supports_autosuspend = 1,
1513 };
1514
1515 static int __init asix_init(void)
1516 {
1517 return usb_register(&asix_driver);
1518 }
1519 module_init(asix_init);
1520
1521 static void __exit asix_exit(void)
1522 {
1523 usb_deregister(&asix_driver);
1524 }
1525 module_exit(asix_exit);
1526
1527 MODULE_AUTHOR("David Hollis");
1528 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1529 MODULE_LICENSE("GPL");
1530
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree