2 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
8 #include <linux/kernel.h>
9 #include <linux/gpio.h>
10 #include <linux/amba/bus.h>
11 #include <linux/amba/mmci.h>
12 #include <linux/mmc/host.h>
13 #include <linux/platform_device.h>
15 #include <asm/mach-types.h>
16 #include <plat/ste_dma40.h>
17 #include <mach/devices.h>
18 #include <mach/hardware.h>
20 #include "devices-db8500.h"
21 #include "board-mop500.h"
22 #include "ste-dma40-db8500.h"
25 * SDI 0 (MicroSD slot)
29 #define MCI_DATA2DIREN (1 << 2)
30 #define MCI_CMDDIREN (1 << 3)
31 #define MCI_DATA0DIREN (1 << 4)
32 #define MCI_DATA31DIREN (1 << 5)
33 #define MCI_FBCLKEN (1 << 7)
35 static u32
mop500_sdi0_vdd_handler(struct device
*dev
, unsigned int vdd
,
36 unsigned char power_mode
)
38 if (power_mode
== MMC_POWER_UP
)
39 gpio_set_value_cansleep(GPIO_SDMMC_EN
, 1);
40 else if (power_mode
== MMC_POWER_OFF
)
41 gpio_set_value_cansleep(GPIO_SDMMC_EN
, 0);
43 return MCI_FBCLKEN
| MCI_CMDDIREN
| MCI_DATA0DIREN
|
44 MCI_DATA2DIREN
| MCI_DATA31DIREN
;
47 #ifdef CONFIG_STE_DMA40
48 struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx
= {
49 .mode
= STEDMA40_MODE_LOGICAL
,
50 .dir
= STEDMA40_PERIPH_TO_MEM
,
51 .src_dev_type
= DB8500_DMA_DEV29_SD_MM0_RX
,
52 .dst_dev_type
= STEDMA40_DEV_DST_MEMORY
,
53 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
54 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
57 static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx
= {
58 .mode
= STEDMA40_MODE_LOGICAL
,
59 .dir
= STEDMA40_MEM_TO_PERIPH
,
60 .src_dev_type
= STEDMA40_DEV_SRC_MEMORY
,
61 .dst_dev_type
= DB8500_DMA_DEV29_SD_MM0_TX
,
62 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
63 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
67 static struct mmci_platform_data mop500_sdi0_data
= {
68 .vdd_handler
= mop500_sdi0_vdd_handler
,
69 .ocr_mask
= MMC_VDD_29_30
,
71 .capabilities
= MMC_CAP_4_BIT_DATA
,
73 #ifdef CONFIG_STE_DMA40
74 .dma_filter
= stedma40_filter
,
75 .dma_rx_param
= &mop500_sdi0_dma_cfg_rx
,
76 .dma_tx_param
= &mop500_sdi0_dma_cfg_tx
,
80 /* GPIO pins used by the sdi0 level shifter */
81 static int sdi0_en
= -1;
82 static int sdi0_vsel
= -1;
84 static void sdi0_configure(void)
88 ret
= gpio_request(sdi0_en
, "level shifter enable");
90 ret
= gpio_request(sdi0_vsel
,
91 "level shifter 1v8-3v select");
94 pr_warning("unable to config sdi0 gpios for level shifter.\n");
98 /* Select the default 2.9V and enable level shifter */
99 gpio_direction_output(sdi0_vsel
, 0);
100 gpio_direction_output(sdi0_en
, 1);
103 db8500_add_sdi0(&mop500_sdi0_data
);
106 void mop500_sdi_tc35892_init(void)
108 mop500_sdi0_data
.gpio_cd
= GPIO_SDMMC_CD
;
109 sdi0_en
= GPIO_SDMMC_EN
;
110 sdi0_vsel
= GPIO_SDMMC_1V8_3V_SEL
;
115 * SDI 2 (POP eMMC, not on DB8500ed)
118 #ifdef CONFIG_STE_DMA40
119 struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx
= {
120 .mode
= STEDMA40_MODE_LOGICAL
,
121 .dir
= STEDMA40_PERIPH_TO_MEM
,
122 .src_dev_type
= DB8500_DMA_DEV28_SD_MM2_RX
,
123 .dst_dev_type
= STEDMA40_DEV_DST_MEMORY
,
124 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
125 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
128 static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx
= {
129 .mode
= STEDMA40_MODE_LOGICAL
,
130 .dir
= STEDMA40_MEM_TO_PERIPH
,
131 .src_dev_type
= STEDMA40_DEV_SRC_MEMORY
,
132 .dst_dev_type
= DB8500_DMA_DEV28_SD_MM2_TX
,
133 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
134 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
138 static struct mmci_platform_data mop500_sdi2_data
= {
139 .ocr_mask
= MMC_VDD_165_195
,
141 .capabilities
= MMC_CAP_4_BIT_DATA
| MMC_CAP_8_BIT_DATA
,
144 #ifdef CONFIG_STE_DMA40
145 .dma_filter
= stedma40_filter
,
146 .dma_rx_param
= &mop500_sdi2_dma_cfg_rx
,
147 .dma_tx_param
= &mop500_sdi2_dma_cfg_tx
,
152 * SDI 4 (on-board eMMC)
155 #ifdef CONFIG_STE_DMA40
156 struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx
= {
157 .mode
= STEDMA40_MODE_LOGICAL
,
158 .dir
= STEDMA40_PERIPH_TO_MEM
,
159 .src_dev_type
= DB8500_DMA_DEV42_SD_MM4_RX
,
160 .dst_dev_type
= STEDMA40_DEV_DST_MEMORY
,
161 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
162 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
165 static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx
= {
166 .mode
= STEDMA40_MODE_LOGICAL
,
167 .dir
= STEDMA40_MEM_TO_PERIPH
,
168 .src_dev_type
= STEDMA40_DEV_SRC_MEMORY
,
169 .dst_dev_type
= DB8500_DMA_DEV42_SD_MM4_TX
,
170 .src_info
.data_width
= STEDMA40_WORD_WIDTH
,
171 .dst_info
.data_width
= STEDMA40_WORD_WIDTH
,
175 static struct mmci_platform_data mop500_sdi4_data
= {
176 .ocr_mask
= MMC_VDD_29_30
,
178 .capabilities
= MMC_CAP_4_BIT_DATA
| MMC_CAP_8_BIT_DATA
|
179 MMC_CAP_MMC_HIGHSPEED
,
182 #ifdef CONFIG_STE_DMA40
183 .dma_filter
= stedma40_filter
,
184 .dma_rx_param
= &mop500_sdi4_dma_cfg_rx
,
185 .dma_tx_param
= &mop500_sdi4_dma_cfg_tx
,
189 void __init
mop500_sdi_init(void)
191 /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
192 if (!cpu_is_u8500v10())
193 mop500_sdi2_data
.capabilities
|= MMC_CAP_MMC_HIGHSPEED
;
194 db8500_add_sdi2(&mop500_sdi2_data
);
197 db8500_add_sdi4(&mop500_sdi4_data
);
199 if (machine_is_hrefv60()) {
200 mop500_sdi0_data
.gpio_cd
= HREFV60_SDMMC_CD_GPIO
;
201 sdi0_en
= HREFV60_SDMMC_EN_GPIO
;
202 sdi0_vsel
= HREFV60_SDMMC_1V8_3V_GPIO
;
206 * On boards with the TC35892 GPIO expander, sdi0 will finally
207 * be added when the TC35892 initializes and calls
208 * mop500_sdi_tc35892_init() above.