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mmc: sdhci: Disable ADMA on some O2Micro SD/MMC parts.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mmc / host / sdhci-pci.c
blob831cf91b644a1a95eb5e91bd264a772c490866a0
1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
2 *
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
9 *
10 * Thanks to the following companies for their support:
11 *
12 * - JMicron (hardware and technical support)
13 */
14
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
21
22 #include <linux/mmc/host.h>
23
24 #include <asm/scatterlist.h>
25 #include <asm/io.h>
26
27 #include "sdhci.h"
28
29 /*
30 * PCI registers
31 */
32
33 #define PCI_SDHCI_IFPIO 0x00
34 #define PCI_SDHCI_IFDMA 0x01
35 #define PCI_SDHCI_IFVENDOR 0x02
36
37 #define PCI_SLOT_INFO 0x40 /* 8 bits */
38 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
39 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
40
41 #define MAX_SLOTS 8
42
43 struct sdhci_pci_chip;
44 struct sdhci_pci_slot;
45
46 struct sdhci_pci_fixes {
47 unsigned int quirks;
48
49 int (*probe)(struct sdhci_pci_chip*);
50
51 int (*probe_slot)(struct sdhci_pci_slot*);
52 void (*remove_slot)(struct sdhci_pci_slot*, int);
53
54 int (*suspend)(struct sdhci_pci_chip*,
55 pm_message_t);
56 int (*resume)(struct sdhci_pci_chip*);
57 };
58
59 struct sdhci_pci_slot {
60 struct sdhci_pci_chip *chip;
61 struct sdhci_host *host;
62
63 int pci_bar;
64 };
65
66 struct sdhci_pci_chip {
67 struct pci_dev *pdev;
68
69 unsigned int quirks;
70 const struct sdhci_pci_fixes *fixes;
71
72 int num_slots; /* Slots on controller */
73 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
74 };
75
76
77 /*****************************************************************************\
78 * *
79 * Hardware specific quirk handling *
80 * *
81 \*****************************************************************************/
82
83 static int ricoh_probe(struct sdhci_pci_chip *chip)
84 {
85 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
86 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
87 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
88 return 0;
89 }
90
91 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
92 {
93 slot->host->caps =
94 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
95 & SDHCI_TIMEOUT_CLK_MASK) |
96
97 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
98 & SDHCI_CLOCK_BASE_MASK) |
99
100 SDHCI_TIMEOUT_CLK_UNIT |
101 SDHCI_CAN_VDD_330 |
102 SDHCI_CAN_DO_SDMA;
103 return 0;
104 }
105
106 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
107 {
108 /* Apply a delay to allow controller to settle */
109 /* Otherwise it becomes confused if card state changed
110 during suspend */
111 msleep(500);
112 return 0;
113 }
114
115 static const struct sdhci_pci_fixes sdhci_ricoh = {
116 .probe = ricoh_probe,
117 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
118 SDHCI_QUIRK_FORCE_DMA |
119 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
120 };
121
122 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
123 .probe_slot = ricoh_mmc_probe_slot,
124 .resume = ricoh_mmc_resume,
125 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
126 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
127 SDHCI_QUIRK_NO_CARD_NO_RESET |
128 SDHCI_QUIRK_MISSING_CAPS
129 };
130
131 static const struct sdhci_pci_fixes sdhci_ene_712 = {
132 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
133 SDHCI_QUIRK_BROKEN_DMA,
134 };
135
136 static const struct sdhci_pci_fixes sdhci_ene_714 = {
137 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
138 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
139 SDHCI_QUIRK_BROKEN_DMA,
140 };
141
142 static const struct sdhci_pci_fixes sdhci_cafe = {
143 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
144 SDHCI_QUIRK_NO_BUSY_IRQ |
145 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
146 };
147
148 /*
149 * ADMA operation is disabled for Moorestown platform due to
150 * hardware bugs.
151 */
152 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
153 {
154 /*
155 * slots number is fixed here for MRST as SDIO3/5 are never used and
156 * have hardware bugs.
157 */
158 chip->num_slots = 1;
159 return 0;
160 }
161
162 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
163 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
164 };
165
166 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
167 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
168 .probe = mrst_hc_probe,
169 };
170
171 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
172 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
173 };
174
175 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
176 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
177 };
178
179 /* O2Micro extra registers */
180 #define O2_SD_LOCK_WP 0xD3
181 #define O2_SD_MULTI_VCC3V 0xEE
182 #define O2_SD_CLKREQ 0xEC
183 #define O2_SD_CAPS 0xE0
184 #define O2_SD_ADMA1 0xE2
185 #define O2_SD_ADMA2 0xE7
186 #define O2_SD_INF_MOD 0xF1
187
188 static int o2_probe(struct sdhci_pci_chip *chip)
189 {
190 int ret;
191 u8 scratch;
192
193 switch (chip->pdev->device) {
194 case PCI_DEVICE_ID_O2_8220:
195 case PCI_DEVICE_ID_O2_8221:
196 case PCI_DEVICE_ID_O2_8320:
197 case PCI_DEVICE_ID_O2_8321:
198 /* This extra setup is required due to broken ADMA. */
199 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
200 if (ret)
201 return ret;
202 scratch &= 0x7f;
203 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
204
205 /* Set Multi 3 to VCC3V# */
206 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
207
208 /* Disable CLK_REQ# support after media DET */
209 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
210 if (ret)
211 return ret;
212 scratch |= 0x20;
213 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
214
215 /* Choose capabilities, enable SDMA. We have to write 0x01
216 * to the capabilities register first to unlock it.
217 */
218 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
219 if (ret)
220 return ret;
221 scratch |= 0x01;
222 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
223 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
224
225 /* Disable ADMA1/2 */
226 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
227 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
228
229 /* Disable the infinite transfer mode */
230 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
231 if (ret)
232 return ret;
233 scratch |= 0x08;
234 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
235
236 /* Lock WP */
237 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
238 if (ret)
239 return ret;
240 scratch |= 0x80;
241 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
242 }
243
244 return 0;
245 }
246
247 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
248 {
249 u8 scratch;
250 int ret;
251
252 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
253 if (ret)
254 return ret;
255
256 /*
257 * Turn PMOS on [bit 0], set over current detection to 2.4 V
258 * [bit 1:2] and enable over current debouncing [bit 6].
259 */
260 if (on)
261 scratch |= 0x47;
262 else
263 scratch &= ~0x47;
264
265 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
266 if (ret)
267 return ret;
268
269 return 0;
270 }
271
272 static int jmicron_probe(struct sdhci_pci_chip *chip)
273 {
274 int ret;
275
276 if (chip->pdev->revision == 0) {
277 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
278 SDHCI_QUIRK_32BIT_DMA_SIZE |
279 SDHCI_QUIRK_32BIT_ADMA_SIZE |
280 SDHCI_QUIRK_RESET_AFTER_REQUEST |
281 SDHCI_QUIRK_BROKEN_SMALL_PIO;
282 }
283
284 /*
285 * JMicron chips can have two interfaces to the same hardware
286 * in order to work around limitations in Microsoft's driver.
287 * We need to make sure we only bind to one of them.
288 *
289 * This code assumes two things:
290 *
291 * 1. The PCI code adds subfunctions in order.
292 *
293 * 2. The MMC interface has a lower subfunction number
294 * than the SD interface.
295 */
296 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
297 struct pci_dev *sd_dev;
298
299 sd_dev = NULL;
300 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
301 PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
302 if ((PCI_SLOT(chip->pdev->devfn) ==
303 PCI_SLOT(sd_dev->devfn)) &&
304 (chip->pdev->bus == sd_dev->bus))
305 break;
306 }
307
308 if (sd_dev) {
309 pci_dev_put(sd_dev);
310 dev_info(&chip->pdev->dev, "Refusing to bind to "
311 "secondary interface.\n");
312 return -ENODEV;
313 }
314 }
315
316 /*
317 * JMicron chips need a bit of a nudge to enable the power
318 * output pins.
319 */
320 ret = jmicron_pmos(chip, 1);
321 if (ret) {
322 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
323 return ret;
324 }
325
326 return 0;
327 }
328
329 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
330 {
331 u8 scratch;
332
333 scratch = readb(host->ioaddr + 0xC0);
334
335 if (on)
336 scratch |= 0x01;
337 else
338 scratch &= ~0x01;
339
340 writeb(scratch, host->ioaddr + 0xC0);
341 }
342
343 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
344 {
345 if (slot->chip->pdev->revision == 0) {
346 u16 version;
347
348 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
349 version = (version & SDHCI_VENDOR_VER_MASK) >>
350 SDHCI_VENDOR_VER_SHIFT;
351
352 /*
353 * Older versions of the chip have lots of nasty glitches
354 * in the ADMA engine. It's best just to avoid it
355 * completely.
356 */
357 if (version < 0xAC)
358 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
359 }
360
361 /*
362 * The secondary interface requires a bit set to get the
363 * interrupts.
364 */
365 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
366 jmicron_enable_mmc(slot->host, 1);
367
368 return 0;
369 }
370
371 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
372 {
373 if (dead)
374 return;
375
376 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
377 jmicron_enable_mmc(slot->host, 0);
378 }
379
380 static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
381 {
382 int i;
383
384 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
385 for (i = 0;i < chip->num_slots;i++)
386 jmicron_enable_mmc(chip->slots[i]->host, 0);
387 }
388
389 return 0;
390 }
391
392 static int jmicron_resume(struct sdhci_pci_chip *chip)
393 {
394 int ret, i;
395
396 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
397 for (i = 0;i < chip->num_slots;i++)
398 jmicron_enable_mmc(chip->slots[i]->host, 1);
399 }
400
401 ret = jmicron_pmos(chip, 1);
402 if (ret) {
403 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
404 return ret;
405 }
406
407 return 0;
408 }
409
410 static const struct sdhci_pci_fixes sdhci_o2 = {
411 .probe = o2_probe,
412 };
413
414 static const struct sdhci_pci_fixes sdhci_jmicron = {
415 .probe = jmicron_probe,
416
417 .probe_slot = jmicron_probe_slot,
418 .remove_slot = jmicron_remove_slot,
419
420 .suspend = jmicron_suspend,
421 .resume = jmicron_resume,
422 };
423
424 /* SysKonnect CardBus2SDIO extra registers */
425 #define SYSKT_CTRL 0x200
426 #define SYSKT_RDFIFO_STAT 0x204
427 #define SYSKT_WRFIFO_STAT 0x208
428 #define SYSKT_POWER_DATA 0x20c
429 #define SYSKT_POWER_330 0xef
430 #define SYSKT_POWER_300 0xf8
431 #define SYSKT_POWER_184 0xcc
432 #define SYSKT_POWER_CMD 0x20d
433 #define SYSKT_POWER_START (1 << 7)
434 #define SYSKT_POWER_STATUS 0x20e
435 #define SYSKT_POWER_STATUS_OK (1 << 0)
436 #define SYSKT_BOARD_REV 0x210
437 #define SYSKT_CHIP_REV 0x211
438 #define SYSKT_CONF_DATA 0x212
439 #define SYSKT_CONF_DATA_1V8 (1 << 2)
440 #define SYSKT_CONF_DATA_2V5 (1 << 1)
441 #define SYSKT_CONF_DATA_3V3 (1 << 0)
442
443 static int syskt_probe(struct sdhci_pci_chip *chip)
444 {
445 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
446 chip->pdev->class &= ~0x0000FF;
447 chip->pdev->class |= PCI_SDHCI_IFDMA;
448 }
449 return 0;
450 }
451
452 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
453 {
454 int tm, ps;
455
456 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
457 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
458 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
459 "board rev %d.%d, chip rev %d.%d\n",
460 board_rev >> 4, board_rev & 0xf,
461 chip_rev >> 4, chip_rev & 0xf);
462 if (chip_rev >= 0x20)
463 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
464
465 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
466 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
467 udelay(50);
468 tm = 10; /* Wait max 1 ms */
469 do {
470 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
471 if (ps & SYSKT_POWER_STATUS_OK)
472 break;
473 udelay(100);
474 } while (--tm);
475 if (!tm) {
476 dev_err(&slot->chip->pdev->dev,
477 "power regulator never stabilized");
478 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
479 return -ENODEV;
480 }
481
482 return 0;
483 }
484
485 static const struct sdhci_pci_fixes sdhci_syskt = {
486 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
487 .probe = syskt_probe,
488 .probe_slot = syskt_probe_slot,
489 };
490
491 static int via_probe(struct sdhci_pci_chip *chip)
492 {
493 if (chip->pdev->revision == 0x10)
494 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
495
496 return 0;
497 }
498
499 static const struct sdhci_pci_fixes sdhci_via = {
500 .probe = via_probe,
501 };
502
503 static const struct pci_device_id pci_ids[] __devinitdata = {
504 {
505 .vendor = PCI_VENDOR_ID_RICOH,
506 .device = PCI_DEVICE_ID_RICOH_R5C822,
507 .subvendor = PCI_ANY_ID,
508 .subdevice = PCI_ANY_ID,
509 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
510 },
511
512 {
513 .vendor = PCI_VENDOR_ID_RICOH,
514 .device = 0x843,
515 .subvendor = PCI_ANY_ID,
516 .subdevice = PCI_ANY_ID,
517 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
518 },
519
520 {
521 .vendor = PCI_VENDOR_ID_RICOH,
522 .device = 0xe822,
523 .subvendor = PCI_ANY_ID,
524 .subdevice = PCI_ANY_ID,
525 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
526 },
527
528 {
529 .vendor = PCI_VENDOR_ID_ENE,
530 .device = PCI_DEVICE_ID_ENE_CB712_SD,
531 .subvendor = PCI_ANY_ID,
532 .subdevice = PCI_ANY_ID,
533 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
534 },
535
536 {
537 .vendor = PCI_VENDOR_ID_ENE,
538 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
539 .subvendor = PCI_ANY_ID,
540 .subdevice = PCI_ANY_ID,
541 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
542 },
543
544 {
545 .vendor = PCI_VENDOR_ID_ENE,
546 .device = PCI_DEVICE_ID_ENE_CB714_SD,
547 .subvendor = PCI_ANY_ID,
548 .subdevice = PCI_ANY_ID,
549 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
550 },
551
552 {
553 .vendor = PCI_VENDOR_ID_ENE,
554 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
555 .subvendor = PCI_ANY_ID,
556 .subdevice = PCI_ANY_ID,
557 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
558 },
559
560 {
561 .vendor = PCI_VENDOR_ID_MARVELL,
562 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
563 .subvendor = PCI_ANY_ID,
564 .subdevice = PCI_ANY_ID,
565 .driver_data = (kernel_ulong_t)&sdhci_cafe,
566 },
567
568 {
569 .vendor = PCI_VENDOR_ID_JMICRON,
570 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
571 .subvendor = PCI_ANY_ID,
572 .subdevice = PCI_ANY_ID,
573 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
574 },
575
576 {
577 .vendor = PCI_VENDOR_ID_JMICRON,
578 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
579 .subvendor = PCI_ANY_ID,
580 .subdevice = PCI_ANY_ID,
581 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
582 },
583
584 {
585 .vendor = PCI_VENDOR_ID_SYSKONNECT,
586 .device = 0x8000,
587 .subvendor = PCI_ANY_ID,
588 .subdevice = PCI_ANY_ID,
589 .driver_data = (kernel_ulong_t)&sdhci_syskt,
590 },
591
592 {
593 .vendor = PCI_VENDOR_ID_VIA,
594 .device = 0x95d0,
595 .subvendor = PCI_ANY_ID,
596 .subdevice = PCI_ANY_ID,
597 .driver_data = (kernel_ulong_t)&sdhci_via,
598 },
599
600 {
601 .vendor = PCI_VENDOR_ID_INTEL,
602 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
603 .subvendor = PCI_ANY_ID,
604 .subdevice = PCI_ANY_ID,
605 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
606 },
607
608 {
609 .vendor = PCI_VENDOR_ID_INTEL,
610 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
611 .subvendor = PCI_ANY_ID,
612 .subdevice = PCI_ANY_ID,
613 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
614 },
615
616 {
617 .vendor = PCI_VENDOR_ID_INTEL,
618 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
619 .subvendor = PCI_ANY_ID,
620 .subdevice = PCI_ANY_ID,
621 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
622 },
623
624 {
625 .vendor = PCI_VENDOR_ID_INTEL,
626 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
627 .subvendor = PCI_ANY_ID,
628 .subdevice = PCI_ANY_ID,
629 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
630 },
631
632 {
633 .vendor = PCI_VENDOR_ID_INTEL,
634 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
635 .subvendor = PCI_ANY_ID,
636 .subdevice = PCI_ANY_ID,
637 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
638 },
639
640 {
641 .vendor = PCI_VENDOR_ID_INTEL,
642 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
643 .subvendor = PCI_ANY_ID,
644 .subdevice = PCI_ANY_ID,
645 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
646 },
647
648 {
649 .vendor = PCI_VENDOR_ID_INTEL,
650 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
651 .subvendor = PCI_ANY_ID,
652 .subdevice = PCI_ANY_ID,
653 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
654 },
655
656 {
657 .vendor = PCI_VENDOR_ID_INTEL,
658 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
659 .subvendor = PCI_ANY_ID,
660 .subdevice = PCI_ANY_ID,
661 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
662 },
663
664 {
665 .vendor = PCI_VENDOR_ID_O2,
666 .device = PCI_DEVICE_ID_O2_8120,
667 .subvendor = PCI_ANY_ID,
668 .subdevice = PCI_ANY_ID,
669 .driver_data = (kernel_ulong_t)&sdhci_o2,
670 },
671
672 {
673 .vendor = PCI_VENDOR_ID_O2,
674 .device = PCI_DEVICE_ID_O2_8220,
675 .subvendor = PCI_ANY_ID,
676 .subdevice = PCI_ANY_ID,
677 .driver_data = (kernel_ulong_t)&sdhci_o2,
678 },
679
680 {
681 .vendor = PCI_VENDOR_ID_O2,
682 .device = PCI_DEVICE_ID_O2_8221,
683 .subvendor = PCI_ANY_ID,
684 .subdevice = PCI_ANY_ID,
685 .driver_data = (kernel_ulong_t)&sdhci_o2,
686 },
687
688 {
689 .vendor = PCI_VENDOR_ID_O2,
690 .device = PCI_DEVICE_ID_O2_8320,
691 .subvendor = PCI_ANY_ID,
692 .subdevice = PCI_ANY_ID,
693 .driver_data = (kernel_ulong_t)&sdhci_o2,
694 },
695
696 {
697 .vendor = PCI_VENDOR_ID_O2,
698 .device = PCI_DEVICE_ID_O2_8321,
699 .subvendor = PCI_ANY_ID,
700 .subdevice = PCI_ANY_ID,
701 .driver_data = (kernel_ulong_t)&sdhci_o2,
702 },
703
704 { /* Generic SD host controller */
705 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
706 },
707
708 { /* end: all zeroes */ },
709 };
710
711 MODULE_DEVICE_TABLE(pci, pci_ids);
712
713 /*****************************************************************************\
714 * *
715 * SDHCI core callbacks *
716 * *
717 \*****************************************************************************/
718
719 static int sdhci_pci_enable_dma(struct sdhci_host *host)
720 {
721 struct sdhci_pci_slot *slot;
722 struct pci_dev *pdev;
723 int ret;
724
725 slot = sdhci_priv(host);
726 pdev = slot->chip->pdev;
727
728 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
729 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
730 (host->flags & SDHCI_USE_SDMA)) {
731 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
732 "doesn't fully claim to support it.\n");
733 }
734
735 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
736 if (ret)
737 return ret;
738
739 pci_set_master(pdev);
740
741 return 0;
742 }
743
744 static struct sdhci_ops sdhci_pci_ops = {
745 .enable_dma = sdhci_pci_enable_dma,
746 };
747
748 /*****************************************************************************\
749 * *
750 * Suspend/resume *
751 * *
752 \*****************************************************************************/
753
754 #ifdef CONFIG_PM
755
756 static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
757 {
758 struct sdhci_pci_chip *chip;
759 struct sdhci_pci_slot *slot;
760 mmc_pm_flag_t slot_pm_flags;
761 mmc_pm_flag_t pm_flags = 0;
762 int i, ret;
763
764 chip = pci_get_drvdata(pdev);
765 if (!chip)
766 return 0;
767
768 for (i = 0;i < chip->num_slots;i++) {
769 slot = chip->slots[i];
770 if (!slot)
771 continue;
772
773 ret = sdhci_suspend_host(slot->host, state);
774
775 if (ret) {
776 for (i--;i >= 0;i--)
777 sdhci_resume_host(chip->slots[i]->host);
778 return ret;
779 }
780
781 slot_pm_flags = slot->host->mmc->pm_flags;
782 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
783 sdhci_enable_irq_wakeups(slot->host);
784
785 pm_flags |= slot_pm_flags;
786 }
787
788 if (chip->fixes && chip->fixes->suspend) {
789 ret = chip->fixes->suspend(chip, state);
790 if (ret) {
791 for (i = chip->num_slots - 1;i >= 0;i--)
792 sdhci_resume_host(chip->slots[i]->host);
793 return ret;
794 }
795 }
796
797 pci_save_state(pdev);
798 if (pm_flags & MMC_PM_KEEP_POWER) {
799 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
800 pci_pme_active(pdev, true);
801 pci_enable_wake(pdev, PCI_D3hot, 1);
802 }
803 pci_set_power_state(pdev, PCI_D3hot);
804 } else {
805 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
806 pci_disable_device(pdev);
807 pci_set_power_state(pdev, pci_choose_state(pdev, state));
808 }
809
810 return 0;
811 }
812
813 static int sdhci_pci_resume (struct pci_dev *pdev)
814 {
815 struct sdhci_pci_chip *chip;
816 struct sdhci_pci_slot *slot;
817 int i, ret;
818
819 chip = pci_get_drvdata(pdev);
820 if (!chip)
821 return 0;
822
823 pci_set_power_state(pdev, PCI_D0);
824 pci_restore_state(pdev);
825 ret = pci_enable_device(pdev);
826 if (ret)
827 return ret;
828
829 if (chip->fixes && chip->fixes->resume) {
830 ret = chip->fixes->resume(chip);
831 if (ret)
832 return ret;
833 }
834
835 for (i = 0;i < chip->num_slots;i++) {
836 slot = chip->slots[i];
837 if (!slot)
838 continue;
839
840 ret = sdhci_resume_host(slot->host);
841 if (ret)
842 return ret;
843 }
844
845 return 0;
846 }
847
848 #else /* CONFIG_PM */
849
850 #define sdhci_pci_suspend NULL
851 #define sdhci_pci_resume NULL
852
853 #endif /* CONFIG_PM */
854
855 /*****************************************************************************\
856 * *
857 * Device probing/removal *
858 * *
859 \*****************************************************************************/
860
861 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
862 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
863 {
864 struct sdhci_pci_slot *slot;
865 struct sdhci_host *host;
866
867 resource_size_t addr;
868
869 int ret;
870
871 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
872 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
873 return ERR_PTR(-ENODEV);
874 }
875
876 if (pci_resource_len(pdev, bar) != 0x100) {
877 dev_err(&pdev->dev, "Invalid iomem size. You may "
878 "experience problems.\n");
879 }
880
881 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
882 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
883 return ERR_PTR(-ENODEV);
884 }
885
886 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
887 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
888 return ERR_PTR(-ENODEV);
889 }
890
891 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
892 if (IS_ERR(host)) {
893 dev_err(&pdev->dev, "cannot allocate host\n");
894 return ERR_CAST(host);
895 }
896
897 slot = sdhci_priv(host);
898
899 slot->chip = chip;
900 slot->host = host;
901 slot->pci_bar = bar;
902
903 host->hw_name = "PCI";
904 host->ops = &sdhci_pci_ops;
905 host->quirks = chip->quirks;
906
907 host->irq = pdev->irq;
908
909 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
910 if (ret) {
911 dev_err(&pdev->dev, "cannot request region\n");
912 goto free;
913 }
914
915 addr = pci_resource_start(pdev, bar);
916 host->ioaddr = pci_ioremap_bar(pdev, bar);
917 if (!host->ioaddr) {
918 dev_err(&pdev->dev, "failed to remap registers\n");
919 goto release;
920 }
921
922 if (chip->fixes && chip->fixes->probe_slot) {
923 ret = chip->fixes->probe_slot(slot);
924 if (ret)
925 goto unmap;
926 }
927
928 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
929
930 ret = sdhci_add_host(host);
931 if (ret)
932 goto remove;
933
934 return slot;
935
936 remove:
937 if (chip->fixes && chip->fixes->remove_slot)
938 chip->fixes->remove_slot(slot, 0);
939
940 unmap:
941 iounmap(host->ioaddr);
942
943 release:
944 pci_release_region(pdev, bar);
945
946 free:
947 sdhci_free_host(host);
948
949 return ERR_PTR(ret);
950 }
951
952 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
953 {
954 int dead;
955 u32 scratch;
956
957 dead = 0;
958 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
959 if (scratch == (u32)-1)
960 dead = 1;
961
962 sdhci_remove_host(slot->host, dead);
963
964 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
965 slot->chip->fixes->remove_slot(slot, dead);
966
967 pci_release_region(slot->chip->pdev, slot->pci_bar);
968
969 sdhci_free_host(slot->host);
970 }
971
972 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
973 const struct pci_device_id *ent)
974 {
975 struct sdhci_pci_chip *chip;
976 struct sdhci_pci_slot *slot;
977
978 u8 slots, rev, first_bar;
979 int ret, i;
980
981 BUG_ON(pdev == NULL);
982 BUG_ON(ent == NULL);
983
984 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
985
986 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
987 (int)pdev->vendor, (int)pdev->device, (int)rev);
988
989 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
990 if (ret)
991 return ret;
992
993 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
994 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
995 if (slots == 0)
996 return -ENODEV;
997
998 BUG_ON(slots > MAX_SLOTS);
999
1000 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1001 if (ret)
1002 return ret;
1003
1004 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1005
1006 if (first_bar > 5) {
1007 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1008 return -ENODEV;
1009 }
1010
1011 ret = pci_enable_device(pdev);
1012 if (ret)
1013 return ret;
1014
1015 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1016 if (!chip) {
1017 ret = -ENOMEM;
1018 goto err;
1019 }
1020
1021 chip->pdev = pdev;
1022 chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
1023 if (chip->fixes)
1024 chip->quirks = chip->fixes->quirks;
1025 chip->num_slots = slots;
1026
1027 pci_set_drvdata(pdev, chip);
1028
1029 if (chip->fixes && chip->fixes->probe) {
1030 ret = chip->fixes->probe(chip);
1031 if (ret)
1032 goto free;
1033 }
1034
1035 slots = chip->num_slots; /* Quirk may have changed this */
1036
1037 for (i = 0;i < slots;i++) {
1038 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1039 if (IS_ERR(slot)) {
1040 for (i--;i >= 0;i--)
1041 sdhci_pci_remove_slot(chip->slots[i]);
1042 ret = PTR_ERR(slot);
1043 goto free;
1044 }
1045
1046 chip->slots[i] = slot;
1047 }
1048
1049 return 0;
1050
1051 free:
1052 pci_set_drvdata(pdev, NULL);
1053 kfree(chip);
1054
1055 err:
1056 pci_disable_device(pdev);
1057 return ret;
1058 }
1059
1060 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1061 {
1062 int i;
1063 struct sdhci_pci_chip *chip;
1064
1065 chip = pci_get_drvdata(pdev);
1066
1067 if (chip) {
1068 for (i = 0;i < chip->num_slots; i++)
1069 sdhci_pci_remove_slot(chip->slots[i]);
1070
1071 pci_set_drvdata(pdev, NULL);
1072 kfree(chip);
1073 }
1074
1075 pci_disable_device(pdev);
1076 }
1077
1078 static struct pci_driver sdhci_driver = {
1079 .name = "sdhci-pci",
1080 .id_table = pci_ids,
1081 .probe = sdhci_pci_probe,
1082 .remove = __devexit_p(sdhci_pci_remove),
1083 .suspend = sdhci_pci_suspend,
1084 .resume = sdhci_pci_resume,
1085 };
1086
1087 /*****************************************************************************\
1088 * *
1089 * Driver init/exit *
1090 * *
1091 \*****************************************************************************/
1092
1093 static int __init sdhci_drv_init(void)
1094 {
1095 return pci_register_driver(&sdhci_driver);
1096 }
1097
1098 static void __exit sdhci_drv_exit(void)
1099 {
1100 pci_unregister_driver(&sdhci_driver);
1101 }
1102
1103 module_init(sdhci_drv_init);
1104 module_exit(sdhci_drv_exit);
1105
1106 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1107 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1108 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree