3 static int ql_read_mbox_reg(struct ql_adapter
*qdev
, u32 reg
, u32
*data
)
6 /* wait for reg to come ready */
7 status
= ql_wait_reg_rdy(qdev
, PROC_ADDR
, PROC_ADDR_RDY
, PROC_ADDR_ERR
);
10 /* set up for reg read */
11 ql_write32(qdev
, PROC_ADDR
, reg
| PROC_ADDR_R
);
12 /* wait for reg to come ready */
13 status
= ql_wait_reg_rdy(qdev
, PROC_ADDR
, PROC_ADDR_RDY
, PROC_ADDR_ERR
);
17 *data
= ql_read32(qdev
, PROC_DATA
);
22 static int ql_get_mb_sts(struct ql_adapter
*qdev
, struct mbox_params
*mbcp
)
26 status
= ql_sem_spinlock(qdev
, SEM_PROC_REG_MASK
);
29 for (i
= 0; i
< mbcp
->out_count
; i
++) {
31 ql_read_mbox_reg(qdev
, qdev
->mailbox_out
+ i
,
34 QPRINTK(qdev
, DRV
, ERR
, "Failed mailbox read.\n");
38 ql_sem_unlock(qdev
, SEM_PROC_REG_MASK
); /* does flush too */
42 static void ql_link_up(struct ql_adapter
*qdev
, struct mbox_params
*mbcp
)
46 if (ql_get_mb_sts(qdev
, mbcp
))
49 qdev
->link_status
= mbcp
->mbox_out
[1];
50 QPRINTK(qdev
, DRV
, ERR
, "Link Up.\n");
51 QPRINTK(qdev
, DRV
, INFO
, "Link Status = 0x%.08x.\n", mbcp
->mbox_out
[1]);
52 if (!netif_carrier_ok(qdev
->ndev
)) {
53 QPRINTK(qdev
, LINK
, INFO
, "Link is Up.\n");
54 netif_carrier_on(qdev
->ndev
);
55 netif_wake_queue(qdev
->ndev
);
58 /* Clear the MPI firmware status. */
59 ql_write32(qdev
, CSR
, CSR_CMD_CLR_R2PCI_INT
);
62 static void ql_link_down(struct ql_adapter
*qdev
, struct mbox_params
*mbcp
)
66 if (ql_get_mb_sts(qdev
, mbcp
)) {
67 QPRINTK(qdev
, DRV
, ERR
, "Firmware did not initialize!\n");
71 if (netif_carrier_ok(qdev
->ndev
)) {
72 QPRINTK(qdev
, LINK
, INFO
, "Link is Down.\n");
73 netif_carrier_off(qdev
->ndev
);
74 netif_stop_queue(qdev
->ndev
);
76 QPRINTK(qdev
, DRV
, ERR
, "Link Down.\n");
77 QPRINTK(qdev
, DRV
, ERR
, "Link Status = 0x%.08x.\n", mbcp
->mbox_out
[1]);
79 /* Clear the MPI firmware status. */
80 ql_write32(qdev
, CSR
, CSR_CMD_CLR_R2PCI_INT
);
83 static void ql_init_fw_done(struct ql_adapter
*qdev
, struct mbox_params
*mbcp
)
87 if (ql_get_mb_sts(qdev
, mbcp
)) {
88 QPRINTK(qdev
, DRV
, ERR
, "Firmware did not initialize!\n");
91 QPRINTK(qdev
, DRV
, ERR
, "Firmware initialized!\n");
92 QPRINTK(qdev
, DRV
, ERR
, "Firmware status = 0x%.08x.\n",
94 QPRINTK(qdev
, DRV
, ERR
, "Firmware Revision = 0x%.08x.\n",
97 /* Clear the MPI firmware status. */
98 ql_write32(qdev
, CSR
, CSR_CMD_CLR_R2PCI_INT
);
101 void ql_mpi_work(struct work_struct
*work
)
103 struct ql_adapter
*qdev
=
104 container_of(work
, struct ql_adapter
, mpi_work
.work
);
105 struct mbox_params mbc
;
106 struct mbox_params
*mbcp
= &mbc
;
109 while (ql_read32(qdev
, STS
) & STS_PI
) {
110 if (ql_get_mb_sts(qdev
, mbcp
)) {
111 QPRINTK(qdev
, DRV
, ERR
,
112 "Could not read MPI, resetting ASIC!\n");
113 ql_queue_asic_error(qdev
);
116 switch (mbcp
->mbox_out
[0]) {
118 ql_link_up(qdev
, mbcp
);
121 ql_link_down(qdev
, mbcp
);
123 case AEN_FW_INIT_DONE
:
124 ql_init_fw_done(qdev
, mbcp
);
126 case MB_CMD_STS_GOOD
:
128 case AEN_FW_INIT_FAIL
:
131 ql_queue_fw_error(qdev
);
133 /* Clear the MPI firmware status. */
134 ql_write32(qdev
, CSR
, CSR_CMD_CLR_R2PCI_INT
);
138 ql_enable_completion_interrupt(qdev
, 0);
141 void ql_mpi_reset_work(struct work_struct
*work
)
143 struct ql_adapter
*qdev
=
144 container_of(work
, struct ql_adapter
, mpi_reset_work
.work
);
145 QPRINTK(qdev
, DRV
, ERR
,
146 "Enter, qdev = %p..\n", qdev
);
147 ql_write32(qdev
, CSR
, CSR_CMD_SET_RST
);
149 ql_write32(qdev
, CSR
, CSR_CMD_CLR_RST
);