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tifm_sd: use kmap_atomic instead of kmap for PIO data buffer
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mmc / tifm_sd.c
blob3e762770afcb369ae699f748f2467bc7e7017a44
1 /*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13 #include <linux/tifm.h>
14 #include <linux/mmc/protocol.h>
15 #include <linux/mmc/host.h>
16 #include <linux/highmem.h>
17 #include <asm/io.h>
18
19 #define DRIVER_NAME "tifm_sd"
20 #define DRIVER_VERSION "0.7"
21
22 static int no_dma = 0;
23 static int fixed_timeout = 0;
24 module_param(no_dma, bool, 0644);
25 module_param(fixed_timeout, bool, 0644);
26
27 /* Constants here are mostly from OMAP5912 datasheet */
28 #define TIFM_MMCSD_RESET 0x0002
29 #define TIFM_MMCSD_CLKMASK 0x03ff
30 #define TIFM_MMCSD_POWER 0x0800
31 #define TIFM_MMCSD_4BBUS 0x8000
32 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37 #define TIFM_MMCSD_READ 0x8000
38
39 #define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40 #define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
52
53 #define TIFM_MMCSD_FIFO_SIZE 0x0020
54
55 #define TIFM_MMCSD_RSP_R0 0x0000
56 #define TIFM_MMCSD_RSP_R1 0x0100
57 #define TIFM_MMCSD_RSP_R2 0x0200
58 #define TIFM_MMCSD_RSP_R3 0x0300
59 #define TIFM_MMCSD_RSP_R4 0x0400
60 #define TIFM_MMCSD_RSP_R5 0x0500
61 #define TIFM_MMCSD_RSP_R6 0x0600
62
63 #define TIFM_MMCSD_RSP_BUSY 0x0800
64
65 #define TIFM_MMCSD_CMD_BC 0x0000
66 #define TIFM_MMCSD_CMD_BCR 0x1000
67 #define TIFM_MMCSD_CMD_AC 0x2000
68 #define TIFM_MMCSD_CMD_ADTC 0x3000
69
70 typedef enum {
71 IDLE = 0,
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
77 READY
78 } card_state_t;
79
80 enum {
81 FIFO_RDY = 0x0001, /* hardware dependent value */
82 HOST_REG = 0x0002,
83 EJECT = 0x0004,
84 EJECT_DONE = 0x0008,
85 CARD_BUSY = 0x0010,
86 OPENDRAIN = 0x0040, /* hardware dependent value */
87 CARD_EVENT = 0x0100, /* hardware dependent value */
88 CARD_RO = 0x0200, /* hardware dependent value */
89 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
90
91 struct tifm_sd {
92 struct tifm_dev *dev;
93
94 unsigned int flags;
95 card_state_t state;
96 unsigned int clk_freq;
97 unsigned int clk_div;
98 unsigned long timeout_jiffies; // software timeout - 2 sec
99
100 struct mmc_request *req;
101 struct work_struct cmd_handler;
102 struct delayed_work abort_handler;
103 wait_queue_head_t can_eject;
104
105 size_t written_blocks;
106 size_t buffer_size;
107 size_t buffer_pos;
108
109 };
110
111 static char* tifm_sd_kmap_atomic(struct mmc_data *data)
112 {
113 return kmap_atomic(data->sg->page, KM_BIO_SRC_IRQ) + data->sg->offset;
114 }
115
116 static void tifm_sd_kunmap_atomic(char *buffer, struct mmc_data *data)
117 {
118 kunmap_atomic(buffer - data->sg->offset, KM_BIO_SRC_IRQ);
119 }
120
121 static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
122 unsigned int host_status)
123 {
124 struct mmc_command *cmd = host->req->cmd;
125 unsigned int t_val = 0, cnt = 0;
126 char *buffer;
127
128 if (host_status & TIFM_MMCSD_BRS) {
129 /* in non-dma rx mode BRS fires when fifo is still not empty */
130 if (no_dma && (cmd->data->flags & MMC_DATA_READ)) {
131 buffer = tifm_sd_kmap_atomic(host->req->data);
132 while (host->buffer_size > host->buffer_pos) {
133 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
134 buffer[host->buffer_pos++] = t_val & 0xff;
135 buffer[host->buffer_pos++] =
136 (t_val >> 8) & 0xff;
137 }
138 tifm_sd_kunmap_atomic(buffer, host->req->data);
139 }
140 return 1;
141 } else if (no_dma) {
142 buffer = tifm_sd_kmap_atomic(host->req->data);
143 if ((cmd->data->flags & MMC_DATA_READ) &&
144 (host_status & TIFM_MMCSD_AF)) {
145 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
146 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
147 if (host->buffer_size > host->buffer_pos) {
148 buffer[host->buffer_pos++] =
149 t_val & 0xff;
150 buffer[host->buffer_pos++] =
151 (t_val >> 8) & 0xff;
152 }
153 }
154 } else if ((cmd->data->flags & MMC_DATA_WRITE)
155 && (host_status & TIFM_MMCSD_AE)) {
156 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
157 if (host->buffer_size > host->buffer_pos) {
158 t_val = buffer[host->buffer_pos++]
159 & 0x00ff;
160 t_val |= ((buffer[host->buffer_pos++])
161 << 8) & 0xff00;
162 writel(t_val,
163 sock->addr + SOCK_MMCSD_DATA);
164 }
165 }
166 }
167 tifm_sd_kunmap_atomic(buffer, host->req->data);
168 }
169 return 0;
170 }
171
172 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
173 {
174 unsigned int rc = 0;
175
176 switch (mmc_resp_type(cmd)) {
177 case MMC_RSP_NONE:
178 rc |= TIFM_MMCSD_RSP_R0;
179 break;
180 case MMC_RSP_R1B:
181 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
182 case MMC_RSP_R1:
183 rc |= TIFM_MMCSD_RSP_R1;
184 break;
185 case MMC_RSP_R2:
186 rc |= TIFM_MMCSD_RSP_R2;
187 break;
188 case MMC_RSP_R3:
189 rc |= TIFM_MMCSD_RSP_R3;
190 break;
191 default:
192 BUG();
193 }
194
195 switch (mmc_cmd_type(cmd)) {
196 case MMC_CMD_BC:
197 rc |= TIFM_MMCSD_CMD_BC;
198 break;
199 case MMC_CMD_BCR:
200 rc |= TIFM_MMCSD_CMD_BCR;
201 break;
202 case MMC_CMD_AC:
203 rc |= TIFM_MMCSD_CMD_AC;
204 break;
205 case MMC_CMD_ADTC:
206 rc |= TIFM_MMCSD_CMD_ADTC;
207 break;
208 default:
209 BUG();
210 }
211 return rc;
212 }
213
214 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
215 {
216 struct tifm_dev *sock = host->dev;
217 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
218 (host->flags & OPENDRAIN);
219
220 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
221 cmd_mask |= TIFM_MMCSD_READ;
222
223 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
224 cmd->opcode, cmd->arg, cmd_mask);
225
226 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
227 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
228 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
229 }
230
231 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
232 {
233 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
234 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
235 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
236 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
237 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
238 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
239 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
240 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
241 }
242
243 static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
244 unsigned int host_status)
245 {
246 struct mmc_command *cmd = host->req->cmd;
247
248 change_state:
249 switch (host->state) {
250 case IDLE:
251 return;
252 case CMD:
253 if (host_status & TIFM_MMCSD_EOC) {
254 tifm_sd_fetch_resp(cmd, sock);
255 if (cmd->data) {
256 host->state = BRS;
257 } else {
258 host->state = READY;
259 }
260 goto change_state;
261 }
262 break;
263 case BRS:
264 if (tifm_sd_transfer_data(sock, host, host_status)) {
265 if (cmd->data->flags & MMC_DATA_WRITE) {
266 host->state = CARD;
267 } else {
268 if (no_dma) {
269 if (host->req->stop) {
270 tifm_sd_exec(host, host->req->stop);
271 host->state = SCMD;
272 } else {
273 host->state = READY;
274 }
275 } else {
276 host->state = FIFO;
277 }
278 }
279 goto change_state;
280 }
281 break;
282 case SCMD:
283 if (host_status & TIFM_MMCSD_EOC) {
284 tifm_sd_fetch_resp(host->req->stop, sock);
285 host->state = READY;
286 goto change_state;
287 }
288 break;
289 case CARD:
290 dev_dbg(&sock->dev, "waiting for CARD, have %zd blocks\n",
291 host->written_blocks);
292 if (!(host->flags & CARD_BUSY)
293 && (host->written_blocks == cmd->data->blocks)) {
294 if (no_dma) {
295 if (host->req->stop) {
296 tifm_sd_exec(host, host->req->stop);
297 host->state = SCMD;
298 } else {
299 host->state = READY;
300 }
301 } else {
302 host->state = FIFO;
303 }
304 goto change_state;
305 }
306 break;
307 case FIFO:
308 if (host->flags & FIFO_RDY) {
309 host->flags &= ~FIFO_RDY;
310 if (host->req->stop) {
311 tifm_sd_exec(host, host->req->stop);
312 host->state = SCMD;
313 } else {
314 host->state = READY;
315 }
316 goto change_state;
317 }
318 break;
319 case READY:
320 queue_work(sock->wq, &host->cmd_handler);
321 return;
322 }
323
324 queue_delayed_work(sock->wq, &host->abort_handler,
325 host->timeout_jiffies);
326 }
327
328 /* Called from interrupt handler */
329 static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
330 unsigned int sock_irq_status)
331 {
332 struct tifm_sd *host;
333 unsigned int host_status = 0, fifo_status = 0;
334 int error_code = 0;
335
336 spin_lock(&sock->lock);
337 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
338 cancel_delayed_work(&host->abort_handler);
339
340 if (sock_irq_status & FIFO_EVENT) {
341 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
342 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
343
344 host->flags |= fifo_status & FIFO_RDY;
345 }
346
347 if (sock_irq_status & CARD_EVENT) {
348 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
349 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
350
351 if (!(host->flags & HOST_REG))
352 queue_work(sock->wq, &host->cmd_handler);
353 if (!host->req)
354 goto done;
355
356 if (host_status & TIFM_MMCSD_ERRMASK) {
357 if (host_status & TIFM_MMCSD_CERR)
358 error_code = MMC_ERR_FAILED;
359 else if (host_status &
360 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
361 error_code = MMC_ERR_TIMEOUT;
362 else if (host_status &
363 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
364 error_code = MMC_ERR_BADCRC;
365
366 writel(TIFM_FIFO_INT_SETALL,
367 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
368 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
369
370 if (host->req->stop) {
371 if (host->state == SCMD) {
372 host->req->stop->error = error_code;
373 } else if (host->state == BRS
374 || host->state == CARD
375 || host->state == FIFO) {
376 host->req->cmd->error = error_code;
377 tifm_sd_exec(host, host->req->stop);
378 queue_delayed_work(sock->wq,
379 &host->abort_handler,
380 host->timeout_jiffies);
381 host->state = SCMD;
382 goto done;
383 } else {
384 host->req->cmd->error = error_code;
385 }
386 } else {
387 host->req->cmd->error = error_code;
388 }
389 host->state = READY;
390 }
391
392 if (host_status & TIFM_MMCSD_CB)
393 host->flags |= CARD_BUSY;
394 if ((host_status & TIFM_MMCSD_EOFB) &&
395 (host->flags & CARD_BUSY)) {
396 host->written_blocks++;
397 host->flags &= ~CARD_BUSY;
398 }
399 }
400
401 if (host->req)
402 tifm_sd_process_cmd(sock, host, host_status);
403 done:
404 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
405 host_status, fifo_status);
406 spin_unlock(&sock->lock);
407 return sock_irq_status;
408 }
409
410 static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
411 {
412 struct tifm_dev *sock = card->dev;
413 unsigned int dest_cnt;
414
415 /* DMA style IO */
416
417 writel(TIFM_FIFO_INT_SETALL,
418 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
419 writel(ilog2(cmd->data->blksz) - 2,
420 sock->addr + SOCK_FIFO_PAGE_SIZE);
421 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
422 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
423
424 dest_cnt = (cmd->data->blocks) << 8;
425
426 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
427
428 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
429 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
430
431 if (cmd->data->flags & MMC_DATA_WRITE) {
432 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
433 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
434 sock->addr + SOCK_DMA_CONTROL);
435 } else {
436 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
437 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
438 }
439 }
440
441 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
442 struct mmc_data *data)
443 {
444 struct tifm_dev *sock = host->dev;
445 unsigned int data_timeout = data->timeout_clks;
446
447 if (fixed_timeout)
448 return;
449
450 data_timeout += data->timeout_ns /
451 ((1000000000 / host->clk_freq) * host->clk_div);
452 data_timeout *= 10; // call it fudge factor for now
453
454 if (data_timeout < 0xffff) {
455 writel((~TIFM_MMCSD_DPE) &
456 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
457 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
458 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
459 } else {
460 writel(TIFM_MMCSD_DPE |
461 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
462 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
463 data_timeout = (data_timeout >> 10) + 1;
464 if(data_timeout > 0xffff)
465 data_timeout = 0; /* set to unlimited */
466 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
467 }
468 }
469
470 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
471 {
472 struct tifm_sd *host = mmc_priv(mmc);
473 struct tifm_dev *sock = host->dev;
474 unsigned long flags;
475 int sg_count = 0;
476 struct mmc_data *r_data = mrq->cmd->data;
477
478 spin_lock_irqsave(&sock->lock, flags);
479 if (host->flags & EJECT) {
480 spin_unlock_irqrestore(&sock->lock, flags);
481 goto err_out;
482 }
483
484 if (host->req) {
485 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
486 spin_unlock_irqrestore(&sock->lock, flags);
487 goto err_out;
488 }
489
490 if (r_data) {
491 tifm_sd_set_data_timeout(host, r_data);
492
493 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
494 mrq->cmd->flags & MMC_DATA_WRITE
495 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
496 if (sg_count != 1) {
497 printk(KERN_ERR DRIVER_NAME
498 ": scatterlist map failed\n");
499 spin_unlock_irqrestore(&sock->lock, flags);
500 goto err_out;
501 }
502
503 host->written_blocks = 0;
504 host->flags &= ~CARD_BUSY;
505 tifm_sd_prepare_data(host, mrq->cmd);
506 }
507
508 host->req = mrq;
509 host->state = CMD;
510 queue_delayed_work(sock->wq, &host->abort_handler,
511 host->timeout_jiffies);
512 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
513 sock->addr + SOCK_CONTROL);
514 tifm_sd_exec(host, mrq->cmd);
515 spin_unlock_irqrestore(&sock->lock, flags);
516 return;
517
518 err_out:
519 if (sg_count > 0)
520 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
521 (r_data->flags & MMC_DATA_WRITE)
522 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
523
524 mrq->cmd->error = MMC_ERR_TIMEOUT;
525 mmc_request_done(mmc, mrq);
526 }
527
528 static void tifm_sd_end_cmd(struct work_struct *work)
529 {
530 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
531 struct tifm_dev *sock = host->dev;
532 struct mmc_host *mmc = tifm_get_drvdata(sock);
533 struct mmc_request *mrq;
534 struct mmc_data *r_data = NULL;
535 unsigned long flags;
536
537 spin_lock_irqsave(&sock->lock, flags);
538
539 mrq = host->req;
540 host->req = NULL;
541 host->state = IDLE;
542
543 if (!mrq) {
544 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
545 spin_unlock_irqrestore(&sock->lock, flags);
546 return;
547 }
548
549 r_data = mrq->cmd->data;
550 if (r_data) {
551 if (r_data->flags & MMC_DATA_WRITE) {
552 r_data->bytes_xfered = host->written_blocks *
553 r_data->blksz;
554 } else {
555 r_data->bytes_xfered = r_data->blocks -
556 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
557 r_data->bytes_xfered *= r_data->blksz;
558 r_data->bytes_xfered += r_data->blksz -
559 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
560 }
561 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
562 (r_data->flags & MMC_DATA_WRITE)
563 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
564 }
565
566 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
567 sock->addr + SOCK_CONTROL);
568
569 spin_unlock_irqrestore(&sock->lock, flags);
570 mmc_request_done(mmc, mrq);
571 }
572
573 static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
574 {
575 struct tifm_sd *host = mmc_priv(mmc);
576 struct tifm_dev *sock = host->dev;
577 unsigned long flags;
578 struct mmc_data *r_data = mrq->cmd->data;
579
580 spin_lock_irqsave(&sock->lock, flags);
581 if (host->flags & EJECT) {
582 spin_unlock_irqrestore(&sock->lock, flags);
583 goto err_out;
584 }
585
586 if (host->req) {
587 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
588 spin_unlock_irqrestore(&sock->lock, flags);
589 goto err_out;
590 }
591
592 if (r_data) {
593 tifm_sd_set_data_timeout(host, r_data);
594
595 host->buffer_size = mrq->cmd->data->blocks *
596 mrq->cmd->data->blksz;
597
598 writel(TIFM_MMCSD_BUFINT |
599 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
600 sock->addr + SOCK_MMCSD_INT_ENABLE);
601 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
602 (TIFM_MMCSD_FIFO_SIZE - 1),
603 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
604
605 host->written_blocks = 0;
606 host->flags &= ~CARD_BUSY;
607 host->buffer_pos = 0;
608 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
609 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
610 }
611
612 host->req = mrq;
613 host->state = CMD;
614 queue_delayed_work(sock->wq, &host->abort_handler,
615 host->timeout_jiffies);
616 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
617 sock->addr + SOCK_CONTROL);
618 tifm_sd_exec(host, mrq->cmd);
619 spin_unlock_irqrestore(&sock->lock, flags);
620 return;
621
622 err_out:
623 mrq->cmd->error = MMC_ERR_TIMEOUT;
624 mmc_request_done(mmc, mrq);
625 }
626
627 static void tifm_sd_end_cmd_nodma(struct work_struct *work)
628 {
629 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
630 struct tifm_dev *sock = host->dev;
631 struct mmc_host *mmc = tifm_get_drvdata(sock);
632 struct mmc_request *mrq;
633 struct mmc_data *r_data = NULL;
634 unsigned long flags;
635
636 spin_lock_irqsave(&sock->lock, flags);
637
638 mrq = host->req;
639 host->req = NULL;
640 host->state = IDLE;
641
642 if (!mrq) {
643 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
644 spin_unlock_irqrestore(&sock->lock, flags);
645 return;
646 }
647
648 r_data = mrq->cmd->data;
649 if (r_data) {
650 writel((~TIFM_MMCSD_BUFINT) &
651 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
652 sock->addr + SOCK_MMCSD_INT_ENABLE);
653
654 if (r_data->flags & MMC_DATA_WRITE) {
655 r_data->bytes_xfered = host->written_blocks *
656 r_data->blksz;
657 } else {
658 r_data->bytes_xfered = r_data->blocks -
659 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
660 r_data->bytes_xfered *= r_data->blksz;
661 r_data->bytes_xfered += r_data->blksz -
662 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
663 }
664 host->buffer_pos = 0;
665 host->buffer_size = 0;
666 }
667
668 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
669 sock->addr + SOCK_CONTROL);
670
671 spin_unlock_irqrestore(&sock->lock, flags);
672
673 mmc_request_done(mmc, mrq);
674 }
675
676 static void tifm_sd_abort(struct work_struct *work)
677 {
678 struct tifm_sd *host =
679 container_of(work, struct tifm_sd, abort_handler.work);
680
681 printk(KERN_ERR DRIVER_NAME
682 ": card failed to respond for a long period of time");
683 tifm_eject(host->dev);
684 }
685
686 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
687 {
688 struct tifm_sd *host = mmc_priv(mmc);
689 struct tifm_dev *sock = host->dev;
690 unsigned int clk_div1, clk_div2;
691 unsigned long flags;
692
693 spin_lock_irqsave(&sock->lock, flags);
694
695 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
696 ios->power_mode);
697 if (ios->bus_width == MMC_BUS_WIDTH_4) {
698 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
699 sock->addr + SOCK_MMCSD_CONFIG);
700 } else {
701 writel((~TIFM_MMCSD_4BBUS) &
702 readl(sock->addr + SOCK_MMCSD_CONFIG),
703 sock->addr + SOCK_MMCSD_CONFIG);
704 }
705
706 if (ios->clock) {
707 clk_div1 = 20000000 / ios->clock;
708 if (!clk_div1)
709 clk_div1 = 1;
710
711 clk_div2 = 24000000 / ios->clock;
712 if (!clk_div2)
713 clk_div2 = 1;
714
715 if ((20000000 / clk_div1) > ios->clock)
716 clk_div1++;
717 if ((24000000 / clk_div2) > ios->clock)
718 clk_div2++;
719 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
720 host->clk_freq = 20000000;
721 host->clk_div = clk_div1;
722 writel((~TIFM_CTRL_FAST_CLK) &
723 readl(sock->addr + SOCK_CONTROL),
724 sock->addr + SOCK_CONTROL);
725 } else {
726 host->clk_freq = 24000000;
727 host->clk_div = clk_div2;
728 writel(TIFM_CTRL_FAST_CLK |
729 readl(sock->addr + SOCK_CONTROL),
730 sock->addr + SOCK_CONTROL);
731 }
732 } else {
733 host->clk_div = 0;
734 }
735 host->clk_div &= TIFM_MMCSD_CLKMASK;
736 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
737 readl(sock->addr + SOCK_MMCSD_CONFIG)),
738 sock->addr + SOCK_MMCSD_CONFIG);
739
740 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
741 host->flags |= OPENDRAIN;
742 else
743 host->flags &= ~OPENDRAIN;
744
745 /* chip_select : maybe later */
746 //vdd
747 //power is set before probe / after remove
748 //I believe, power_off when already marked for eject is sufficient to
749 // allow removal.
750 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
751 host->flags |= EJECT_DONE;
752 wake_up_all(&host->can_eject);
753 }
754
755 spin_unlock_irqrestore(&sock->lock, flags);
756 }
757
758 static int tifm_sd_ro(struct mmc_host *mmc)
759 {
760 int rc;
761 struct tifm_sd *host = mmc_priv(mmc);
762 struct tifm_dev *sock = host->dev;
763 unsigned long flags;
764
765 spin_lock_irqsave(&sock->lock, flags);
766
767 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
768 rc = (host->flags & CARD_RO) ? 1 : 0;
769
770 spin_unlock_irqrestore(&sock->lock, flags);
771 return rc;
772 }
773
774 static struct mmc_host_ops tifm_sd_ops = {
775 .request = tifm_sd_request,
776 .set_ios = tifm_sd_ios,
777 .get_ro = tifm_sd_ro
778 };
779
780 static void tifm_sd_register_host(struct work_struct *work)
781 {
782 struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
783 struct tifm_dev *sock = host->dev;
784 struct mmc_host *mmc = tifm_get_drvdata(sock);
785 unsigned long flags;
786
787 spin_lock_irqsave(&sock->lock, flags);
788 host->flags |= HOST_REG;
789 PREPARE_WORK(&host->cmd_handler,
790 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd);
791 spin_unlock_irqrestore(&sock->lock, flags);
792 dev_dbg(&sock->dev, "adding host\n");
793 mmc_add_host(mmc);
794 }
795
796 static int tifm_sd_probe(struct tifm_dev *sock)
797 {
798 struct mmc_host *mmc;
799 struct tifm_sd *host;
800 int rc = -EIO;
801
802 if (!(TIFM_SOCK_STATE_OCCUPIED &
803 readl(sock->addr + SOCK_PRESENT_STATE))) {
804 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
805 return rc;
806 }
807
808 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
809 if (!mmc)
810 return -ENOMEM;
811
812 host = mmc_priv(mmc);
813 host->dev = sock;
814 host->clk_div = 61;
815 init_waitqueue_head(&host->can_eject);
816 INIT_WORK(&host->cmd_handler, tifm_sd_register_host);
817 INIT_DELAYED_WORK(&host->abort_handler, tifm_sd_abort);
818
819 tifm_set_drvdata(sock, mmc);
820 sock->signal_irq = tifm_sd_signal_irq;
821
822 host->clk_freq = 20000000;
823 host->timeout_jiffies = msecs_to_jiffies(1000);
824
825 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
826 mmc->ops = &tifm_sd_ops;
827 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
828 mmc->caps = MMC_CAP_4_BIT_DATA;
829 mmc->f_min = 20000000 / 60;
830 mmc->f_max = 24000000;
831 mmc->max_hw_segs = 1;
832 mmc->max_phys_segs = 1;
833 mmc->max_sectors = 127;
834 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
835
836 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
837 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
838 writel(host->clk_div | TIFM_MMCSD_POWER,
839 sock->addr + SOCK_MMCSD_CONFIG);
840
841 for (rc = 0; rc < 50; rc++) {
842 /* Wait for reset ack */
843 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
844 rc = 0;
845 break;
846 }
847 msleep(10);
848 }
849
850 if (rc) {
851 printk(KERN_ERR DRIVER_NAME
852 ": card not ready - probe failed\n");
853 mmc_free_host(mmc);
854 return -ENODEV;
855 }
856
857 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
858 writel(host->clk_div | TIFM_MMCSD_POWER,
859 sock->addr + SOCK_MMCSD_CONFIG);
860 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
861 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
862 sock->addr + SOCK_MMCSD_INT_ENABLE);
863
864 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
865 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
866 writel(host->clk_div | TIFM_MMCSD_POWER,
867 sock->addr + SOCK_MMCSD_CONFIG);
868
869 queue_delayed_work(sock->wq, &host->abort_handler,
870 host->timeout_jiffies);
871
872 return 0;
873 }
874
875 static int tifm_sd_host_is_down(struct tifm_dev *sock)
876 {
877 struct mmc_host *mmc = tifm_get_drvdata(sock);
878 struct tifm_sd *host = mmc_priv(mmc);
879 unsigned long flags;
880 int rc = 0;
881
882 spin_lock_irqsave(&sock->lock, flags);
883 rc = (host->flags & EJECT_DONE);
884 spin_unlock_irqrestore(&sock->lock, flags);
885 return rc;
886 }
887
888 static void tifm_sd_remove(struct tifm_dev *sock)
889 {
890 struct mmc_host *mmc = tifm_get_drvdata(sock);
891 struct tifm_sd *host = mmc_priv(mmc);
892 unsigned long flags;
893
894 spin_lock_irqsave(&sock->lock, flags);
895 host->flags |= EJECT;
896 if (host->req)
897 queue_work(sock->wq, &host->cmd_handler);
898 spin_unlock_irqrestore(&sock->lock, flags);
899 wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
900 host->timeout_jiffies);
901
902 if (host->flags & HOST_REG)
903 mmc_remove_host(mmc);
904
905 /* The meaning of the bit majority in this constant is unknown. */
906 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
907 sock->addr + SOCK_CONTROL);
908 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
909 writel(TIFM_FIFO_INT_SETALL,
910 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
911 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
912
913 tifm_set_drvdata(sock, NULL);
914 mmc_free_host(mmc);
915 }
916
917 static tifm_media_id tifm_sd_id_tbl[] = {
918 FM_SD, 0
919 };
920
921 static struct tifm_driver tifm_sd_driver = {
922 .driver = {
923 .name = DRIVER_NAME,
924 .owner = THIS_MODULE
925 },
926 .id_table = tifm_sd_id_tbl,
927 .probe = tifm_sd_probe,
928 .remove = tifm_sd_remove
929 };
930
931 static int __init tifm_sd_init(void)
932 {
933 return tifm_register_driver(&tifm_sd_driver);
934 }
935
936 static void __exit tifm_sd_exit(void)
937 {
938 tifm_unregister_driver(&tifm_sd_driver);
939 }
940
941 MODULE_AUTHOR("Alex Dubov");
942 MODULE_DESCRIPTION("TI FlashMedia SD driver");
943 MODULE_LICENSE("GPL");
944 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
945 MODULE_VERSION(DRIVER_VERSION);
946
947 module_init(tifm_sd_init);
948 module_exit(tifm_sd_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree