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ALSA: AACI: fix timeout duration
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / arm / aaci.c
blob24d3013c02312e7773ae1a864ed87e0ba1b571ee
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Documentation: ARM DDI 0173B
11 */
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28
29 #include "aaci.h"
30
31 #define DRIVER_NAME "aaci-pl041"
32
33 #define FRAME_PERIOD_US 21
34
35 /*
36 * PM support is not complete. Turn it off.
37 */
38 #undef CONFIG_PM
39
40 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
41 {
42 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
43
44 /*
45 * Ensure that the slot 1/2 RX registers are empty.
46 */
47 v = readl(aaci->base + AACI_SLFR);
48 if (v & SLFR_2RXV)
49 readl(aaci->base + AACI_SL2RX);
50 if (v & SLFR_1RXV)
51 readl(aaci->base + AACI_SL1RX);
52
53 writel(maincr, aaci->base + AACI_MAINCR);
54 }
55
56 /*
57 * P29:
58 * The recommended use of programming the external codec through slot 1
59 * and slot 2 data is to use the channels during setup routines and the
60 * slot register at any other time. The data written into slot 1, slot 2
61 * and slot 12 registers is transmitted only when their corresponding
62 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
63 * register.
64 */
65 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
66 unsigned short val)
67 {
68 struct aaci *aaci = ac97->private_data;
69 int timeout;
70 u32 v;
71
72 if (ac97->num >= 4)
73 return;
74
75 mutex_lock(&aaci->ac97_sem);
76
77 aaci_ac97_select_codec(aaci, ac97);
78
79 /*
80 * P54: You must ensure that AACI_SL2TX is always written
81 * to, if required, before data is written to AACI_SL1TX.
82 */
83 writel(val << 4, aaci->base + AACI_SL2TX);
84 writel(reg << 12, aaci->base + AACI_SL1TX);
85
86 /* Initially, wait one frame period */
87 udelay(FRAME_PERIOD_US);
88
89 /* And then wait an additional eight frame periods for it to be sent */
90 timeout = FRAME_PERIOD_US * 8;
91 do {
92 udelay(1);
93 v = readl(aaci->base + AACI_SLFR);
94 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
95
96 if (v & (SLFR_1TXB|SLFR_2TXB))
97 dev_err(&aaci->dev->dev,
98 "timeout waiting for write to complete\n");
99
100 mutex_unlock(&aaci->ac97_sem);
101 }
102
103 /*
104 * Read an AC'97 register.
105 */
106 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
107 {
108 struct aaci *aaci = ac97->private_data;
109 int timeout, retries = 10;
110 u32 v;
111
112 if (ac97->num >= 4)
113 return ~0;
114
115 mutex_lock(&aaci->ac97_sem);
116
117 aaci_ac97_select_codec(aaci, ac97);
118
119 /*
120 * Write the register address to slot 1.
121 */
122 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
123
124 /* Initially, wait one frame period */
125 udelay(FRAME_PERIOD_US);
126
127 /* And then wait an additional eight frame periods for it to be sent */
128 timeout = FRAME_PERIOD_US * 8;
129 do {
130 udelay(1);
131 v = readl(aaci->base + AACI_SLFR);
132 } while ((v & SLFR_1TXB) && --timeout);
133
134 if (v & SLFR_1TXB) {
135 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
136 v = ~0;
137 goto out;
138 }
139
140 /* Now wait for the response frame */
141 udelay(FRAME_PERIOD_US);
142
143 /* And then wait an additional eight frame periods for data */
144 timeout = FRAME_PERIOD_US * 8;
145 do {
146 udelay(1);
147 cond_resched();
148 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
149 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
150
151 if (v != (SLFR_1RXV|SLFR_2RXV)) {
152 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
153 v = ~0;
154 goto out;
155 }
156
157 do {
158 v = readl(aaci->base + AACI_SL1RX) >> 12;
159 if (v == reg) {
160 v = readl(aaci->base + AACI_SL2RX) >> 4;
161 break;
162 } else if (--retries) {
163 dev_warn(&aaci->dev->dev,
164 "ac97 read back fail. retry\n");
165 continue;
166 } else {
167 dev_warn(&aaci->dev->dev,
168 "wrong ac97 register read back (%x != %x)\n",
169 v, reg);
170 v = ~0;
171 }
172 } while (retries);
173 out:
174 mutex_unlock(&aaci->ac97_sem);
175 return v;
176 }
177
178 static inline void
179 aaci_chan_wait_ready(struct aaci_runtime *aacirun, unsigned long mask)
180 {
181 u32 val;
182 int timeout = 5000;
183
184 do {
185 udelay(1);
186 val = readl(aacirun->base + AACI_SR);
187 } while (val & mask && timeout--);
188 }
189
190
191
192 /*
193 * Interrupt support.
194 */
195 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
196 {
197 if (mask & ISR_ORINTR) {
198 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
199 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
200 }
201
202 if (mask & ISR_RXTOINTR) {
203 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
204 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
205 }
206
207 if (mask & ISR_RXINTR) {
208 struct aaci_runtime *aacirun = &aaci->capture;
209 void *ptr;
210
211 if (!aacirun->substream || !aacirun->start) {
212 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
213 writel(0, aacirun->base + AACI_IE);
214 return;
215 }
216
217 spin_lock(&aacirun->lock);
218
219 ptr = aacirun->ptr;
220 do {
221 unsigned int len = aacirun->fifosz;
222 u32 val;
223
224 if (aacirun->bytes <= 0) {
225 aacirun->bytes += aacirun->period;
226 aacirun->ptr = ptr;
227 spin_unlock(&aacirun->lock);
228 snd_pcm_period_elapsed(aacirun->substream);
229 spin_lock(&aacirun->lock);
230 }
231 if (!(aacirun->cr & CR_EN))
232 break;
233
234 val = readl(aacirun->base + AACI_SR);
235 if (!(val & SR_RXHF))
236 break;
237 if (!(val & SR_RXFF))
238 len >>= 1;
239
240 aacirun->bytes -= len;
241
242 /* reading 16 bytes at a time */
243 for( ; len > 0; len -= 16) {
244 asm(
245 "ldmia %1, {r0, r1, r2, r3}\n\t"
246 "stmia %0!, {r0, r1, r2, r3}"
247 : "+r" (ptr)
248 : "r" (aacirun->fifo)
249 : "r0", "r1", "r2", "r3", "cc");
250
251 if (ptr >= aacirun->end)
252 ptr = aacirun->start;
253 }
254 } while(1);
255
256 aacirun->ptr = ptr;
257
258 spin_unlock(&aacirun->lock);
259 }
260
261 if (mask & ISR_URINTR) {
262 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
263 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
264 }
265
266 if (mask & ISR_TXINTR) {
267 struct aaci_runtime *aacirun = &aaci->playback;
268 void *ptr;
269
270 if (!aacirun->substream || !aacirun->start) {
271 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
272 writel(0, aacirun->base + AACI_IE);
273 return;
274 }
275
276 spin_lock(&aacirun->lock);
277
278 ptr = aacirun->ptr;
279 do {
280 unsigned int len = aacirun->fifosz;
281 u32 val;
282
283 if (aacirun->bytes <= 0) {
284 aacirun->bytes += aacirun->period;
285 aacirun->ptr = ptr;
286 spin_unlock(&aacirun->lock);
287 snd_pcm_period_elapsed(aacirun->substream);
288 spin_lock(&aacirun->lock);
289 }
290 if (!(aacirun->cr & CR_EN))
291 break;
292
293 val = readl(aacirun->base + AACI_SR);
294 if (!(val & SR_TXHE))
295 break;
296 if (!(val & SR_TXFE))
297 len >>= 1;
298
299 aacirun->bytes -= len;
300
301 /* writing 16 bytes at a time */
302 for ( ; len > 0; len -= 16) {
303 asm(
304 "ldmia %0!, {r0, r1, r2, r3}\n\t"
305 "stmia %1, {r0, r1, r2, r3}"
306 : "+r" (ptr)
307 : "r" (aacirun->fifo)
308 : "r0", "r1", "r2", "r3", "cc");
309
310 if (ptr >= aacirun->end)
311 ptr = aacirun->start;
312 }
313 } while (1);
314
315 aacirun->ptr = ptr;
316
317 spin_unlock(&aacirun->lock);
318 }
319 }
320
321 static irqreturn_t aaci_irq(int irq, void *devid)
322 {
323 struct aaci *aaci = devid;
324 u32 mask;
325 int i;
326
327 mask = readl(aaci->base + AACI_ALLINTS);
328 if (mask) {
329 u32 m = mask;
330 for (i = 0; i < 4; i++, m >>= 7) {
331 if (m & 0x7f) {
332 aaci_fifo_irq(aaci, i, m);
333 }
334 }
335 }
336
337 return mask ? IRQ_HANDLED : IRQ_NONE;
338 }
339
340
341
342 /*
343 * ALSA support.
344 */
345 static struct snd_pcm_hardware aaci_hw_info = {
346 .info = SNDRV_PCM_INFO_MMAP |
347 SNDRV_PCM_INFO_MMAP_VALID |
348 SNDRV_PCM_INFO_INTERLEAVED |
349 SNDRV_PCM_INFO_BLOCK_TRANSFER |
350 SNDRV_PCM_INFO_RESUME,
351
352 /*
353 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
354 * words. It also doesn't support 12-bit at all.
355 */
356 .formats = SNDRV_PCM_FMTBIT_S16_LE,
357
358 /* rates are setup from the AC'97 codec */
359 .channels_min = 2,
360 .channels_max = 6,
361 .buffer_bytes_max = 64 * 1024,
362 .period_bytes_min = 256,
363 .period_bytes_max = PAGE_SIZE,
364 .periods_min = 4,
365 .periods_max = PAGE_SIZE / 16,
366 };
367
368 static int __aaci_pcm_open(struct aaci *aaci,
369 struct snd_pcm_substream *substream,
370 struct aaci_runtime *aacirun)
371 {
372 struct snd_pcm_runtime *runtime = substream->runtime;
373 int ret;
374
375 aacirun->substream = substream;
376 runtime->private_data = aacirun;
377 runtime->hw = aaci_hw_info;
378 runtime->hw.rates = aacirun->pcm->rates;
379 snd_pcm_limit_hw_rates(runtime);
380
381 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
382 aacirun->pcm->r[1].slots)
383 snd_ac97_pcm_double_rate_rules(runtime);
384
385 /*
386 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
387 * mode, each 32-bit word contains one sample. If we're in
388 * compact mode, each 32-bit word contains two samples, effectively
389 * halving the FIFO size. However, we don't know for sure which
390 * we'll be using at this point. We set this to the lower limit.
391 */
392 runtime->hw.fifo_size = aaci->fifosize * 2;
393
394 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
395 DRIVER_NAME, aaci);
396 if (ret)
397 goto out;
398
399 return 0;
400
401 out:
402 return ret;
403 }
404
405
406 /*
407 * Common ALSA stuff
408 */
409 static int aaci_pcm_close(struct snd_pcm_substream *substream)
410 {
411 struct aaci *aaci = substream->private_data;
412 struct aaci_runtime *aacirun = substream->runtime->private_data;
413
414 WARN_ON(aacirun->cr & CR_EN);
415
416 aacirun->substream = NULL;
417 free_irq(aaci->dev->irq[0], aaci);
418
419 return 0;
420 }
421
422 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
423 {
424 struct aaci_runtime *aacirun = substream->runtime->private_data;
425
426 /*
427 * This must not be called with the device enabled.
428 */
429 WARN_ON(aacirun->cr & CR_EN);
430
431 if (aacirun->pcm_open)
432 snd_ac97_pcm_close(aacirun->pcm);
433 aacirun->pcm_open = 0;
434
435 /*
436 * Clear out the DMA and any allocated buffers.
437 */
438 snd_pcm_lib_free_pages(substream);
439
440 return 0;
441 }
442
443 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
444 struct aaci_runtime *aacirun,
445 struct snd_pcm_hw_params *params)
446 {
447 int err;
448 struct aaci *aaci = substream->private_data;
449
450 aaci_pcm_hw_free(substream);
451 if (aacirun->pcm_open) {
452 snd_ac97_pcm_close(aacirun->pcm);
453 aacirun->pcm_open = 0;
454 }
455
456 err = snd_pcm_lib_malloc_pages(substream,
457 params_buffer_bytes(params));
458 if (err >= 0) {
459 unsigned int rate = params_rate(params);
460 int dbl = rate > 48000;
461
462 err = snd_ac97_pcm_open(aacirun->pcm, rate,
463 params_channels(params),
464 aacirun->pcm->r[dbl].slots);
465
466 aacirun->pcm_open = err == 0;
467 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
468 aacirun->fifosz = aaci->fifosize * 4;
469
470 if (aacirun->cr & CR_COMPACT)
471 aacirun->fifosz >>= 1;
472 }
473
474 return err;
475 }
476
477 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
478 {
479 struct snd_pcm_runtime *runtime = substream->runtime;
480 struct aaci_runtime *aacirun = runtime->private_data;
481
482 aacirun->start = runtime->dma_area;
483 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
484 aacirun->ptr = aacirun->start;
485 aacirun->period =
486 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
487
488 return 0;
489 }
490
491 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
492 {
493 struct snd_pcm_runtime *runtime = substream->runtime;
494 struct aaci_runtime *aacirun = runtime->private_data;
495 ssize_t bytes = aacirun->ptr - aacirun->start;
496
497 return bytes_to_frames(runtime, bytes);
498 }
499
500
501 /*
502 * Playback specific ALSA stuff
503 */
504 static const u32 channels_to_txmask[] = {
505 [2] = CR_SL3 | CR_SL4,
506 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
507 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
508 };
509
510 /*
511 * We can support two and four channel audio. Unfortunately
512 * six channel audio requires a non-standard channel ordering:
513 * 2 -> FL(3), FR(4)
514 * 4 -> FL(3), FR(4), SL(7), SR(8)
515 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
516 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
517 * This requires an ALSA configuration file to correct.
518 */
519 static unsigned int channel_list[] = { 2, 4, 6 };
520
521 static int
522 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
523 {
524 struct aaci *aaci = rule->private;
525 unsigned int chan_mask = 1 << 0, slots;
526
527 /*
528 * pcms[0] is the our 5.1 PCM instance.
529 */
530 slots = aaci->ac97_bus->pcms[0].r[0].slots;
531 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
532 chan_mask |= 1 << 1;
533 if (slots & (1 << AC97_SLOT_LFE))
534 chan_mask |= 1 << 2;
535 }
536
537 return snd_interval_list(hw_param_interval(p, rule->var),
538 ARRAY_SIZE(channel_list), channel_list,
539 chan_mask);
540 }
541
542 static int aaci_pcm_open(struct snd_pcm_substream *substream)
543 {
544 struct aaci *aaci = substream->private_data;
545 int ret;
546
547 /*
548 * Add rule describing channel dependency.
549 */
550 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
551 SNDRV_PCM_HW_PARAM_CHANNELS,
552 aaci_rule_channels, aaci,
553 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
554 if (ret)
555 return ret;
556
557 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
558 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
559 } else {
560 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
561 }
562 return ret;
563 }
564
565 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
566 struct snd_pcm_hw_params *params)
567 {
568 struct aaci_runtime *aacirun = substream->runtime->private_data;
569 unsigned int channels = params_channels(params);
570 int ret;
571
572 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
573 !channels_to_txmask[channels]);
574
575 ret = aaci_pcm_hw_params(substream, aacirun, params);
576
577 /*
578 * Enable FIFO, compact mode, 16 bits per sample.
579 * FIXME: double rate slots?
580 */
581 if (ret >= 0)
582 aacirun->cr |= channels_to_txmask[channels];
583
584 return ret;
585 }
586
587 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
588 {
589 u32 ie;
590
591 ie = readl(aacirun->base + AACI_IE);
592 ie &= ~(IE_URIE|IE_TXIE);
593 writel(ie, aacirun->base + AACI_IE);
594 aacirun->cr &= ~CR_EN;
595 aaci_chan_wait_ready(aacirun, SR_TXB);
596 writel(aacirun->cr, aacirun->base + AACI_TXCR);
597 }
598
599 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
600 {
601 u32 ie;
602
603 aaci_chan_wait_ready(aacirun, SR_TXB);
604 aacirun->cr |= CR_EN;
605
606 ie = readl(aacirun->base + AACI_IE);
607 ie |= IE_URIE | IE_TXIE;
608 writel(ie, aacirun->base + AACI_IE);
609 writel(aacirun->cr, aacirun->base + AACI_TXCR);
610 }
611
612 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
613 {
614 struct aaci_runtime *aacirun = substream->runtime->private_data;
615 unsigned long flags;
616 int ret = 0;
617
618 spin_lock_irqsave(&aacirun->lock, flags);
619
620 switch (cmd) {
621 case SNDRV_PCM_TRIGGER_START:
622 aaci_pcm_playback_start(aacirun);
623 break;
624
625 case SNDRV_PCM_TRIGGER_RESUME:
626 aaci_pcm_playback_start(aacirun);
627 break;
628
629 case SNDRV_PCM_TRIGGER_STOP:
630 aaci_pcm_playback_stop(aacirun);
631 break;
632
633 case SNDRV_PCM_TRIGGER_SUSPEND:
634 aaci_pcm_playback_stop(aacirun);
635 break;
636
637 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
638 break;
639
640 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
641 break;
642
643 default:
644 ret = -EINVAL;
645 }
646
647 spin_unlock_irqrestore(&aacirun->lock, flags);
648
649 return ret;
650 }
651
652 static struct snd_pcm_ops aaci_playback_ops = {
653 .open = aaci_pcm_open,
654 .close = aaci_pcm_close,
655 .ioctl = snd_pcm_lib_ioctl,
656 .hw_params = aaci_pcm_playback_hw_params,
657 .hw_free = aaci_pcm_hw_free,
658 .prepare = aaci_pcm_prepare,
659 .trigger = aaci_pcm_playback_trigger,
660 .pointer = aaci_pcm_pointer,
661 };
662
663 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
664 struct snd_pcm_hw_params *params)
665 {
666 struct aaci_runtime *aacirun = substream->runtime->private_data;
667 int ret;
668
669 ret = aaci_pcm_hw_params(substream, aacirun, params);
670 if (ret >= 0)
671 /* Line in record: slot 3 and 4 */
672 aacirun->cr |= CR_SL3 | CR_SL4;
673
674 return ret;
675 }
676
677 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
678 {
679 u32 ie;
680
681 aaci_chan_wait_ready(aacirun, SR_RXB);
682
683 ie = readl(aacirun->base + AACI_IE);
684 ie &= ~(IE_ORIE | IE_RXIE);
685 writel(ie, aacirun->base+AACI_IE);
686
687 aacirun->cr &= ~CR_EN;
688
689 writel(aacirun->cr, aacirun->base + AACI_RXCR);
690 }
691
692 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
693 {
694 u32 ie;
695
696 aaci_chan_wait_ready(aacirun, SR_RXB);
697
698 #ifdef DEBUG
699 /* RX Timeout value: bits 28:17 in RXCR */
700 aacirun->cr |= 0xf << 17;
701 #endif
702
703 aacirun->cr |= CR_EN;
704 writel(aacirun->cr, aacirun->base + AACI_RXCR);
705
706 ie = readl(aacirun->base + AACI_IE);
707 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
708 writel(ie, aacirun->base + AACI_IE);
709 }
710
711 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
712 {
713 struct aaci_runtime *aacirun = substream->runtime->private_data;
714 unsigned long flags;
715 int ret = 0;
716
717 spin_lock_irqsave(&aacirun->lock, flags);
718
719 switch (cmd) {
720 case SNDRV_PCM_TRIGGER_START:
721 aaci_pcm_capture_start(aacirun);
722 break;
723
724 case SNDRV_PCM_TRIGGER_RESUME:
725 aaci_pcm_capture_start(aacirun);
726 break;
727
728 case SNDRV_PCM_TRIGGER_STOP:
729 aaci_pcm_capture_stop(aacirun);
730 break;
731
732 case SNDRV_PCM_TRIGGER_SUSPEND:
733 aaci_pcm_capture_stop(aacirun);
734 break;
735
736 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
737 break;
738
739 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
740 break;
741
742 default:
743 ret = -EINVAL;
744 }
745
746 spin_unlock_irqrestore(&aacirun->lock, flags);
747
748 return ret;
749 }
750
751 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
752 {
753 struct snd_pcm_runtime *runtime = substream->runtime;
754 struct aaci *aaci = substream->private_data;
755
756 aaci_pcm_prepare(substream);
757
758 /* allow changing of sample rate */
759 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
760 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
761 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
762
763 /* Record select: Mic: 0, Aux: 3, Line: 4 */
764 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
765
766 return 0;
767 }
768
769 static struct snd_pcm_ops aaci_capture_ops = {
770 .open = aaci_pcm_open,
771 .close = aaci_pcm_close,
772 .ioctl = snd_pcm_lib_ioctl,
773 .hw_params = aaci_pcm_capture_hw_params,
774 .hw_free = aaci_pcm_hw_free,
775 .prepare = aaci_pcm_capture_prepare,
776 .trigger = aaci_pcm_capture_trigger,
777 .pointer = aaci_pcm_pointer,
778 };
779
780 /*
781 * Power Management.
782 */
783 #ifdef CONFIG_PM
784 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
785 {
786 struct aaci *aaci = card->private_data;
787 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
788 snd_pcm_suspend_all(aaci->pcm);
789 return 0;
790 }
791
792 static int aaci_do_resume(struct snd_card *card, unsigned int state)
793 {
794 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
795 return 0;
796 }
797
798 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
799 {
800 struct snd_card *card = amba_get_drvdata(dev);
801 return card ? aaci_do_suspend(card) : 0;
802 }
803
804 static int aaci_resume(struct amba_device *dev)
805 {
806 struct snd_card *card = amba_get_drvdata(dev);
807 return card ? aaci_do_resume(card) : 0;
808 }
809 #else
810 #define aaci_do_suspend NULL
811 #define aaci_do_resume NULL
812 #define aaci_suspend NULL
813 #define aaci_resume NULL
814 #endif
815
816
817 static struct ac97_pcm ac97_defs[] __devinitdata = {
818 [0] = { /* Front PCM */
819 .exclusive = 1,
820 .r = {
821 [0] = {
822 .slots = (1 << AC97_SLOT_PCM_LEFT) |
823 (1 << AC97_SLOT_PCM_RIGHT) |
824 (1 << AC97_SLOT_PCM_CENTER) |
825 (1 << AC97_SLOT_PCM_SLEFT) |
826 (1 << AC97_SLOT_PCM_SRIGHT) |
827 (1 << AC97_SLOT_LFE),
828 },
829 [1] = {
830 .slots = (1 << AC97_SLOT_PCM_LEFT) |
831 (1 << AC97_SLOT_PCM_RIGHT) |
832 (1 << AC97_SLOT_PCM_LEFT_0) |
833 (1 << AC97_SLOT_PCM_RIGHT_0),
834 },
835 },
836 },
837 [1] = { /* PCM in */
838 .stream = 1,
839 .exclusive = 1,
840 .r = {
841 [0] = {
842 .slots = (1 << AC97_SLOT_PCM_LEFT) |
843 (1 << AC97_SLOT_PCM_RIGHT),
844 },
845 },
846 },
847 [2] = { /* Mic in */
848 .stream = 1,
849 .exclusive = 1,
850 .r = {
851 [0] = {
852 .slots = (1 << AC97_SLOT_MIC),
853 },
854 },
855 }
856 };
857
858 static struct snd_ac97_bus_ops aaci_bus_ops = {
859 .write = aaci_ac97_write,
860 .read = aaci_ac97_read,
861 };
862
863 static int __devinit aaci_probe_ac97(struct aaci *aaci)
864 {
865 struct snd_ac97_template ac97_template;
866 struct snd_ac97_bus *ac97_bus;
867 struct snd_ac97 *ac97;
868 int ret;
869
870 /*
871 * Assert AACIRESET for 2us
872 */
873 writel(0, aaci->base + AACI_RESET);
874 udelay(2);
875 writel(RESET_NRST, aaci->base + AACI_RESET);
876
877 /*
878 * Give the AC'97 codec more than enough time
879 * to wake up. (42us = ~2 frames at 48kHz.)
880 */
881 udelay(FRAME_PERIOD_US * 2);
882
883 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
884 if (ret)
885 goto out;
886
887 ac97_bus->clock = 48000;
888 aaci->ac97_bus = ac97_bus;
889
890 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
891 ac97_template.private_data = aaci;
892 ac97_template.num = 0;
893 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
894
895 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
896 if (ret)
897 goto out;
898 aaci->ac97 = ac97;
899
900 /*
901 * Disable AC97 PC Beep input on audio codecs.
902 */
903 if (ac97_is_audio(ac97))
904 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
905
906 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
907 if (ret)
908 goto out;
909
910 aaci->playback.pcm = &ac97_bus->pcms[0];
911 aaci->capture.pcm = &ac97_bus->pcms[1];
912
913 out:
914 return ret;
915 }
916
917 static void aaci_free_card(struct snd_card *card)
918 {
919 struct aaci *aaci = card->private_data;
920 if (aaci->base)
921 iounmap(aaci->base);
922 }
923
924 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
925 {
926 struct aaci *aaci;
927 struct snd_card *card;
928 int err;
929
930 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
931 THIS_MODULE, sizeof(struct aaci), &card);
932 if (err < 0)
933 return NULL;
934
935 card->private_free = aaci_free_card;
936
937 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
938 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
939 snprintf(card->longname, sizeof(card->longname),
940 "%s at 0x%016llx, irq %d",
941 card->shortname, (unsigned long long)dev->res.start,
942 dev->irq[0]);
943
944 aaci = card->private_data;
945 mutex_init(&aaci->ac97_sem);
946 aaci->card = card;
947 aaci->dev = dev;
948
949 /* Set MAINCR to allow slot 1 and 2 data IO */
950 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
951 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
952
953 return aaci;
954 }
955
956 static int __devinit aaci_init_pcm(struct aaci *aaci)
957 {
958 struct snd_pcm *pcm;
959 int ret;
960
961 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
962 if (ret == 0) {
963 aaci->pcm = pcm;
964 pcm->private_data = aaci;
965 pcm->info_flags = 0;
966
967 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
968
969 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
970 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
971 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
972 NULL, 0, 64 * 1024);
973 }
974
975 return ret;
976 }
977
978 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
979 {
980 struct aaci_runtime *aacirun = &aaci->playback;
981 int i;
982
983 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
984
985 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
986 writel(0, aacirun->fifo);
987
988 writel(0, aacirun->base + AACI_TXCR);
989
990 /*
991 * Re-initialise the AACI after the FIFO depth test, to
992 * ensure that the FIFOs are empty. Unfortunately, merely
993 * disabling the channel doesn't clear the FIFO.
994 */
995 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
996 writel(aaci->maincr, aaci->base + AACI_MAINCR);
997
998 /*
999 * If we hit 4096, we failed. Go back to the specified
1000 * fifo depth.
1001 */
1002 if (i == 4096)
1003 i = 8;
1004
1005 return i;
1006 }
1007
1008 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1009 {
1010 struct aaci *aaci;
1011 int ret, i;
1012
1013 ret = amba_request_regions(dev, NULL);
1014 if (ret)
1015 return ret;
1016
1017 aaci = aaci_init_card(dev);
1018 if (!aaci) {
1019 ret = -ENOMEM;
1020 goto out;
1021 }
1022
1023 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1024 if (!aaci->base) {
1025 ret = -ENOMEM;
1026 goto out;
1027 }
1028
1029 /*
1030 * Playback uses AACI channel 0
1031 */
1032 spin_lock_init(&aaci->playback.lock);
1033 aaci->playback.base = aaci->base + AACI_CSCH1;
1034 aaci->playback.fifo = aaci->base + AACI_DR1;
1035
1036 /*
1037 * Capture uses AACI channel 0
1038 */
1039 spin_lock_init(&aaci->capture.lock);
1040 aaci->capture.base = aaci->base + AACI_CSCH1;
1041 aaci->capture.fifo = aaci->base + AACI_DR1;
1042
1043 for (i = 0; i < 4; i++) {
1044 void __iomem *base = aaci->base + i * 0x14;
1045
1046 writel(0, base + AACI_IE);
1047 writel(0, base + AACI_TXCR);
1048 writel(0, base + AACI_RXCR);
1049 }
1050
1051 writel(0x1fff, aaci->base + AACI_INTCLR);
1052 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1053 /*
1054 * Fix: ac97 read back fail errors by reading
1055 * from any arbitrary aaci register.
1056 */
1057 readl(aaci->base + AACI_CSCH1);
1058 ret = aaci_probe_ac97(aaci);
1059 if (ret)
1060 goto out;
1061
1062 /*
1063 * Size the FIFOs (must be multiple of 16).
1064 */
1065 aaci->fifosize = aaci_size_fifo(aaci);
1066 if (aaci->fifosize & 15) {
1067 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1068 aaci->fifosize);
1069 ret = -ENODEV;
1070 goto out;
1071 }
1072
1073 ret = aaci_init_pcm(aaci);
1074 if (ret)
1075 goto out;
1076
1077 snd_card_set_dev(aaci->card, &dev->dev);
1078
1079 ret = snd_card_register(aaci->card);
1080 if (ret == 0) {
1081 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1082 aaci->fifosize);
1083 amba_set_drvdata(dev, aaci->card);
1084 return ret;
1085 }
1086
1087 out:
1088 if (aaci)
1089 snd_card_free(aaci->card);
1090 amba_release_regions(dev);
1091 return ret;
1092 }
1093
1094 static int __devexit aaci_remove(struct amba_device *dev)
1095 {
1096 struct snd_card *card = amba_get_drvdata(dev);
1097
1098 amba_set_drvdata(dev, NULL);
1099
1100 if (card) {
1101 struct aaci *aaci = card->private_data;
1102 writel(0, aaci->base + AACI_MAINCR);
1103
1104 snd_card_free(card);
1105 amba_release_regions(dev);
1106 }
1107
1108 return 0;
1109 }
1110
1111 static struct amba_id aaci_ids[] = {
1112 {
1113 .id = 0x00041041,
1114 .mask = 0x000fffff,
1115 },
1116 { 0, 0 },
1117 };
1118
1119 static struct amba_driver aaci_driver = {
1120 .drv = {
1121 .name = DRIVER_NAME,
1122 },
1123 .probe = aaci_probe,
1124 .remove = __devexit_p(aaci_remove),
1125 .suspend = aaci_suspend,
1126 .resume = aaci_resume,
1127 .id_table = aaci_ids,
1128 };
1129
1130 static int __init aaci_init(void)
1131 {
1132 return amba_driver_register(&aaci_driver);
1133 }
1134
1135 static void __exit aaci_exit(void)
1136 {
1137 amba_driver_unregister(&aaci_driver);
1138 }
1139
1140 module_init(aaci_init);
1141 module_exit(aaci_exit);
1142
1143 MODULE_LICENSE("GPL");
1144 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree