[PATCH] x86-64: Tighten mce_amd driver MSR reads
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86_64 / kernel / mce_amd.c
blobcd8dbe57b33a18c75b63263c2a35fce2a559d6fc
1 /*
2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Written by Jacob Shin - AMD, Inc.
9 * Support : jacob.shin@amd.com
11 * April 2006
12 * - added support for AMD Family 0x10 processors
14 * All MC4_MISCi registers are shared between multi-cores
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
27 #include <asm/apic.h>
28 #include <asm/mce.h>
29 #include <asm/msr.h>
30 #include <asm/percpu.h>
31 #include <asm/idle.h>
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
35 #define NR_BANKS 6
36 #define NR_BLOCKS 9
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_CNTP_HI 0x40000000
41 #define MASK_LOCKED_HI 0x20000000
42 #define MASK_LVTOFF_HI 0x00F00000
43 #define MASK_COUNT_EN_HI 0x00080000
44 #define MASK_INT_TYPE_HI 0x00060000
45 #define MASK_OVERFLOW_HI 0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO 0xFF000000
48 #define MCG_XBLK_ADDR 0xC0000400
50 struct threshold_block {
51 unsigned int block;
52 unsigned int bank;
53 unsigned int cpu;
54 u32 address;
55 u16 interrupt_enable;
56 u16 threshold_limit;
57 struct kobject kobj;
58 struct list_head miscj;
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults = {
63 .interrupt_enable = 0,
64 .threshold_limit = THRESHOLD_MAX,
67 struct threshold_bank {
68 struct kobject kobj;
69 struct threshold_block *blocks;
70 cpumask_t cpus;
72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
74 #ifdef CONFIG_SMP
75 static unsigned char shared_bank[NR_BANKS] = {
76 0, 0, 0, 0, 1
78 #endif
80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
83 * CPU Initialization
86 /* must be called with correct cpu affinity */
87 static void threshold_restart_bank(struct threshold_block *b,
88 int reset, u16 old_limit)
90 u32 mci_misc_hi, mci_misc_lo;
92 rdmsr(b->address, mci_misc_lo, mci_misc_hi);
94 if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
95 reset = 1; /* limit cannot be lower than err count */
97 if (reset) { /* reset err count and overflow bit */
98 mci_misc_hi =
99 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
100 (THRESHOLD_MAX - b->threshold_limit);
101 } else if (old_limit) { /* change limit w/o reset */
102 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
103 (old_limit - b->threshold_limit);
104 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
105 (new_count & THRESHOLD_MAX);
108 b->interrupt_enable ?
109 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
110 (mci_misc_hi &= ~MASK_INT_TYPE_HI);
112 mci_misc_hi |= MASK_COUNT_EN_HI;
113 wrmsr(b->address, mci_misc_lo, mci_misc_hi);
116 /* cpu init entry point, called from mce.c with preempt off */
117 void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
119 unsigned int bank, block;
120 unsigned int cpu = smp_processor_id();
121 u32 low = 0, high = 0, address = 0;
123 for (bank = 0; bank < NR_BANKS; ++bank) {
124 for (block = 0; block < NR_BLOCKS; ++block) {
125 if (block == 0)
126 address = MSR_IA32_MC0_MISC + bank * 4;
127 else if (block == 1) {
128 address = (low & MASK_BLKPTR_LO) >> 21;
129 if (!address)
130 break;
131 address += MCG_XBLK_ADDR;
133 else
134 ++address;
136 if (rdmsr_safe(address, &low, &high))
137 break;
139 if (!(high & MASK_VALID_HI)) {
140 if (block)
141 continue;
142 else
143 break;
146 if (!(high & MASK_CNTP_HI) ||
147 (high & MASK_LOCKED_HI))
148 continue;
150 if (!block)
151 per_cpu(bank_map, cpu) |= (1 << bank);
152 #ifdef CONFIG_SMP
153 if (shared_bank[bank] && c->cpu_core_id)
154 break;
155 #endif
156 high &= ~MASK_LVTOFF_HI;
157 high |= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
158 wrmsr(address, low, high);
160 setup_APIC_extened_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
161 THRESHOLD_APIC_VECTOR,
162 K8_APIC_EXT_INT_MSG_FIX, 0);
164 threshold_defaults.address = address;
165 threshold_restart_bank(&threshold_defaults, 0, 0);
171 * APIC Interrupt Handler
175 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
176 * the interrupt goes off when error_count reaches threshold_limit.
177 * the handler will simply log mcelog w/ software defined bank number.
179 asmlinkage void mce_threshold_interrupt(void)
181 unsigned int bank, block;
182 struct mce m;
183 u32 low = 0, high = 0, address = 0;
185 ack_APIC_irq();
186 exit_idle();
187 irq_enter();
189 memset(&m, 0, sizeof(m));
190 rdtscll(m.tsc);
191 m.cpu = smp_processor_id();
193 /* assume first bank caused it */
194 for (bank = 0; bank < NR_BANKS; ++bank) {
195 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
196 continue;
197 for (block = 0; block < NR_BLOCKS; ++block) {
198 if (block == 0)
199 address = MSR_IA32_MC0_MISC + bank * 4;
200 else if (block == 1) {
201 address = (low & MASK_BLKPTR_LO) >> 21;
202 if (!address)
203 break;
204 address += MCG_XBLK_ADDR;
206 else
207 ++address;
209 if (rdmsr_safe(address, &low, &high))
210 break;
212 if (!(high & MASK_VALID_HI)) {
213 if (block)
214 continue;
215 else
216 break;
219 if (!(high & MASK_CNTP_HI) ||
220 (high & MASK_LOCKED_HI))
221 continue;
223 if (high & MASK_OVERFLOW_HI) {
224 rdmsrl(address, m.misc);
225 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
226 m.status);
227 m.bank = K8_MCE_THRESHOLD_BASE
228 + bank * NR_BLOCKS
229 + block;
230 mce_log(&m);
231 goto out;
235 out:
236 irq_exit();
240 * Sysfs Interface
243 struct threshold_attr {
244 struct attribute attr;
245 ssize_t(*show) (struct threshold_block *, char *);
246 ssize_t(*store) (struct threshold_block *, const char *, size_t count);
249 static cpumask_t affinity_set(unsigned int cpu)
251 cpumask_t oldmask = current->cpus_allowed;
252 cpumask_t newmask = CPU_MASK_NONE;
253 cpu_set(cpu, newmask);
254 set_cpus_allowed(current, newmask);
255 return oldmask;
258 static void affinity_restore(cpumask_t oldmask)
260 set_cpus_allowed(current, oldmask);
263 #define SHOW_FIELDS(name) \
264 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
266 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
268 SHOW_FIELDS(interrupt_enable)
269 SHOW_FIELDS(threshold_limit)
271 static ssize_t store_interrupt_enable(struct threshold_block *b,
272 const char *buf, size_t count)
274 char *end;
275 cpumask_t oldmask;
276 unsigned long new = simple_strtoul(buf, &end, 0);
277 if (end == buf)
278 return -EINVAL;
279 b->interrupt_enable = !!new;
281 oldmask = affinity_set(b->cpu);
282 threshold_restart_bank(b, 0, 0);
283 affinity_restore(oldmask);
285 return end - buf;
288 static ssize_t store_threshold_limit(struct threshold_block *b,
289 const char *buf, size_t count)
291 char *end;
292 cpumask_t oldmask;
293 u16 old;
294 unsigned long new = simple_strtoul(buf, &end, 0);
295 if (end == buf)
296 return -EINVAL;
297 if (new > THRESHOLD_MAX)
298 new = THRESHOLD_MAX;
299 if (new < 1)
300 new = 1;
301 old = b->threshold_limit;
302 b->threshold_limit = new;
304 oldmask = affinity_set(b->cpu);
305 threshold_restart_bank(b, 0, old);
306 affinity_restore(oldmask);
308 return end - buf;
311 static ssize_t show_error_count(struct threshold_block *b, char *buf)
313 u32 high, low;
314 cpumask_t oldmask;
315 oldmask = affinity_set(b->cpu);
316 rdmsr(b->address, low, high);
317 affinity_restore(oldmask);
318 return sprintf(buf, "%x\n",
319 (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
322 static ssize_t store_error_count(struct threshold_block *b,
323 const char *buf, size_t count)
325 cpumask_t oldmask;
326 oldmask = affinity_set(b->cpu);
327 threshold_restart_bank(b, 1, 0);
328 affinity_restore(oldmask);
329 return 1;
332 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
333 .attr = {.name = __stringify(_name), .mode = _mode }, \
334 .show = _show, \
335 .store = _store, \
338 #define RW_ATTR(name) \
339 static struct threshold_attr name = \
340 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
342 RW_ATTR(interrupt_enable);
343 RW_ATTR(threshold_limit);
344 RW_ATTR(error_count);
346 static struct attribute *default_attrs[] = {
347 &interrupt_enable.attr,
348 &threshold_limit.attr,
349 &error_count.attr,
350 NULL
353 #define to_block(k) container_of(k, struct threshold_block, kobj)
354 #define to_attr(a) container_of(a, struct threshold_attr, attr)
356 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
358 struct threshold_block *b = to_block(kobj);
359 struct threshold_attr *a = to_attr(attr);
360 ssize_t ret;
361 ret = a->show ? a->show(b, buf) : -EIO;
362 return ret;
365 static ssize_t store(struct kobject *kobj, struct attribute *attr,
366 const char *buf, size_t count)
368 struct threshold_block *b = to_block(kobj);
369 struct threshold_attr *a = to_attr(attr);
370 ssize_t ret;
371 ret = a->store ? a->store(b, buf, count) : -EIO;
372 return ret;
375 static struct sysfs_ops threshold_ops = {
376 .show = show,
377 .store = store,
380 static struct kobj_type threshold_ktype = {
381 .sysfs_ops = &threshold_ops,
382 .default_attrs = default_attrs,
385 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
386 unsigned int bank,
387 unsigned int block,
388 u32 address)
390 int err;
391 u32 low, high;
392 struct threshold_block *b = NULL;
394 if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
395 return 0;
397 if (rdmsr_safe(address, &low, &high))
398 return 0;
400 if (!(high & MASK_VALID_HI)) {
401 if (block)
402 goto recurse;
403 else
404 return 0;
407 if (!(high & MASK_CNTP_HI) ||
408 (high & MASK_LOCKED_HI))
409 goto recurse;
411 b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
412 if (!b)
413 return -ENOMEM;
415 b->block = block;
416 b->bank = bank;
417 b->cpu = cpu;
418 b->address = address;
419 b->interrupt_enable = 0;
420 b->threshold_limit = THRESHOLD_MAX;
422 INIT_LIST_HEAD(&b->miscj);
424 if (per_cpu(threshold_banks, cpu)[bank]->blocks)
425 list_add(&b->miscj,
426 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
427 else
428 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
430 kobject_set_name(&b->kobj, "misc%i", block);
431 b->kobj.parent = &per_cpu(threshold_banks, cpu)[bank]->kobj;
432 b->kobj.ktype = &threshold_ktype;
433 err = kobject_register(&b->kobj);
434 if (err)
435 goto out_free;
436 recurse:
437 if (!block) {
438 address = (low & MASK_BLKPTR_LO) >> 21;
439 if (!address)
440 return 0;
441 address += MCG_XBLK_ADDR;
442 } else
443 ++address;
445 err = allocate_threshold_blocks(cpu, bank, ++block, address);
446 if (err)
447 goto out_free;
449 return err;
451 out_free:
452 if (b) {
453 kobject_unregister(&b->kobj);
454 kfree(b);
456 return err;
459 /* symlinks sibling shared banks to first core. first core owns dir/files. */
460 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
462 int i, err = 0;
463 struct threshold_bank *b = NULL;
464 cpumask_t oldmask = CPU_MASK_NONE;
465 char name[32];
467 sprintf(name, "threshold_bank%i", bank);
469 #ifdef CONFIG_SMP
470 if (cpu_data[cpu].cpu_core_id && shared_bank[bank]) { /* symlink */
471 i = first_cpu(cpu_core_map[cpu]);
473 /* first core not up yet */
474 if (cpu_data[i].cpu_core_id)
475 goto out;
477 /* already linked */
478 if (per_cpu(threshold_banks, cpu)[bank])
479 goto out;
481 b = per_cpu(threshold_banks, i)[bank];
483 if (!b)
484 goto out;
486 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
487 &b->kobj, name);
488 if (err)
489 goto out;
491 b->cpus = cpu_core_map[cpu];
492 per_cpu(threshold_banks, cpu)[bank] = b;
493 goto out;
495 #endif
497 b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
498 if (!b) {
499 err = -ENOMEM;
500 goto out;
503 kobject_set_name(&b->kobj, "threshold_bank%i", bank);
504 b->kobj.parent = &per_cpu(device_mce, cpu).kobj;
505 #ifndef CONFIG_SMP
506 b->cpus = CPU_MASK_ALL;
507 #else
508 b->cpus = cpu_core_map[cpu];
509 #endif
510 err = kobject_register(&b->kobj);
511 if (err)
512 goto out_free;
514 per_cpu(threshold_banks, cpu)[bank] = b;
516 oldmask = affinity_set(cpu);
517 err = allocate_threshold_blocks(cpu, bank, 0,
518 MSR_IA32_MC0_MISC + bank * 4);
519 affinity_restore(oldmask);
521 if (err)
522 goto out_free;
524 for_each_cpu_mask(i, b->cpus) {
525 if (i == cpu)
526 continue;
528 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
529 &b->kobj, name);
530 if (err)
531 goto out;
533 per_cpu(threshold_banks, i)[bank] = b;
536 goto out;
538 out_free:
539 per_cpu(threshold_banks, cpu)[bank] = NULL;
540 kfree(b);
541 out:
542 return err;
545 /* create dir/files for all valid threshold banks */
546 static __cpuinit int threshold_create_device(unsigned int cpu)
548 unsigned int bank;
549 int err = 0;
551 for (bank = 0; bank < NR_BANKS; ++bank) {
552 if (!(per_cpu(bank_map, cpu) & 1 << bank))
553 continue;
554 err = threshold_create_bank(cpu, bank);
555 if (err)
556 goto out;
558 out:
559 return err;
563 * let's be hotplug friendly.
564 * in case of multiple core processors, the first core always takes ownership
565 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
568 static void deallocate_threshold_block(unsigned int cpu,
569 unsigned int bank)
571 struct threshold_block *pos = NULL;
572 struct threshold_block *tmp = NULL;
573 struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
575 if (!head)
576 return;
578 list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
579 kobject_unregister(&pos->kobj);
580 list_del(&pos->miscj);
581 kfree(pos);
584 kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
585 per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
588 static void threshold_remove_bank(unsigned int cpu, int bank)
590 int i = 0;
591 struct threshold_bank *b;
592 char name[32];
594 b = per_cpu(threshold_banks, cpu)[bank];
596 if (!b)
597 return;
599 if (!b->blocks)
600 goto free_out;
602 sprintf(name, "threshold_bank%i", bank);
604 #ifdef CONFIG_SMP
605 /* sibling symlink */
606 if (shared_bank[bank] && b->blocks->cpu != cpu) {
607 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
608 per_cpu(threshold_banks, cpu)[bank] = NULL;
609 return;
611 #endif
613 /* remove all sibling symlinks before unregistering */
614 for_each_cpu_mask(i, b->cpus) {
615 if (i == cpu)
616 continue;
618 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
619 per_cpu(threshold_banks, i)[bank] = NULL;
622 deallocate_threshold_block(cpu, bank);
624 free_out:
625 kobject_unregister(&b->kobj);
626 kfree(b);
627 per_cpu(threshold_banks, cpu)[bank] = NULL;
630 static void threshold_remove_device(unsigned int cpu)
632 unsigned int bank;
634 for (bank = 0; bank < NR_BANKS; ++bank) {
635 if (!(per_cpu(bank_map, cpu) & 1 << bank))
636 continue;
637 threshold_remove_bank(cpu, bank);
641 /* get notified when a cpu comes on/off */
642 static int threshold_cpu_callback(struct notifier_block *nfb,
643 unsigned long action, void *hcpu)
645 /* cpu was unsigned int to begin with */
646 unsigned int cpu = (unsigned long)hcpu;
648 if (cpu >= NR_CPUS)
649 goto out;
651 switch (action) {
652 case CPU_ONLINE:
653 threshold_create_device(cpu);
654 break;
655 case CPU_DEAD:
656 threshold_remove_device(cpu);
657 break;
658 default:
659 break;
661 out:
662 return NOTIFY_OK;
665 static struct notifier_block threshold_cpu_notifier = {
666 .notifier_call = threshold_cpu_callback,
669 static __init int threshold_init_device(void)
671 unsigned lcpu = 0;
673 /* to hit CPUs online before the notifier is up */
674 for_each_online_cpu(lcpu) {
675 int err = threshold_create_device(lcpu);
676 if (err)
677 return err;
679 register_hotcpu_notifier(&threshold_cpu_notifier);
680 return 0;
683 device_initcall(threshold_init_device);