arch/arm/plat-nomadik/gpio.c

   1 /*
   2  * Generic GPIO driver for logic cells found in the Nomadik SoC
   3  *
   4  * Copyright (C) 2008,2009 STMicroelectronics
   5  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
   6  *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18 #include <linux/clk.h>
  19 #include <linux/err.h>
  20 #include <linux/gpio.h>
  21 #include <linux/spinlock.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/irq.h>
  24 #include <linux/slab.h>
  25
  26 #include <plat/pincfg.h>
  27 #include <mach/hardware.h>
  28 #include <mach/gpio.h>
  29
  30 /*
  31  * The GPIO module in the Nomadik family of Systems-on-Chip is an
  32  * AMBA device, managing 32 pins and alternate functions.  The logic block
  33  * is currently only used in the Nomadik.
  34  *
  35  * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
  36  */
  37
  38 #define NMK_GPIO_PER_CHIP 32
  39 struct nmk_gpio_chip {
  40         struct gpio_chip chip;
  41         void __iomem *addr;
  42         struct clk *clk;
  43         unsigned int parent_irq;
  44         spinlock_t lock;
  45         /* Keep track of configured edges */
  46         u32 edge_rising;
  47         u32 edge_falling;
  48 };
  49
  50 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
  51                                 unsigned offset, int gpio_mode)
  52 {
  53         u32 bit = 1 << offset;
  54         u32 afunc, bfunc;
  55
  56         afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
  57         bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
  58         if (gpio_mode & NMK_GPIO_ALT_A)
  59                 afunc |= bit;
  60         if (gpio_mode & NMK_GPIO_ALT_B)
  61                 bfunc |= bit;
  62         writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
  63         writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
  64 }
  65
  66 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
  67                                 unsigned offset, enum nmk_gpio_slpm mode)
  68 {
  69         u32 bit = 1 << offset;
  70         u32 slpm;
  71
  72         slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
  73         if (mode == NMK_GPIO_SLPM_NOCHANGE)
  74                 slpm |= bit;
  75         else
  76                 slpm &= ~bit;
  77         writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
  78 }
  79
  80 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
  81                                 unsigned offset, enum nmk_gpio_pull pull)
  82 {
  83         u32 bit = 1 << offset;
  84         u32 pdis;
  85
  86         pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
  87         if (pull == NMK_GPIO_PULL_NONE)
  88                 pdis |= bit;
  89         else
  90                 pdis &= ~bit;
  91         writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
  92
  93         if (pull == NMK_GPIO_PULL_UP)
  94                 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
  95         else if (pull == NMK_GPIO_PULL_DOWN)
  96                 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
  97 }
  98
  99 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
 100                                   unsigned offset)
 101 {
 102         writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
 103 }
 104
 105 static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
 106                                   unsigned offset, int val)
 107 {
 108         if (val)
 109                 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
 110         else
 111                 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
 112 }
 113
 114 static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
 115                                   unsigned offset, int val)
 116 {
 117         writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
 118         __nmk_gpio_set_output(nmk_chip, offset, val);
 119 }
 120
 121 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
 122                              pin_cfg_t cfg)
 123 {
 124         static const char *afnames[] = {
 125                 [NMK_GPIO_ALT_GPIO]     = "GPIO",
 126                 [NMK_GPIO_ALT_A]        = "A",
 127                 [NMK_GPIO_ALT_B]        = "B",
 128                 [NMK_GPIO_ALT_C]        = "C"
 129         };
 130         static const char *pullnames[] = {
 131                 [NMK_GPIO_PULL_NONE]    = "none",
 132                 [NMK_GPIO_PULL_UP]      = "up",
 133                 [NMK_GPIO_PULL_DOWN]    = "down",
 134                 [3] /* illegal */       = "??"
 135         };
 136         static const char *slpmnames[] = {
 137                 [NMK_GPIO_SLPM_INPUT]           = "input/wakeup",
 138                 [NMK_GPIO_SLPM_NOCHANGE]        = "no-change/no-wakeup",
 139         };
 140
 141         int pin = PIN_NUM(cfg);
 142         int pull = PIN_PULL(cfg);
 143         int af = PIN_ALT(cfg);
 144         int slpm = PIN_SLPM(cfg);
 145         int output = PIN_DIR(cfg);
 146         int val = PIN_VAL(cfg);
 147
 148         dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s (%s%s)\n",
 149                 pin, afnames[af], pullnames[pull], slpmnames[slpm],
 150                 output ? "output " : "input",
 151                 output ? (val ? "high" : "low") : "");
 152
 153         if (output)
 154                 __nmk_gpio_make_output(nmk_chip, offset, val);
 155         else {
 156                 __nmk_gpio_make_input(nmk_chip, offset);
 157                 __nmk_gpio_set_pull(nmk_chip, offset, pull);
 158         }
 159
 160         __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
 161         __nmk_gpio_set_mode(nmk_chip, offset, af);
 162 }
 163
 164 /**
 165  * nmk_config_pin - configure a pin's mux attributes
 166  * @cfg: pin confguration
 167  *
 168  * Configures a pin's mode (alternate function or GPIO), its pull up status,
 169  * and its sleep mode based on the specified configuration.  The @cfg is
 170  * usually one of the SoC specific macros defined in mach/<soc>-pins.h.  These
 171  * are constructed using, and can be further enhanced with, the macros in
 172  * plat/pincfg.h.
 173  *
 174  * If a pin's mode is set to GPIO, it is configured as an input to avoid
 175  * side-effects.  The gpio can be manipulated later using standard GPIO API
 176  * calls.
 177  */
 178 int nmk_config_pin(pin_cfg_t cfg)
 179 {
 180         struct nmk_gpio_chip *nmk_chip;
 181         int gpio = PIN_NUM(cfg);
 182         unsigned long flags;
 183
 184         nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
 185         if (!nmk_chip)
 186                 return -EINVAL;
 187
 188         spin_lock_irqsave(&nmk_chip->lock, flags);
 189         __nmk_config_pin(nmk_chip, gpio - nmk_chip->chip.base, cfg);
 190         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 191
 192         return 0;
 193 }
 194 EXPORT_SYMBOL(nmk_config_pin);
 195
 196 /**
 197  * nmk_config_pins - configure several pins at once
 198  * @cfgs: array of pin configurations
 199  * @num: number of elments in the array
 200  *
 201  * Configures several pins using nmk_config_pin().  Refer to that function for
 202  * further information.
 203  */
 204 int nmk_config_pins(pin_cfg_t *cfgs, int num)
 205 {
 206         int ret = 0;
 207         int i;
 208
 209         for (i = 0; i < num; i++) {
 210                 int ret = nmk_config_pin(cfgs[i]);
 211                 if (ret)
 212                         break;
 213         }
 214
 215         return ret;
 216 }
 217 EXPORT_SYMBOL(nmk_config_pins);
 218
 219 /**
 220  * nmk_gpio_set_slpm() - configure the sleep mode of a pin
 221  * @gpio: pin number
 222  * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
 223  *
 224  * Sets the sleep mode of a pin.  If @mode is NMK_GPIO_SLPM_INPUT, the pin is
 225  * changed to an input (with pullup/down enabled) in sleep and deep sleep.  If
 226  * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
 227  * configured even when in sleep and deep sleep.
 228  *
 229  * On DB8500v2 onwards, this setting loses the previous meaning and instead
 230  * indicates if wakeup detection is enabled on the pin.  Note that
 231  * enable_irq_wake() will automatically enable wakeup detection.
 232  */
 233 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
 234 {
 235         struct nmk_gpio_chip *nmk_chip;
 236         unsigned long flags;
 237
 238         nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
 239         if (!nmk_chip)
 240                 return -EINVAL;
 241
 242         spin_lock_irqsave(&nmk_chip->lock, flags);
 243         __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
 244         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
 251  * @gpio: pin number
 252  * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
 253  *
 254  * Enables/disables pull up/down on a specified pin.  This only takes effect if
 255  * the pin is configured as an input (either explicitly or by the alternate
 256  * function).
 257  *
 258  * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
 259  * configured as an input.  Otherwise, due to the way the controller registers
 260  * work, this function will change the value output on the pin.
 261  */
 262 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
 263 {
 264         struct nmk_gpio_chip *nmk_chip;
 265         unsigned long flags;
 266
 267         nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
 268         if (!nmk_chip)
 269                 return -EINVAL;
 270
 271         spin_lock_irqsave(&nmk_chip->lock, flags);
 272         __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
 273         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 274
 275         return 0;
 276 }
 277
 278 /* Mode functions */
 279 int nmk_gpio_set_mode(int gpio, int gpio_mode)
 280 {
 281         struct nmk_gpio_chip *nmk_chip;
 282         unsigned long flags;
 283
 284         nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
 285         if (!nmk_chip)
 286                 return -EINVAL;
 287
 288         spin_lock_irqsave(&nmk_chip->lock, flags);
 289         __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
 290         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 291
 292         return 0;
 293 }
 294 EXPORT_SYMBOL(nmk_gpio_set_mode);
 295
 296 int nmk_gpio_get_mode(int gpio)
 297 {
 298         struct nmk_gpio_chip *nmk_chip;
 299         u32 afunc, bfunc, bit;
 300
 301         nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
 302         if (!nmk_chip)
 303                 return -EINVAL;
 304
 305         bit = 1 << (gpio - nmk_chip->chip.base);
 306
 307         afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
 308         bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
 309
 310         return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
 311 }
 312 EXPORT_SYMBOL(nmk_gpio_get_mode);
 313
 314
 315 /* IRQ functions */
 316 static inline int nmk_gpio_get_bitmask(int gpio)
 317 {
 318         return 1 << (gpio % 32);
 319 }
 320
 321 static void nmk_gpio_irq_ack(unsigned int irq)
 322 {
 323         int gpio;
 324         struct nmk_gpio_chip *nmk_chip;
 325
 326         gpio = NOMADIK_IRQ_TO_GPIO(irq);
 327         nmk_chip = get_irq_chip_data(irq);
 328         if (!nmk_chip)
 329                 return;
 330         writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
 331 }
 332
 333 enum nmk_gpio_irq_type {
 334         NORMAL,
 335         WAKE,
 336 };
 337
 338 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
 339                                   int gpio, enum nmk_gpio_irq_type which,
 340                                   bool enable)
 341 {
 342         u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
 343         u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
 344         u32 bitmask = nmk_gpio_get_bitmask(gpio);
 345         u32 reg;
 346
 347         /* we must individually set/clear the two edges */
 348         if (nmk_chip->edge_rising & bitmask) {
 349                 reg = readl(nmk_chip->addr + rimsc);
 350                 if (enable)
 351                         reg |= bitmask;
 352                 else
 353                         reg &= ~bitmask;
 354                 writel(reg, nmk_chip->addr + rimsc);
 355         }
 356         if (nmk_chip->edge_falling & bitmask) {
 357                 reg = readl(nmk_chip->addr + fimsc);
 358                 if (enable)
 359                         reg |= bitmask;
 360                 else
 361                         reg &= ~bitmask;
 362                 writel(reg, nmk_chip->addr + fimsc);
 363         }
 364 }
 365
 366 static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which,
 367                                bool enable)
 368 {
 369         int gpio;
 370         struct nmk_gpio_chip *nmk_chip;
 371         unsigned long flags;
 372         u32 bitmask;
 373
 374         gpio = NOMADIK_IRQ_TO_GPIO(irq);
 375         nmk_chip = get_irq_chip_data(irq);
 376         bitmask = nmk_gpio_get_bitmask(gpio);
 377         if (!nmk_chip)
 378                 return -EINVAL;
 379
 380         spin_lock_irqsave(&nmk_chip->lock, flags);
 381         __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable);
 382         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 383
 384         return 0;
 385 }
 386
 387 static void nmk_gpio_irq_mask(unsigned int irq)
 388 {
 389         nmk_gpio_irq_modify(irq, NORMAL, false);
 390 }
 391
 392 static void nmk_gpio_irq_unmask(unsigned int irq)
 393 {
 394         nmk_gpio_irq_modify(irq, NORMAL, true);
 395 }
 396
 397 static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on)
 398 {
 399         struct nmk_gpio_chip *nmk_chip;
 400         unsigned long flags;
 401         int gpio;
 402
 403         gpio = NOMADIK_IRQ_TO_GPIO(irq);
 404         nmk_chip = get_irq_chip_data(irq);
 405         if (!nmk_chip)
 406                 return -EINVAL;
 407
 408         spin_lock_irqsave(&nmk_chip->lock, flags);
 409 #ifdef CONFIG_ARCH_U8500
 410         if (cpu_is_u8500v2()) {
 411                 __nmk_gpio_set_slpm(nmk_chip, gpio,
 412                                     on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
 413                                        : NMK_GPIO_SLPM_WAKEUP_DISABLE);
 414         }
 415 #endif
 416         __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
 417         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 418
 419         return 0;
 420 }
 421
 422 static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
 423 {
 424         struct irq_desc *desc = irq_to_desc(irq);
 425         bool enabled = !(desc->status & IRQ_DISABLED);
 426         bool wake = desc->wake_depth;
 427         int gpio;
 428         struct nmk_gpio_chip *nmk_chip;
 429         unsigned long flags;
 430         u32 bitmask;
 431
 432         gpio = NOMADIK_IRQ_TO_GPIO(irq);
 433         nmk_chip = get_irq_chip_data(irq);
 434         bitmask = nmk_gpio_get_bitmask(gpio);
 435         if (!nmk_chip)
 436                 return -EINVAL;
 437
 438         if (type & IRQ_TYPE_LEVEL_HIGH)
 439                 return -EINVAL;
 440         if (type & IRQ_TYPE_LEVEL_LOW)
 441                 return -EINVAL;
 442
 443         spin_lock_irqsave(&nmk_chip->lock, flags);
 444
 445         if (enabled)
 446                 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
 447
 448         if (wake)
 449                 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
 450
 451         nmk_chip->edge_rising &= ~bitmask;
 452         if (type & IRQ_TYPE_EDGE_RISING)
 453                 nmk_chip->edge_rising |= bitmask;
 454
 455         nmk_chip->edge_falling &= ~bitmask;
 456         if (type & IRQ_TYPE_EDGE_FALLING)
 457                 nmk_chip->edge_falling |= bitmask;
 458
 459         if (enabled)
 460                 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
 461
 462         if (wake)
 463                 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
 464
 465         spin_unlock_irqrestore(&nmk_chip->lock, flags);
 466
 467         return 0;
 468 }
 469
 470 static struct irq_chip nmk_gpio_irq_chip = {
 471         .name           = "Nomadik-GPIO",
 472         .ack            = nmk_gpio_irq_ack,
 473         .mask           = nmk_gpio_irq_mask,
 474         .unmask         = nmk_gpio_irq_unmask,
 475         .set_type       = nmk_gpio_irq_set_type,
 476         .set_wake       = nmk_gpio_irq_set_wake,
 477 };
 478
 479 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 480 {
 481         struct nmk_gpio_chip *nmk_chip;
 482         struct irq_chip *host_chip = get_irq_chip(irq);
 483         unsigned int gpio_irq;
 484         u32 pending;
 485         unsigned int first_irq;
 486
 487         if (host_chip->mask_ack)
 488                 host_chip->mask_ack(irq);
 489         else {
 490                 host_chip->mask(irq);
 491                 if (host_chip->ack)
 492                         host_chip->ack(irq);
 493         }
 494
 495         nmk_chip = get_irq_data(irq);
 496         first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
 497         while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
 498                 gpio_irq = first_irq + __ffs(pending);
 499                 generic_handle_irq(gpio_irq);
 500         }
 501
 502         host_chip->unmask(irq);
 503 }
 504
 505 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
 506 {
 507         unsigned int first_irq;
 508         int i;
 509
 510         first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
 511         for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
 512                 set_irq_chip(i, &nmk_gpio_irq_chip);
 513                 set_irq_handler(i, handle_edge_irq);
 514                 set_irq_flags(i, IRQF_VALID);
 515                 set_irq_chip_data(i, nmk_chip);
 516                 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
 517         }
 518         set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
 519         set_irq_data(nmk_chip->parent_irq, nmk_chip);
 520         return 0;
 521 }
 522
 523 /* I/O Functions */
 524 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
 525 {
 526         struct nmk_gpio_chip *nmk_chip =
 527                 container_of(chip, struct nmk_gpio_chip, chip);
 528
 529         writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
 530         return 0;
 531 }
 532
 533 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
 534 {
 535         struct nmk_gpio_chip *nmk_chip =
 536                 container_of(chip, struct nmk_gpio_chip, chip);
 537         u32 bit = 1 << offset;
 538
 539         return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
 540 }
 541
 542 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
 543                                 int val)
 544 {
 545         struct nmk_gpio_chip *nmk_chip =
 546                 container_of(chip, struct nmk_gpio_chip, chip);
 547
 548         __nmk_gpio_set_output(nmk_chip, offset, val);
 549 }
 550
 551 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
 552                                 int val)
 553 {
 554         struct nmk_gpio_chip *nmk_chip =
 555                 container_of(chip, struct nmk_gpio_chip, chip);
 556
 557         __nmk_gpio_make_output(nmk_chip, offset, val);
 558
 559         return 0;
 560 }
 561
 562 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 563 {
 564         struct nmk_gpio_chip *nmk_chip =
 565                 container_of(chip, struct nmk_gpio_chip, chip);
 566
 567         return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
 568 }
 569
 570 /* This structure is replicated for each GPIO block allocated at probe time */
 571 static struct gpio_chip nmk_gpio_template = {
 572         .direction_input        = nmk_gpio_make_input,
 573         .get                    = nmk_gpio_get_input,
 574         .direction_output       = nmk_gpio_make_output,
 575         .set                    = nmk_gpio_set_output,
 576         .to_irq                 = nmk_gpio_to_irq,
 577         .ngpio                  = NMK_GPIO_PER_CHIP,
 578         .can_sleep              = 0,
 579 };
 580
 581 static int __devinit nmk_gpio_probe(struct platform_device *dev)
 582 {
 583         struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
 584         struct nmk_gpio_chip *nmk_chip;
 585         struct gpio_chip *chip;
 586         struct resource *res;
 587         struct clk *clk;
 588         int irq;
 589         int ret;
 590
 591         if (!pdata)
 592                 return -ENODEV;
 593
 594         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 595         if (!res) {
 596                 ret = -ENOENT;
 597                 goto out;
 598         }
 599
 600         irq = platform_get_irq(dev, 0);
 601         if (irq < 0) {
 602                 ret = irq;
 603                 goto out;
 604         }
 605
 606         if (request_mem_region(res->start, resource_size(res),
 607                                dev_name(&dev->dev)) == NULL) {
 608                 ret = -EBUSY;
 609                 goto out;
 610         }
 611
 612         clk = clk_get(&dev->dev, NULL);
 613         if (IS_ERR(clk)) {
 614                 ret = PTR_ERR(clk);
 615                 goto out_release;
 616         }
 617
 618         clk_enable(clk);
 619
 620         nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
 621         if (!nmk_chip) {
 622                 ret = -ENOMEM;
 623                 goto out_clk;
 624         }
 625         /*
 626          * The virt address in nmk_chip->addr is in the nomadik register space,
 627          * so we can simply convert the resource address, without remapping
 628          */
 629         nmk_chip->clk = clk;
 630         nmk_chip->addr = io_p2v(res->start);
 631         nmk_chip->chip = nmk_gpio_template;
 632         nmk_chip->parent_irq = irq;
 633         spin_lock_init(&nmk_chip->lock);
 634
 635         chip = &nmk_chip->chip;
 636         chip->base = pdata->first_gpio;
 637         chip->label = pdata->name;
 638         chip->dev = &dev->dev;
 639         chip->owner = THIS_MODULE;
 640
 641         ret = gpiochip_add(&nmk_chip->chip);
 642         if (ret)
 643                 goto out_free;
 644
 645         platform_set_drvdata(dev, nmk_chip);
 646
 647         nmk_gpio_init_irq(nmk_chip);
 648
 649         dev_info(&dev->dev, "Bits %i-%i at address %p\n",
 650                  nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
 651         return 0;
 652
 653 out_free:
 654         kfree(nmk_chip);
 655 out_clk:
 656         clk_disable(clk);
 657         clk_put(clk);
 658 out_release:
 659         release_mem_region(res->start, resource_size(res));
 660 out:
 661         dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
 662                   pdata->first_gpio, pdata->first_gpio+31);
 663         return ret;
 664 }
 665
 666 static struct platform_driver nmk_gpio_driver = {
 667         .driver = {
 668                 .owner = THIS_MODULE,
 669                 .name = "gpio",
 670                 },
 671         .probe = nmk_gpio_probe,
 672         .suspend = NULL, /* to be done */
 673         .resume = NULL,
 674 };
 675
 676 static int __init nmk_gpio_init(void)
 677 {
 678         return platform_driver_register(&nmk_gpio_driver);
 679 }
 680
 681 core_initcall(nmk_gpio_init);
 682
 683 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
 684 MODULE_DESCRIPTION("Nomadik GPIO Driver");
 685 MODULE_LICENSE("GPL");
 686
 687