2 * linux/arch/arm/mach-sa1100/badge4.c
4 * BadgePAD 4 specific initialization
6 * Tim Connors <connors@hpl.hp.com>
7 * Christopher Hoover <ch@hpl.hp.com>
9 * Copyright (C) 2002 Hewlett-Packard Company
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/tty.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/errno.h>
26 #include <mach/hardware.h>
27 #include <asm/mach-types.h>
28 #include <asm/setup.h>
29 #include <mach/irqs.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/flash.h>
33 #include <asm/mach/map.h>
34 #include <asm/hardware/sa1111.h>
35 #include <asm/mach/serial_sa1100.h>
37 #include <mach/badge4.h>
41 static struct resource sa1111_resources
[] = {
43 .start
= BADGE4_SA1111_BASE
,
44 .end
= BADGE4_SA1111_BASE
+ 0x00001fff,
45 .flags
= IORESOURCE_MEM
,
48 .start
= BADGE4_IRQ_GPIO_SA1111
,
49 .end
= BADGE4_IRQ_GPIO_SA1111
,
50 .flags
= IORESOURCE_IRQ
,
54 static struct sa1111_platform_data sa1111_info
= {
55 .irq_base
= IRQ_BOARD_END
,
58 static u64 sa1111_dmamask
= 0xffffffffUL
;
60 static struct platform_device sa1111_device
= {
64 .dma_mask
= &sa1111_dmamask
,
65 .coherent_dma_mask
= 0xffffffff,
66 .platform_data
= &sa1111_info
,
68 .num_resources
= ARRAY_SIZE(sa1111_resources
),
69 .resource
= sa1111_resources
,
72 static struct platform_device
*devices
[] __initdata
= {
76 static int __init
badge4_sa1111_init(void)
79 * Ensure that the memory bus request/grant signals are setup,
80 * and the grant is held in its inactive state
87 return platform_add_devices(devices
, ARRAY_SIZE(devices
));
92 * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
93 * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
94 * Sixty-three 32 KiW Main Blocks (4032 Ki b)
98 * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
99 * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
100 * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
102 static struct mtd_partition badge4_partitions
[] = {
104 .name
= "BLOB boot loader",
109 .offset
= MTDPART_OFS_APPEND
,
113 .offset
= MTDPART_OFS_APPEND
,
114 .size
= MTDPART_SIZ_FULL
118 static struct flash_platform_data badge4_flash_data
= {
119 .map_name
= "cfi_probe",
120 .parts
= badge4_partitions
,
121 .nr_parts
= ARRAY_SIZE(badge4_partitions
),
124 static struct resource badge4_flash_resource
= {
125 .start
= SA1100_CS0_PHYS
,
126 .end
= SA1100_CS0_PHYS
+ SZ_64M
- 1,
127 .flags
= IORESOURCE_MEM
,
130 static int five_v_on __initdata
= 0;
132 static int __init
five_v_on_setup(char *ignore
)
137 __setup("five_v_on", five_v_on_setup
);
140 static int __init
badge4_init(void)
144 if (!machine_is_badge4())
148 GPCR
= (BADGE4_GPIO_LGP2
| BADGE4_GPIO_LGP3
|
149 BADGE4_GPIO_LGP4
| BADGE4_GPIO_LGP5
|
150 BADGE4_GPIO_LGP6
| BADGE4_GPIO_LGP7
|
151 BADGE4_GPIO_LGP8
| BADGE4_GPIO_LGP9
|
152 BADGE4_GPIO_GPA_VID
| BADGE4_GPIO_GPB_VID
|
153 BADGE4_GPIO_GPC_VID
);
154 GPDR
&= ~BADGE4_GPIO_INT_VID
;
155 GPDR
|= (BADGE4_GPIO_LGP2
| BADGE4_GPIO_LGP3
|
156 BADGE4_GPIO_LGP4
| BADGE4_GPIO_LGP5
|
157 BADGE4_GPIO_LGP6
| BADGE4_GPIO_LGP7
|
158 BADGE4_GPIO_LGP8
| BADGE4_GPIO_LGP9
|
159 BADGE4_GPIO_GPA_VID
| BADGE4_GPIO_GPB_VID
|
160 BADGE4_GPIO_GPC_VID
);
163 GPCR
= (BADGE4_GPIO_SDSDA
| BADGE4_GPIO_SDSCL
);
164 GPDR
|= (BADGE4_GPIO_SDSDA
| BADGE4_GPIO_SDSCL
);
167 GPCR
= (BADGE4_GPIO_UART_HS1
| BADGE4_GPIO_UART_HS2
);
168 GPDR
|= (BADGE4_GPIO_UART_HS1
| BADGE4_GPIO_UART_HS2
);
170 /* CPLD muxsel0 input for mux/adc chip select */
171 GPCR
= BADGE4_GPIO_MUXSEL0
;
172 GPDR
|= BADGE4_GPIO_MUXSEL0
;
174 /* test points: J5, J6 as inputs, J7 outputs */
175 GPDR
&= ~(BADGE4_GPIO_TESTPT_J5
| BADGE4_GPIO_TESTPT_J6
);
176 GPCR
= BADGE4_GPIO_TESTPT_J7
;
177 GPDR
|= BADGE4_GPIO_TESTPT_J7
;
179 /* 5V supply rail. */
180 GPCR
= BADGE4_GPIO_PCMEN5V
; /* initially off */
181 GPDR
|= BADGE4_GPIO_PCMEN5V
;
183 /* CPLD sdram type inputs; set up by blob */
184 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
185 printk(KERN_DEBUG __FILE__
": SDRAM CPLD typ1=%d typ0=%d\n",
186 !!(GPLR
& BADGE4_GPIO_SDTYP1
),
187 !!(GPLR
& BADGE4_GPIO_SDTYP0
));
189 /* SA1111 reset pin; set up by blob */
190 //GPSR = BADGE4_GPIO_SA1111_NRST;
191 //GPDR |= BADGE4_GPIO_SA1111_NRST;
194 /* power management cruft */
200 PWER
|= PWER_GPIO26
; /* wake up on an edge from TESTPT_J5 */
201 PWER
|= PWER_RTC
; /* wake up if rtc fires */
203 /* drive sa1111_nrst during sleep */
204 PGSR
|= BADGE4_GPIO_SA1111_NRST
;
205 /* drive CPLD as is during sleep */
206 PGSR
|= (GPLR
& (BADGE4_GPIO_SDTYP0
|BADGE4_GPIO_SDTYP1
));
209 /* Now bring up the SA-1111. */
210 ret
= badge4_sa1111_init();
213 "%s: SA-1111 initialization failed (%d)\n",
217 /* maybe turn on 5v0 from the start */
218 badge4_set_5V(BADGE4_5V_INITIALLY
, five_v_on
);
220 sa11x0_register_mtd(&badge4_flash_data
, &badge4_flash_resource
, 1);
225 arch_initcall(badge4_init
);
228 static unsigned badge4_5V_bitmap
= 0;
230 void badge4_set_5V(unsigned subsystem
, int on
)
233 unsigned old_5V_bitmap
;
235 local_irq_save(flags
);
237 old_5V_bitmap
= badge4_5V_bitmap
;
240 badge4_5V_bitmap
|= subsystem
;
242 badge4_5V_bitmap
&= ~subsystem
;
245 /* detect on->off and off->on transitions */
246 if ((!old_5V_bitmap
) && (badge4_5V_bitmap
)) {
247 /* was off, now on */
248 printk(KERN_INFO
"%s: enabling 5V supply rail\n", __func__
);
249 GPSR
= BADGE4_GPIO_PCMEN5V
;
250 } else if ((old_5V_bitmap
) && (!badge4_5V_bitmap
)) {
251 /* was on, now off */
252 printk(KERN_INFO
"%s: disabling 5V supply rail\n", __func__
);
253 GPCR
= BADGE4_GPIO_PCMEN5V
;
256 local_irq_restore(flags
);
258 EXPORT_SYMBOL(badge4_set_5V
);
261 static struct map_desc badge4_io_desc
[] __initdata
= {
263 .virtual = 0xf1000000,
264 .pfn
= __phys_to_pfn(0x08000000),
265 .length
= 0x00100000,
267 }, { /* SRAM bank 2 */
268 .virtual = 0xf2000000,
269 .pfn
= __phys_to_pfn(0x10000000),
270 .length
= 0x00100000,
273 .virtual = 0xf4000000,
274 .pfn
= __phys_to_pfn(0x48000000),
275 .length
= 0x00100000,
281 badge4_uart_pm(struct uart_port
*port
, u_int state
, u_int oldstate
)
284 Ser1SDCR0
|= SDCR0_UART
;
288 static struct sa1100_port_fns badge4_port_fns __initdata
= {
289 //.get_mctrl = badge4_get_mctrl,
290 //.set_mctrl = badge4_set_mctrl,
291 .pm
= badge4_uart_pm
,
294 static void __init
badge4_map_io(void)
297 iotable_init(badge4_io_desc
, ARRAY_SIZE(badge4_io_desc
));
299 sa1100_register_uart_fns(&badge4_port_fns
);
300 sa1100_register_uart(0, 3);
301 sa1100_register_uart(1, 1);
304 MACHINE_START(BADGE4
, "Hewlett-Packard Laboratories BadgePAD 4")
305 .boot_params
= 0xc0000100,
306 .map_io
= badge4_map_io
,
307 .init_irq
= sa1100_init_irq
,
308 .timer
= &sa1100_timer
,