drivers/net/wireless/iwlwifi/iwl-eeprom.h

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
  34  * All rights reserved.
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  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
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  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63 #ifndef __iwl_eeprom_h__
  64 #define __iwl_eeprom_h__
  65
  66 #include <net/mac80211.h>
  67
  68 struct iwl_priv;
  69
  70 /*
  71  * EEPROM access time values:
  72  *
  73  * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
  74  * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
  75  * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
  76  * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
  77  */
  78 #define IWL_EEPROM_ACCESS_TIMEOUT       5000 /* uSec */
  79
  80 #define IWL_EEPROM_SEM_TIMEOUT          10   /* microseconds */
  81 #define IWL_EEPROM_SEM_RETRY_LIMIT      1000 /* number of attempts (not time) */
  82
  83
  84 /*
  85  * Regulatory channel usage flags in EEPROM struct iwl4965_eeprom_channel.flags.
  86  *
  87  * IBSS and/or AP operation is allowed *only* on those channels with
  88  * (VALID && IBSS && ACTIVE && !RADAR).  This restriction is in place because
  89  * RADAR detection is not supported by the 4965 driver, but is a
  90  * requirement for establishing a new network for legal operation on channels
  91  * requiring RADAR detection or restricting ACTIVE scanning.
  92  *
  93  * NOTE:  "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
  94  *        It only indicates that 20 MHz channel use is supported; HT40 channel
  95  *        usage is indicated by a separate set of regulatory flags for each
  96  *        HT40 channel pair.
  97  *
  98  * NOTE:  Using a channel inappropriately will result in a uCode error!
  99  */
 100 #define IWL_NUM_TX_CALIB_GROUPS 5
 101 enum {
 102         EEPROM_CHANNEL_VALID = (1 << 0),        /* usable for this SKU/geo */
 103         EEPROM_CHANNEL_IBSS = (1 << 1),         /* usable as an IBSS channel */
 104         /* Bit 2 Reserved */
 105         EEPROM_CHANNEL_ACTIVE = (1 << 3),       /* active scanning allowed */
 106         EEPROM_CHANNEL_RADAR = (1 << 4),        /* radar detection required */
 107         EEPROM_CHANNEL_WIDE = (1 << 5),         /* 20 MHz channel okay */
 108         /* Bit 6 Reserved (was Narrow Channel) */
 109         EEPROM_CHANNEL_DFS = (1 << 7),  /* dynamic freq selection candidate */
 110 };
 111
 112 /* SKU Capabilities */
 113 /* 3945 only */
 114 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE                (1 << 0)
 115 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE                (1 << 1)
 116
 117 /* 5000 and up */
 118 #define EEPROM_SKU_CAP_BAND_POS                         (4)
 119 #define EEPROM_SKU_CAP_BAND_SELECTION                   \
 120                 (3 << EEPROM_SKU_CAP_BAND_POS)
 121 #define EEPROM_SKU_CAP_11N_ENABLE                       (1 << 6)
 122 #define EEPROM_SKU_CAP_AMT_ENABLE                       (1 << 7)
 123 #define EEPROM_SKU_CAP_IPAN_ENABLE                      (1 << 8)
 124
 125 /* *regulatory* channel data format in eeprom, one for each channel.
 126  * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
 127 struct iwl_eeprom_channel {
 128         u8 flags;               /* EEPROM_CHANNEL_* flags copied from EEPROM */
 129         s8 max_power_avg;       /* max power (dBm) on this chnl, limit 31 */
 130 } __packed;
 131
 132 enum iwl_eeprom_enhanced_txpwr_flags {
 133         IWL_EEPROM_ENH_TXP_FL_VALID             = BIT(0),
 134         IWL_EEPROM_ENH_TXP_FL_BAND_52G          = BIT(1),
 135         IWL_EEPROM_ENH_TXP_FL_OFDM              = BIT(2),
 136         IWL_EEPROM_ENH_TXP_FL_40MHZ             = BIT(3),
 137         IWL_EEPROM_ENH_TXP_FL_HT_AP             = BIT(4),
 138         IWL_EEPROM_ENH_TXP_FL_RES1              = BIT(5),
 139         IWL_EEPROM_ENH_TXP_FL_RES2              = BIT(6),
 140         IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE       = BIT(7),
 141 };
 142
 143 /**
 144  * iwl_eeprom_enhanced_txpwr structure
 145  *    This structure presents the enhanced regulatory tx power limit layout
 146  *    in eeprom image
 147  *    Enhanced regulatory tx power portion of eeprom image can be broken down
 148  *    into individual structures; each one is 8 bytes in size and contain the
 149  *    following information
 150  * @flags: entry flags
 151  * @channel: channel number
 152  * @chain_a_max_pwr: chain a max power in 1/2 dBm
 153  * @chain_b_max_pwr: chain b max power in 1/2 dBm
 154  * @chain_c_max_pwr: chain c max power in 1/2 dBm
 155  * @delta_20_in_40: 20-in-40 deltas (hi/lo)
 156  * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
 157  * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
 158  *
 159  */
 160 struct iwl_eeprom_enhanced_txpwr {
 161         u8 flags;
 162         u8 channel;
 163         s8 chain_a_max;
 164         s8 chain_b_max;
 165         s8 chain_c_max;
 166         u8 delta_20_in_40;
 167         s8 mimo2_max;
 168         s8 mimo3_max;
 169 } __packed;
 170
 171 /* 3945 Specific */
 172 #define EEPROM_3945_EEPROM_VERSION      (0x2f)
 173
 174 /* 4965 has two radio transmitters (and 3 radio receivers) */
 175 #define EEPROM_TX_POWER_TX_CHAINS      (2)
 176
 177 /* 4965 has room for up to 8 sets of txpower calibration data */
 178 #define EEPROM_TX_POWER_BANDS          (8)
 179
 180 /* 4965 factory calibration measures txpower gain settings for
 181  * each of 3 target output levels */
 182 #define EEPROM_TX_POWER_MEASUREMENTS   (3)
 183
 184 /* 4965 Specific */
 185 /* 4965 driver does not work with txpower calibration version < 5 */
 186 #define EEPROM_4965_TX_POWER_VERSION    (5)
 187 #define EEPROM_4965_EEPROM_VERSION      (0x2f)
 188 #define EEPROM_4965_CALIB_VERSION_OFFSET       (2*0xB6) /* 2 bytes */
 189 #define EEPROM_4965_CALIB_TXPOWER_OFFSET       (2*0xE8) /* 48  bytes */
 190 #define EEPROM_4965_BOARD_REVISION             (2*0x4F) /* 2 bytes */
 191 #define EEPROM_4965_BOARD_PBA                  (2*0x56+1) /* 9 bytes */
 192
 193 /* 5000 Specific */
 194 #define EEPROM_5000_TX_POWER_VERSION    (4)
 195 #define EEPROM_5000_EEPROM_VERSION      (0x11A)
 196
 197 /* 5000 and up calibration */
 198 #define EEPROM_CALIB_ALL        (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
 199 #define EEPROM_XTAL             ((2*0x128) | EEPROM_CALIB_ALL)
 200
 201 /* 5000 temperature */
 202 #define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL)
 203
 204 /* agn links */
 205 #define EEPROM_LINK_HOST             (2*0x64)
 206 #define EEPROM_LINK_GENERAL          (2*0x65)
 207 #define EEPROM_LINK_REGULATORY       (2*0x66)
 208 #define EEPROM_LINK_CALIBRATION      (2*0x67)
 209 #define EEPROM_LINK_PROCESS_ADJST    (2*0x68)
 210 #define EEPROM_LINK_OTHERS           (2*0x69)
 211 #define EEPROM_LINK_TXP_LIMIT        (2*0x6a)
 212 #define EEPROM_LINK_TXP_LIMIT_SIZE   (2*0x6b)
 213
 214 /* agn regulatory - indirect access */
 215 #define EEPROM_REG_BAND_1_CHANNELS       ((0x08)\
 216                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 28 bytes */
 217 #define EEPROM_REG_BAND_2_CHANNELS       ((0x26)\
 218                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 26 bytes */
 219 #define EEPROM_REG_BAND_3_CHANNELS       ((0x42)\
 220                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 24 bytes */
 221 #define EEPROM_REG_BAND_4_CHANNELS       ((0x5C)\
 222                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 22 bytes */
 223 #define EEPROM_REG_BAND_5_CHANNELS       ((0x74)\
 224                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 12 bytes */
 225 #define EEPROM_REG_BAND_24_HT40_CHANNELS  ((0x82)\
 226                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 14  bytes */
 227 #define EEPROM_REG_BAND_52_HT40_CHANNELS  ((0x92)\
 228                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 22  bytes */
 229
 230 /* 6000 regulatory - indirect access */
 231 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS  ((0x80)\
 232                 | INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 14  bytes */
 233
 234 /* 5050 Specific */
 235 #define EEPROM_5050_TX_POWER_VERSION    (4)
 236 #define EEPROM_5050_EEPROM_VERSION      (0x21E)
 237
 238 /* 1000 Specific */
 239 #define EEPROM_1000_TX_POWER_VERSION    (4)
 240 #define EEPROM_1000_EEPROM_VERSION      (0x15C)
 241
 242 /* 6x00 Specific */
 243 #define EEPROM_6000_TX_POWER_VERSION    (4)
 244 #define EEPROM_6000_EEPROM_VERSION      (0x423)
 245
 246 /* 6x50 Specific */
 247 #define EEPROM_6050_TX_POWER_VERSION    (4)
 248 #define EEPROM_6050_EEPROM_VERSION      (0x532)
 249
 250 /* 6x50g2 Specific */
 251 #define EEPROM_6050G2_TX_POWER_VERSION    (6)
 252 #define EEPROM_6050G2_EEPROM_VERSION    (0x553)
 253
 254 /* 6x00g2 Specific */
 255 #define EEPROM_6000G2_TX_POWER_VERSION    (6)
 256 #define EEPROM_6000G2_EEPROM_VERSION    (0x709)
 257
 258 /* OTP */
 259 /* lower blocks contain EEPROM image and calibration data */
 260 #define OTP_LOW_IMAGE_SIZE              (2 * 512 * sizeof(u16)) /* 2 KB */
 261 /* high blocks contain PAPD data */
 262 #define OTP_HIGH_IMAGE_SIZE_6x00        (6 * 512 * sizeof(u16)) /* 6 KB */
 263 #define OTP_HIGH_IMAGE_SIZE_1000        (0x200 * sizeof(u16)) /* 1024 bytes */
 264 #define OTP_MAX_LL_ITEMS_1000           (3)     /* OTP blocks for 1000 */
 265 #define OTP_MAX_LL_ITEMS_6x00           (4)     /* OTP blocks for 6x00 */
 266 #define OTP_MAX_LL_ITEMS_6x50           (7)     /* OTP blocks for 6x50 */
 267
 268 /* 2.4 GHz */
 269 extern const u8 iwl_eeprom_band_1[14];
 270
 271 /*
 272  * factory calibration data for one txpower level, on one channel,
 273  * measured on one of the 2 tx chains (radio transmitter and associated
 274  * antenna).  EEPROM contains:
 275  *
 276  * 1)  Temperature (degrees Celsius) of device when measurement was made.
 277  *
 278  * 2)  Gain table index used to achieve the target measurement power.
 279  *     This refers to the "well-known" gain tables (see iwl-4965-hw.h).
 280  *
 281  * 3)  Actual measured output power, in half-dBm ("34" = 17 dBm).
 282  *
 283  * 4)  RF power amplifier detector level measurement (not used).
 284  */
 285 struct iwl_eeprom_calib_measure {
 286         u8 temperature;         /* Device temperature (Celsius) */
 287         u8 gain_idx;            /* Index into gain table */
 288         u8 actual_pow;          /* Measured RF output power, half-dBm */
 289         s8 pa_det;              /* Power amp detector level (not used) */
 290 } __packed;
 291
 292
 293 /*
 294  * measurement set for one channel.  EEPROM contains:
 295  *
 296  * 1)  Channel number measured
 297  *
 298  * 2)  Measurements for each of 3 power levels for each of 2 radio transmitters
 299  *     (a.k.a. "tx chains") (6 measurements altogether)
 300  */
 301 struct iwl_eeprom_calib_ch_info {
 302         u8 ch_num;
 303         struct iwl_eeprom_calib_measure
 304                 measurements[EEPROM_TX_POWER_TX_CHAINS]
 305                         [EEPROM_TX_POWER_MEASUREMENTS];
 306 } __packed;
 307
 308 /*
 309  * txpower subband info.
 310  *
 311  * For each frequency subband, EEPROM contains the following:
 312  *
 313  * 1)  First and last channels within range of the subband.  "0" values
 314  *     indicate that this sample set is not being used.
 315  *
 316  * 2)  Sample measurement sets for 2 channels close to the range endpoints.
 317  */
 318 struct iwl_eeprom_calib_subband_info {
 319         u8 ch_from;     /* channel number of lowest channel in subband */
 320         u8 ch_to;       /* channel number of highest channel in subband */
 321         struct iwl_eeprom_calib_ch_info ch1;
 322         struct iwl_eeprom_calib_ch_info ch2;
 323 } __packed;
 324
 325
 326 /*
 327  * txpower calibration info.  EEPROM contains:
 328  *
 329  * 1)  Factory-measured saturation power levels (maximum levels at which
 330  *     tx power amplifier can output a signal without too much distortion).
 331  *     There is one level for 2.4 GHz band and one for 5 GHz band.  These
 332  *     values apply to all channels within each of the bands.
 333  *
 334  * 2)  Factory-measured power supply voltage level.  This is assumed to be
 335  *     constant (i.e. same value applies to all channels/bands) while the
 336  *     factory measurements are being made.
 337  *
 338  * 3)  Up to 8 sets of factory-measured txpower calibration values.
 339  *     These are for different frequency ranges, since txpower gain
 340  *     characteristics of the analog radio circuitry vary with frequency.
 341  *
 342  *     Not all sets need to be filled with data;
 343  *     struct iwl_eeprom_calib_subband_info contains range of channels
 344  *     (0 if unused) for each set of data.
 345  */
 346 struct iwl_eeprom_calib_info {
 347         u8 saturation_power24;  /* half-dBm (e.g. "34" = 17 dBm) */
 348         u8 saturation_power52;  /* half-dBm */
 349         __le16 voltage;         /* signed */
 350         struct iwl_eeprom_calib_subband_info
 351                 band_info[EEPROM_TX_POWER_BANDS];
 352 } __packed;
 353
 354
 355 #define ADDRESS_MSK                 0x0000FFFF
 356 #define INDIRECT_TYPE_MSK           0x000F0000
 357 #define INDIRECT_HOST               0x00010000
 358 #define INDIRECT_GENERAL            0x00020000
 359 #define INDIRECT_REGULATORY         0x00030000
 360 #define INDIRECT_CALIBRATION        0x00040000
 361 #define INDIRECT_PROCESS_ADJST      0x00050000
 362 #define INDIRECT_OTHERS             0x00060000
 363 #define INDIRECT_TXP_LIMIT          0x00070000
 364 #define INDIRECT_TXP_LIMIT_SIZE     0x00080000
 365 #define INDIRECT_ADDRESS            0x00100000
 366
 367 /* General */
 368 #define EEPROM_DEVICE_ID                    (2*0x08)    /* 2 bytes */
 369 #define EEPROM_MAC_ADDRESS                  (2*0x15)    /* 6  bytes */
 370 #define EEPROM_BOARD_REVISION               (2*0x35)    /* 2  bytes */
 371 #define EEPROM_BOARD_PBA_NUMBER             (2*0x3B+1)  /* 9  bytes */
 372 #define EEPROM_VERSION                      (2*0x44)    /* 2  bytes */
 373 #define EEPROM_SKU_CAP                      (2*0x45)    /* 2  bytes */
 374 #define EEPROM_OEM_MODE                     (2*0x46)    /* 2  bytes */
 375 #define EEPROM_WOWLAN_MODE                  (2*0x47)    /* 2  bytes */
 376 #define EEPROM_RADIO_CONFIG                 (2*0x48)    /* 2  bytes */
 377 #define EEPROM_NUM_MAC_ADDRESS              (2*0x4C)    /* 2  bytes */
 378
 379 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
 380 #define EEPROM_RF_CFG_TYPE_MSK(x)   (x & 0x3)         /* bits 0-1   */
 381 #define EEPROM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
 382 #define EEPROM_RF_CFG_DASH_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
 383 #define EEPROM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
 384 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
 385 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
 386
 387 #define EEPROM_3945_RF_CFG_TYPE_MAX  0x0
 388 #define EEPROM_4965_RF_CFG_TYPE_MAX  0x1
 389
 390 /* Radio Config for 5000 and up */
 391 #define EEPROM_RF_CONFIG_TYPE_R3x3      0x0
 392 #define EEPROM_RF_CONFIG_TYPE_R2x2      0x1
 393 #define EEPROM_RF_CONFIG_TYPE_R1x2      0x2
 394 #define EEPROM_RF_CONFIG_TYPE_MAX       0x3
 395
 396 /*
 397  * Per-channel regulatory data.
 398  *
 399  * Each channel that *might* be supported by iwl has a fixed location
 400  * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
 401  * txpower (MSB).
 402  *
 403  * Entries immediately below are for 20 MHz channel width.  HT40 (40 MHz)
 404  * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
 405  *
 406  * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 407  */
 408 #define EEPROM_REGULATORY_SKU_ID            (2*0x60)    /* 4  bytes */
 409 #define EEPROM_REGULATORY_BAND_1            (2*0x62)    /* 2  bytes */
 410 #define EEPROM_REGULATORY_BAND_1_CHANNELS   (2*0x63)    /* 28 bytes */
 411
 412 /*
 413  * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
 414  * 5.0 GHz channels 7, 8, 11, 12, 16
 415  * (4915-5080MHz) (none of these is ever supported)
 416  */
 417 #define EEPROM_REGULATORY_BAND_2            (2*0x71)    /* 2  bytes */
 418 #define EEPROM_REGULATORY_BAND_2_CHANNELS   (2*0x72)    /* 26 bytes */
 419
 420 /*
 421  * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 422  * (5170-5320MHz)
 423  */
 424 #define EEPROM_REGULATORY_BAND_3            (2*0x7F)    /* 2  bytes */
 425 #define EEPROM_REGULATORY_BAND_3_CHANNELS   (2*0x80)    /* 24 bytes */
 426
 427 /*
 428  * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 429  * (5500-5700MHz)
 430  */
 431 #define EEPROM_REGULATORY_BAND_4            (2*0x8C)    /* 2  bytes */
 432 #define EEPROM_REGULATORY_BAND_4_CHANNELS   (2*0x8D)    /* 22 bytes */
 433
 434 /*
 435  * 5.7 GHz channels 145, 149, 153, 157, 161, 165
 436  * (5725-5825MHz)
 437  */
 438 #define EEPROM_REGULATORY_BAND_5            (2*0x98)    /* 2  bytes */
 439 #define EEPROM_REGULATORY_BAND_5_CHANNELS   (2*0x99)    /* 12 bytes */
 440
 441 /*
 442  * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
 443  *
 444  * The channel listed is the center of the lower 20 MHz half of the channel.
 445  * The overall center frequency is actually 2 channels (10 MHz) above that,
 446  * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
 447  * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
 448  * and the overall HT40 channel width centers on channel 3.
 449  *
 450  * NOTE:  The RXON command uses 20 MHz channel numbers to specify the
 451  *        control channel to which to tune.  RXON also specifies whether the
 452  *        control channel is the upper or lower half of a HT40 channel.
 453  *
 454  * NOTE:  4965 does not support HT40 channels on 2.4 GHz.
 455  */
 456 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0)   /* 14 bytes */
 457
 458 /*
 459  * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
 460  * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
 461  */
 462 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8)   /* 22 bytes */
 463
 464 #define EEPROM_REGULATORY_BAND_NO_HT40                  (0)
 465
 466 struct iwl_eeprom_ops {
 467         const u32 regulatory_bands[7];
 468         int (*acquire_semaphore) (struct iwl_priv *priv);
 469         void (*release_semaphore) (struct iwl_priv *priv);
 470         u16 (*calib_version) (struct iwl_priv *priv);
 471         const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset);
 472         void (*update_enhanced_txpower) (struct iwl_priv *priv);
 473 };
 474
 475
 476 int iwl_eeprom_init(struct iwl_priv *priv);
 477 void iwl_eeprom_free(struct iwl_priv *priv);
 478 int  iwl_eeprom_check_version(struct iwl_priv *priv);
 479 int  iwl_eeprom_check_sku(struct iwl_priv *priv);
 480 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
 481 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv);
 482 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset);
 483 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
 484 int iwl_init_channel_map(struct iwl_priv *priv);
 485 void iwl_free_channel_map(struct iwl_priv *priv);
 486 const struct iwl_channel_info *iwl_get_channel_info(
 487                 const struct iwl_priv *priv,
 488                 enum ieee80211_band band, u16 channel);
 489
 490 #endif  /* __iwl_eeprom_h__ */