1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
30 /**************************************************************************
34 **************************************************************************
37 /* Loopback mode names (see LOOPBACK_MODE()) */
38 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
39 const char *efx_loopback_mode_names
[] = {
40 [LOOPBACK_NONE
] = "NONE",
41 [LOOPBACK_DATA
] = "DATAPATH",
42 [LOOPBACK_GMAC
] = "GMAC",
43 [LOOPBACK_XGMII
] = "XGMII",
44 [LOOPBACK_XGXS
] = "XGXS",
45 [LOOPBACK_XAUI
] = "XAUI",
46 [LOOPBACK_GMII
] = "GMII",
47 [LOOPBACK_SGMII
] = "SGMII",
48 [LOOPBACK_XGBR
] = "XGBR",
49 [LOOPBACK_XFI
] = "XFI",
50 [LOOPBACK_XAUI_FAR
] = "XAUI_FAR",
51 [LOOPBACK_GMII_FAR
] = "GMII_FAR",
52 [LOOPBACK_SGMII_FAR
] = "SGMII_FAR",
53 [LOOPBACK_XFI_FAR
] = "XFI_FAR",
54 [LOOPBACK_GPHY
] = "GPHY",
55 [LOOPBACK_PHYXS
] = "PHYXS",
56 [LOOPBACK_PCS
] = "PCS",
57 [LOOPBACK_PMAPMD
] = "PMA/PMD",
58 [LOOPBACK_XPORT
] = "XPORT",
59 [LOOPBACK_XGMII_WS
] = "XGMII_WS",
60 [LOOPBACK_XAUI_WS
] = "XAUI_WS",
61 [LOOPBACK_XAUI_WS_FAR
] = "XAUI_WS_FAR",
62 [LOOPBACK_XAUI_WS_NEAR
] = "XAUI_WS_NEAR",
63 [LOOPBACK_GMII_WS
] = "GMII_WS",
64 [LOOPBACK_XFI_WS
] = "XFI_WS",
65 [LOOPBACK_XFI_WS_FAR
] = "XFI_WS_FAR",
66 [LOOPBACK_PHYXS_WS
] = "PHYXS_WS",
69 /* Interrupt mode names (see INT_MODE())) */
70 const unsigned int efx_interrupt_mode_max
= EFX_INT_MODE_MAX
;
71 const char *efx_interrupt_mode_names
[] = {
72 [EFX_INT_MODE_MSIX
] = "MSI-X",
73 [EFX_INT_MODE_MSI
] = "MSI",
74 [EFX_INT_MODE_LEGACY
] = "legacy",
77 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
78 const char *efx_reset_type_names
[] = {
79 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
80 [RESET_TYPE_ALL
] = "ALL",
81 [RESET_TYPE_WORLD
] = "WORLD",
82 [RESET_TYPE_DISABLE
] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
85 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
86 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
87 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
88 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
89 [RESET_TYPE_MC_FAILURE
] = "MC_FAILURE",
92 #define EFX_MAX_MTU (9 * 1024)
94 /* RX slow fill workqueue. If memory allocation fails in the fast path,
95 * a work item is pushed onto this work queue to retry the allocation later,
96 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
97 * workqueue, there is nothing to be gained in making it per NIC
99 static struct workqueue_struct
*refill_workqueue
;
101 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
102 * queued onto this work queue. This is not a per-nic work queue, because
103 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
105 static struct workqueue_struct
*reset_workqueue
;
107 /**************************************************************************
109 * Configurable values
111 *************************************************************************/
114 * Use separate channels for TX and RX events
116 * Set this to 1 to use separate channels for TX and RX. It allows us
117 * to control interrupt affinity separately for TX and RX.
119 * This is only used in MSI-X interrupt mode
121 static unsigned int separate_tx_channels
;
122 module_param(separate_tx_channels
, uint
, 0644);
123 MODULE_PARM_DESC(separate_tx_channels
,
124 "Use separate channels for TX and RX");
126 /* This is the weight assigned to each of the (per-channel) virtual
129 static int napi_weight
= 64;
131 /* This is the time (in jiffies) between invocations of the hardware
132 * monitor, which checks for known hardware bugs and resets the
133 * hardware and driver as necessary.
135 unsigned int efx_monitor_interval
= 1 * HZ
;
137 /* This controls whether or not the driver will initialise devices
138 * with invalid MAC addresses stored in the EEPROM or flash. If true,
139 * such devices will be initialised with a random locally-generated
140 * MAC address. This allows for loading the sfc_mtd driver to
141 * reprogram the flash, even if the flash contents (including the MAC
142 * address) have previously been erased.
144 static unsigned int allow_bad_hwaddr
;
146 /* Initial interrupt moderation settings. They can be modified after
147 * module load with ethtool.
149 * The default for RX should strike a balance between increasing the
150 * round-trip latency and reducing overhead.
152 static unsigned int rx_irq_mod_usec
= 60;
154 /* Initial interrupt moderation settings. They can be modified after
155 * module load with ethtool.
157 * This default is chosen to ensure that a 10G link does not go idle
158 * while a TX queue is stopped after it has become full. A queue is
159 * restarted when it drops below half full. The time this takes (assuming
160 * worst case 3 descriptors per packet and 1024 descriptors) is
161 * 512 / 3 * 1.2 = 205 usec.
163 static unsigned int tx_irq_mod_usec
= 150;
165 /* This is the first interrupt mode to try out of:
170 static unsigned int interrupt_mode
;
172 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
173 * i.e. the number of CPUs among which we may distribute simultaneous
174 * interrupt handling.
176 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
177 * The default (0) means to assign an interrupt to each package (level II cache)
179 static unsigned int rss_cpus
;
180 module_param(rss_cpus
, uint
, 0444);
181 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
183 static int phy_flash_cfg
;
184 module_param(phy_flash_cfg
, int, 0644);
185 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
187 static unsigned irq_adapt_low_thresh
= 10000;
188 module_param(irq_adapt_low_thresh
, uint
, 0644);
189 MODULE_PARM_DESC(irq_adapt_low_thresh
,
190 "Threshold score for reducing IRQ moderation");
192 static unsigned irq_adapt_high_thresh
= 20000;
193 module_param(irq_adapt_high_thresh
, uint
, 0644);
194 MODULE_PARM_DESC(irq_adapt_high_thresh
,
195 "Threshold score for increasing IRQ moderation");
197 /**************************************************************************
199 * Utility functions and prototypes
201 *************************************************************************/
202 static void efx_remove_channel(struct efx_channel
*channel
);
203 static void efx_remove_port(struct efx_nic
*efx
);
204 static void efx_fini_napi(struct efx_nic
*efx
);
205 static void efx_fini_channels(struct efx_nic
*efx
);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 if ((efx->state == STATE_RUNNING) || \
210 (efx->state == STATE_DISABLED)) \
214 /**************************************************************************
216 * Event queue processing
218 *************************************************************************/
220 /* Process channel's event queue
222 * This function is responsible for processing the event queue of a
223 * single channel. The caller must guarantee that this function will
224 * never be concurrently called more than once on the same channel,
225 * though different channels may be being processed concurrently.
227 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
229 struct efx_nic
*efx
= channel
->efx
;
232 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
236 rx_packets
= efx_nic_process_eventq(channel
, rx_quota
);
240 /* Deliver last RX packet. */
241 if (channel
->rx_pkt
) {
242 __efx_rx_packet(channel
, channel
->rx_pkt
,
243 channel
->rx_pkt_csummed
);
244 channel
->rx_pkt
= NULL
;
247 efx_rx_strategy(channel
);
249 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
254 /* Mark channel as finished processing
256 * Note that since we will not receive further interrupts for this
257 * channel before we finish processing and call the eventq_read_ack()
258 * method, there is no need to use the interrupt hold-off timers.
260 static inline void efx_channel_processed(struct efx_channel
*channel
)
262 /* The interrupt handler for this channel may set work_pending
263 * as soon as we acknowledge the events we've seen. Make sure
264 * it's cleared before then. */
265 channel
->work_pending
= false;
268 efx_nic_eventq_read_ack(channel
);
273 * NAPI guarantees serialisation of polls of the same device, which
274 * provides the guarantee required by efx_process_channel().
276 static int efx_poll(struct napi_struct
*napi
, int budget
)
278 struct efx_channel
*channel
=
279 container_of(napi
, struct efx_channel
, napi_str
);
282 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
283 channel
->channel
, raw_smp_processor_id());
285 rx_packets
= efx_process_channel(channel
, budget
);
287 if (rx_packets
< budget
) {
288 struct efx_nic
*efx
= channel
->efx
;
290 if (channel
->used_flags
& EFX_USED_BY_RX
&&
291 efx
->irq_rx_adaptive
&&
292 unlikely(++channel
->irq_count
== 1000)) {
293 if (unlikely(channel
->irq_mod_score
<
294 irq_adapt_low_thresh
)) {
295 if (channel
->irq_moderation
> 1) {
296 channel
->irq_moderation
-= 1;
297 efx
->type
->push_irq_moderation(channel
);
299 } else if (unlikely(channel
->irq_mod_score
>
300 irq_adapt_high_thresh
)) {
301 if (channel
->irq_moderation
<
302 efx
->irq_rx_moderation
) {
303 channel
->irq_moderation
+= 1;
304 efx
->type
->push_irq_moderation(channel
);
307 channel
->irq_count
= 0;
308 channel
->irq_mod_score
= 0;
311 /* There is no race here; although napi_disable() will
312 * only wait for napi_complete(), this isn't a problem
313 * since efx_channel_processed() will have no effect if
314 * interrupts have already been disabled.
317 efx_channel_processed(channel
);
323 /* Process the eventq of the specified channel immediately on this CPU
325 * Disable hardware generated interrupts, wait for any existing
326 * processing to finish, then directly poll (and ack ) the eventq.
327 * Finally reenable NAPI and interrupts.
329 * Since we are touching interrupts the caller should hold the suspend lock
331 void efx_process_channel_now(struct efx_channel
*channel
)
333 struct efx_nic
*efx
= channel
->efx
;
335 BUG_ON(!channel
->used_flags
);
336 BUG_ON(!channel
->enabled
);
338 /* Disable interrupts and wait for ISRs to complete */
339 efx_nic_disable_interrupts(efx
);
341 synchronize_irq(efx
->legacy_irq
);
343 synchronize_irq(channel
->irq
);
345 /* Wait for any NAPI processing to complete */
346 napi_disable(&channel
->napi_str
);
348 /* Poll the channel */
349 efx_process_channel(channel
, EFX_EVQ_SIZE
);
351 /* Ack the eventq. This may cause an interrupt to be generated
352 * when they are reenabled */
353 efx_channel_processed(channel
);
355 napi_enable(&channel
->napi_str
);
356 efx_nic_enable_interrupts(efx
);
359 /* Create event queue
360 * Event queue memory allocations are done only once. If the channel
361 * is reset, the memory buffer will be reused; this guards against
362 * errors during channel reset and also simplifies interrupt handling.
364 static int efx_probe_eventq(struct efx_channel
*channel
)
366 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
368 return efx_nic_probe_eventq(channel
);
371 /* Prepare channel's event queue */
372 static void efx_init_eventq(struct efx_channel
*channel
)
374 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
376 channel
->eventq_read_ptr
= 0;
378 efx_nic_init_eventq(channel
);
381 static void efx_fini_eventq(struct efx_channel
*channel
)
383 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
385 efx_nic_fini_eventq(channel
);
388 static void efx_remove_eventq(struct efx_channel
*channel
)
390 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
392 efx_nic_remove_eventq(channel
);
395 /**************************************************************************
399 *************************************************************************/
401 static int efx_probe_channel(struct efx_channel
*channel
)
403 struct efx_tx_queue
*tx_queue
;
404 struct efx_rx_queue
*rx_queue
;
407 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
409 rc
= efx_probe_eventq(channel
);
413 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
414 rc
= efx_probe_tx_queue(tx_queue
);
419 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
420 rc
= efx_probe_rx_queue(rx_queue
);
425 channel
->n_rx_frm_trunc
= 0;
430 efx_for_each_channel_rx_queue(rx_queue
, channel
)
431 efx_remove_rx_queue(rx_queue
);
433 efx_for_each_channel_tx_queue(tx_queue
, channel
)
434 efx_remove_tx_queue(tx_queue
);
440 static void efx_set_channel_names(struct efx_nic
*efx
)
442 struct efx_channel
*channel
;
443 const char *type
= "";
446 efx_for_each_channel(channel
, efx
) {
447 number
= channel
->channel
;
448 if (efx
->n_channels
> efx
->n_rx_queues
) {
449 if (channel
->channel
< efx
->n_rx_queues
) {
453 number
-= efx
->n_rx_queues
;
456 snprintf(channel
->name
, sizeof(channel
->name
),
457 "%s%s-%d", efx
->name
, type
, number
);
461 /* Channels are shutdown and reinitialised whilst the NIC is running
462 * to propagate configuration changes (mtu, checksum offload), or
463 * to clear hardware error conditions
465 static void efx_init_channels(struct efx_nic
*efx
)
467 struct efx_tx_queue
*tx_queue
;
468 struct efx_rx_queue
*rx_queue
;
469 struct efx_channel
*channel
;
471 /* Calculate the rx buffer allocation parameters required to
472 * support the current MTU, including padding for header
473 * alignment and overruns.
475 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
476 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
477 efx
->type
->rx_buffer_padding
);
478 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
480 /* Initialise the channels */
481 efx_for_each_channel(channel
, efx
) {
482 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
484 efx_init_eventq(channel
);
486 efx_for_each_channel_tx_queue(tx_queue
, channel
)
487 efx_init_tx_queue(tx_queue
);
489 /* The rx buffer allocation strategy is MTU dependent */
490 efx_rx_strategy(channel
);
492 efx_for_each_channel_rx_queue(rx_queue
, channel
)
493 efx_init_rx_queue(rx_queue
);
495 WARN_ON(channel
->rx_pkt
!= NULL
);
496 efx_rx_strategy(channel
);
500 /* This enables event queue processing and packet transmission.
502 * Note that this function is not allowed to fail, since that would
503 * introduce too much complexity into the suspend/resume path.
505 static void efx_start_channel(struct efx_channel
*channel
)
507 struct efx_rx_queue
*rx_queue
;
509 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
511 /* The interrupt handler for this channel may set work_pending
512 * as soon as we enable it. Make sure it's cleared before
513 * then. Similarly, make sure it sees the enabled flag set. */
514 channel
->work_pending
= false;
515 channel
->enabled
= true;
518 napi_enable(&channel
->napi_str
);
520 /* Load up RX descriptors */
521 efx_for_each_channel_rx_queue(rx_queue
, channel
)
522 efx_fast_push_rx_descriptors(rx_queue
);
525 /* This disables event queue processing and packet transmission.
526 * This function does not guarantee that all queue processing
527 * (e.g. RX refill) is complete.
529 static void efx_stop_channel(struct efx_channel
*channel
)
531 struct efx_rx_queue
*rx_queue
;
533 if (!channel
->enabled
)
536 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
538 channel
->enabled
= false;
539 napi_disable(&channel
->napi_str
);
541 /* Ensure that any worker threads have exited or will be no-ops */
542 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
543 spin_lock_bh(&rx_queue
->add_lock
);
544 spin_unlock_bh(&rx_queue
->add_lock
);
548 static void efx_fini_channels(struct efx_nic
*efx
)
550 struct efx_channel
*channel
;
551 struct efx_tx_queue
*tx_queue
;
552 struct efx_rx_queue
*rx_queue
;
555 EFX_ASSERT_RESET_SERIALISED(efx
);
556 BUG_ON(efx
->port_enabled
);
558 rc
= efx_nic_flush_queues(efx
);
560 EFX_ERR(efx
, "failed to flush queues\n");
562 EFX_LOG(efx
, "successfully flushed all queues\n");
564 efx_for_each_channel(channel
, efx
) {
565 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
567 efx_for_each_channel_rx_queue(rx_queue
, channel
)
568 efx_fini_rx_queue(rx_queue
);
569 efx_for_each_channel_tx_queue(tx_queue
, channel
)
570 efx_fini_tx_queue(tx_queue
);
571 efx_fini_eventq(channel
);
575 static void efx_remove_channel(struct efx_channel
*channel
)
577 struct efx_tx_queue
*tx_queue
;
578 struct efx_rx_queue
*rx_queue
;
580 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
582 efx_for_each_channel_rx_queue(rx_queue
, channel
)
583 efx_remove_rx_queue(rx_queue
);
584 efx_for_each_channel_tx_queue(tx_queue
, channel
)
585 efx_remove_tx_queue(tx_queue
);
586 efx_remove_eventq(channel
);
588 channel
->used_flags
= 0;
591 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
593 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
596 /**************************************************************************
600 **************************************************************************/
602 /* This ensures that the kernel is kept informed (via
603 * netif_carrier_on/off) of the link status, and also maintains the
604 * link status's stop on the port's TX queue.
606 void efx_link_status_changed(struct efx_nic
*efx
)
608 struct efx_link_state
*link_state
= &efx
->link_state
;
610 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
611 * that no events are triggered between unregister_netdev() and the
612 * driver unloading. A more general condition is that NETDEV_CHANGE
613 * can only be generated between NETDEV_UP and NETDEV_DOWN */
614 if (!netif_running(efx
->net_dev
))
617 if (efx
->port_inhibited
) {
618 netif_carrier_off(efx
->net_dev
);
622 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
623 efx
->n_link_state_changes
++;
626 netif_carrier_on(efx
->net_dev
);
628 netif_carrier_off(efx
->net_dev
);
631 /* Status message for kernel log */
632 if (link_state
->up
) {
633 EFX_INFO(efx
, "link up at %uMbps %s-duplex (MTU %d)%s\n",
634 link_state
->speed
, link_state
->fd
? "full" : "half",
636 (efx
->promiscuous
? " [PROMISC]" : ""));
638 EFX_INFO(efx
, "link down\n");
643 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
645 efx
->link_advertising
= advertising
;
647 if (advertising
& ADVERTISED_Pause
)
648 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
650 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
651 if (advertising
& ADVERTISED_Asym_Pause
)
652 efx
->wanted_fc
^= EFX_FC_TX
;
656 void efx_link_set_wanted_fc(struct efx_nic
*efx
, enum efx_fc_type wanted_fc
)
658 efx
->wanted_fc
= wanted_fc
;
659 if (efx
->link_advertising
) {
660 if (wanted_fc
& EFX_FC_RX
)
661 efx
->link_advertising
|= (ADVERTISED_Pause
|
662 ADVERTISED_Asym_Pause
);
664 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
665 ADVERTISED_Asym_Pause
);
666 if (wanted_fc
& EFX_FC_TX
)
667 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
671 static void efx_fini_port(struct efx_nic
*efx
);
673 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
674 * the MAC appropriately. All other PHY configuration changes are pushed
675 * through phy_op->set_settings(), and pushed asynchronously to the MAC
676 * through efx_monitor().
678 * Callers must hold the mac_lock
680 int __efx_reconfigure_port(struct efx_nic
*efx
)
682 enum efx_phy_mode phy_mode
;
685 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
687 /* Serialise the promiscuous flag with efx_set_multicast_list. */
688 if (efx_dev_registered(efx
)) {
689 netif_addr_lock_bh(efx
->net_dev
);
690 netif_addr_unlock_bh(efx
->net_dev
);
693 /* Disable PHY transmit in mac level loopbacks */
694 phy_mode
= efx
->phy_mode
;
695 if (LOOPBACK_INTERNAL(efx
))
696 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
698 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
700 rc
= efx
->type
->reconfigure_port(efx
);
703 efx
->phy_mode
= phy_mode
;
708 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
710 int efx_reconfigure_port(struct efx_nic
*efx
)
714 EFX_ASSERT_RESET_SERIALISED(efx
);
716 mutex_lock(&efx
->mac_lock
);
717 rc
= __efx_reconfigure_port(efx
);
718 mutex_unlock(&efx
->mac_lock
);
723 /* Asynchronous work item for changing MAC promiscuity and multicast
724 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
726 static void efx_mac_work(struct work_struct
*data
)
728 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
730 mutex_lock(&efx
->mac_lock
);
731 if (efx
->port_enabled
) {
732 efx
->type
->push_multicast_hash(efx
);
733 efx
->mac_op
->reconfigure(efx
);
735 mutex_unlock(&efx
->mac_lock
);
738 static int efx_probe_port(struct efx_nic
*efx
)
742 EFX_LOG(efx
, "create port\n");
745 efx
->phy_mode
= PHY_MODE_SPECIAL
;
747 /* Connect up MAC/PHY operations table */
748 rc
= efx
->type
->probe_port(efx
);
752 /* Sanity check MAC address */
753 if (is_valid_ether_addr(efx
->mac_address
)) {
754 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
756 EFX_ERR(efx
, "invalid MAC address %pM\n",
758 if (!allow_bad_hwaddr
) {
762 random_ether_addr(efx
->net_dev
->dev_addr
);
763 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
764 efx
->net_dev
->dev_addr
);
770 efx_remove_port(efx
);
774 static int efx_init_port(struct efx_nic
*efx
)
778 EFX_LOG(efx
, "init port\n");
780 mutex_lock(&efx
->mac_lock
);
782 rc
= efx
->phy_op
->init(efx
);
786 efx
->port_initialized
= true;
788 /* Reconfigure the MAC before creating dma queues (required for
789 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
790 efx
->mac_op
->reconfigure(efx
);
792 /* Ensure the PHY advertises the correct flow control settings */
793 rc
= efx
->phy_op
->reconfigure(efx
);
797 mutex_unlock(&efx
->mac_lock
);
801 efx
->phy_op
->fini(efx
);
803 mutex_unlock(&efx
->mac_lock
);
807 static void efx_start_port(struct efx_nic
*efx
)
809 EFX_LOG(efx
, "start port\n");
810 BUG_ON(efx
->port_enabled
);
812 mutex_lock(&efx
->mac_lock
);
813 efx
->port_enabled
= true;
815 /* efx_mac_work() might have been scheduled after efx_stop_port(),
816 * and then cancelled by efx_flush_all() */
817 efx
->type
->push_multicast_hash(efx
);
818 efx
->mac_op
->reconfigure(efx
);
820 mutex_unlock(&efx
->mac_lock
);
823 /* Prevent efx_mac_work() and efx_monitor() from working */
824 static void efx_stop_port(struct efx_nic
*efx
)
826 EFX_LOG(efx
, "stop port\n");
828 mutex_lock(&efx
->mac_lock
);
829 efx
->port_enabled
= false;
830 mutex_unlock(&efx
->mac_lock
);
832 /* Serialise against efx_set_multicast_list() */
833 if (efx_dev_registered(efx
)) {
834 netif_addr_lock_bh(efx
->net_dev
);
835 netif_addr_unlock_bh(efx
->net_dev
);
839 static void efx_fini_port(struct efx_nic
*efx
)
841 EFX_LOG(efx
, "shut down port\n");
843 if (!efx
->port_initialized
)
846 efx
->phy_op
->fini(efx
);
847 efx
->port_initialized
= false;
849 efx
->link_state
.up
= false;
850 efx_link_status_changed(efx
);
853 static void efx_remove_port(struct efx_nic
*efx
)
855 EFX_LOG(efx
, "destroying port\n");
857 efx
->type
->remove_port(efx
);
860 /**************************************************************************
864 **************************************************************************/
866 /* This configures the PCI device to enable I/O and DMA. */
867 static int efx_init_io(struct efx_nic
*efx
)
869 struct pci_dev
*pci_dev
= efx
->pci_dev
;
870 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
873 EFX_LOG(efx
, "initialising I/O\n");
875 rc
= pci_enable_device(pci_dev
);
877 EFX_ERR(efx
, "failed to enable PCI device\n");
881 pci_set_master(pci_dev
);
883 /* Set the PCI DMA mask. Try all possibilities from our
884 * genuine mask down to 32 bits, because some architectures
885 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
886 * masks event though they reject 46 bit masks.
888 while (dma_mask
> 0x7fffffffUL
) {
889 if (pci_dma_supported(pci_dev
, dma_mask
) &&
890 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
895 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
898 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
899 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
901 /* pci_set_consistent_dma_mask() is not *allowed* to
902 * fail with a mask that pci_set_dma_mask() accepted,
903 * but just in case...
905 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
909 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
910 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
912 EFX_ERR(efx
, "request for memory BAR failed\n");
916 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
917 efx
->type
->mem_map_size
);
919 EFX_ERR(efx
, "could not map memory BAR at %llx+%x\n",
920 (unsigned long long)efx
->membase_phys
,
921 efx
->type
->mem_map_size
);
925 EFX_LOG(efx
, "memory BAR at %llx+%x (virtual %p)\n",
926 (unsigned long long)efx
->membase_phys
,
927 efx
->type
->mem_map_size
, efx
->membase
);
932 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
934 efx
->membase_phys
= 0;
936 pci_disable_device(efx
->pci_dev
);
941 static void efx_fini_io(struct efx_nic
*efx
)
943 EFX_LOG(efx
, "shutting down I/O\n");
946 iounmap(efx
->membase
);
950 if (efx
->membase_phys
) {
951 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
952 efx
->membase_phys
= 0;
955 pci_disable_device(efx
->pci_dev
);
958 /* Get number of RX queues wanted. Return number of online CPU
959 * packages in the expectation that an IRQ balancer will spread
960 * interrupts across them. */
961 static int efx_wanted_rx_queues(void)
963 cpumask_var_t core_mask
;
967 if (unlikely(!zalloc_cpumask_var(&core_mask
, GFP_KERNEL
))) {
969 "sfc: RSS disabled due to allocation failure\n");
974 for_each_online_cpu(cpu
) {
975 if (!cpumask_test_cpu(cpu
, core_mask
)) {
977 cpumask_or(core_mask
, core_mask
,
978 topology_core_cpumask(cpu
));
982 free_cpumask_var(core_mask
);
986 /* Probe the number and type of interrupts we are able to obtain, and
987 * the resulting numbers of channels and RX queues.
989 static void efx_probe_interrupts(struct efx_nic
*efx
)
992 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
995 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
996 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
1000 /* We want one RX queue and interrupt per CPU package
1001 * (or as specified by the rss_cpus module parameter).
1002 * We will need one channel per interrupt.
1004 rx_queues
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
1005 wanted_ints
= rx_queues
+ (separate_tx_channels
? 1 : 0);
1006 wanted_ints
= min(wanted_ints
, max_channels
);
1008 for (i
= 0; i
< wanted_ints
; i
++)
1009 xentries
[i
].entry
= i
;
1010 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, wanted_ints
);
1012 EFX_ERR(efx
, "WARNING: Insufficient MSI-X vectors"
1013 " available (%d < %d).\n", rc
, wanted_ints
);
1014 EFX_ERR(efx
, "WARNING: Performance may be reduced.\n");
1015 EFX_BUG_ON_PARANOID(rc
>= wanted_ints
);
1017 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1022 efx
->n_rx_queues
= min(rx_queues
, wanted_ints
);
1023 efx
->n_channels
= wanted_ints
;
1024 for (i
= 0; i
< wanted_ints
; i
++)
1025 efx
->channel
[i
].irq
= xentries
[i
].vector
;
1027 /* Fall back to single channel MSI */
1028 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1029 EFX_ERR(efx
, "could not enable MSI-X\n");
1033 /* Try single interrupt MSI */
1034 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1035 efx
->n_rx_queues
= 1;
1036 efx
->n_channels
= 1;
1037 rc
= pci_enable_msi(efx
->pci_dev
);
1039 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
1041 EFX_ERR(efx
, "could not enable MSI\n");
1042 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1046 /* Assume legacy interrupts */
1047 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1048 efx
->n_rx_queues
= 1;
1049 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1050 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1054 static void efx_remove_interrupts(struct efx_nic
*efx
)
1056 struct efx_channel
*channel
;
1058 /* Remove MSI/MSI-X interrupts */
1059 efx_for_each_channel(channel
, efx
)
1061 pci_disable_msi(efx
->pci_dev
);
1062 pci_disable_msix(efx
->pci_dev
);
1064 /* Remove legacy interrupt */
1065 efx
->legacy_irq
= 0;
1068 static void efx_set_channels(struct efx_nic
*efx
)
1070 struct efx_tx_queue
*tx_queue
;
1071 struct efx_rx_queue
*rx_queue
;
1073 efx_for_each_tx_queue(tx_queue
, efx
) {
1074 if (separate_tx_channels
)
1075 tx_queue
->channel
= &efx
->channel
[efx
->n_channels
-1];
1077 tx_queue
->channel
= &efx
->channel
[0];
1078 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
1081 efx_for_each_rx_queue(rx_queue
, efx
) {
1082 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
1083 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
1087 static int efx_probe_nic(struct efx_nic
*efx
)
1091 EFX_LOG(efx
, "creating NIC\n");
1093 /* Carry out hardware-type specific initialisation */
1094 rc
= efx
->type
->probe(efx
);
1098 /* Determine the number of channels and RX queues by trying to hook
1099 * in MSI-X interrupts. */
1100 efx_probe_interrupts(efx
);
1102 efx_set_channels(efx
);
1104 /* Initialise the interrupt moderation settings */
1105 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true);
1110 static void efx_remove_nic(struct efx_nic
*efx
)
1112 EFX_LOG(efx
, "destroying NIC\n");
1114 efx_remove_interrupts(efx
);
1115 efx
->type
->remove(efx
);
1118 /**************************************************************************
1120 * NIC startup/shutdown
1122 *************************************************************************/
1124 static int efx_probe_all(struct efx_nic
*efx
)
1126 struct efx_channel
*channel
;
1130 rc
= efx_probe_nic(efx
);
1132 EFX_ERR(efx
, "failed to create NIC\n");
1137 rc
= efx_probe_port(efx
);
1139 EFX_ERR(efx
, "failed to create port\n");
1143 /* Create channels */
1144 efx_for_each_channel(channel
, efx
) {
1145 rc
= efx_probe_channel(channel
);
1147 EFX_ERR(efx
, "failed to create channel %d\n",
1152 efx_set_channel_names(efx
);
1157 efx_for_each_channel(channel
, efx
)
1158 efx_remove_channel(channel
);
1159 efx_remove_port(efx
);
1161 efx_remove_nic(efx
);
1166 /* Called after previous invocation(s) of efx_stop_all, restarts the
1167 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1168 * and ensures that the port is scheduled to be reconfigured.
1169 * This function is safe to call multiple times when the NIC is in any
1171 static void efx_start_all(struct efx_nic
*efx
)
1173 struct efx_channel
*channel
;
1175 EFX_ASSERT_RESET_SERIALISED(efx
);
1177 /* Check that it is appropriate to restart the interface. All
1178 * of these flags are safe to read under just the rtnl lock */
1179 if (efx
->port_enabled
)
1181 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1183 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1186 /* Mark the port as enabled so port reconfigurations can start, then
1187 * restart the transmit interface early so the watchdog timer stops */
1188 efx_start_port(efx
);
1189 if (efx_dev_registered(efx
))
1190 efx_wake_queue(efx
);
1192 efx_for_each_channel(channel
, efx
)
1193 efx_start_channel(channel
);
1195 efx_nic_enable_interrupts(efx
);
1197 /* Switch to event based MCDI completions after enabling interrupts.
1198 * If a reset has been scheduled, then we need to stay in polled mode.
1199 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1200 * reset_pending [modified from an atomic context], we instead guarantee
1201 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1202 efx_mcdi_mode_event(efx
);
1203 if (efx
->reset_pending
!= RESET_TYPE_NONE
)
1204 efx_mcdi_mode_poll(efx
);
1206 /* Start the hardware monitor if there is one. Otherwise (we're link
1207 * event driven), we have to poll the PHY because after an event queue
1208 * flush, we could have a missed a link state change */
1209 if (efx
->type
->monitor
!= NULL
) {
1210 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1211 efx_monitor_interval
);
1213 mutex_lock(&efx
->mac_lock
);
1214 if (efx
->phy_op
->poll(efx
))
1215 efx_link_status_changed(efx
);
1216 mutex_unlock(&efx
->mac_lock
);
1219 efx
->type
->start_stats(efx
);
1222 /* Flush all delayed work. Should only be called when no more delayed work
1223 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1224 * since we're holding the rtnl_lock at this point. */
1225 static void efx_flush_all(struct efx_nic
*efx
)
1227 struct efx_rx_queue
*rx_queue
;
1229 /* Make sure the hardware monitor is stopped */
1230 cancel_delayed_work_sync(&efx
->monitor_work
);
1232 /* Ensure that all RX slow refills are complete. */
1233 efx_for_each_rx_queue(rx_queue
, efx
)
1234 cancel_delayed_work_sync(&rx_queue
->work
);
1236 /* Stop scheduled port reconfigurations */
1237 cancel_work_sync(&efx
->mac_work
);
1240 /* Quiesce hardware and software without bringing the link down.
1241 * Safe to call multiple times, when the nic and interface is in any
1242 * state. The caller is guaranteed to subsequently be in a position
1243 * to modify any hardware and software state they see fit without
1245 static void efx_stop_all(struct efx_nic
*efx
)
1247 struct efx_channel
*channel
;
1249 EFX_ASSERT_RESET_SERIALISED(efx
);
1251 /* port_enabled can be read safely under the rtnl lock */
1252 if (!efx
->port_enabled
)
1255 efx
->type
->stop_stats(efx
);
1257 /* Switch to MCDI polling on Siena before disabling interrupts */
1258 efx_mcdi_mode_poll(efx
);
1260 /* Disable interrupts and wait for ISR to complete */
1261 efx_nic_disable_interrupts(efx
);
1262 if (efx
->legacy_irq
)
1263 synchronize_irq(efx
->legacy_irq
);
1264 efx_for_each_channel(channel
, efx
) {
1266 synchronize_irq(channel
->irq
);
1269 /* Stop all NAPI processing and synchronous rx refills */
1270 efx_for_each_channel(channel
, efx
)
1271 efx_stop_channel(channel
);
1273 /* Stop all asynchronous port reconfigurations. Since all
1274 * event processing has already been stopped, there is no
1275 * window to loose phy events */
1278 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1281 /* Stop the kernel transmit interface late, so the watchdog
1282 * timer isn't ticking over the flush */
1283 if (efx_dev_registered(efx
)) {
1284 efx_stop_queue(efx
);
1285 netif_tx_lock_bh(efx
->net_dev
);
1286 netif_tx_unlock_bh(efx
->net_dev
);
1290 static void efx_remove_all(struct efx_nic
*efx
)
1292 struct efx_channel
*channel
;
1294 efx_for_each_channel(channel
, efx
)
1295 efx_remove_channel(channel
);
1296 efx_remove_port(efx
);
1297 efx_remove_nic(efx
);
1300 /**************************************************************************
1302 * Interrupt moderation
1304 **************************************************************************/
1306 static unsigned irq_mod_ticks(int usecs
, int resolution
)
1309 return 0; /* cannot receive interrupts ahead of time :-) */
1310 if (usecs
< resolution
)
1311 return 1; /* never round down to 0 */
1312 return usecs
/ resolution
;
1315 /* Set interrupt moderation parameters */
1316 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
,
1319 struct efx_tx_queue
*tx_queue
;
1320 struct efx_rx_queue
*rx_queue
;
1321 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1322 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1324 EFX_ASSERT_RESET_SERIALISED(efx
);
1326 efx_for_each_tx_queue(tx_queue
, efx
)
1327 tx_queue
->channel
->irq_moderation
= tx_ticks
;
1329 efx
->irq_rx_adaptive
= rx_adaptive
;
1330 efx
->irq_rx_moderation
= rx_ticks
;
1331 efx_for_each_rx_queue(rx_queue
, efx
)
1332 rx_queue
->channel
->irq_moderation
= rx_ticks
;
1335 /**************************************************************************
1339 **************************************************************************/
1341 /* Run periodically off the general workqueue. Serialised against
1342 * efx_reconfigure_port via the mac_lock */
1343 static void efx_monitor(struct work_struct
*data
)
1345 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1348 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1349 raw_smp_processor_id());
1350 BUG_ON(efx
->type
->monitor
== NULL
);
1352 /* If the mac_lock is already held then it is likely a port
1353 * reconfiguration is already in place, which will likely do
1354 * most of the work of check_hw() anyway. */
1355 if (!mutex_trylock(&efx
->mac_lock
))
1357 if (!efx
->port_enabled
)
1359 efx
->type
->monitor(efx
);
1362 mutex_unlock(&efx
->mac_lock
);
1364 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1365 efx_monitor_interval
);
1368 /**************************************************************************
1372 *************************************************************************/
1375 * Context: process, rtnl_lock() held.
1377 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1379 struct efx_nic
*efx
= netdev_priv(net_dev
);
1380 struct mii_ioctl_data
*data
= if_mii(ifr
);
1382 EFX_ASSERT_RESET_SERIALISED(efx
);
1384 /* Convert phy_id from older PRTAD/DEVAD format */
1385 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1386 (data
->phy_id
& 0xfc00) == 0x0400)
1387 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1389 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1392 /**************************************************************************
1396 **************************************************************************/
1398 static int efx_init_napi(struct efx_nic
*efx
)
1400 struct efx_channel
*channel
;
1402 efx_for_each_channel(channel
, efx
) {
1403 channel
->napi_dev
= efx
->net_dev
;
1404 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1405 efx_poll
, napi_weight
);
1410 static void efx_fini_napi(struct efx_nic
*efx
)
1412 struct efx_channel
*channel
;
1414 efx_for_each_channel(channel
, efx
) {
1415 if (channel
->napi_dev
)
1416 netif_napi_del(&channel
->napi_str
);
1417 channel
->napi_dev
= NULL
;
1421 /**************************************************************************
1423 * Kernel netpoll interface
1425 *************************************************************************/
1427 #ifdef CONFIG_NET_POLL_CONTROLLER
1429 /* Although in the common case interrupts will be disabled, this is not
1430 * guaranteed. However, all our work happens inside the NAPI callback,
1431 * so no locking is required.
1433 static void efx_netpoll(struct net_device
*net_dev
)
1435 struct efx_nic
*efx
= netdev_priv(net_dev
);
1436 struct efx_channel
*channel
;
1438 efx_for_each_channel(channel
, efx
)
1439 efx_schedule_channel(channel
);
1444 /**************************************************************************
1446 * Kernel net device interface
1448 *************************************************************************/
1450 /* Context: process, rtnl_lock() held. */
1451 static int efx_net_open(struct net_device
*net_dev
)
1453 struct efx_nic
*efx
= netdev_priv(net_dev
);
1454 EFX_ASSERT_RESET_SERIALISED(efx
);
1456 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1457 raw_smp_processor_id());
1459 if (efx
->state
== STATE_DISABLED
)
1461 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1463 if (efx_mcdi_poll_reboot(efx
) && efx_reset(efx
, RESET_TYPE_ALL
))
1466 /* Notify the kernel of the link state polled during driver load,
1467 * before the monitor starts running */
1468 efx_link_status_changed(efx
);
1474 /* Context: process, rtnl_lock() held.
1475 * Note that the kernel will ignore our return code; this method
1476 * should really be a void.
1478 static int efx_net_stop(struct net_device
*net_dev
)
1480 struct efx_nic
*efx
= netdev_priv(net_dev
);
1482 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1483 raw_smp_processor_id());
1485 if (efx
->state
!= STATE_DISABLED
) {
1486 /* Stop the device and flush all the channels */
1488 efx_fini_channels(efx
);
1489 efx_init_channels(efx
);
1495 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1496 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1498 struct efx_nic
*efx
= netdev_priv(net_dev
);
1499 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1500 struct net_device_stats
*stats
= &net_dev
->stats
;
1502 spin_lock_bh(&efx
->stats_lock
);
1503 efx
->type
->update_stats(efx
);
1504 spin_unlock_bh(&efx
->stats_lock
);
1506 stats
->rx_packets
= mac_stats
->rx_packets
;
1507 stats
->tx_packets
= mac_stats
->tx_packets
;
1508 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1509 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1510 stats
->multicast
= mac_stats
->rx_multicast
;
1511 stats
->collisions
= mac_stats
->tx_collision
;
1512 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1513 mac_stats
->rx_length_error
);
1514 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1515 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1516 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1517 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1518 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1519 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1521 stats
->rx_errors
= (stats
->rx_length_errors
+
1522 stats
->rx_over_errors
+
1523 stats
->rx_crc_errors
+
1524 stats
->rx_frame_errors
+
1525 stats
->rx_fifo_errors
+
1526 stats
->rx_missed_errors
+
1527 mac_stats
->rx_symbol_error
);
1528 stats
->tx_errors
= (stats
->tx_window_errors
+
1534 /* Context: netif_tx_lock held, BHs disabled. */
1535 static void efx_watchdog(struct net_device
*net_dev
)
1537 struct efx_nic
*efx
= netdev_priv(net_dev
);
1539 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d:"
1540 " resetting channels\n",
1541 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
);
1543 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1547 /* Context: process, rtnl_lock() held. */
1548 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1550 struct efx_nic
*efx
= netdev_priv(net_dev
);
1553 EFX_ASSERT_RESET_SERIALISED(efx
);
1555 if (new_mtu
> EFX_MAX_MTU
)
1560 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1562 efx_fini_channels(efx
);
1564 mutex_lock(&efx
->mac_lock
);
1565 /* Reconfigure the MAC before enabling the dma queues so that
1566 * the RX buffers don't overflow */
1567 net_dev
->mtu
= new_mtu
;
1568 efx
->mac_op
->reconfigure(efx
);
1569 mutex_unlock(&efx
->mac_lock
);
1571 efx_init_channels(efx
);
1577 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1579 struct efx_nic
*efx
= netdev_priv(net_dev
);
1580 struct sockaddr
*addr
= data
;
1581 char *new_addr
= addr
->sa_data
;
1583 EFX_ASSERT_RESET_SERIALISED(efx
);
1585 if (!is_valid_ether_addr(new_addr
)) {
1586 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1591 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1593 /* Reconfigure the MAC */
1594 mutex_lock(&efx
->mac_lock
);
1595 efx
->mac_op
->reconfigure(efx
);
1596 mutex_unlock(&efx
->mac_lock
);
1601 /* Context: netif_addr_lock held, BHs disabled. */
1602 static void efx_set_multicast_list(struct net_device
*net_dev
)
1604 struct efx_nic
*efx
= netdev_priv(net_dev
);
1605 struct netdev_hw_addr
*ha
;
1606 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1610 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1612 /* Build multicast hash table */
1613 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1614 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1616 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1617 netdev_for_each_mc_addr(ha
, net_dev
) {
1618 crc
= ether_crc_le(ETH_ALEN
, ha
->addr
);
1619 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1620 set_bit_le(bit
, mc_hash
->byte
);
1623 /* Broadcast packets go through the multicast hash filter.
1624 * ether_crc_le() of the broadcast address is 0xbe2612ff
1625 * so we always add bit 0xff to the mask.
1627 set_bit_le(0xff, mc_hash
->byte
);
1630 if (efx
->port_enabled
)
1631 queue_work(efx
->workqueue
, &efx
->mac_work
);
1632 /* Otherwise efx_start_port() will do this */
1635 static const struct net_device_ops efx_netdev_ops
= {
1636 .ndo_open
= efx_net_open
,
1637 .ndo_stop
= efx_net_stop
,
1638 .ndo_get_stats
= efx_net_stats
,
1639 .ndo_tx_timeout
= efx_watchdog
,
1640 .ndo_start_xmit
= efx_hard_start_xmit
,
1641 .ndo_validate_addr
= eth_validate_addr
,
1642 .ndo_do_ioctl
= efx_ioctl
,
1643 .ndo_change_mtu
= efx_change_mtu
,
1644 .ndo_set_mac_address
= efx_set_mac_address
,
1645 .ndo_set_multicast_list
= efx_set_multicast_list
,
1646 #ifdef CONFIG_NET_POLL_CONTROLLER
1647 .ndo_poll_controller
= efx_netpoll
,
1651 static void efx_update_name(struct efx_nic
*efx
)
1653 strcpy(efx
->name
, efx
->net_dev
->name
);
1654 efx_mtd_rename(efx
);
1655 efx_set_channel_names(efx
);
1658 static int efx_netdev_event(struct notifier_block
*this,
1659 unsigned long event
, void *ptr
)
1661 struct net_device
*net_dev
= ptr
;
1663 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1664 event
== NETDEV_CHANGENAME
)
1665 efx_update_name(netdev_priv(net_dev
));
1670 static struct notifier_block efx_netdev_notifier
= {
1671 .notifier_call
= efx_netdev_event
,
1675 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1677 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1678 return sprintf(buf
, "%d\n", efx
->phy_type
);
1680 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1682 static int efx_register_netdev(struct efx_nic
*efx
)
1684 struct net_device
*net_dev
= efx
->net_dev
;
1687 net_dev
->watchdog_timeo
= 5 * HZ
;
1688 net_dev
->irq
= efx
->pci_dev
->irq
;
1689 net_dev
->netdev_ops
= &efx_netdev_ops
;
1690 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1691 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1693 /* Clear MAC statistics */
1694 efx
->mac_op
->update_stats(efx
);
1695 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1699 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1702 efx_update_name(efx
);
1704 rc
= register_netdevice(net_dev
);
1708 /* Always start with carrier off; PHY events will detect the link */
1709 netif_carrier_off(efx
->net_dev
);
1713 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1715 EFX_ERR(efx
, "failed to init net dev attributes\n");
1716 goto fail_registered
;
1723 EFX_ERR(efx
, "could not register net dev\n");
1727 unregister_netdev(net_dev
);
1731 static void efx_unregister_netdev(struct efx_nic
*efx
)
1733 struct efx_tx_queue
*tx_queue
;
1738 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1740 /* Free up any skbs still remaining. This has to happen before
1741 * we try to unregister the netdev as running their destructors
1742 * may be needed to get the device ref. count to 0. */
1743 efx_for_each_tx_queue(tx_queue
, efx
)
1744 efx_release_tx_buffers(tx_queue
);
1746 if (efx_dev_registered(efx
)) {
1747 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1748 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1749 unregister_netdev(efx
->net_dev
);
1753 /**************************************************************************
1755 * Device reset and suspend
1757 **************************************************************************/
1759 /* Tears down the entire software state and most of the hardware state
1761 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
1763 EFX_ASSERT_RESET_SERIALISED(efx
);
1766 mutex_lock(&efx
->mac_lock
);
1767 mutex_lock(&efx
->spi_lock
);
1769 efx_fini_channels(efx
);
1770 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
1771 efx
->phy_op
->fini(efx
);
1772 efx
->type
->fini(efx
);
1775 /* This function will always ensure that the locks acquired in
1776 * efx_reset_down() are released. A failure return code indicates
1777 * that we were unable to reinitialise the hardware, and the
1778 * driver should be disabled. If ok is false, then the rx and tx
1779 * engines are not restarted, pending a RESET_DISABLE. */
1780 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
1784 EFX_ASSERT_RESET_SERIALISED(efx
);
1786 rc
= efx
->type
->init(efx
);
1788 EFX_ERR(efx
, "failed to initialise NIC\n");
1795 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
1796 rc
= efx
->phy_op
->init(efx
);
1799 if (efx
->phy_op
->reconfigure(efx
))
1800 EFX_ERR(efx
, "could not restore PHY settings\n");
1803 efx
->mac_op
->reconfigure(efx
);
1805 efx_init_channels(efx
);
1807 mutex_unlock(&efx
->spi_lock
);
1808 mutex_unlock(&efx
->mac_lock
);
1815 efx
->port_initialized
= false;
1817 mutex_unlock(&efx
->spi_lock
);
1818 mutex_unlock(&efx
->mac_lock
);
1823 /* Reset the NIC using the specified method. Note that the reset may
1824 * fail, in which case the card will be left in an unusable state.
1826 * Caller must hold the rtnl_lock.
1828 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
1833 EFX_INFO(efx
, "resetting (%s)\n", RESET_TYPE(method
));
1835 efx_reset_down(efx
, method
);
1837 rc
= efx
->type
->reset(efx
, method
);
1839 EFX_ERR(efx
, "failed to reset hardware\n");
1843 /* Allow resets to be rescheduled. */
1844 efx
->reset_pending
= RESET_TYPE_NONE
;
1846 /* Reinitialise bus-mastering, which may have been turned off before
1847 * the reset was scheduled. This is still appropriate, even in the
1848 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1849 * can respond to requests. */
1850 pci_set_master(efx
->pci_dev
);
1853 /* Leave device stopped if necessary */
1854 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
1855 rc2
= efx_reset_up(efx
, method
, !disabled
);
1863 EFX_ERR(efx
, "has been disabled\n");
1864 efx
->state
= STATE_DISABLED
;
1866 EFX_LOG(efx
, "reset complete\n");
1871 /* The worker thread exists so that code that cannot sleep can
1872 * schedule a reset for later.
1874 static void efx_reset_work(struct work_struct
*data
)
1876 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
1878 /* If we're not RUNNING then don't reset. Leave the reset_pending
1879 * flag set so that efx_pci_probe_main will be retried */
1880 if (efx
->state
!= STATE_RUNNING
) {
1881 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1886 if (efx_reset(efx
, efx
->reset_pending
))
1887 dev_close(efx
->net_dev
);
1891 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1893 enum reset_type method
;
1895 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1896 EFX_INFO(efx
, "quenching already scheduled reset\n");
1901 case RESET_TYPE_INVISIBLE
:
1902 case RESET_TYPE_ALL
:
1903 case RESET_TYPE_WORLD
:
1904 case RESET_TYPE_DISABLE
:
1907 case RESET_TYPE_RX_RECOVERY
:
1908 case RESET_TYPE_RX_DESC_FETCH
:
1909 case RESET_TYPE_TX_DESC_FETCH
:
1910 case RESET_TYPE_TX_SKIP
:
1911 method
= RESET_TYPE_INVISIBLE
;
1913 case RESET_TYPE_MC_FAILURE
:
1915 method
= RESET_TYPE_ALL
;
1920 EFX_LOG(efx
, "scheduling %s reset for %s\n",
1921 RESET_TYPE(method
), RESET_TYPE(type
));
1923 EFX_LOG(efx
, "scheduling %s reset\n", RESET_TYPE(method
));
1925 efx
->reset_pending
= method
;
1927 /* efx_process_channel() will no longer read events once a
1928 * reset is scheduled. So switch back to poll'd MCDI completions. */
1929 efx_mcdi_mode_poll(efx
);
1931 queue_work(reset_workqueue
, &efx
->reset_work
);
1934 /**************************************************************************
1936 * List of NICs we support
1938 **************************************************************************/
1940 /* PCI device ID table */
1941 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table
) = {
1942 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1943 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
1944 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1945 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
1946 {PCI_DEVICE(EFX_VENDID_SFC
, BETHPAGE_A_P_DEVID
),
1947 .driver_data
= (unsigned long) &siena_a0_nic_type
},
1948 {PCI_DEVICE(EFX_VENDID_SFC
, SIENA_A_P_DEVID
),
1949 .driver_data
= (unsigned long) &siena_a0_nic_type
},
1950 {0} /* end of list */
1953 /**************************************************************************
1955 * Dummy PHY/MAC operations
1957 * Can be used for some unimplemented operations
1958 * Needed so all function pointers are valid and do not have to be tested
1961 **************************************************************************/
1962 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1966 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1967 void efx_port_dummy_op_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
1970 bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
1975 static struct efx_phy_operations efx_dummy_phy_operations
= {
1976 .init
= efx_port_dummy_op_int
,
1977 .reconfigure
= efx_port_dummy_op_int
,
1978 .poll
= efx_port_dummy_op_poll
,
1979 .fini
= efx_port_dummy_op_void
,
1982 /**************************************************************************
1986 **************************************************************************/
1988 /* This zeroes out and then fills in the invariants in a struct
1989 * efx_nic (including all sub-structures).
1991 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1992 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1994 struct efx_channel
*channel
;
1995 struct efx_tx_queue
*tx_queue
;
1996 struct efx_rx_queue
*rx_queue
;
1999 /* Initialise common structures */
2000 memset(efx
, 0, sizeof(*efx
));
2001 spin_lock_init(&efx
->biu_lock
);
2002 mutex_init(&efx
->mdio_lock
);
2003 mutex_init(&efx
->spi_lock
);
2004 #ifdef CONFIG_SFC_MTD
2005 INIT_LIST_HEAD(&efx
->mtd_list
);
2007 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
2008 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
2009 efx
->pci_dev
= pci_dev
;
2010 efx
->state
= STATE_INIT
;
2011 efx
->reset_pending
= RESET_TYPE_NONE
;
2012 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
2014 efx
->net_dev
= net_dev
;
2015 efx
->rx_checksum_enabled
= true;
2016 spin_lock_init(&efx
->netif_stop_lock
);
2017 spin_lock_init(&efx
->stats_lock
);
2018 mutex_init(&efx
->mac_lock
);
2019 efx
->mac_op
= type
->default_mac_ops
;
2020 efx
->phy_op
= &efx_dummy_phy_operations
;
2021 efx
->mdio
.dev
= net_dev
;
2022 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
2023 atomic_set(&efx
->netif_stop_count
, 1);
2025 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
2026 channel
= &efx
->channel
[i
];
2028 channel
->channel
= i
;
2029 channel
->work_pending
= false;
2031 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
2032 tx_queue
= &efx
->tx_queue
[i
];
2033 tx_queue
->efx
= efx
;
2034 tx_queue
->queue
= i
;
2035 tx_queue
->buffer
= NULL
;
2036 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
2037 tx_queue
->tso_headers_free
= NULL
;
2039 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
2040 rx_queue
= &efx
->rx_queue
[i
];
2041 rx_queue
->efx
= efx
;
2042 rx_queue
->queue
= i
;
2043 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
2044 rx_queue
->buffer
= NULL
;
2045 spin_lock_init(&rx_queue
->add_lock
);
2046 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
2051 /* As close as we can get to guaranteeing that we don't overflow */
2052 BUILD_BUG_ON(EFX_EVQ_SIZE
< EFX_TXQ_SIZE
+ EFX_RXQ_SIZE
);
2054 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2056 /* Higher numbered interrupt modes are less capable! */
2057 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2060 /* Would be good to use the net_dev name, but we're too early */
2061 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2063 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2064 if (!efx
->workqueue
)
2070 static void efx_fini_struct(struct efx_nic
*efx
)
2072 if (efx
->workqueue
) {
2073 destroy_workqueue(efx
->workqueue
);
2074 efx
->workqueue
= NULL
;
2078 /**************************************************************************
2082 **************************************************************************/
2084 /* Main body of final NIC shutdown code
2085 * This is called only at module unload (or hotplug removal).
2087 static void efx_pci_remove_main(struct efx_nic
*efx
)
2089 efx_nic_fini_interrupt(efx
);
2090 efx_fini_channels(efx
);
2092 efx
->type
->fini(efx
);
2094 efx_remove_all(efx
);
2097 /* Final NIC shutdown
2098 * This is called only at module unload (or hotplug removal).
2100 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2102 struct efx_nic
*efx
;
2104 efx
= pci_get_drvdata(pci_dev
);
2108 /* Mark the NIC as fini, then stop the interface */
2110 efx
->state
= STATE_FINI
;
2111 dev_close(efx
->net_dev
);
2113 /* Allow any queued efx_resets() to complete */
2116 efx_unregister_netdev(efx
);
2118 efx_mtd_remove(efx
);
2120 /* Wait for any scheduled resets to complete. No more will be
2121 * scheduled from this point because efx_stop_all() has been
2122 * called, we are no longer registered with driverlink, and
2123 * the net_device's have been removed. */
2124 cancel_work_sync(&efx
->reset_work
);
2126 efx_pci_remove_main(efx
);
2129 EFX_LOG(efx
, "shutdown successful\n");
2131 pci_set_drvdata(pci_dev
, NULL
);
2132 efx_fini_struct(efx
);
2133 free_netdev(efx
->net_dev
);
2136 /* Main body of NIC initialisation
2137 * This is called at module load (or hotplug insertion, theoretically).
2139 static int efx_pci_probe_main(struct efx_nic
*efx
)
2143 /* Do start-of-day initialisation */
2144 rc
= efx_probe_all(efx
);
2148 rc
= efx_init_napi(efx
);
2152 rc
= efx
->type
->init(efx
);
2154 EFX_ERR(efx
, "failed to initialise NIC\n");
2158 rc
= efx_init_port(efx
);
2160 EFX_ERR(efx
, "failed to initialise port\n");
2164 efx_init_channels(efx
);
2166 rc
= efx_nic_init_interrupt(efx
);
2173 efx_fini_channels(efx
);
2176 efx
->type
->fini(efx
);
2180 efx_remove_all(efx
);
2185 /* NIC initialisation
2187 * This is called at module load (or hotplug insertion,
2188 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2189 * sets up and registers the network devices with the kernel and hooks
2190 * the interrupt service routine. It does not prepare the device for
2191 * transmission; this is left to the first time one of the network
2192 * interfaces is brought up (i.e. efx_net_open).
2194 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2195 const struct pci_device_id
*entry
)
2197 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2198 struct net_device
*net_dev
;
2199 struct efx_nic
*efx
;
2202 /* Allocate and initialise a struct net_device and struct efx_nic */
2203 net_dev
= alloc_etherdev(sizeof(*efx
));
2206 net_dev
->features
|= (type
->offload_features
| NETIF_F_SG
|
2207 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2209 if (type
->offload_features
& NETIF_F_V6_CSUM
)
2210 net_dev
->features
|= NETIF_F_TSO6
;
2211 /* Mask for features that also apply to VLAN devices */
2212 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2213 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2214 efx
= netdev_priv(net_dev
);
2215 pci_set_drvdata(pci_dev
, efx
);
2216 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2220 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2222 /* Set up basic I/O (BAR mappings etc) */
2223 rc
= efx_init_io(efx
);
2227 /* No serialisation is required with the reset path because
2228 * we're in STATE_INIT. */
2229 for (i
= 0; i
< 5; i
++) {
2230 rc
= efx_pci_probe_main(efx
);
2232 /* Serialise against efx_reset(). No more resets will be
2233 * scheduled since efx_stop_all() has been called, and we
2234 * have not and never have been registered with either
2235 * the rtnetlink or driverlink layers. */
2236 cancel_work_sync(&efx
->reset_work
);
2239 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2240 /* If there was a scheduled reset during
2241 * probe, the NIC is probably hosed anyway */
2242 efx_pci_remove_main(efx
);
2249 /* Retry if a recoverably reset event has been scheduled */
2250 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2251 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2254 efx
->reset_pending
= RESET_TYPE_NONE
;
2258 EFX_ERR(efx
, "Could not reset NIC\n");
2262 /* Switch to the running state before we expose the device to the OS,
2263 * so that dev_open()|efx_start_all() will actually start the device */
2264 efx
->state
= STATE_RUNNING
;
2266 rc
= efx_register_netdev(efx
);
2270 EFX_LOG(efx
, "initialisation successful\n");
2273 efx_mtd_probe(efx
); /* allowed to fail */
2278 efx_pci_remove_main(efx
);
2283 efx_fini_struct(efx
);
2286 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2287 free_netdev(net_dev
);
2291 static int efx_pm_freeze(struct device
*dev
)
2293 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2295 efx
->state
= STATE_FINI
;
2297 netif_device_detach(efx
->net_dev
);
2300 efx_fini_channels(efx
);
2305 static int efx_pm_thaw(struct device
*dev
)
2307 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2309 efx
->state
= STATE_INIT
;
2311 efx_init_channels(efx
);
2313 mutex_lock(&efx
->mac_lock
);
2314 efx
->phy_op
->reconfigure(efx
);
2315 mutex_unlock(&efx
->mac_lock
);
2319 netif_device_attach(efx
->net_dev
);
2321 efx
->state
= STATE_RUNNING
;
2323 efx
->type
->resume_wol(efx
);
2328 static int efx_pm_poweroff(struct device
*dev
)
2330 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2331 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2333 efx
->type
->fini(efx
);
2335 efx
->reset_pending
= RESET_TYPE_NONE
;
2337 pci_save_state(pci_dev
);
2338 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2341 /* Used for both resume and restore */
2342 static int efx_pm_resume(struct device
*dev
)
2344 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2345 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2348 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2351 pci_restore_state(pci_dev
);
2352 rc
= pci_enable_device(pci_dev
);
2355 pci_set_master(efx
->pci_dev
);
2356 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2359 rc
= efx
->type
->init(efx
);
2366 static int efx_pm_suspend(struct device
*dev
)
2371 rc
= efx_pm_poweroff(dev
);
2377 static struct dev_pm_ops efx_pm_ops
= {
2378 .suspend
= efx_pm_suspend
,
2379 .resume
= efx_pm_resume
,
2380 .freeze
= efx_pm_freeze
,
2381 .thaw
= efx_pm_thaw
,
2382 .poweroff
= efx_pm_poweroff
,
2383 .restore
= efx_pm_resume
,
2386 static struct pci_driver efx_pci_driver
= {
2387 .name
= EFX_DRIVER_NAME
,
2388 .id_table
= efx_pci_table
,
2389 .probe
= efx_pci_probe
,
2390 .remove
= efx_pci_remove
,
2391 .driver
.pm
= &efx_pm_ops
,
2394 /**************************************************************************
2396 * Kernel module interface
2398 *************************************************************************/
2400 module_param(interrupt_mode
, uint
, 0444);
2401 MODULE_PARM_DESC(interrupt_mode
,
2402 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2404 static int __init
efx_init_module(void)
2408 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2410 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2414 refill_workqueue
= create_workqueue("sfc_refill");
2415 if (!refill_workqueue
) {
2419 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2420 if (!reset_workqueue
) {
2425 rc
= pci_register_driver(&efx_pci_driver
);
2432 destroy_workqueue(reset_workqueue
);
2434 destroy_workqueue(refill_workqueue
);
2436 unregister_netdevice_notifier(&efx_netdev_notifier
);
2441 static void __exit
efx_exit_module(void)
2443 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2445 pci_unregister_driver(&efx_pci_driver
);
2446 destroy_workqueue(reset_workqueue
);
2447 destroy_workqueue(refill_workqueue
);
2448 unregister_netdevice_notifier(&efx_netdev_notifier
);
2452 module_init(efx_init_module
);
2453 module_exit(efx_exit_module
);
2455 MODULE_AUTHOR("Solarflare Communications and "
2456 "Michael Brown <mbrown@fensystems.co.uk>");
2457 MODULE_DESCRIPTION("Solarflare Communications network driver");
2458 MODULE_LICENSE("GPL");
2459 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);