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drivers/net: fixed drivers that support netpoll use ndo_start_xmit()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / tulip / tulip_core.c
blob4cf9a6588751eacadc2d798a7f14fba135ce7012
1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
2
3 Copyright 2000,2001 The Linux Kernel Team
4 Written/copyright 1994-2001 by Donald Becker.
5
6 This software may be used and distributed according to the terms
7 of the GNU General Public License, incorporated herein by reference.
8
9 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
10 for more information on this driver.
11
12 Please submit bugs to http://bugzilla.kernel.org/ .
13 */
14
15
16 #define DRV_NAME "tulip"
17 #ifdef CONFIG_TULIP_NAPI
18 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
19 #else
20 #define DRV_VERSION "1.1.15"
21 #endif
22 #define DRV_RELDATE "Feb 27, 2007"
23
24
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include "tulip.h"
28 #include <linux/init.h>
29 #include <linux/etherdevice.h>
30 #include <linux/delay.h>
31 #include <linux/mii.h>
32 #include <linux/ethtool.h>
33 #include <linux/crc32.h>
34 #include <asm/unaligned.h>
35 #include <asm/uaccess.h>
36
37 #ifdef CONFIG_SPARC
38 #include <asm/prom.h>
39 #endif
40
41 static char version[] __devinitdata =
42 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
43
44
45 /* A few user-configurable values. */
46
47 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48 static unsigned int max_interrupt_work = 25;
49
50 #define MAX_UNITS 8
51 /* Used to pass the full-duplex flag, etc. */
52 static int full_duplex[MAX_UNITS];
53 static int options[MAX_UNITS];
54 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
55
56 /* The possible media types that can be set in options[] are: */
57 const char * const medianame[32] = {
58 "10baseT", "10base2", "AUI", "100baseTx",
59 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
60 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
61 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
62 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
63 "","","","", "","","","", "","","","Transceiver reset",
64 };
65
66 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
67 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
68 || defined(CONFIG_SPARC) || defined(__ia64__) \
69 || defined(__sh__) || defined(__mips__)
70 static int rx_copybreak = 1518;
71 #else
72 static int rx_copybreak = 100;
73 #endif
74
75 /*
76 Set the bus performance register.
77 Typical: Set 16 longword cache alignment, no burst limit.
78 Cache alignment bits 15:14 Burst length 13:8
79 0000 No alignment 0x00000000 unlimited 0800 8 longwords
80 4000 8 longwords 0100 1 longword 1000 16 longwords
81 8000 16 longwords 0200 2 longwords 2000 32 longwords
82 C000 32 longwords 0400 4 longwords
83 Warning: many older 486 systems are broken and require setting 0x00A04800
84 8 longword cache alignment, 8 longword burst.
85 ToDo: Non-Intel setting could be better.
86 */
87
88 #if defined(__alpha__) || defined(__ia64__)
89 static int csr0 = 0x01A00000 | 0xE000;
90 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
91 static int csr0 = 0x01A00000 | 0x8000;
92 #elif defined(CONFIG_SPARC) || defined(__hppa__)
93 /* The UltraSparc PCI controllers will disconnect at every 64-byte
94 * crossing anyways so it makes no sense to tell Tulip to burst
95 * any more than that.
96 */
97 static int csr0 = 0x01A00000 | 0x9000;
98 #elif defined(__arm__) || defined(__sh__)
99 static int csr0 = 0x01A00000 | 0x4800;
100 #elif defined(__mips__)
101 static int csr0 = 0x00200000 | 0x4000;
102 #else
103 #warning Processor architecture undefined!
104 static int csr0 = 0x00A00000 | 0x4800;
105 #endif
106
107 /* Operational parameters that usually are not changed. */
108 /* Time in jiffies before concluding the transmitter is hung. */
109 #define TX_TIMEOUT (4*HZ)
110
111
112 MODULE_AUTHOR("The Linux Kernel Team");
113 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
114 MODULE_LICENSE("GPL");
115 MODULE_VERSION(DRV_VERSION);
116 module_param(tulip_debug, int, 0);
117 module_param(max_interrupt_work, int, 0);
118 module_param(rx_copybreak, int, 0);
119 module_param(csr0, int, 0);
120 module_param_array(options, int, NULL, 0);
121 module_param_array(full_duplex, int, NULL, 0);
122
123 #define PFX DRV_NAME ": "
124
125 #ifdef TULIP_DEBUG
126 int tulip_debug = TULIP_DEBUG;
127 #else
128 int tulip_debug = 1;
129 #endif
130
131 static void tulip_timer(unsigned long data)
132 {
133 struct net_device *dev = (struct net_device *)data;
134 struct tulip_private *tp = netdev_priv(dev);
135
136 if (netif_running(dev))
137 schedule_work(&tp->media_work);
138 }
139
140 /*
141 * This table use during operation for capabilities and media timer.
142 *
143 * It is indexed via the values in 'enum chips'
144 */
145
146 struct tulip_chip_table tulip_tbl[] = {
147 { }, /* placeholder for array, slot unused currently */
148 { }, /* placeholder for array, slot unused currently */
149
150 /* DC21140 */
151 { "Digital DS21140 Tulip", 128, 0x0001ebef,
152 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
153 tulip_media_task },
154
155 /* DC21142, DC21143 */
156 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
157 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
158 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
159
160 /* LC82C168 */
161 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
162 HAS_MII | HAS_PNICNWAY, pnic_timer, },
163
164 /* MX98713 */
165 { "Macronix 98713 PMAC", 128, 0x0001ebef,
166 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
167
168 /* MX98715 */
169 { "Macronix 98715 PMAC", 256, 0x0001ebef,
170 HAS_MEDIA_TABLE, mxic_timer, },
171
172 /* MX98725 */
173 { "Macronix 98725 PMAC", 256, 0x0001ebef,
174 HAS_MEDIA_TABLE, mxic_timer, },
175
176 /* AX88140 */
177 { "ASIX AX88140", 128, 0x0001fbff,
178 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
179 | IS_ASIX, tulip_timer, tulip_media_task },
180
181 /* PNIC2 */
182 { "Lite-On PNIC-II", 256, 0x0801fbff,
183 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
184
185 /* COMET */
186 { "ADMtek Comet", 256, 0x0001abef,
187 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
188
189 /* COMPEX9881 */
190 { "Compex 9881 PMAC", 128, 0x0001ebef,
191 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
192
193 /* I21145 */
194 { "Intel DS21145 Tulip", 128, 0x0801fbff,
195 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
196 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
197
198 /* DM910X */
199 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
200 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
201 tulip_timer, tulip_media_task },
202
203 /* RS7112 */
204 { "Conexant LANfinity", 256, 0x0001ebef,
205 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
206
207 };
208
209
210 static struct pci_device_id tulip_pci_tbl[] = {
211 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
212 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
213 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
214 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
215 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
216 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
217 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
218 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
219 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
230 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
231 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
232 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
233 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
235 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
237 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
240 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
242 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
244 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
245 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
246 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
247 { } /* terminate list */
248 };
249 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
250
251
252 /* A full-duplex map for media types. */
253 const char tulip_media_cap[32] =
254 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
255
256 static void tulip_tx_timeout(struct net_device *dev);
257 static void tulip_init_ring(struct net_device *dev);
258 static void tulip_free_ring(struct net_device *dev);
259 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
260 static int tulip_open(struct net_device *dev);
261 static int tulip_close(struct net_device *dev);
262 static void tulip_up(struct net_device *dev);
263 static void tulip_down(struct net_device *dev);
264 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
265 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
266 static void set_rx_mode(struct net_device *dev);
267 #ifdef CONFIG_NET_POLL_CONTROLLER
268 static void poll_tulip(struct net_device *dev);
269 #endif
270
271 static void tulip_set_power_state (struct tulip_private *tp,
272 int sleep, int snooze)
273 {
274 if (tp->flags & HAS_ACPI) {
275 u32 tmp, newtmp;
276 pci_read_config_dword (tp->pdev, CFDD, &tmp);
277 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
278 if (sleep)
279 newtmp |= CFDD_Sleep;
280 else if (snooze)
281 newtmp |= CFDD_Snooze;
282 if (tmp != newtmp)
283 pci_write_config_dword (tp->pdev, CFDD, newtmp);
284 }
285
286 }
287
288
289 static void tulip_up(struct net_device *dev)
290 {
291 struct tulip_private *tp = netdev_priv(dev);
292 void __iomem *ioaddr = tp->base_addr;
293 int next_tick = 3*HZ;
294 u32 reg;
295 int i;
296
297 #ifdef CONFIG_TULIP_NAPI
298 napi_enable(&tp->napi);
299 #endif
300
301 /* Wake the chip from sleep/snooze mode. */
302 tulip_set_power_state (tp, 0, 0);
303
304 /* On some chip revs we must set the MII/SYM port before the reset!? */
305 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
306 iowrite32(0x00040000, ioaddr + CSR6);
307
308 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
309 iowrite32(0x00000001, ioaddr + CSR0);
310 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
311 udelay(100);
312
313 /* Deassert reset.
314 Wait the specified 50 PCI cycles after a reset by initializing
315 Tx and Rx queues and the address filter list. */
316 iowrite32(tp->csr0, ioaddr + CSR0);
317 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
318 udelay(100);
319
320 if (tulip_debug > 1)
321 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
322
323 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
324 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
325 tp->cur_rx = tp->cur_tx = 0;
326 tp->dirty_rx = tp->dirty_tx = 0;
327
328 if (tp->flags & MC_HASH_ONLY) {
329 u32 addr_low = get_unaligned_le32(dev->dev_addr);
330 u32 addr_high = get_unaligned_le16(dev->dev_addr + 4);
331 if (tp->chip_id == AX88140) {
332 iowrite32(0, ioaddr + CSR13);
333 iowrite32(addr_low, ioaddr + CSR14);
334 iowrite32(1, ioaddr + CSR13);
335 iowrite32(addr_high, ioaddr + CSR14);
336 } else if (tp->flags & COMET_MAC_ADDR) {
337 iowrite32(addr_low, ioaddr + 0xA4);
338 iowrite32(addr_high, ioaddr + 0xA8);
339 iowrite32(0, ioaddr + 0xAC);
340 iowrite32(0, ioaddr + 0xB0);
341 }
342 } else {
343 /* This is set_rx_mode(), but without starting the transmitter. */
344 u16 *eaddrs = (u16 *)dev->dev_addr;
345 u16 *setup_frm = &tp->setup_frame[15*6];
346 dma_addr_t mapping;
347
348 /* 21140 bug: you must add the broadcast address. */
349 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
350 /* Fill the final entry of the table with our physical address. */
351 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
352 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
353 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
354
355 mapping = pci_map_single(tp->pdev, tp->setup_frame,
356 sizeof(tp->setup_frame),
357 PCI_DMA_TODEVICE);
358 tp->tx_buffers[tp->cur_tx].skb = NULL;
359 tp->tx_buffers[tp->cur_tx].mapping = mapping;
360
361 /* Put the setup frame on the Tx list. */
362 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
363 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
364 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
365
366 tp->cur_tx++;
367 }
368
369 tp->saved_if_port = dev->if_port;
370 if (dev->if_port == 0)
371 dev->if_port = tp->default_port;
372
373 /* Allow selecting a default media. */
374 i = 0;
375 if (tp->mtable == NULL)
376 goto media_picked;
377 if (dev->if_port) {
378 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
379 (dev->if_port == 12 ? 0 : dev->if_port);
380 for (i = 0; i < tp->mtable->leafcount; i++)
381 if (tp->mtable->mleaf[i].media == looking_for) {
382 printk(KERN_INFO "%s: Using user-specified media %s.\n",
383 dev->name, medianame[dev->if_port]);
384 goto media_picked;
385 }
386 }
387 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
388 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
389 for (i = 0; i < tp->mtable->leafcount; i++)
390 if (tp->mtable->mleaf[i].media == looking_for) {
391 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
392 dev->name, medianame[looking_for]);
393 goto media_picked;
394 }
395 }
396 /* Start sensing first non-full-duplex media. */
397 for (i = tp->mtable->leafcount - 1;
398 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
399 ;
400 media_picked:
401
402 tp->csr6 = 0;
403 tp->cur_index = i;
404 tp->nwayset = 0;
405
406 if (dev->if_port) {
407 if (tp->chip_id == DC21143 &&
408 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
409 /* We must reset the media CSRs when we force-select MII mode. */
410 iowrite32(0x0000, ioaddr + CSR13);
411 iowrite32(0x0000, ioaddr + CSR14);
412 iowrite32(0x0008, ioaddr + CSR15);
413 }
414 tulip_select_media(dev, 1);
415 } else if (tp->chip_id == DC21142) {
416 if (tp->mii_cnt) {
417 tulip_select_media(dev, 1);
418 if (tulip_debug > 1)
419 printk(KERN_INFO "%s: Using MII transceiver %d, status "
420 "%4.4x.\n",
421 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
422 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
423 tp->csr6 = csr6_mask_hdcap;
424 dev->if_port = 11;
425 iowrite32(0x0000, ioaddr + CSR13);
426 iowrite32(0x0000, ioaddr + CSR14);
427 } else
428 t21142_start_nway(dev);
429 } else if (tp->chip_id == PNIC2) {
430 /* for initial startup advertise 10/100 Full and Half */
431 tp->sym_advertise = 0x01E0;
432 /* enable autonegotiate end interrupt */
433 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
434 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
435 pnic2_start_nway(dev);
436 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
437 if (tp->mii_cnt) {
438 dev->if_port = 11;
439 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
440 iowrite32(0x0001, ioaddr + CSR15);
441 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
442 pnic_do_nway(dev);
443 else {
444 /* Start with 10mbps to do autonegotiation. */
445 iowrite32(0x32, ioaddr + CSR12);
446 tp->csr6 = 0x00420000;
447 iowrite32(0x0001B078, ioaddr + 0xB8);
448 iowrite32(0x0201B078, ioaddr + 0xB8);
449 next_tick = 1*HZ;
450 }
451 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
452 && ! tp->medialock) {
453 dev->if_port = 0;
454 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
455 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
456 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
457 /* Provided by BOLO, Macronix - 12/10/1998. */
458 dev->if_port = 0;
459 tp->csr6 = 0x01a80200;
460 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
461 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
462 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
463 /* Enable automatic Tx underrun recovery. */
464 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
465 dev->if_port = tp->mii_cnt ? 11 : 0;
466 tp->csr6 = 0x00040000;
467 } else if (tp->chip_id == AX88140) {
468 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
469 } else
470 tulip_select_media(dev, 1);
471
472 /* Start the chip's Tx to process setup frame. */
473 tulip_stop_rxtx(tp);
474 barrier();
475 udelay(5);
476 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
477
478 /* Enable interrupts by setting the interrupt mask. */
479 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
480 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
481 tulip_start_rxtx(tp);
482 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
483
484 if (tulip_debug > 2) {
485 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
486 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
487 ioread32(ioaddr + CSR6));
488 }
489
490 /* Set the timer to switch to check for link beat and perhaps switch
491 to an alternate media type. */
492 tp->timer.expires = RUN_AT(next_tick);
493 add_timer(&tp->timer);
494 #ifdef CONFIG_TULIP_NAPI
495 init_timer(&tp->oom_timer);
496 tp->oom_timer.data = (unsigned long)dev;
497 tp->oom_timer.function = oom_timer;
498 #endif
499 }
500
501 static int
502 tulip_open(struct net_device *dev)
503 {
504 int retval;
505
506 tulip_init_ring (dev);
507
508 retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev);
509 if (retval)
510 goto free_ring;
511
512 tulip_up (dev);
513
514 netif_start_queue (dev);
515
516 return 0;
517
518 free_ring:
519 tulip_free_ring (dev);
520 return retval;
521 }
522
523
524 static void tulip_tx_timeout(struct net_device *dev)
525 {
526 struct tulip_private *tp = netdev_priv(dev);
527 void __iomem *ioaddr = tp->base_addr;
528 unsigned long flags;
529
530 spin_lock_irqsave (&tp->lock, flags);
531
532 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
533 /* Do nothing -- the media monitor should handle this. */
534 if (tulip_debug > 1)
535 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
536 dev->name);
537 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
538 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
539 || tp->chip_id == DM910X) {
540 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
541 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
542 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
543 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
544 tp->timeout_recovery = 1;
545 schedule_work(&tp->media_work);
546 goto out_unlock;
547 } else if (tp->chip_id == PNIC2) {
548 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
549 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
550 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
551 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
552 } else {
553 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
554 "%8.8x, resetting...\n",
555 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
556 dev->if_port = 0;
557 }
558
559 #if defined(way_too_many_messages)
560 if (tulip_debug > 3) {
561 int i;
562 for (i = 0; i < RX_RING_SIZE; i++) {
563 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
564 int j;
565 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
566 "%2.2x %2.2x %2.2x.\n",
567 i, (unsigned int)tp->rx_ring[i].status,
568 (unsigned int)tp->rx_ring[i].length,
569 (unsigned int)tp->rx_ring[i].buffer1,
570 (unsigned int)tp->rx_ring[i].buffer2,
571 buf[0], buf[1], buf[2]);
572 for (j = 0; buf[j] != 0xee && j < 1600; j++)
573 if (j < 100)
574 printk(KERN_CONT " %2.2x", buf[j]);
575 printk(KERN_CONT " j=%d.\n", j);
576 }
577 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
578 for (i = 0; i < RX_RING_SIZE; i++)
579 printk(KERN_CONT " %8.8x",
580 (unsigned int)tp->rx_ring[i].status);
581 printk(KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
582 for (i = 0; i < TX_RING_SIZE; i++)
583 printk(KERN_CONT " %8.8x", (unsigned int)tp->tx_ring[i].status);
584 printk(KERN_CONT "\n");
585 }
586 #endif
587
588 tulip_tx_timeout_complete(tp, ioaddr);
589
590 out_unlock:
591 spin_unlock_irqrestore (&tp->lock, flags);
592 dev->trans_start = jiffies;
593 netif_wake_queue (dev);
594 }
595
596
597 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
598 static void tulip_init_ring(struct net_device *dev)
599 {
600 struct tulip_private *tp = netdev_priv(dev);
601 int i;
602
603 tp->susp_rx = 0;
604 tp->ttimer = 0;
605 tp->nir = 0;
606
607 for (i = 0; i < RX_RING_SIZE; i++) {
608 tp->rx_ring[i].status = 0x00000000;
609 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
610 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
611 tp->rx_buffers[i].skb = NULL;
612 tp->rx_buffers[i].mapping = 0;
613 }
614 /* Mark the last entry as wrapping the ring. */
615 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
616 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
617
618 for (i = 0; i < RX_RING_SIZE; i++) {
619 dma_addr_t mapping;
620
621 /* Note the receive buffer must be longword aligned.
622 dev_alloc_skb() provides 16 byte alignment. But do *not*
623 use skb_reserve() to align the IP header! */
624 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
625 tp->rx_buffers[i].skb = skb;
626 if (skb == NULL)
627 break;
628 mapping = pci_map_single(tp->pdev, skb->data,
629 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
630 tp->rx_buffers[i].mapping = mapping;
631 skb->dev = dev; /* Mark as being used by this device. */
632 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
633 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
634 }
635 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
636
637 /* The Tx buffer descriptor is filled in as needed, but we
638 do need to clear the ownership bit. */
639 for (i = 0; i < TX_RING_SIZE; i++) {
640 tp->tx_buffers[i].skb = NULL;
641 tp->tx_buffers[i].mapping = 0;
642 tp->tx_ring[i].status = 0x00000000;
643 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
644 }
645 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
646 }
647
648 static int
649 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
650 {
651 struct tulip_private *tp = netdev_priv(dev);
652 int entry;
653 u32 flag;
654 dma_addr_t mapping;
655 unsigned long flags;
656
657 spin_lock_irqsave(&tp->lock, flags);
658
659 /* Calculate the next Tx descriptor entry. */
660 entry = tp->cur_tx % TX_RING_SIZE;
661
662 tp->tx_buffers[entry].skb = skb;
663 mapping = pci_map_single(tp->pdev, skb->data,
664 skb->len, PCI_DMA_TODEVICE);
665 tp->tx_buffers[entry].mapping = mapping;
666 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
667
668 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
669 flag = 0x60000000; /* No interrupt */
670 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
671 flag = 0xe0000000; /* Tx-done intr. */
672 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
673 flag = 0x60000000; /* No Tx-done intr. */
674 } else { /* Leave room for set_rx_mode() to fill entries. */
675 flag = 0xe0000000; /* Tx-done intr. */
676 netif_stop_queue(dev);
677 }
678 if (entry == TX_RING_SIZE-1)
679 flag = 0xe0000000 | DESC_RING_WRAP;
680
681 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
682 /* if we were using Transmit Automatic Polling, we would need a
683 * wmb() here. */
684 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
685 wmb();
686
687 tp->cur_tx++;
688
689 /* Trigger an immediate transmit demand. */
690 iowrite32(0, tp->base_addr + CSR1);
691
692 spin_unlock_irqrestore(&tp->lock, flags);
693
694 dev->trans_start = jiffies;
695
696 return 0;
697 }
698
699 static void tulip_clean_tx_ring(struct tulip_private *tp)
700 {
701 unsigned int dirty_tx;
702
703 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
704 dirty_tx++) {
705 int entry = dirty_tx % TX_RING_SIZE;
706 int status = le32_to_cpu(tp->tx_ring[entry].status);
707
708 if (status < 0) {
709 tp->stats.tx_errors++; /* It wasn't Txed */
710 tp->tx_ring[entry].status = 0;
711 }
712
713 /* Check for Tx filter setup frames. */
714 if (tp->tx_buffers[entry].skb == NULL) {
715 /* test because dummy frames not mapped */
716 if (tp->tx_buffers[entry].mapping)
717 pci_unmap_single(tp->pdev,
718 tp->tx_buffers[entry].mapping,
719 sizeof(tp->setup_frame),
720 PCI_DMA_TODEVICE);
721 continue;
722 }
723
724 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
725 tp->tx_buffers[entry].skb->len,
726 PCI_DMA_TODEVICE);
727
728 /* Free the original skb. */
729 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
730 tp->tx_buffers[entry].skb = NULL;
731 tp->tx_buffers[entry].mapping = 0;
732 }
733 }
734
735 static void tulip_down (struct net_device *dev)
736 {
737 struct tulip_private *tp = netdev_priv(dev);
738 void __iomem *ioaddr = tp->base_addr;
739 unsigned long flags;
740
741 cancel_work_sync(&tp->media_work);
742
743 #ifdef CONFIG_TULIP_NAPI
744 napi_disable(&tp->napi);
745 #endif
746
747 del_timer_sync (&tp->timer);
748 #ifdef CONFIG_TULIP_NAPI
749 del_timer_sync (&tp->oom_timer);
750 #endif
751 spin_lock_irqsave (&tp->lock, flags);
752
753 /* Disable interrupts by clearing the interrupt mask. */
754 iowrite32 (0x00000000, ioaddr + CSR7);
755
756 /* Stop the Tx and Rx processes. */
757 tulip_stop_rxtx(tp);
758
759 /* prepare receive buffers */
760 tulip_refill_rx(dev);
761
762 /* release any unconsumed transmit buffers */
763 tulip_clean_tx_ring(tp);
764
765 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
766 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
767
768 spin_unlock_irqrestore (&tp->lock, flags);
769
770 init_timer(&tp->timer);
771 tp->timer.data = (unsigned long)dev;
772 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
773
774 dev->if_port = tp->saved_if_port;
775
776 /* Leave the driver in snooze, not sleep, mode. */
777 tulip_set_power_state (tp, 0, 1);
778 }
779
780 static void tulip_free_ring (struct net_device *dev)
781 {
782 struct tulip_private *tp = netdev_priv(dev);
783 int i;
784
785 /* Free all the skbuffs in the Rx queue. */
786 for (i = 0; i < RX_RING_SIZE; i++) {
787 struct sk_buff *skb = tp->rx_buffers[i].skb;
788 dma_addr_t mapping = tp->rx_buffers[i].mapping;
789
790 tp->rx_buffers[i].skb = NULL;
791 tp->rx_buffers[i].mapping = 0;
792
793 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
794 tp->rx_ring[i].length = 0;
795 /* An invalid address. */
796 tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
797 if (skb) {
798 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
799 PCI_DMA_FROMDEVICE);
800 dev_kfree_skb (skb);
801 }
802 }
803
804 for (i = 0; i < TX_RING_SIZE; i++) {
805 struct sk_buff *skb = tp->tx_buffers[i].skb;
806
807 if (skb != NULL) {
808 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
809 skb->len, PCI_DMA_TODEVICE);
810 dev_kfree_skb (skb);
811 }
812 tp->tx_buffers[i].skb = NULL;
813 tp->tx_buffers[i].mapping = 0;
814 }
815 }
816
817 static int tulip_close (struct net_device *dev)
818 {
819 struct tulip_private *tp = netdev_priv(dev);
820 void __iomem *ioaddr = tp->base_addr;
821
822 netif_stop_queue (dev);
823
824 tulip_down (dev);
825
826 if (tulip_debug > 1)
827 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
828 dev->name, ioread32 (ioaddr + CSR5));
829
830 free_irq (dev->irq, dev);
831
832 tulip_free_ring (dev);
833
834 return 0;
835 }
836
837 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
838 {
839 struct tulip_private *tp = netdev_priv(dev);
840 void __iomem *ioaddr = tp->base_addr;
841
842 if (netif_running(dev)) {
843 unsigned long flags;
844
845 spin_lock_irqsave (&tp->lock, flags);
846
847 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
848
849 spin_unlock_irqrestore(&tp->lock, flags);
850 }
851
852 return &tp->stats;
853 }
854
855
856 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
857 {
858 struct tulip_private *np = netdev_priv(dev);
859 strcpy(info->driver, DRV_NAME);
860 strcpy(info->version, DRV_VERSION);
861 strcpy(info->bus_info, pci_name(np->pdev));
862 }
863
864 static const struct ethtool_ops ops = {
865 .get_drvinfo = tulip_get_drvinfo
866 };
867
868 /* Provide ioctl() calls to examine the MII xcvr state. */
869 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
870 {
871 struct tulip_private *tp = netdev_priv(dev);
872 void __iomem *ioaddr = tp->base_addr;
873 struct mii_ioctl_data *data = if_mii(rq);
874 const unsigned int phy_idx = 0;
875 int phy = tp->phys[phy_idx] & 0x1f;
876 unsigned int regnum = data->reg_num;
877
878 switch (cmd) {
879 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
880 if (tp->mii_cnt)
881 data->phy_id = phy;
882 else if (tp->flags & HAS_NWAY)
883 data->phy_id = 32;
884 else if (tp->chip_id == COMET)
885 data->phy_id = 1;
886 else
887 return -ENODEV;
888
889 case SIOCGMIIREG: /* Read MII PHY register. */
890 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
891 int csr12 = ioread32 (ioaddr + CSR12);
892 int csr14 = ioread32 (ioaddr + CSR14);
893 switch (regnum) {
894 case 0:
895 if (((csr14<<5) & 0x1000) ||
896 (dev->if_port == 5 && tp->nwayset))
897 data->val_out = 0x1000;
898 else
899 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
900 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
901 break;
902 case 1:
903 data->val_out =
904 0x1848 +
905 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
906 ((csr12&0x06) == 6 ? 0 : 4);
907 data->val_out |= 0x6048;
908 break;
909 case 4:
910 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
911 data->val_out =
912 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
913 ((csr14 >> 1) & 0x20) + 1;
914 data->val_out |= ((csr14 >> 9) & 0x03C0);
915 break;
916 case 5: data->val_out = tp->lpar; break;
917 default: data->val_out = 0; break;
918 }
919 } else {
920 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
921 }
922 return 0;
923
924 case SIOCSMIIREG: /* Write MII PHY register. */
925 if (!capable (CAP_NET_ADMIN))
926 return -EPERM;
927 if (regnum & ~0x1f)
928 return -EINVAL;
929 if (data->phy_id == phy) {
930 u16 value = data->val_in;
931 switch (regnum) {
932 case 0: /* Check for autonegotiation on or reset. */
933 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
934 if (tp->full_duplex_lock)
935 tp->full_duplex = (value & 0x0100) ? 1 : 0;
936 break;
937 case 4:
938 tp->advertising[phy_idx] =
939 tp->mii_advertise = data->val_in;
940 break;
941 }
942 }
943 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
944 u16 value = data->val_in;
945 if (regnum == 0) {
946 if ((value & 0x1200) == 0x1200) {
947 if (tp->chip_id == PNIC2) {
948 pnic2_start_nway (dev);
949 } else {
950 t21142_start_nway (dev);
951 }
952 }
953 } else if (regnum == 4)
954 tp->sym_advertise = value;
955 } else {
956 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
957 }
958 return 0;
959 default:
960 return -EOPNOTSUPP;
961 }
962
963 return -EOPNOTSUPP;
964 }
965
966
967 /* Set or clear the multicast filter for this adaptor.
968 Note that we only use exclusion around actually queueing the
969 new frame, not around filling tp->setup_frame. This is non-deterministic
970 when re-entered but still correct. */
971
972 #undef set_bit_le
973 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
974
975 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
976 {
977 struct tulip_private *tp = netdev_priv(dev);
978 u16 hash_table[32];
979 struct dev_mc_list *mclist;
980 int i;
981 u16 *eaddrs;
982
983 memset(hash_table, 0, sizeof(hash_table));
984 set_bit_le(255, hash_table); /* Broadcast entry */
985 /* This should work on big-endian machines as well. */
986 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
987 i++, mclist = mclist->next) {
988 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
989
990 set_bit_le(index, hash_table);
991
992 }
993 for (i = 0; i < 32; i++) {
994 *setup_frm++ = hash_table[i];
995 *setup_frm++ = hash_table[i];
996 }
997 setup_frm = &tp->setup_frame[13*6];
998
999 /* Fill the final entry with our physical address. */
1000 eaddrs = (u16 *)dev->dev_addr;
1001 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1002 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1003 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1004 }
1005
1006 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1007 {
1008 struct tulip_private *tp = netdev_priv(dev);
1009 struct dev_mc_list *mclist;
1010 int i;
1011 u16 *eaddrs;
1012
1013 /* We have <= 14 addresses so we can use the wonderful
1014 16 address perfect filtering of the Tulip. */
1015 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1016 i++, mclist = mclist->next) {
1017 eaddrs = (u16 *)mclist->dmi_addr;
1018 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1019 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1020 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1021 }
1022 /* Fill the unused entries with the broadcast address. */
1023 memset(setup_frm, 0xff, (15-i)*12);
1024 setup_frm = &tp->setup_frame[15*6];
1025
1026 /* Fill the final entry with our physical address. */
1027 eaddrs = (u16 *)dev->dev_addr;
1028 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1029 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1030 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1031 }
1032
1033
1034 static void set_rx_mode(struct net_device *dev)
1035 {
1036 struct tulip_private *tp = netdev_priv(dev);
1037 void __iomem *ioaddr = tp->base_addr;
1038 int csr6;
1039
1040 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1041
1042 tp->csr6 &= ~0x00D5;
1043 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1044 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1045 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1046 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1047 /* Too many to filter well -- accept all multicasts. */
1048 tp->csr6 |= AcceptAllMulticast;
1049 csr6 |= AcceptAllMulticast;
1050 } else if (tp->flags & MC_HASH_ONLY) {
1051 /* Some work-alikes have only a 64-entry hash filter table. */
1052 /* Should verify correctness on big-endian/__powerpc__ */
1053 struct dev_mc_list *mclist;
1054 int i;
1055 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1056 tp->csr6 |= AcceptAllMulticast;
1057 csr6 |= AcceptAllMulticast;
1058 } else {
1059 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1060 int filterbit;
1061 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1062 i++, mclist = mclist->next) {
1063 if (tp->flags & COMET_MAC_ADDR)
1064 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1065 else
1066 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1067 filterbit &= 0x3f;
1068 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1069 if (tulip_debug > 2)
1070 printk(KERN_INFO "%s: Added filter for %pM"
1071 " %8.8x bit %d.\n",
1072 dev->name, mclist->dmi_addr,
1073 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1074 }
1075 if (mc_filter[0] == tp->mc_filter[0] &&
1076 mc_filter[1] == tp->mc_filter[1])
1077 ; /* No change. */
1078 else if (tp->flags & IS_ASIX) {
1079 iowrite32(2, ioaddr + CSR13);
1080 iowrite32(mc_filter[0], ioaddr + CSR14);
1081 iowrite32(3, ioaddr + CSR13);
1082 iowrite32(mc_filter[1], ioaddr + CSR14);
1083 } else if (tp->flags & COMET_MAC_ADDR) {
1084 iowrite32(mc_filter[0], ioaddr + 0xAC);
1085 iowrite32(mc_filter[1], ioaddr + 0xB0);
1086 }
1087 tp->mc_filter[0] = mc_filter[0];
1088 tp->mc_filter[1] = mc_filter[1];
1089 }
1090 } else {
1091 unsigned long flags;
1092 u32 tx_flags = 0x08000000 | 192;
1093
1094 /* Note that only the low-address shortword of setup_frame is valid!
1095 The values are doubled for big-endian architectures. */
1096 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1097 build_setup_frame_hash(tp->setup_frame, dev);
1098 tx_flags = 0x08400000 | 192;
1099 } else {
1100 build_setup_frame_perfect(tp->setup_frame, dev);
1101 }
1102
1103 spin_lock_irqsave(&tp->lock, flags);
1104
1105 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1106 /* Same setup recently queued, we need not add it. */
1107 } else {
1108 unsigned int entry;
1109 int dummy = -1;
1110
1111 /* Now add this frame to the Tx list. */
1112
1113 entry = tp->cur_tx++ % TX_RING_SIZE;
1114
1115 if (entry != 0) {
1116 /* Avoid a chip errata by prefixing a dummy entry. */
1117 tp->tx_buffers[entry].skb = NULL;
1118 tp->tx_buffers[entry].mapping = 0;
1119 tp->tx_ring[entry].length =
1120 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1121 tp->tx_ring[entry].buffer1 = 0;
1122 /* Must set DescOwned later to avoid race with chip */
1123 dummy = entry;
1124 entry = tp->cur_tx++ % TX_RING_SIZE;
1125
1126 }
1127
1128 tp->tx_buffers[entry].skb = NULL;
1129 tp->tx_buffers[entry].mapping =
1130 pci_map_single(tp->pdev, tp->setup_frame,
1131 sizeof(tp->setup_frame),
1132 PCI_DMA_TODEVICE);
1133 /* Put the setup frame on the Tx list. */
1134 if (entry == TX_RING_SIZE-1)
1135 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1136 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1137 tp->tx_ring[entry].buffer1 =
1138 cpu_to_le32(tp->tx_buffers[entry].mapping);
1139 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1140 if (dummy >= 0)
1141 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1142 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1143 netif_stop_queue(dev);
1144
1145 /* Trigger an immediate transmit demand. */
1146 iowrite32(0, ioaddr + CSR1);
1147 }
1148
1149 spin_unlock_irqrestore(&tp->lock, flags);
1150 }
1151
1152 iowrite32(csr6, ioaddr + CSR6);
1153 }
1154
1155 #ifdef CONFIG_TULIP_MWI
1156 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1157 struct net_device *dev)
1158 {
1159 struct tulip_private *tp = netdev_priv(dev);
1160 u8 cache;
1161 u16 pci_command;
1162 u32 csr0;
1163
1164 if (tulip_debug > 3)
1165 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1166
1167 tp->csr0 = csr0 = 0;
1168
1169 /* if we have any cache line size at all, we can do MRM and MWI */
1170 csr0 |= MRM | MWI;
1171
1172 /* Enable MWI in the standard PCI command bit.
1173 * Check for the case where MWI is desired but not available
1174 */
1175 pci_try_set_mwi(pdev);
1176
1177 /* read result from hardware (in case bit refused to enable) */
1178 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1179 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1180 csr0 &= ~MWI;
1181
1182 /* if cache line size hardwired to zero, no MWI */
1183 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1184 if ((csr0 & MWI) && (cache == 0)) {
1185 csr0 &= ~MWI;
1186 pci_clear_mwi(pdev);
1187 }
1188
1189 /* assign per-cacheline-size cache alignment and
1190 * burst length values
1191 */
1192 switch (cache) {
1193 case 8:
1194 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1195 break;
1196 case 16:
1197 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1198 break;
1199 case 32:
1200 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1201 break;
1202 default:
1203 cache = 0;
1204 break;
1205 }
1206
1207 /* if we have a good cache line size, we by now have a good
1208 * csr0, so save it and exit
1209 */
1210 if (cache)
1211 goto out;
1212
1213 /* we don't have a good csr0 or cache line size, disable MWI */
1214 if (csr0 & MWI) {
1215 pci_clear_mwi(pdev);
1216 csr0 &= ~MWI;
1217 }
1218
1219 /* sane defaults for burst length and cache alignment
1220 * originally from de4x5 driver
1221 */
1222 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1223
1224 out:
1225 tp->csr0 = csr0;
1226 if (tulip_debug > 2)
1227 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1228 pci_name(pdev), cache, csr0);
1229 }
1230 #endif
1231
1232 /*
1233 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1234 * is the DM910X and the on chip ULi devices
1235 */
1236
1237 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1238 {
1239 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1240 return 1;
1241 return 0;
1242 }
1243
1244 static const struct net_device_ops tulip_netdev_ops = {
1245 .ndo_open = tulip_open,
1246 .ndo_start_xmit = tulip_start_xmit,
1247 .ndo_tx_timeout = tulip_tx_timeout,
1248 .ndo_stop = tulip_close,
1249 .ndo_get_stats = tulip_get_stats,
1250 .ndo_do_ioctl = private_ioctl,
1251 .ndo_set_multicast_list = set_rx_mode,
1252 .ndo_change_mtu = eth_change_mtu,
1253 .ndo_set_mac_address = eth_mac_addr,
1254 .ndo_validate_addr = eth_validate_addr,
1255 #ifdef CONFIG_NET_POLL_CONTROLLER
1256 .ndo_poll_controller = poll_tulip,
1257 #endif
1258 };
1259
1260 static int __devinit tulip_init_one (struct pci_dev *pdev,
1261 const struct pci_device_id *ent)
1262 {
1263 struct tulip_private *tp;
1264 /* See note below on the multiport cards. */
1265 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1266 static struct pci_device_id early_486_chipsets[] = {
1267 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1268 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1269 { },
1270 };
1271 static int last_irq;
1272 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1273 int i, irq;
1274 unsigned short sum;
1275 unsigned char *ee_data;
1276 struct net_device *dev;
1277 void __iomem *ioaddr;
1278 static int board_idx = -1;
1279 int chip_idx = ent->driver_data;
1280 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1281 unsigned int eeprom_missing = 0;
1282 unsigned int force_csr0 = 0;
1283
1284 #ifndef MODULE
1285 static int did_version; /* Already printed version info. */
1286 if (tulip_debug > 0 && did_version++ == 0)
1287 printk (KERN_INFO "%s", version);
1288 #endif
1289
1290 board_idx++;
1291
1292 /*
1293 * Lan media wire a tulip chip to a wan interface. Needs a very
1294 * different driver (lmc driver)
1295 */
1296
1297 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1298 printk (KERN_ERR PFX "skipping LMC card.\n");
1299 return -ENODEV;
1300 }
1301
1302 /*
1303 * Early DM9100's need software CRC and the DMFE driver
1304 */
1305
1306 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1307 {
1308 /* Read Chip revision */
1309 if (pdev->revision < 0x30)
1310 {
1311 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1312 return -ENODEV;
1313 }
1314 }
1315
1316 /*
1317 * Looks for early PCI chipsets where people report hangs
1318 * without the workarounds being on.
1319 */
1320
1321 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1322 aligned. Aries might need this too. The Saturn errata are not
1323 pretty reading but thankfully it's an old 486 chipset.
1324
1325 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1326 Saturn.
1327 */
1328
1329 if (pci_dev_present(early_486_chipsets)) {
1330 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1331 force_csr0 = 1;
1332 }
1333
1334 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1335 if (chip_idx == AX88140) {
1336 if ((csr0 & 0x3f00) == 0)
1337 csr0 |= 0x2000;
1338 }
1339
1340 /* PNIC doesn't have MWI/MRL/MRM... */
1341 if (chip_idx == LC82C168)
1342 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1343
1344 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1345 if (tulip_uli_dm_quirk(pdev)) {
1346 csr0 &= ~0x01f100ff;
1347 #if defined(CONFIG_SPARC)
1348 csr0 = (csr0 & ~0xff00) | 0xe000;
1349 #endif
1350 }
1351 /*
1352 * And back to business
1353 */
1354
1355 i = pci_enable_device(pdev);
1356 if (i) {
1357 printk (KERN_ERR PFX
1358 "Cannot enable tulip board #%d, aborting\n",
1359 board_idx);
1360 return i;
1361 }
1362
1363 irq = pdev->irq;
1364
1365 /* alloc_etherdev ensures aligned and zeroed private structures */
1366 dev = alloc_etherdev (sizeof (*tp));
1367 if (!dev) {
1368 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1369 return -ENOMEM;
1370 }
1371
1372 SET_NETDEV_DEV(dev, &pdev->dev);
1373 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1374 printk (KERN_ERR PFX "%s: I/O region (0x%llx@0x%llx) too small, "
1375 "aborting\n", pci_name(pdev),
1376 (unsigned long long)pci_resource_len (pdev, 0),
1377 (unsigned long long)pci_resource_start (pdev, 0));
1378 goto err_out_free_netdev;
1379 }
1380
1381 /* grab all resources from both PIO and MMIO regions, as we
1382 * don't want anyone else messing around with our hardware */
1383 if (pci_request_regions (pdev, "tulip"))
1384 goto err_out_free_netdev;
1385
1386 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1387
1388 if (!ioaddr)
1389 goto err_out_free_res;
1390
1391 /*
1392 * initialize private data structure 'tp'
1393 * it is zeroed and aligned in alloc_etherdev
1394 */
1395 tp = netdev_priv(dev);
1396 tp->dev = dev;
1397
1398 tp->rx_ring = pci_alloc_consistent(pdev,
1399 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1400 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1401 &tp->rx_ring_dma);
1402 if (!tp->rx_ring)
1403 goto err_out_mtable;
1404 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1405 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1406
1407 tp->chip_id = chip_idx;
1408 tp->flags = tulip_tbl[chip_idx].flags;
1409 tp->pdev = pdev;
1410 tp->base_addr = ioaddr;
1411 tp->revision = pdev->revision;
1412 tp->csr0 = csr0;
1413 spin_lock_init(&tp->lock);
1414 spin_lock_init(&tp->mii_lock);
1415 init_timer(&tp->timer);
1416 tp->timer.data = (unsigned long)dev;
1417 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1418
1419 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1420
1421 dev->base_addr = (unsigned long)ioaddr;
1422
1423 #ifdef CONFIG_TULIP_MWI
1424 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1425 tulip_mwi_config (pdev, dev);
1426 #endif
1427
1428 /* Stop the chip's Tx and Rx processes. */
1429 tulip_stop_rxtx(tp);
1430
1431 pci_set_master(pdev);
1432
1433 #ifdef CONFIG_GSC
1434 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1435 switch (pdev->subsystem_device) {
1436 default:
1437 break;
1438 case 0x1061:
1439 case 0x1062:
1440 case 0x1063:
1441 case 0x1098:
1442 case 0x1099:
1443 case 0x10EE:
1444 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1445 chip_name = "GSC DS21140 Tulip";
1446 }
1447 }
1448 #endif
1449
1450 /* Clear the missed-packet counter. */
1451 ioread32(ioaddr + CSR8);
1452
1453 /* The station address ROM is read byte serially. The register must
1454 be polled, waiting for the value to be read bit serially from the
1455 EEPROM.
1456 */
1457 ee_data = tp->eeprom;
1458 memset(ee_data, 0, sizeof(tp->eeprom));
1459 sum = 0;
1460 if (chip_idx == LC82C168) {
1461 for (i = 0; i < 3; i++) {
1462 int value, boguscnt = 100000;
1463 iowrite32(0x600 | i, ioaddr + 0x98);
1464 do {
1465 value = ioread32(ioaddr + CSR9);
1466 } while (value < 0 && --boguscnt > 0);
1467 put_unaligned_le16(value, ((__le16 *)dev->dev_addr) + i);
1468 sum += value & 0xffff;
1469 }
1470 } else if (chip_idx == COMET) {
1471 /* No need to read the EEPROM. */
1472 put_unaligned_le32(ioread32(ioaddr + 0xA4), dev->dev_addr);
1473 put_unaligned_le16(ioread32(ioaddr + 0xA8), dev->dev_addr + 4);
1474 for (i = 0; i < 6; i ++)
1475 sum += dev->dev_addr[i];
1476 } else {
1477 /* A serial EEPROM interface, we read now and sort it out later. */
1478 int sa_offset = 0;
1479 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1480 int ee_max_addr = ((1 << ee_addr_size) - 1) * sizeof(u16);
1481
1482 if (ee_max_addr > sizeof(tp->eeprom))
1483 ee_max_addr = sizeof(tp->eeprom);
1484
1485 for (i = 0; i < ee_max_addr ; i += sizeof(u16)) {
1486 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1487 ee_data[i] = data & 0xff;
1488 ee_data[i + 1] = data >> 8;
1489 }
1490
1491 /* DEC now has a specification (see Notes) but early board makers
1492 just put the address in the first EEPROM locations. */
1493 /* This does memcmp(ee_data, ee_data+16, 8) */
1494 for (i = 0; i < 8; i ++)
1495 if (ee_data[i] != ee_data[16+i])
1496 sa_offset = 20;
1497 if (chip_idx == CONEXANT) {
1498 /* Check that the tuple type and length is correct. */
1499 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1500 sa_offset = 0x19A;
1501 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1502 ee_data[2] == 0) {
1503 sa_offset = 2; /* Grrr, damn Matrox boards. */
1504 multiport_cnt = 4;
1505 }
1506 #ifdef CONFIG_MIPS_COBALT
1507 if ((pdev->bus->number == 0) &&
1508 ((PCI_SLOT(pdev->devfn) == 7) ||
1509 (PCI_SLOT(pdev->devfn) == 12))) {
1510 /* Cobalt MAC address in first EEPROM locations. */
1511 sa_offset = 0;
1512 /* Ensure our media table fixup get's applied */
1513 memcpy(ee_data + 16, ee_data, 8);
1514 }
1515 #endif
1516 #ifdef CONFIG_GSC
1517 /* Check to see if we have a broken srom */
1518 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1519 /* pci_vendor_id and subsystem_id are swapped */
1520 ee_data[0] = ee_data[2];
1521 ee_data[1] = ee_data[3];
1522 ee_data[2] = 0x61;
1523 ee_data[3] = 0x10;
1524
1525 /* HSC-PCI boards need to be byte-swaped and shifted
1526 * up 1 word. This shift needs to happen at the end
1527 * of the MAC first because of the 2 byte overlap.
1528 */
1529 for (i = 4; i >= 0; i -= 2) {
1530 ee_data[17 + i + 3] = ee_data[17 + i];
1531 ee_data[16 + i + 5] = ee_data[16 + i];
1532 }
1533 }
1534 #endif
1535
1536 for (i = 0; i < 6; i ++) {
1537 dev->dev_addr[i] = ee_data[i + sa_offset];
1538 sum += ee_data[i + sa_offset];
1539 }
1540 }
1541 /* Lite-On boards have the address byte-swapped. */
1542 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1543 && dev->dev_addr[1] == 0x00)
1544 for (i = 0; i < 6; i+=2) {
1545 char tmp = dev->dev_addr[i];
1546 dev->dev_addr[i] = dev->dev_addr[i+1];
1547 dev->dev_addr[i+1] = tmp;
1548 }
1549 /* On the Zynx 315 Etherarray and other multiport boards only the
1550 first Tulip has an EEPROM.
1551 On Sparc systems the mac address is held in the OBP property
1552 "local-mac-address".
1553 The addresses of the subsequent ports are derived from the first.
1554 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1555 that here as well. */
1556 if (sum == 0 || sum == 6*0xff) {
1557 #if defined(CONFIG_SPARC)
1558 struct device_node *dp = pci_device_to_OF_node(pdev);
1559 const unsigned char *addr;
1560 int len;
1561 #endif
1562 eeprom_missing = 1;
1563 for (i = 0; i < 5; i++)
1564 dev->dev_addr[i] = last_phys_addr[i];
1565 dev->dev_addr[i] = last_phys_addr[i] + 1;
1566 #if defined(CONFIG_SPARC)
1567 addr = of_get_property(dp, "local-mac-address", &len);
1568 if (addr && len == 6)
1569 memcpy(dev->dev_addr, addr, 6);
1570 #endif
1571 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1572 if (last_irq)
1573 irq = last_irq;
1574 #endif
1575 }
1576
1577 for (i = 0; i < 6; i++)
1578 last_phys_addr[i] = dev->dev_addr[i];
1579 last_irq = irq;
1580 dev->irq = irq;
1581
1582 /* The lower four bits are the media type. */
1583 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1584 if (options[board_idx] & MEDIA_MASK)
1585 tp->default_port = options[board_idx] & MEDIA_MASK;
1586 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1587 tp->full_duplex = 1;
1588 if (mtu[board_idx] > 0)
1589 dev->mtu = mtu[board_idx];
1590 }
1591 if (dev->mem_start & MEDIA_MASK)
1592 tp->default_port = dev->mem_start & MEDIA_MASK;
1593 if (tp->default_port) {
1594 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1595 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1596 tp->medialock = 1;
1597 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1598 tp->full_duplex = 1;
1599 }
1600 if (tp->full_duplex)
1601 tp->full_duplex_lock = 1;
1602
1603 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1604 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1605 tp->mii_advertise = media2advert[tp->default_port - 9];
1606 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1607 }
1608
1609 if (tp->flags & HAS_MEDIA_TABLE) {
1610 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1611 tulip_parse_eeprom(dev);
1612 strcpy(dev->name, "eth%d"); /* un-hack */
1613 }
1614
1615 if ((tp->flags & ALWAYS_CHECK_MII) ||
1616 (tp->mtable && tp->mtable->has_mii) ||
1617 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1618 if (tp->mtable && tp->mtable->has_mii) {
1619 for (i = 0; i < tp->mtable->leafcount; i++)
1620 if (tp->mtable->mleaf[i].media == 11) {
1621 tp->cur_index = i;
1622 tp->saved_if_port = dev->if_port;
1623 tulip_select_media(dev, 2);
1624 dev->if_port = tp->saved_if_port;
1625 break;
1626 }
1627 }
1628
1629 /* Find the connected MII xcvrs.
1630 Doing this in open() would allow detecting external xcvrs
1631 later, but takes much time. */
1632 tulip_find_mii (dev, board_idx);
1633 }
1634
1635 /* The Tulip-specific entries in the device structure. */
1636 dev->netdev_ops = &tulip_netdev_ops;
1637 dev->watchdog_timeo = TX_TIMEOUT;
1638 #ifdef CONFIG_TULIP_NAPI
1639 netif_napi_add(dev, &tp->napi, tulip_poll, 16);
1640 #endif
1641 SET_ETHTOOL_OPS(dev, &ops);
1642
1643 if (register_netdev(dev))
1644 goto err_out_free_ring;
1645
1646 printk(KERN_INFO "%s: %s rev %d at "
1647 #ifdef CONFIG_TULIP_MMIO
1648 "MMIO"
1649 #else
1650 "Port"
1651 #endif
1652 " %#llx,", dev->name, chip_name, pdev->revision,
1653 (unsigned long long) pci_resource_start(pdev, TULIP_BAR));
1654 pci_set_drvdata(pdev, dev);
1655
1656 if (eeprom_missing)
1657 printk(" EEPROM not present,");
1658 printk(" %pM", dev->dev_addr);
1659 printk(", IRQ %d.\n", irq);
1660
1661 if (tp->chip_id == PNIC2)
1662 tp->link_change = pnic2_lnk_change;
1663 else if (tp->flags & HAS_NWAY)
1664 tp->link_change = t21142_lnk_change;
1665 else if (tp->flags & HAS_PNICNWAY)
1666 tp->link_change = pnic_lnk_change;
1667
1668 /* Reset the xcvr interface and turn on heartbeat. */
1669 switch (chip_idx) {
1670 case DC21140:
1671 case DM910X:
1672 default:
1673 if (tp->mtable)
1674 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1675 break;
1676 case DC21142:
1677 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1678 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1679 iowrite32(0x0000, ioaddr + CSR13);
1680 iowrite32(0x0000, ioaddr + CSR14);
1681 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1682 } else
1683 t21142_start_nway(dev);
1684 break;
1685 case PNIC2:
1686 /* just do a reset for sanity sake */
1687 iowrite32(0x0000, ioaddr + CSR13);
1688 iowrite32(0x0000, ioaddr + CSR14);
1689 break;
1690 case LC82C168:
1691 if ( ! tp->mii_cnt) {
1692 tp->nway = 1;
1693 tp->nwayset = 0;
1694 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1695 iowrite32(0x30, ioaddr + CSR12);
1696 iowrite32(0x0001F078, ioaddr + CSR6);
1697 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1698 }
1699 break;
1700 case MX98713:
1701 case COMPEX9881:
1702 iowrite32(0x00000000, ioaddr + CSR6);
1703 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1704 iowrite32(0x00000001, ioaddr + CSR13);
1705 break;
1706 case MX98715:
1707 case MX98725:
1708 iowrite32(0x01a80000, ioaddr + CSR6);
1709 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1710 iowrite32(0x00001000, ioaddr + CSR12);
1711 break;
1712 case COMET:
1713 /* No initialization necessary. */
1714 break;
1715 }
1716
1717 /* put the chip in snooze mode until opened */
1718 tulip_set_power_state (tp, 0, 1);
1719
1720 return 0;
1721
1722 err_out_free_ring:
1723 pci_free_consistent (pdev,
1724 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1725 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1726 tp->rx_ring, tp->rx_ring_dma);
1727
1728 err_out_mtable:
1729 kfree (tp->mtable);
1730 pci_iounmap(pdev, ioaddr);
1731
1732 err_out_free_res:
1733 pci_release_regions (pdev);
1734
1735 err_out_free_netdev:
1736 free_netdev (dev);
1737 return -ENODEV;
1738 }
1739
1740
1741 #ifdef CONFIG_PM
1742
1743 static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1744 {
1745 struct net_device *dev = pci_get_drvdata(pdev);
1746
1747 if (!dev)
1748 return -EINVAL;
1749
1750 if (!netif_running(dev))
1751 goto save_state;
1752
1753 tulip_down(dev);
1754
1755 netif_device_detach(dev);
1756 free_irq(dev->irq, dev);
1757
1758 save_state:
1759 pci_save_state(pdev);
1760 pci_disable_device(pdev);
1761 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1762
1763 return 0;
1764 }
1765
1766
1767 static int tulip_resume(struct pci_dev *pdev)
1768 {
1769 struct net_device *dev = pci_get_drvdata(pdev);
1770 int retval;
1771
1772 if (!dev)
1773 return -EINVAL;
1774
1775 pci_set_power_state(pdev, PCI_D0);
1776 pci_restore_state(pdev);
1777
1778 if (!netif_running(dev))
1779 return 0;
1780
1781 if ((retval = pci_enable_device(pdev))) {
1782 printk (KERN_ERR "tulip: pci_enable_device failed in resume\n");
1783 return retval;
1784 }
1785
1786 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1787 printk (KERN_ERR "tulip: request_irq failed in resume\n");
1788 return retval;
1789 }
1790
1791 netif_device_attach(dev);
1792
1793 if (netif_running(dev))
1794 tulip_up(dev);
1795
1796 return 0;
1797 }
1798
1799 #endif /* CONFIG_PM */
1800
1801
1802 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1803 {
1804 struct net_device *dev = pci_get_drvdata (pdev);
1805 struct tulip_private *tp;
1806
1807 if (!dev)
1808 return;
1809
1810 tp = netdev_priv(dev);
1811 unregister_netdev(dev);
1812 pci_free_consistent (pdev,
1813 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1814 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1815 tp->rx_ring, tp->rx_ring_dma);
1816 kfree (tp->mtable);
1817 pci_iounmap(pdev, tp->base_addr);
1818 free_netdev (dev);
1819 pci_release_regions (pdev);
1820 pci_set_drvdata (pdev, NULL);
1821
1822 /* pci_power_off (pdev, -1); */
1823 }
1824
1825 #ifdef CONFIG_NET_POLL_CONTROLLER
1826 /*
1827 * Polling 'interrupt' - used by things like netconsole to send skbs
1828 * without having to re-enable interrupts. It's not called while
1829 * the interrupt routine is executing.
1830 */
1831
1832 static void poll_tulip (struct net_device *dev)
1833 {
1834 /* disable_irq here is not very nice, but with the lockless
1835 interrupt handler we have no other choice. */
1836 disable_irq(dev->irq);
1837 tulip_interrupt (dev->irq, dev);
1838 enable_irq(dev->irq);
1839 }
1840 #endif
1841
1842 static struct pci_driver tulip_driver = {
1843 .name = DRV_NAME,
1844 .id_table = tulip_pci_tbl,
1845 .probe = tulip_init_one,
1846 .remove = __devexit_p(tulip_remove_one),
1847 #ifdef CONFIG_PM
1848 .suspend = tulip_suspend,
1849 .resume = tulip_resume,
1850 #endif /* CONFIG_PM */
1851 };
1852
1853
1854 static int __init tulip_init (void)
1855 {
1856 #ifdef MODULE
1857 printk (KERN_INFO "%s", version);
1858 #endif
1859
1860 /* copy module parms into globals */
1861 tulip_rx_copybreak = rx_copybreak;
1862 tulip_max_interrupt_work = max_interrupt_work;
1863
1864 /* probe for and init boards */
1865 return pci_register_driver(&tulip_driver);
1866 }
1867
1868
1869 static void __exit tulip_cleanup (void)
1870 {
1871 pci_unregister_driver (&tulip_driver);
1872 }
1873
1874
1875 module_init(tulip_init);
1876 module_exit(tulip_cleanup);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree