2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/slab.h>
13 #include <linux/gpio.h>
14 #include <linux/irq.h>
15 #include <linux/interrupt.h>
16 #include <linux/mfd/tc35892.h>
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
22 enum { REG_IBE
, REG_IEV
, REG_IS
, REG_IE
};
24 #define CACHE_NR_REGS 4
25 #define CACHE_NR_BANKS 3
28 struct gpio_chip chip
;
29 struct tc35892
*tc35892
;
31 struct mutex irq_lock
;
35 /* Caches of interrupt control registers for bus_lock */
36 u8 regs
[CACHE_NR_REGS
][CACHE_NR_BANKS
];
37 u8 oldregs
[CACHE_NR_REGS
][CACHE_NR_BANKS
];
40 static inline struct tc35892_gpio
*to_tc35892_gpio(struct gpio_chip
*chip
)
42 return container_of(chip
, struct tc35892_gpio
, chip
);
45 static int tc35892_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
47 struct tc35892_gpio
*tc35892_gpio
= to_tc35892_gpio(chip
);
48 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
49 u8 reg
= TC35892_GPIODATA0
+ (offset
/ 8) * 2;
50 u8 mask
= 1 << (offset
% 8);
53 ret
= tc35892_reg_read(tc35892
, reg
);
60 static void tc35892_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int val
)
62 struct tc35892_gpio
*tc35892_gpio
= to_tc35892_gpio(chip
);
63 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
64 u8 reg
= TC35892_GPIODATA0
+ (offset
/ 8) * 2;
65 unsigned pos
= offset
% 8;
66 u8 data
[] = {!!val
<< pos
, 1 << pos
};
68 tc35892_block_write(tc35892
, reg
, ARRAY_SIZE(data
), data
);
71 static int tc35892_gpio_direction_output(struct gpio_chip
*chip
,
72 unsigned offset
, int val
)
74 struct tc35892_gpio
*tc35892_gpio
= to_tc35892_gpio(chip
);
75 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
76 u8 reg
= TC35892_GPIODIR0
+ offset
/ 8;
77 unsigned pos
= offset
% 8;
79 tc35892_gpio_set(chip
, offset
, val
);
81 return tc35892_set_bits(tc35892
, reg
, 1 << pos
, 1 << pos
);
84 static int tc35892_gpio_direction_input(struct gpio_chip
*chip
,
87 struct tc35892_gpio
*tc35892_gpio
= to_tc35892_gpio(chip
);
88 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
89 u8 reg
= TC35892_GPIODIR0
+ offset
/ 8;
90 unsigned pos
= offset
% 8;
92 return tc35892_set_bits(tc35892
, reg
, 1 << pos
, 0);
95 static int tc35892_gpio_to_irq(struct gpio_chip
*chip
, unsigned offset
)
97 struct tc35892_gpio
*tc35892_gpio
= to_tc35892_gpio(chip
);
99 return tc35892_gpio
->irq_base
+ offset
;
102 static struct gpio_chip template_chip
= {
104 .owner
= THIS_MODULE
,
105 .direction_input
= tc35892_gpio_direction_input
,
106 .get
= tc35892_gpio_get
,
107 .direction_output
= tc35892_gpio_direction_output
,
108 .set
= tc35892_gpio_set
,
109 .to_irq
= tc35892_gpio_to_irq
,
113 static int tc35892_gpio_irq_set_type(unsigned int irq
, unsigned int type
)
115 struct tc35892_gpio
*tc35892_gpio
= get_irq_chip_data(irq
);
116 int offset
= irq
- tc35892_gpio
->irq_base
;
117 int regoffset
= offset
/ 8;
118 int mask
= 1 << (offset
% 8);
120 if (type
== IRQ_TYPE_EDGE_BOTH
) {
121 tc35892_gpio
->regs
[REG_IBE
][regoffset
] |= mask
;
125 tc35892_gpio
->regs
[REG_IBE
][regoffset
] &= ~mask
;
127 if (type
== IRQ_TYPE_LEVEL_LOW
|| type
== IRQ_TYPE_LEVEL_HIGH
)
128 tc35892_gpio
->regs
[REG_IS
][regoffset
] |= mask
;
130 tc35892_gpio
->regs
[REG_IS
][regoffset
] &= ~mask
;
132 if (type
== IRQ_TYPE_EDGE_RISING
|| type
== IRQ_TYPE_LEVEL_HIGH
)
133 tc35892_gpio
->regs
[REG_IEV
][regoffset
] |= mask
;
135 tc35892_gpio
->regs
[REG_IEV
][regoffset
] &= ~mask
;
140 static void tc35892_gpio_irq_lock(unsigned int irq
)
142 struct tc35892_gpio
*tc35892_gpio
= get_irq_chip_data(irq
);
144 mutex_lock(&tc35892_gpio
->irq_lock
);
147 static void tc35892_gpio_irq_sync_unlock(unsigned int irq
)
149 struct tc35892_gpio
*tc35892_gpio
= get_irq_chip_data(irq
);
150 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
151 static const u8 regmap
[] = {
152 [REG_IBE
] = TC35892_GPIOIBE0
,
153 [REG_IEV
] = TC35892_GPIOIEV0
,
154 [REG_IS
] = TC35892_GPIOIS0
,
155 [REG_IE
] = TC35892_GPIOIE0
,
159 for (i
= 0; i
< CACHE_NR_REGS
; i
++) {
160 for (j
= 0; j
< CACHE_NR_BANKS
; j
++) {
161 u8 old
= tc35892_gpio
->oldregs
[i
][j
];
162 u8
new = tc35892_gpio
->regs
[i
][j
];
167 tc35892_gpio
->oldregs
[i
][j
] = new;
168 tc35892_reg_write(tc35892
, regmap
[i
] + j
* 8, new);
172 mutex_unlock(&tc35892_gpio
->irq_lock
);
175 static void tc35892_gpio_irq_mask(unsigned int irq
)
177 struct tc35892_gpio
*tc35892_gpio
= get_irq_chip_data(irq
);
178 int offset
= irq
- tc35892_gpio
->irq_base
;
179 int regoffset
= offset
/ 8;
180 int mask
= 1 << (offset
% 8);
182 tc35892_gpio
->regs
[REG_IE
][regoffset
] &= ~mask
;
185 static void tc35892_gpio_irq_unmask(unsigned int irq
)
187 struct tc35892_gpio
*tc35892_gpio
= get_irq_chip_data(irq
);
188 int offset
= irq
- tc35892_gpio
->irq_base
;
189 int regoffset
= offset
/ 8;
190 int mask
= 1 << (offset
% 8);
192 tc35892_gpio
->regs
[REG_IE
][regoffset
] |= mask
;
195 static struct irq_chip tc35892_gpio_irq_chip
= {
196 .name
= "tc35892-gpio",
197 .bus_lock
= tc35892_gpio_irq_lock
,
198 .bus_sync_unlock
= tc35892_gpio_irq_sync_unlock
,
199 .mask
= tc35892_gpio_irq_mask
,
200 .unmask
= tc35892_gpio_irq_unmask
,
201 .set_type
= tc35892_gpio_irq_set_type
,
204 static irqreturn_t
tc35892_gpio_irq(int irq
, void *dev
)
206 struct tc35892_gpio
*tc35892_gpio
= dev
;
207 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
208 u8 status
[CACHE_NR_BANKS
];
212 ret
= tc35892_block_read(tc35892
, TC35892_GPIOMIS0
,
213 ARRAY_SIZE(status
), status
);
217 for (i
= 0; i
< ARRAY_SIZE(status
); i
++) {
218 unsigned int stat
= status
[i
];
223 int bit
= __ffs(stat
);
224 int line
= i
* 8 + bit
;
226 handle_nested_irq(tc35892_gpio
->irq_base
+ line
);
230 tc35892_reg_write(tc35892
, TC35892_GPIOIC0
+ i
, status
[i
]);
236 static int tc35892_gpio_irq_init(struct tc35892_gpio
*tc35892_gpio
)
238 int base
= tc35892_gpio
->irq_base
;
241 for (irq
= base
; irq
< base
+ tc35892_gpio
->chip
.ngpio
; irq
++) {
242 set_irq_chip_data(irq
, tc35892_gpio
);
243 set_irq_chip_and_handler(irq
, &tc35892_gpio_irq_chip
,
245 set_irq_nested_thread(irq
, 1);
247 set_irq_flags(irq
, IRQF_VALID
);
249 set_irq_noprobe(irq
);
256 static void tc35892_gpio_irq_remove(struct tc35892_gpio
*tc35892_gpio
)
258 int base
= tc35892_gpio
->irq_base
;
261 for (irq
= base
; irq
< base
+ tc35892_gpio
->chip
.ngpio
; irq
++) {
263 set_irq_flags(irq
, 0);
265 set_irq_chip_and_handler(irq
, NULL
, NULL
);
266 set_irq_chip_data(irq
, NULL
);
270 static int __devinit
tc35892_gpio_probe(struct platform_device
*pdev
)
272 struct tc35892
*tc35892
= dev_get_drvdata(pdev
->dev
.parent
);
273 struct tc35892_gpio_platform_data
*pdata
;
274 struct tc35892_gpio
*tc35892_gpio
;
278 pdata
= tc35892
->pdata
->gpio
;
282 irq
= platform_get_irq(pdev
, 0);
286 tc35892_gpio
= kzalloc(sizeof(struct tc35892_gpio
), GFP_KERNEL
);
290 mutex_init(&tc35892_gpio
->irq_lock
);
292 tc35892_gpio
->dev
= &pdev
->dev
;
293 tc35892_gpio
->tc35892
= tc35892
;
295 tc35892_gpio
->chip
= template_chip
;
296 tc35892_gpio
->chip
.ngpio
= tc35892
->num_gpio
;
297 tc35892_gpio
->chip
.dev
= &pdev
->dev
;
298 tc35892_gpio
->chip
.base
= pdata
->gpio_base
;
300 tc35892_gpio
->irq_base
= tc35892
->irq_base
+ TC35892_INT_GPIO(0);
302 /* Bring the GPIO module out of reset */
303 ret
= tc35892_set_bits(tc35892
, TC35892_RSTCTRL
,
304 TC35892_RSTCTRL_GPIRST
, 0);
308 ret
= tc35892_gpio_irq_init(tc35892_gpio
);
312 ret
= request_threaded_irq(irq
, NULL
, tc35892_gpio_irq
, IRQF_ONESHOT
,
313 "tc35892-gpio", tc35892_gpio
);
315 dev_err(&pdev
->dev
, "unable to get irq: %d\n", ret
);
319 ret
= gpiochip_add(&tc35892_gpio
->chip
);
321 dev_err(&pdev
->dev
, "unable to add gpiochip: %d\n", ret
);
326 pdata
->setup(tc35892
, tc35892_gpio
->chip
.base
);
328 platform_set_drvdata(pdev
, tc35892_gpio
);
333 free_irq(irq
, tc35892_gpio
);
335 tc35892_gpio_irq_remove(tc35892_gpio
);
341 static int __devexit
tc35892_gpio_remove(struct platform_device
*pdev
)
343 struct tc35892_gpio
*tc35892_gpio
= platform_get_drvdata(pdev
);
344 struct tc35892
*tc35892
= tc35892_gpio
->tc35892
;
345 struct tc35892_gpio_platform_data
*pdata
= tc35892
->pdata
->gpio
;
346 int irq
= platform_get_irq(pdev
, 0);
350 pdata
->remove(tc35892
, tc35892_gpio
->chip
.base
);
352 ret
= gpiochip_remove(&tc35892_gpio
->chip
);
354 dev_err(tc35892_gpio
->dev
,
355 "unable to remove gpiochip: %d\n", ret
);
359 free_irq(irq
, tc35892_gpio
);
360 tc35892_gpio_irq_remove(tc35892_gpio
);
362 platform_set_drvdata(pdev
, NULL
);
368 static struct platform_driver tc35892_gpio_driver
= {
369 .driver
.name
= "tc35892-gpio",
370 .driver
.owner
= THIS_MODULE
,
371 .probe
= tc35892_gpio_probe
,
372 .remove
= __devexit_p(tc35892_gpio_remove
),
375 static int __init
tc35892_gpio_init(void)
377 return platform_driver_register(&tc35892_gpio_driver
);
379 subsys_initcall(tc35892_gpio_init
);
381 static void __exit
tc35892_gpio_exit(void)
383 platform_driver_unregister(&tc35892_gpio_driver
);
385 module_exit(tc35892_gpio_exit
);
387 MODULE_LICENSE("GPL v2");
388 MODULE_DESCRIPTION("TC35892 GPIO driver");
389 MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");