arch/arm/plat-s3c/gpio-config.c

   1 /* linux/arch/arm/plat-s3c/gpio-config.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * S3C series GPIO configuration core
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/gpio.h>
  17 #include <linux/io.h>
  18
  19 #include <mach/gpio-core.h>
  20 #include <plat/gpio-cfg.h>
  21 #include <plat/gpio-cfg-helpers.h>
  22
  23 int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
  24 {
  25         struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
  26         unsigned long flags;
  27         int offset;
  28         int ret;
  29
  30         if (!chip)
  31                 return -EINVAL;
  32
  33         offset = pin - chip->chip.base;
  34
  35         local_irq_save(flags);
  36         ret = s3c_gpio_do_setcfg(chip, offset, config);
  37         local_irq_restore(flags);
  38
  39         return ret;
  40 }
  41
  42 int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
  43 {
  44         struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
  45         unsigned long flags;
  46         int offset, ret;
  47
  48         if (!chip)
  49                 return -EINVAL;
  50
  51         offset = pin - chip->chip.base;
  52
  53         local_irq_save(flags);
  54         ret = s3c_gpio_do_setpull(chip, offset, pull);
  55         local_irq_restore(flags);
  56
  57         return ret;
  58 }
  59
  60 #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
  61 int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
  62                                   unsigned int off, unsigned int cfg)
  63 {
  64         void __iomem *reg = chip->base;
  65         unsigned int shift = off;
  66         u32 con;
  67
  68         if (s3c_gpio_is_cfg_special(cfg)) {
  69                 cfg &= 0xf;
  70
  71                 /* Map output to 0, and SFN2 to 1 */
  72                 cfg -= 1;
  73                 if (cfg > 1)
  74                         return -EINVAL;
  75
  76                 cfg <<= shift;
  77         }
  78
  79         con = __raw_readl(reg);
  80         con &= ~(0x1 << shift);
  81         con |= cfg;
  82         __raw_writel(con, reg);
  83
  84         return 0;
  85 }
  86
  87 int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
  88                             unsigned int off, unsigned int cfg)
  89 {
  90         void __iomem *reg = chip->base;
  91         unsigned int shift = off * 2;
  92         u32 con;
  93
  94         if (s3c_gpio_is_cfg_special(cfg)) {
  95                 cfg &= 0xf;
  96                 if (cfg > 3)
  97                         return -EINVAL;
  98
  99                 cfg <<= shift;
 100         }
 101
 102         con = __raw_readl(reg);
 103         con &= ~(0x3 << shift);
 104         con |= cfg;
 105         __raw_writel(con, reg);
 106
 107         return 0;
 108 }
 109 #endif
 110
 111 #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
 112 int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
 113                                  unsigned int off, unsigned int cfg)
 114 {
 115         void __iomem *reg = chip->base;
 116         unsigned int shift = (off & 7) * 4;
 117         u32 con;
 118
 119         if (off < 8 && chip->chip.ngpio >= 8)
 120                 reg -= 4;
 121
 122         if (s3c_gpio_is_cfg_special(cfg)) {
 123                 cfg &= 0xf;
 124                 cfg <<= shift;
 125         }
 126
 127         con = __raw_readl(reg);
 128         con &= ~(0xf << shift);
 129         con |= cfg;
 130         __raw_writel(con, reg);
 131
 132         return 0;
 133 }
 134 #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
 135
 136 #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
 137 int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
 138                             unsigned int off, s3c_gpio_pull_t pull)
 139 {
 140         void __iomem *reg = chip->base + 0x08;
 141         int shift = off * 2;
 142         u32 pup;
 143
 144         pup = __raw_readl(reg);
 145         pup &= ~(3 << shift);
 146         pup |= pull << shift;
 147         __raw_writel(pup, reg);
 148
 149         return 0;
 150 }
 151
 152 s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
 153                                         unsigned int off)
 154 {
 155         void __iomem *reg = chip->base + 0x08;
 156         int shift = off * 2;
 157         u32 pup = __raw_readl(reg);
 158
 159         pup >>= shift;
 160         pup &= 0x3;
 161         return (__force s3c_gpio_pull_t)pup;
 162 }
 163 #endif