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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wan / n2.c
blob83da596e2052a84df3920cb2d681579e0caa9205
1 /*
2 * SDL Inc. RISCom/N2 synchronous serial card driver for Linux
3 *
4 * Copyright (C) 1998-2003 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
11 *
12 * Note: integrated CSU/DSU/DDS are not supported by this driver
13 *
14 * Sources of information:
15 * Hitachi HD64570 SCA User's Manual
16 * SDL Inc. PPP/HDLC/CISCO driver
17 */
18
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/slab.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/in.h>
25 #include <linux/string.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/moduleparam.h>
30 #include <linux/netdevice.h>
31 #include <linux/hdlc.h>
32 #include <asm/io.h>
33 #include "hd64570.h"
34
35
36 static const char* version = "SDL RISCom/N2 driver version: 1.15";
37 static const char* devname = "RISCom/N2";
38
39 #undef DEBUG_PKT
40 #define DEBUG_RINGS
41
42 #define USE_WINDOWSIZE 16384
43 #define USE_BUS16BITS 1
44 #define CLOCK_BASE 9830400 /* 9.8304 MHz */
45 #define MAX_PAGES 16 /* 16 RAM pages at max */
46 #define MAX_RAM_SIZE 0x80000 /* 512 KB */
47 #if MAX_RAM_SIZE > MAX_PAGES * USE_WINDOWSIZE
48 #undef MAX_RAM_SIZE
49 #define MAX_RAM_SIZE (MAX_PAGES * USE_WINDOWSIZE)
50 #endif
51 #define N2_IOPORTS 0x10
52 #define NEED_DETECT_RAM
53 #define NEED_SCA_MSCI_INTR
54 #define MAX_TX_BUFFERS 10
55
56 static char *hw; /* pointer to hw=xxx command line string */
57
58 /* RISCom/N2 Board Registers */
59
60 /* PC Control Register */
61 #define N2_PCR 0
62 #define PCR_RUNSCA 1 /* Run 64570 */
63 #define PCR_VPM 2 /* Enable VPM - needed if using RAM above 1 MB */
64 #define PCR_ENWIN 4 /* Open window */
65 #define PCR_BUS16 8 /* 16-bit bus */
66
67
68 /* Memory Base Address Register */
69 #define N2_BAR 2
70
71
72 /* Page Scan Register */
73 #define N2_PSR 4
74 #define WIN16K 0x00
75 #define WIN32K 0x20
76 #define WIN64K 0x40
77 #define PSR_WINBITS 0x60
78 #define PSR_DMAEN 0x80
79 #define PSR_PAGEBITS 0x0F
80
81
82 /* Modem Control Reg */
83 #define N2_MCR 6
84 #define CLOCK_OUT_PORT1 0x80
85 #define CLOCK_OUT_PORT0 0x40
86 #define TX422_PORT1 0x20
87 #define TX422_PORT0 0x10
88 #define DSR_PORT1 0x08
89 #define DSR_PORT0 0x04
90 #define DTR_PORT1 0x02
91 #define DTR_PORT0 0x01
92
93
94 typedef struct port_s {
95 struct net_device *dev;
96 struct card_s *card;
97 spinlock_t lock; /* TX lock */
98 sync_serial_settings settings;
99 int valid; /* port enabled */
100 int rxpart; /* partial frame received, next frame invalid*/
101 unsigned short encoding;
102 unsigned short parity;
103 u16 rxin; /* rx ring buffer 'in' pointer */
104 u16 txin; /* tx ring buffer 'in' and 'last' pointers */
105 u16 txlast;
106 u8 rxs, txs, tmc; /* SCA registers */
107 u8 phy_node; /* physical port # - 0 or 1 */
108 u8 log_node; /* logical port # */
109 }port_t;
110
111
112
113 typedef struct card_s {
114 u8 __iomem *winbase; /* ISA window base address */
115 u32 phy_winbase; /* ISA physical base address */
116 u32 ram_size; /* number of bytes */
117 u16 io; /* IO Base address */
118 u16 buff_offset; /* offset of first buffer of first channel */
119 u16 rx_ring_buffers; /* number of buffers in a ring */
120 u16 tx_ring_buffers;
121 u8 irq; /* IRQ (3-15) */
122
123 port_t ports[2];
124 struct card_s *next_card;
125 }card_t;
126
127
128 static card_t *first_card;
129 static card_t **new_card = &first_card;
130
131
132 #define sca_reg(reg, card) (0x8000 | (card)->io | \
133 ((reg) & 0x0F) | (((reg) & 0xF0) << 6))
134 #define sca_in(reg, card) inb(sca_reg(reg, card))
135 #define sca_out(value, reg, card) outb(value, sca_reg(reg, card))
136 #define sca_inw(reg, card) inw(sca_reg(reg, card))
137 #define sca_outw(value, reg, card) outw(value, sca_reg(reg, card))
138
139 #define port_to_card(port) ((port)->card)
140 #define log_node(port) ((port)->log_node)
141 #define phy_node(port) ((port)->phy_node)
142 #define winsize(card) (USE_WINDOWSIZE)
143 #define winbase(card) ((card)->winbase)
144 #define get_port(card, port) ((card)->ports[port].valid ? \
145 &(card)->ports[port] : NULL)
146
147
148 static __inline__ u8 sca_get_page(card_t *card)
149 {
150 return inb(card->io + N2_PSR) & PSR_PAGEBITS;
151 }
152
153
154 static __inline__ void openwin(card_t *card, u8 page)
155 {
156 u8 psr = inb(card->io + N2_PSR);
157 outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR);
158 }
159
160
161 #include "hd64570.c"
162
163
164 static void n2_set_iface(port_t *port)
165 {
166 card_t *card = port->card;
167 int io = card->io;
168 u8 mcr = inb(io + N2_MCR);
169 u8 msci = get_msci(port);
170 u8 rxs = port->rxs & CLK_BRG_MASK;
171 u8 txs = port->txs & CLK_BRG_MASK;
172
173 switch(port->settings.clock_type) {
174 case CLOCK_INT:
175 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
176 rxs |= CLK_BRG_RX; /* BRG output */
177 txs |= CLK_RXCLK_TX; /* RX clock */
178 break;
179
180 case CLOCK_TXINT:
181 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
182 rxs |= CLK_LINE_RX; /* RXC input */
183 txs |= CLK_BRG_TX; /* BRG output */
184 break;
185
186 case CLOCK_TXFROMRX:
187 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
188 rxs |= CLK_LINE_RX; /* RXC input */
189 txs |= CLK_RXCLK_TX; /* RX clock */
190 break;
191
192 default: /* Clock EXTernal */
193 mcr &= port->phy_node ? ~CLOCK_OUT_PORT1 : ~CLOCK_OUT_PORT0;
194 rxs |= CLK_LINE_RX; /* RXC input */
195 txs |= CLK_LINE_TX; /* TXC input */
196 }
197
198 outb(mcr, io + N2_MCR);
199 port->rxs = rxs;
200 port->txs = txs;
201 sca_out(rxs, msci + RXS, card);
202 sca_out(txs, msci + TXS, card);
203 sca_set_port(port);
204 }
205
206
207
208 static int n2_open(struct net_device *dev)
209 {
210 port_t *port = dev_to_port(dev);
211 int io = port->card->io;
212 u8 mcr = inb(io + N2_MCR) | (port->phy_node ? TX422_PORT1:TX422_PORT0);
213 int result;
214
215 result = hdlc_open(dev);
216 if (result)
217 return result;
218
219 mcr &= port->phy_node ? ~DTR_PORT1 : ~DTR_PORT0; /* set DTR ON */
220 outb(mcr, io + N2_MCR);
221
222 outb(inb(io + N2_PCR) | PCR_ENWIN, io + N2_PCR); /* open window */
223 outb(inb(io + N2_PSR) | PSR_DMAEN, io + N2_PSR); /* enable dma */
224 sca_open(dev);
225 n2_set_iface(port);
226 return 0;
227 }
228
229
230
231 static int n2_close(struct net_device *dev)
232 {
233 port_t *port = dev_to_port(dev);
234 int io = port->card->io;
235 u8 mcr = inb(io+N2_MCR) | (port->phy_node ? TX422_PORT1 : TX422_PORT0);
236
237 sca_close(dev);
238 mcr |= port->phy_node ? DTR_PORT1 : DTR_PORT0; /* set DTR OFF */
239 outb(mcr, io + N2_MCR);
240 hdlc_close(dev);
241 return 0;
242 }
243
244
245
246 static int n2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
247 {
248 const size_t size = sizeof(sync_serial_settings);
249 sync_serial_settings new_line;
250 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
251 port_t *port = dev_to_port(dev);
252
253 #ifdef DEBUG_RINGS
254 if (cmd == SIOCDEVPRIVATE) {
255 sca_dump_rings(dev);
256 return 0;
257 }
258 #endif
259 if (cmd != SIOCWANDEV)
260 return hdlc_ioctl(dev, ifr, cmd);
261
262 switch(ifr->ifr_settings.type) {
263 case IF_GET_IFACE:
264 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
265 if (ifr->ifr_settings.size < size) {
266 ifr->ifr_settings.size = size; /* data size wanted */
267 return -ENOBUFS;
268 }
269 if (copy_to_user(line, &port->settings, size))
270 return -EFAULT;
271 return 0;
272
273 case IF_IFACE_SYNC_SERIAL:
274 if(!capable(CAP_NET_ADMIN))
275 return -EPERM;
276
277 if (copy_from_user(&new_line, line, size))
278 return -EFAULT;
279
280 if (new_line.clock_type != CLOCK_EXT &&
281 new_line.clock_type != CLOCK_TXFROMRX &&
282 new_line.clock_type != CLOCK_INT &&
283 new_line.clock_type != CLOCK_TXINT)
284 return -EINVAL; /* No such clock setting */
285
286 if (new_line.loopback != 0 && new_line.loopback != 1)
287 return -EINVAL;
288
289 memcpy(&port->settings, &new_line, size); /* Update settings */
290 n2_set_iface(port);
291 return 0;
292
293 default:
294 return hdlc_ioctl(dev, ifr, cmd);
295 }
296 }
297
298
299
300 static void n2_destroy_card(card_t *card)
301 {
302 int cnt;
303
304 for (cnt = 0; cnt < 2; cnt++)
305 if (card->ports[cnt].card) {
306 struct net_device *dev = port_to_dev(&card->ports[cnt]);
307 unregister_hdlc_device(dev);
308 }
309
310 if (card->irq)
311 free_irq(card->irq, card);
312
313 if (card->winbase) {
314 iounmap(card->winbase);
315 release_mem_region(card->phy_winbase, USE_WINDOWSIZE);
316 }
317
318 if (card->io)
319 release_region(card->io, N2_IOPORTS);
320 if (card->ports[0].dev)
321 free_netdev(card->ports[0].dev);
322 if (card->ports[1].dev)
323 free_netdev(card->ports[1].dev);
324 kfree(card);
325 }
326
327 static const struct net_device_ops n2_ops = {
328 .ndo_open = n2_open,
329 .ndo_stop = n2_close,
330 .ndo_change_mtu = hdlc_change_mtu,
331 .ndo_start_xmit = hdlc_start_xmit,
332 .ndo_do_ioctl = n2_ioctl,
333 };
334
335 static int __init n2_run(unsigned long io, unsigned long irq,
336 unsigned long winbase, long valid0, long valid1)
337 {
338 card_t *card;
339 u8 cnt, pcr;
340 int i;
341
342 if (io < 0x200 || io > 0x3FF || (io % N2_IOPORTS) != 0) {
343 printk(KERN_ERR "n2: invalid I/O port value\n");
344 return -ENODEV;
345 }
346
347 if (irq < 3 || irq > 15 || irq == 6) /* FIXME */ {
348 printk(KERN_ERR "n2: invalid IRQ value\n");
349 return -ENODEV;
350 }
351
352 if (winbase < 0xA0000 || winbase > 0xFFFFF || (winbase & 0xFFF) != 0) {
353 printk(KERN_ERR "n2: invalid RAM value\n");
354 return -ENODEV;
355 }
356
357 card = kzalloc(sizeof(card_t), GFP_KERNEL);
358 if (card == NULL) {
359 printk(KERN_ERR "n2: unable to allocate memory\n");
360 return -ENOBUFS;
361 }
362
363 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
364 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
365 if (!card->ports[0].dev || !card->ports[1].dev) {
366 printk(KERN_ERR "n2: unable to allocate memory\n");
367 n2_destroy_card(card);
368 return -ENOMEM;
369 }
370
371 if (!request_region(io, N2_IOPORTS, devname)) {
372 printk(KERN_ERR "n2: I/O port region in use\n");
373 n2_destroy_card(card);
374 return -EBUSY;
375 }
376 card->io = io;
377
378 if (request_irq(irq, &sca_intr, 0, devname, card)) {
379 printk(KERN_ERR "n2: could not allocate IRQ\n");
380 n2_destroy_card(card);
381 return(-EBUSY);
382 }
383 card->irq = irq;
384
385 if (!request_mem_region(winbase, USE_WINDOWSIZE, devname)) {
386 printk(KERN_ERR "n2: could not request RAM window\n");
387 n2_destroy_card(card);
388 return(-EBUSY);
389 }
390 card->phy_winbase = winbase;
391 card->winbase = ioremap(winbase, USE_WINDOWSIZE);
392 if (!card->winbase) {
393 printk(KERN_ERR "n2: ioremap() failed\n");
394 n2_destroy_card(card);
395 return -EFAULT;
396 }
397
398 outb(0, io + N2_PCR);
399 outb(winbase >> 12, io + N2_BAR);
400
401 switch (USE_WINDOWSIZE) {
402 case 16384:
403 outb(WIN16K, io + N2_PSR);
404 break;
405
406 case 32768:
407 outb(WIN32K, io + N2_PSR);
408 break;
409
410 case 65536:
411 outb(WIN64K, io + N2_PSR);
412 break;
413
414 default:
415 printk(KERN_ERR "n2: invalid window size\n");
416 n2_destroy_card(card);
417 return -ENODEV;
418 }
419
420 pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0);
421 outb(pcr, io + N2_PCR);
422
423 card->ram_size = sca_detect_ram(card, card->winbase, MAX_RAM_SIZE);
424
425 /* number of TX + RX buffers for one port */
426 i = card->ram_size / ((valid0 + valid1) * (sizeof(pkt_desc) +
427 HDLC_MAX_MRU));
428
429 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
430 card->rx_ring_buffers = i - card->tx_ring_buffers;
431
432 card->buff_offset = (valid0 + valid1) * sizeof(pkt_desc) *
433 (card->tx_ring_buffers + card->rx_ring_buffers);
434
435 printk(KERN_INFO "n2: RISCom/N2 %u KB RAM, IRQ%u, "
436 "using %u TX + %u RX packets rings\n", card->ram_size / 1024,
437 card->irq, card->tx_ring_buffers, card->rx_ring_buffers);
438
439 if (card->tx_ring_buffers < 1) {
440 printk(KERN_ERR "n2: RAM test failed\n");
441 n2_destroy_card(card);
442 return -EIO;
443 }
444
445 pcr |= PCR_RUNSCA; /* run SCA */
446 outb(pcr, io + N2_PCR);
447 outb(0, io + N2_MCR);
448
449 sca_init(card, 0);
450 for (cnt = 0; cnt < 2; cnt++) {
451 port_t *port = &card->ports[cnt];
452 struct net_device *dev = port_to_dev(port);
453 hdlc_device *hdlc = dev_to_hdlc(dev);
454
455 if ((cnt == 0 && !valid0) || (cnt == 1 && !valid1))
456 continue;
457
458 port->phy_node = cnt;
459 port->valid = 1;
460
461 if ((cnt == 1) && valid0)
462 port->log_node = 1;
463
464 spin_lock_init(&port->lock);
465 dev->irq = irq;
466 dev->mem_start = winbase;
467 dev->mem_end = winbase + USE_WINDOWSIZE - 1;
468 dev->tx_queue_len = 50;
469 dev->netdev_ops = &n2_ops;
470 hdlc->attach = sca_attach;
471 hdlc->xmit = sca_xmit;
472 port->settings.clock_type = CLOCK_EXT;
473 port->card = card;
474
475 if (register_hdlc_device(dev)) {
476 printk(KERN_WARNING "n2: unable to register hdlc "
477 "device\n");
478 port->card = NULL;
479 n2_destroy_card(card);
480 return -ENOBUFS;
481 }
482 sca_init_port(port); /* Set up SCA memory */
483
484 printk(KERN_INFO "%s: RISCom/N2 node %d\n",
485 dev->name, port->phy_node);
486 }
487
488 *new_card = card;
489 new_card = &card->next_card;
490
491 return 0;
492 }
493
494
495
496 static int __init n2_init(void)
497 {
498 if (hw==NULL) {
499 #ifdef MODULE
500 printk(KERN_INFO "n2: no card initialized\n");
501 #endif
502 return -EINVAL; /* no parameters specified, abort */
503 }
504
505 printk(KERN_INFO "%s\n", version);
506
507 do {
508 unsigned long io, irq, ram;
509 long valid[2] = { 0, 0 }; /* Default = both ports disabled */
510
511 io = simple_strtoul(hw, &hw, 0);
512
513 if (*hw++ != ',')
514 break;
515 irq = simple_strtoul(hw, &hw, 0);
516
517 if (*hw++ != ',')
518 break;
519 ram = simple_strtoul(hw, &hw, 0);
520
521 if (*hw++ != ',')
522 break;
523 while(1) {
524 if (*hw == '0' && !valid[0])
525 valid[0] = 1; /* Port 0 enabled */
526 else if (*hw == '1' && !valid[1])
527 valid[1] = 1; /* Port 1 enabled */
528 else
529 break;
530 hw++;
531 }
532
533 if (!valid[0] && !valid[1])
534 break; /* at least one port must be used */
535
536 if (*hw == ':' || *hw == '\x0')
537 n2_run(io, irq, ram, valid[0], valid[1]);
538
539 if (*hw == '\x0')
540 return first_card ? 0 : -EINVAL;
541 }while(*hw++ == ':');
542
543 printk(KERN_ERR "n2: invalid hardware parameters\n");
544 return first_card ? 0 : -EINVAL;
545 }
546
547
548 static void __exit n2_cleanup(void)
549 {
550 card_t *card = first_card;
551
552 while (card) {
553 card_t *ptr = card;
554 card = card->next_card;
555 n2_destroy_card(ptr);
556 }
557 }
558
559
560 module_init(n2_init);
561 module_exit(n2_cleanup);
562
563 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
564 MODULE_DESCRIPTION("RISCom/N2 serial port driver");
565 MODULE_LICENSE("GPL v2");
566 module_param(hw, charp, 0444);
567 MODULE_PARM_DESC(hw, "io,irq,ram,ports:io,irq,...");
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