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[PATCH] sis190: unmask the link change events
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / sis190.c
blob5f1d0ad549693af9e253ad3f8d44216782992361
1 /*
2 sis190.c: Silicon Integrated Systems SiS190 ethernet driver
3
4 Copyright (c) 2003 K.M. Liu <kmliu@sis.com>
5 Copyright (c) 2003, 2004 Jeff Garzik <jgarzik@pobox.com>
6 Copyright (c) 2003, 2004, 2005 Francois Romieu <romieu@fr.zoreil.com>
7
8 Based on r8169.c, tg3.c, 8139cp.c, skge.c, epic100.c and SiS 190/191
9 genuine driver.
10
11 This software may be used and distributed according to the terms of
12 the GNU General Public License (GPL), incorporated herein by reference.
13 Drivers based on or derived from this code fall under the GPL and must
14 retain the authorship, copyright and license notice. This file is not
15 a complete program and may only be used when the entire operating
16 system is licensed under the GPL.
17
18 See the file COPYING in this distribution for more information.
19
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/netdevice.h>
25 #include <linux/rtnetlink.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/pci.h>
29 #include <linux/mii.h>
30 #include <linux/delay.h>
31 #include <linux/crc32.h>
32 #include <linux/dma-mapping.h>
33 #include <asm/irq.h>
34
35 #define net_drv(p, arg...) if (netif_msg_drv(p)) \
36 printk(arg)
37 #define net_probe(p, arg...) if (netif_msg_probe(p)) \
38 printk(arg)
39 #define net_link(p, arg...) if (netif_msg_link(p)) \
40 printk(arg)
41 #define net_intr(p, arg...) if (netif_msg_intr(p)) \
42 printk(arg)
43 #define net_tx_err(p, arg...) if (netif_msg_tx_err(p)) \
44 printk(arg)
45
46 #define PHY_MAX_ADDR 32
47 #define PHY_ID_ANY 0x1f
48 #define MII_REG_ANY 0x1f
49
50 #ifdef CONFIG_SIS190_NAPI
51 #define NAPI_SUFFIX "-NAPI"
52 #else
53 #define NAPI_SUFFIX ""
54 #endif
55
56 #define DRV_VERSION "1.2" NAPI_SUFFIX
57 #define DRV_NAME "sis190"
58 #define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
59 #define PFX DRV_NAME ": "
60
61 #ifdef CONFIG_SIS190_NAPI
62 #define sis190_rx_skb netif_receive_skb
63 #define sis190_rx_quota(count, quota) min(count, quota)
64 #else
65 #define sis190_rx_skb netif_rx
66 #define sis190_rx_quota(count, quota) count
67 #endif
68
69 #define MAC_ADDR_LEN 6
70
71 #define NUM_TX_DESC 64 /* [8..1024] */
72 #define NUM_RX_DESC 64 /* [8..8192] */
73 #define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
74 #define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
75 #define RX_BUF_SIZE 1536
76 #define RX_BUF_MASK 0xfff8
77
78 #define SIS190_REGS_SIZE 0x80
79 #define SIS190_TX_TIMEOUT (6*HZ)
80 #define SIS190_PHY_TIMEOUT (10*HZ)
81 #define SIS190_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
82 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
83 NETIF_MSG_IFDOWN)
84
85 /* Enhanced PHY access register bit definitions */
86 #define EhnMIIread 0x0000
87 #define EhnMIIwrite 0x0020
88 #define EhnMIIdataShift 16
89 #define EhnMIIpmdShift 6 /* 7016 only */
90 #define EhnMIIregShift 11
91 #define EhnMIIreq 0x0010
92 #define EhnMIInotDone 0x0010
93
94 /* Write/read MMIO register */
95 #define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
96 #define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
97 #define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
98 #define SIS_R8(reg) readb (ioaddr + (reg))
99 #define SIS_R16(reg) readw (ioaddr + (reg))
100 #define SIS_R32(reg) readl (ioaddr + (reg))
101
102 #define SIS_PCI_COMMIT() SIS_R32(IntrControl)
103
104 enum sis190_registers {
105 TxControl = 0x00,
106 TxDescStartAddr = 0x04,
107 rsv0 = 0x08, // reserved
108 TxSts = 0x0c, // unused (Control/Status)
109 RxControl = 0x10,
110 RxDescStartAddr = 0x14,
111 rsv1 = 0x18, // reserved
112 RxSts = 0x1c, // unused
113 IntrStatus = 0x20,
114 IntrMask = 0x24,
115 IntrControl = 0x28,
116 IntrTimer = 0x2c, // unused (Interupt Timer)
117 PMControl = 0x30, // unused (Power Mgmt Control/Status)
118 rsv2 = 0x34, // reserved
119 ROMControl = 0x38,
120 ROMInterface = 0x3c,
121 StationControl = 0x40,
122 GMIIControl = 0x44,
123 GIoCR = 0x48, // unused (GMAC IO Compensation)
124 GIoCtrl = 0x4c, // unused (GMAC IO Control)
125 TxMacControl = 0x50,
126 TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
127 RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
128 rsv3 = 0x5c, // reserved
129 RxMacControl = 0x60,
130 RxMacAddr = 0x62,
131 RxHashTable = 0x68,
132 // Undocumented = 0x6c,
133 RxWolCtrl = 0x70,
134 RxWolData = 0x74, // unused (Rx WOL Data Access)
135 RxMPSControl = 0x78, // unused (Rx MPS Control)
136 rsv4 = 0x7c, // reserved
137 };
138
139 enum sis190_register_content {
140 /* IntrStatus */
141 SoftInt = 0x40000000, // unused
142 Timeup = 0x20000000, // unused
143 PauseFrame = 0x00080000, // unused
144 MagicPacket = 0x00040000, // unused
145 WakeupFrame = 0x00020000, // unused
146 LinkChange = 0x00010000,
147 RxQEmpty = 0x00000080,
148 RxQInt = 0x00000040,
149 TxQ1Empty = 0x00000020, // unused
150 TxQ1Int = 0x00000010,
151 TxQ0Empty = 0x00000008, // unused
152 TxQ0Int = 0x00000004,
153 RxHalt = 0x00000002,
154 TxHalt = 0x00000001,
155
156 /* {Rx/Tx}CmdBits */
157 CmdReset = 0x10,
158 CmdRxEnb = 0x08, // unused
159 CmdTxEnb = 0x01,
160 RxBufEmpty = 0x01, // unused
161
162 /* Cfg9346Bits */
163 Cfg9346_Lock = 0x00, // unused
164 Cfg9346_Unlock = 0xc0, // unused
165
166 /* RxMacControl */
167 AcceptErr = 0x20, // unused
168 AcceptRunt = 0x10, // unused
169 AcceptBroadcast = 0x0800,
170 AcceptMulticast = 0x0400,
171 AcceptMyPhys = 0x0200,
172 AcceptAllPhys = 0x0100,
173
174 /* RxConfigBits */
175 RxCfgFIFOShift = 13,
176 RxCfgDMAShift = 8, // 0x1a in RxControl ?
177
178 /* TxConfigBits */
179 TxInterFrameGapShift = 24,
180 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
181
182 /* StationControl */
183 _1000bpsF = 0x1c00,
184 _1000bpsH = 0x0c00,
185 _100bpsF = 0x1800,
186 _100bpsH = 0x0800,
187 _10bpsF = 0x1400,
188 _10bpsH = 0x0400,
189
190 LinkStatus = 0x02, // unused
191 FullDup = 0x01, // unused
192
193 /* TBICSRBit */
194 TBILinkOK = 0x02000000, // unused
195 };
196
197 struct TxDesc {
198 __le32 PSize;
199 __le32 status;
200 __le32 addr;
201 __le32 size;
202 };
203
204 struct RxDesc {
205 __le32 PSize;
206 __le32 status;
207 __le32 addr;
208 __le32 size;
209 };
210
211 enum _DescStatusBit {
212 /* _Desc.status */
213 OWNbit = 0x80000000, // RXOWN/TXOWN
214 INTbit = 0x40000000, // RXINT/TXINT
215 CRCbit = 0x00020000, // CRCOFF/CRCEN
216 PADbit = 0x00010000, // PREADD/PADEN
217 /* _Desc.size */
218 RingEnd = 0x80000000,
219 /* TxDesc.status */
220 LSEN = 0x08000000, // TSO ? -- FR
221 IPCS = 0x04000000,
222 TCPCS = 0x02000000,
223 UDPCS = 0x01000000,
224 BSTEN = 0x00800000,
225 EXTEN = 0x00400000,
226 DEFEN = 0x00200000,
227 BKFEN = 0x00100000,
228 CRSEN = 0x00080000,
229 COLEN = 0x00040000,
230 THOL3 = 0x30000000,
231 THOL2 = 0x20000000,
232 THOL1 = 0x10000000,
233 THOL0 = 0x00000000,
234 /* RxDesc.status */
235 IPON = 0x20000000,
236 TCPON = 0x10000000,
237 UDPON = 0x08000000,
238 Wakup = 0x00400000,
239 Magic = 0x00200000,
240 Pause = 0x00100000,
241 DEFbit = 0x00200000,
242 BCAST = 0x000c0000,
243 MCAST = 0x00080000,
244 UCAST = 0x00040000,
245 /* RxDesc.PSize */
246 TAGON = 0x80000000,
247 RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
248 ABORT = 0x00800000,
249 SHORT = 0x00400000,
250 LIMIT = 0x00200000,
251 MIIER = 0x00100000,
252 OVRUN = 0x00080000,
253 NIBON = 0x00040000,
254 COLON = 0x00020000,
255 CRCOK = 0x00010000,
256 RxSizeMask = 0x0000ffff
257 /*
258 * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
259 * provide two (unused with Linux) Tx queues. No publically
260 * available documentation alas.
261 */
262 };
263
264 enum sis190_eeprom_access_register_bits {
265 EECS = 0x00000001, // unused
266 EECLK = 0x00000002, // unused
267 EEDO = 0x00000008, // unused
268 EEDI = 0x00000004, // unused
269 EEREQ = 0x00000080,
270 EEROP = 0x00000200,
271 EEWOP = 0x00000100 // unused
272 };
273
274 /* EEPROM Addresses */
275 enum sis190_eeprom_address {
276 EEPROMSignature = 0x00,
277 EEPROMCLK = 0x01, // unused
278 EEPROMInfo = 0x02,
279 EEPROMMACAddr = 0x03
280 };
281
282 struct sis190_private {
283 void __iomem *mmio_addr;
284 struct pci_dev *pci_dev;
285 struct net_device_stats stats;
286 spinlock_t lock;
287 u32 rx_buf_sz;
288 u32 cur_rx;
289 u32 cur_tx;
290 u32 dirty_rx;
291 u32 dirty_tx;
292 dma_addr_t rx_dma;
293 dma_addr_t tx_dma;
294 struct RxDesc *RxDescRing;
295 struct TxDesc *TxDescRing;
296 struct sk_buff *Rx_skbuff[NUM_RX_DESC];
297 struct sk_buff *Tx_skbuff[NUM_TX_DESC];
298 struct work_struct phy_task;
299 struct timer_list timer;
300 u32 msg_enable;
301 struct mii_if_info mii_if;
302 struct list_head first_phy;
303 };
304
305 struct sis190_phy {
306 struct list_head list;
307 int phy_id;
308 u16 id[2];
309 u16 status;
310 u8 type;
311 };
312
313 enum sis190_phy_type {
314 UNKNOWN = 0x00,
315 HOME = 0x01,
316 LAN = 0x02,
317 MIX = 0x03
318 };
319
320 static struct mii_chip_info {
321 const char *name;
322 u16 id[2];
323 unsigned int type;
324 } mii_chip_table[] = {
325 { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN },
326 { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN },
327 { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN },
328 { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN },
329 { NULL, }
330 };
331
332 const static struct {
333 const char *name;
334 u8 version; /* depend on docs */
335 u32 RxConfigMask; /* clear the bits supported by this chip */
336 } sis_chip_info[] = {
337 { DRV_NAME, 0x00, 0xff7e1880, },
338 };
339
340 static struct pci_device_id sis190_pci_tbl[] __devinitdata = {
341 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0190), 0, 0, 0 },
342 { 0, },
343 };
344
345 MODULE_DEVICE_TABLE(pci, sis190_pci_tbl);
346
347 static int rx_copybreak = 200;
348
349 static struct {
350 u32 msg_enable;
351 } debug = { -1 };
352
353 MODULE_DESCRIPTION("SiS sis190 Gigabit Ethernet driver");
354 module_param(rx_copybreak, int, 0);
355 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
356 module_param_named(debug, debug.msg_enable, int, 0);
357 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
358 MODULE_AUTHOR("K.M. Liu <kmliu@sis.com>, Ueimor <romieu@fr.zoreil.com>");
359 MODULE_VERSION(DRV_VERSION);
360 MODULE_LICENSE("GPL");
361
362 static const u32 sis190_intr_mask =
363 RxQEmpty | RxQInt | TxQ1Int | TxQ0Int | RxHalt | TxHalt | LinkChange;
364
365 /*
366 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
367 * The chips use a 64 element hash table based on the Ethernet CRC.
368 */
369 static int multicast_filter_limit = 32;
370
371 static void __mdio_cmd(void __iomem *ioaddr, u32 ctl)
372 {
373 unsigned int i;
374
375 SIS_W32(GMIIControl, ctl);
376
377 msleep(1);
378
379 for (i = 0; i < 100; i++) {
380 if (!(SIS_R32(GMIIControl) & EhnMIInotDone))
381 break;
382 msleep(1);
383 }
384
385 if (i > 999)
386 printk(KERN_ERR PFX "PHY command failed !\n");
387 }
388
389 static void mdio_write(void __iomem *ioaddr, int phy_id, int reg, int val)
390 {
391 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIwrite |
392 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift) |
393 (((u32) val) << EhnMIIdataShift));
394 }
395
396 static int mdio_read(void __iomem *ioaddr, int phy_id, int reg)
397 {
398 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIread |
399 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift));
400
401 return (u16) (SIS_R32(GMIIControl) >> EhnMIIdataShift);
402 }
403
404 static void __mdio_write(struct net_device *dev, int phy_id, int reg, int val)
405 {
406 struct sis190_private *tp = netdev_priv(dev);
407
408 mdio_write(tp->mmio_addr, phy_id, reg, val);
409 }
410
411 static int __mdio_read(struct net_device *dev, int phy_id, int reg)
412 {
413 struct sis190_private *tp = netdev_priv(dev);
414
415 return mdio_read(tp->mmio_addr, phy_id, reg);
416 }
417
418 static u16 mdio_read_latched(void __iomem *ioaddr, int phy_id, int reg)
419 {
420 mdio_read(ioaddr, phy_id, reg);
421 return mdio_read(ioaddr, phy_id, reg);
422 }
423
424 static u16 __devinit sis190_read_eeprom(void __iomem *ioaddr, u32 reg)
425 {
426 u16 data = 0xffff;
427 unsigned int i;
428
429 if (!(SIS_R32(ROMControl) & 0x0002))
430 return 0;
431
432 SIS_W32(ROMInterface, EEREQ | EEROP | (reg << 10));
433
434 for (i = 0; i < 200; i++) {
435 if (!(SIS_R32(ROMInterface) & EEREQ)) {
436 data = (SIS_R32(ROMInterface) & 0xffff0000) >> 16;
437 break;
438 }
439 msleep(1);
440 }
441
442 return data;
443 }
444
445 static void sis190_irq_mask_and_ack(void __iomem *ioaddr)
446 {
447 SIS_W32(IntrMask, 0x00);
448 SIS_W32(IntrStatus, 0xffffffff);
449 SIS_PCI_COMMIT();
450 }
451
452 static void sis190_asic_down(void __iomem *ioaddr)
453 {
454 /* Stop the chip's Tx and Rx DMA processes. */
455
456 SIS_W32(TxControl, 0x1a00);
457 SIS_W32(RxControl, 0x1a00);
458
459 sis190_irq_mask_and_ack(ioaddr);
460 }
461
462 static void sis190_mark_as_last_descriptor(struct RxDesc *desc)
463 {
464 desc->size |= cpu_to_le32(RingEnd);
465 }
466
467 static inline void sis190_give_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
468 {
469 u32 eor = le32_to_cpu(desc->size) & RingEnd;
470
471 desc->PSize = 0x0;
472 desc->size = cpu_to_le32((rx_buf_sz & RX_BUF_MASK) | eor);
473 wmb();
474 desc->status = cpu_to_le32(OWNbit | INTbit);
475 }
476
477 static inline void sis190_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
478 u32 rx_buf_sz)
479 {
480 desc->addr = cpu_to_le32(mapping);
481 sis190_give_to_asic(desc, rx_buf_sz);
482 }
483
484 static inline void sis190_make_unusable_by_asic(struct RxDesc *desc)
485 {
486 desc->PSize = 0x0;
487 desc->addr = 0xdeadbeef;
488 desc->size &= cpu_to_le32(RingEnd);
489 wmb();
490 desc->status = 0x0;
491 }
492
493 static int sis190_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
494 struct RxDesc *desc, u32 rx_buf_sz)
495 {
496 struct sk_buff *skb;
497 dma_addr_t mapping;
498 int ret = 0;
499
500 skb = dev_alloc_skb(rx_buf_sz);
501 if (!skb)
502 goto err_out;
503
504 *sk_buff = skb;
505
506 mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
507 PCI_DMA_FROMDEVICE);
508
509 sis190_map_to_asic(desc, mapping, rx_buf_sz);
510 out:
511 return ret;
512
513 err_out:
514 ret = -ENOMEM;
515 sis190_make_unusable_by_asic(desc);
516 goto out;
517 }
518
519 static u32 sis190_rx_fill(struct sis190_private *tp, struct net_device *dev,
520 u32 start, u32 end)
521 {
522 u32 cur;
523
524 for (cur = start; cur < end; cur++) {
525 int ret, i = cur % NUM_RX_DESC;
526
527 if (tp->Rx_skbuff[i])
528 continue;
529
530 ret = sis190_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
531 tp->RxDescRing + i, tp->rx_buf_sz);
532 if (ret < 0)
533 break;
534 }
535 return cur - start;
536 }
537
538 static inline int sis190_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
539 struct RxDesc *desc, int rx_buf_sz)
540 {
541 int ret = -1;
542
543 if (pkt_size < rx_copybreak) {
544 struct sk_buff *skb;
545
546 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
547 if (skb) {
548 skb_reserve(skb, NET_IP_ALIGN);
549 eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
550 *sk_buff = skb;
551 sis190_give_to_asic(desc, rx_buf_sz);
552 ret = 0;
553 }
554 }
555 return ret;
556 }
557
558 static inline int sis190_rx_pkt_err(u32 status, struct net_device_stats *stats)
559 {
560 #define ErrMask (OVRUN | SHORT | LIMIT | MIIER | NIBON | COLON | ABORT)
561
562 if ((status & CRCOK) && !(status & ErrMask))
563 return 0;
564
565 if (!(status & CRCOK))
566 stats->rx_crc_errors++;
567 else if (status & OVRUN)
568 stats->rx_over_errors++;
569 else if (status & (SHORT | LIMIT))
570 stats->rx_length_errors++;
571 else if (status & (MIIER | NIBON | COLON))
572 stats->rx_frame_errors++;
573
574 stats->rx_errors++;
575 return -1;
576 }
577
578 static int sis190_rx_interrupt(struct net_device *dev,
579 struct sis190_private *tp, void __iomem *ioaddr)
580 {
581 struct net_device_stats *stats = &tp->stats;
582 u32 rx_left, cur_rx = tp->cur_rx;
583 u32 delta, count;
584
585 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
586 rx_left = sis190_rx_quota(rx_left, (u32) dev->quota);
587
588 for (; rx_left > 0; rx_left--, cur_rx++) {
589 unsigned int entry = cur_rx % NUM_RX_DESC;
590 struct RxDesc *desc = tp->RxDescRing + entry;
591 u32 status;
592
593 if (desc->status & OWNbit)
594 break;
595
596 status = le32_to_cpu(desc->PSize);
597
598 // net_intr(tp, KERN_INFO "%s: Rx PSize = %08x.\n", dev->name,
599 // status);
600
601 if (sis190_rx_pkt_err(status, stats) < 0)
602 sis190_give_to_asic(desc, tp->rx_buf_sz);
603 else {
604 struct sk_buff *skb = tp->Rx_skbuff[entry];
605 int pkt_size = (status & RxSizeMask) - 4;
606 void (*pci_action)(struct pci_dev *, dma_addr_t,
607 size_t, int) = pci_dma_sync_single_for_device;
608
609 if (unlikely(pkt_size > tp->rx_buf_sz)) {
610 net_intr(tp, KERN_INFO
611 "%s: (frag) status = %08x.\n",
612 dev->name, status);
613 stats->rx_dropped++;
614 stats->rx_length_errors++;
615 sis190_give_to_asic(desc, tp->rx_buf_sz);
616 continue;
617 }
618
619 pci_dma_sync_single_for_cpu(tp->pci_dev,
620 le32_to_cpu(desc->addr), tp->rx_buf_sz,
621 PCI_DMA_FROMDEVICE);
622
623 if (sis190_try_rx_copy(&skb, pkt_size, desc,
624 tp->rx_buf_sz)) {
625 pci_action = pci_unmap_single;
626 tp->Rx_skbuff[entry] = NULL;
627 sis190_make_unusable_by_asic(desc);
628 }
629
630 pci_action(tp->pci_dev, le32_to_cpu(desc->addr),
631 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
632
633 skb->dev = dev;
634 skb_put(skb, pkt_size);
635 skb->protocol = eth_type_trans(skb, dev);
636
637 sis190_rx_skb(skb);
638
639 dev->last_rx = jiffies;
640 stats->rx_packets++;
641 stats->rx_bytes += pkt_size;
642 if ((status & BCAST) == MCAST)
643 stats->multicast++;
644 }
645 }
646 count = cur_rx - tp->cur_rx;
647 tp->cur_rx = cur_rx;
648
649 delta = sis190_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
650 if (!delta && count && netif_msg_intr(tp))
651 printk(KERN_INFO "%s: no Rx buffer allocated.\n", dev->name);
652 tp->dirty_rx += delta;
653
654 if (((tp->dirty_rx + NUM_RX_DESC) == tp->cur_rx) && netif_msg_intr(tp))
655 printk(KERN_EMERG "%s: Rx buffers exhausted.\n", dev->name);
656
657 return count;
658 }
659
660 static void sis190_unmap_tx_skb(struct pci_dev *pdev, struct sk_buff *skb,
661 struct TxDesc *desc)
662 {
663 unsigned int len;
664
665 len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
666
667 pci_unmap_single(pdev, le32_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
668
669 memset(desc, 0x00, sizeof(*desc));
670 }
671
672 static void sis190_tx_interrupt(struct net_device *dev,
673 struct sis190_private *tp, void __iomem *ioaddr)
674 {
675 u32 pending, dirty_tx = tp->dirty_tx;
676 /*
677 * It would not be needed if queueing was allowed to be enabled
678 * again too early (hint: think preempt and unclocked smp systems).
679 */
680 unsigned int queue_stopped;
681
682 smp_rmb();
683 pending = tp->cur_tx - dirty_tx;
684 queue_stopped = (pending == NUM_TX_DESC);
685
686 for (; pending; pending--, dirty_tx++) {
687 unsigned int entry = dirty_tx % NUM_TX_DESC;
688 struct TxDesc *txd = tp->TxDescRing + entry;
689 struct sk_buff *skb;
690
691 if (le32_to_cpu(txd->status) & OWNbit)
692 break;
693
694 skb = tp->Tx_skbuff[entry];
695
696 tp->stats.tx_packets++;
697 tp->stats.tx_bytes += skb->len;
698
699 sis190_unmap_tx_skb(tp->pci_dev, skb, txd);
700 tp->Tx_skbuff[entry] = NULL;
701 dev_kfree_skb_irq(skb);
702 }
703
704 if (tp->dirty_tx != dirty_tx) {
705 tp->dirty_tx = dirty_tx;
706 smp_wmb();
707 if (queue_stopped)
708 netif_wake_queue(dev);
709 }
710 }
711
712 /*
713 * The interrupt handler does all of the Rx thread work and cleans up after
714 * the Tx thread.
715 */
716 static irqreturn_t sis190_interrupt(int irq, void *__dev, struct pt_regs *regs)
717 {
718 struct net_device *dev = __dev;
719 struct sis190_private *tp = netdev_priv(dev);
720 void __iomem *ioaddr = tp->mmio_addr;
721 unsigned int handled = 0;
722 u32 status;
723
724 status = SIS_R32(IntrStatus);
725
726 if ((status == 0xffffffff) || !status)
727 goto out;
728
729 handled = 1;
730
731 if (unlikely(!netif_running(dev))) {
732 sis190_asic_down(ioaddr);
733 goto out;
734 }
735
736 SIS_W32(IntrStatus, status);
737
738 // net_intr(tp, KERN_INFO "%s: status = %08x.\n", dev->name, status);
739
740 if (status & LinkChange) {
741 net_intr(tp, KERN_INFO "%s: link change.\n", dev->name);
742 schedule_work(&tp->phy_task);
743 }
744
745 if (status & RxQInt)
746 sis190_rx_interrupt(dev, tp, ioaddr);
747
748 if (status & TxQ0Int)
749 sis190_tx_interrupt(dev, tp, ioaddr);
750 out:
751 return IRQ_RETVAL(handled);
752 }
753
754 #ifdef CONFIG_NET_POLL_CONTROLLER
755 static void sis190_netpoll(struct net_device *dev)
756 {
757 struct sis190_private *tp = netdev_priv(dev);
758 struct pci_dev *pdev = tp->pci_dev;
759
760 disable_irq(pdev->irq);
761 sis190_interrupt(pdev->irq, dev, NULL);
762 enable_irq(pdev->irq);
763 }
764 #endif
765
766 static void sis190_free_rx_skb(struct sis190_private *tp,
767 struct sk_buff **sk_buff, struct RxDesc *desc)
768 {
769 struct pci_dev *pdev = tp->pci_dev;
770
771 pci_unmap_single(pdev, le32_to_cpu(desc->addr), tp->rx_buf_sz,
772 PCI_DMA_FROMDEVICE);
773 dev_kfree_skb(*sk_buff);
774 *sk_buff = NULL;
775 sis190_make_unusable_by_asic(desc);
776 }
777
778 static void sis190_rx_clear(struct sis190_private *tp)
779 {
780 unsigned int i;
781
782 for (i = 0; i < NUM_RX_DESC; i++) {
783 if (!tp->Rx_skbuff[i])
784 continue;
785 sis190_free_rx_skb(tp, tp->Rx_skbuff + i, tp->RxDescRing + i);
786 }
787 }
788
789 static void sis190_init_ring_indexes(struct sis190_private *tp)
790 {
791 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
792 }
793
794 static int sis190_init_ring(struct net_device *dev)
795 {
796 struct sis190_private *tp = netdev_priv(dev);
797
798 sis190_init_ring_indexes(tp);
799
800 memset(tp->Tx_skbuff, 0x0, NUM_TX_DESC * sizeof(struct sk_buff *));
801 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
802
803 if (sis190_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
804 goto err_rx_clear;
805
806 sis190_mark_as_last_descriptor(tp->RxDescRing + NUM_RX_DESC - 1);
807
808 return 0;
809
810 err_rx_clear:
811 sis190_rx_clear(tp);
812 return -ENOMEM;
813 }
814
815 static void sis190_set_rx_mode(struct net_device *dev)
816 {
817 struct sis190_private *tp = netdev_priv(dev);
818 void __iomem *ioaddr = tp->mmio_addr;
819 unsigned long flags;
820 u32 mc_filter[2]; /* Multicast hash filter */
821 u16 rx_mode;
822
823 if (dev->flags & IFF_PROMISC) {
824 /* Unconditionally log net taps. */
825 net_drv(tp, KERN_NOTICE "%s: Promiscuous mode enabled.\n",
826 dev->name);
827 rx_mode =
828 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
829 AcceptAllPhys;
830 mc_filter[1] = mc_filter[0] = 0xffffffff;
831 } else if ((dev->mc_count > multicast_filter_limit) ||
832 (dev->flags & IFF_ALLMULTI)) {
833 /* Too many to filter perfectly -- accept all multicasts. */
834 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
835 mc_filter[1] = mc_filter[0] = 0xffffffff;
836 } else {
837 struct dev_mc_list *mclist;
838 unsigned int i;
839
840 rx_mode = AcceptBroadcast | AcceptMyPhys;
841 mc_filter[1] = mc_filter[0] = 0;
842 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
843 i++, mclist = mclist->next) {
844 int bit_nr =
845 ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
846 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
847 rx_mode |= AcceptMulticast;
848 }
849 }
850
851 spin_lock_irqsave(&tp->lock, flags);
852
853 SIS_W16(RxMacControl, rx_mode | 0x2);
854 SIS_W32(RxHashTable, mc_filter[0]);
855 SIS_W32(RxHashTable + 4, mc_filter[1]);
856
857 spin_unlock_irqrestore(&tp->lock, flags);
858 }
859
860 static void sis190_soft_reset(void __iomem *ioaddr)
861 {
862 SIS_W32(IntrControl, 0x8000);
863 SIS_PCI_COMMIT();
864 msleep(1);
865 SIS_W32(IntrControl, 0x0);
866 sis190_asic_down(ioaddr);
867 msleep(1);
868 }
869
870 static void sis190_hw_start(struct net_device *dev)
871 {
872 struct sis190_private *tp = netdev_priv(dev);
873 void __iomem *ioaddr = tp->mmio_addr;
874
875 sis190_soft_reset(ioaddr);
876
877 SIS_W32(TxDescStartAddr, tp->tx_dma);
878 SIS_W32(RxDescStartAddr, tp->rx_dma);
879
880 SIS_W32(IntrStatus, 0xffffffff);
881 SIS_W32(IntrMask, 0x0);
882 /*
883 * Default is 100Mbps.
884 * A bit strange: 100Mbps is 0x1801 elsewhere -- FR 2005/06/09
885 */
886 SIS_W16(StationControl, 0x1901);
887 SIS_W32(GMIIControl, 0x0);
888 SIS_W32(TxMacControl, 0x60);
889 SIS_W16(RxMacControl, 0x02);
890 SIS_W32(RxHashTable, 0x0);
891 SIS_W32(0x6c, 0x0);
892 SIS_W32(RxWolCtrl, 0x0);
893 SIS_W32(RxWolData, 0x0);
894
895 SIS_PCI_COMMIT();
896
897 sis190_set_rx_mode(dev);
898
899 /* Enable all known interrupts by setting the interrupt mask. */
900 SIS_W32(IntrMask, sis190_intr_mask);
901
902 SIS_W32(TxControl, 0x1a00 | CmdTxEnb);
903 SIS_W32(RxControl, 0x1a1d);
904
905 netif_start_queue(dev);
906 }
907
908 static void sis190_phy_task(void * data)
909 {
910 struct net_device *dev = data;
911 struct sis190_private *tp = netdev_priv(dev);
912 void __iomem *ioaddr = tp->mmio_addr;
913 int phy_id = tp->mii_if.phy_id;
914 u16 val;
915
916 rtnl_lock();
917
918 val = mdio_read(ioaddr, phy_id, MII_BMCR);
919 if (val & BMCR_RESET) {
920 // FIXME: needlessly high ? -- FR 02/07/2005
921 mod_timer(&tp->timer, jiffies + HZ/10);
922 } else if (!(mdio_read_latched(ioaddr, phy_id, MII_BMSR) &
923 BMSR_ANEGCOMPLETE)) {
924 net_link(tp, KERN_WARNING "%s: PHY reset until link up.\n",
925 dev->name);
926 netif_carrier_off(dev);
927 mdio_write(ioaddr, phy_id, MII_BMCR, val | BMCR_RESET);
928 mod_timer(&tp->timer, jiffies + SIS190_PHY_TIMEOUT);
929 } else {
930 /* Rejoice ! */
931 struct {
932 int val;
933 const char *msg;
934 u16 ctl;
935 } reg31[] = {
936 { LPA_1000XFULL | LPA_SLCT,
937 "1000 Mbps Full Duplex",
938 0x01 | _1000bpsF },
939 { LPA_1000XHALF | LPA_SLCT,
940 "1000 Mbps Half Duplex",
941 0x01 | _1000bpsH },
942 { LPA_100FULL,
943 "100 Mbps Full Duplex",
944 0x01 | _100bpsF },
945 { LPA_100HALF,
946 "100 Mbps Half Duplex",
947 0x01 | _100bpsH },
948 { LPA_10FULL,
949 "10 Mbps Full Duplex",
950 0x01 | _10bpsF },
951 { LPA_10HALF,
952 "10 Mbps Half Duplex",
953 0x01 | _10bpsH },
954 { 0, "unknown", 0x0000 }
955 }, *p;
956 u16 adv;
957
958 val = mdio_read(ioaddr, phy_id, 0x1f);
959 net_link(tp, KERN_INFO "%s: mii ext = %04x.\n", dev->name, val);
960
961 val = mdio_read(ioaddr, phy_id, MII_LPA);
962 adv = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
963 net_link(tp, KERN_INFO "%s: mii lpa = %04x adv = %04x.\n",
964 dev->name, val, adv);
965
966 val &= adv;
967
968 for (p = reg31; p->ctl; p++) {
969 if ((val & p->val) == p->val)
970 break;
971 }
972 if (p->ctl)
973 SIS_W16(StationControl, p->ctl);
974 net_link(tp, KERN_INFO "%s: link on %s mode.\n", dev->name,
975 p->msg);
976 netif_carrier_on(dev);
977 }
978
979 rtnl_unlock();
980 }
981
982 static void sis190_phy_timer(unsigned long __opaque)
983 {
984 struct net_device *dev = (struct net_device *)__opaque;
985 struct sis190_private *tp = netdev_priv(dev);
986
987 if (likely(netif_running(dev)))
988 schedule_work(&tp->phy_task);
989 }
990
991 static inline void sis190_delete_timer(struct net_device *dev)
992 {
993 struct sis190_private *tp = netdev_priv(dev);
994
995 del_timer_sync(&tp->timer);
996 }
997
998 static inline void sis190_request_timer(struct net_device *dev)
999 {
1000 struct sis190_private *tp = netdev_priv(dev);
1001 struct timer_list *timer = &tp->timer;
1002
1003 init_timer(timer);
1004 timer->expires = jiffies + SIS190_PHY_TIMEOUT;
1005 timer->data = (unsigned long)dev;
1006 timer->function = sis190_phy_timer;
1007 add_timer(timer);
1008 }
1009
1010 static void sis190_set_rxbufsize(struct sis190_private *tp,
1011 struct net_device *dev)
1012 {
1013 unsigned int mtu = dev->mtu;
1014
1015 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1016 /* RxDesc->size has a licence to kill the lower bits */
1017 if (tp->rx_buf_sz & 0x07) {
1018 tp->rx_buf_sz += 8;
1019 tp->rx_buf_sz &= RX_BUF_MASK;
1020 }
1021 }
1022
1023 static int sis190_open(struct net_device *dev)
1024 {
1025 struct sis190_private *tp = netdev_priv(dev);
1026 struct pci_dev *pdev = tp->pci_dev;
1027 int rc = -ENOMEM;
1028
1029 sis190_set_rxbufsize(tp, dev);
1030
1031 /*
1032 * Rx and Tx descriptors need 256 bytes alignment.
1033 * pci_alloc_consistent() guarantees a stronger alignment.
1034 */
1035 tp->TxDescRing = pci_alloc_consistent(pdev, TX_RING_BYTES, &tp->tx_dma);
1036 if (!tp->TxDescRing)
1037 goto out;
1038
1039 tp->RxDescRing = pci_alloc_consistent(pdev, RX_RING_BYTES, &tp->rx_dma);
1040 if (!tp->RxDescRing)
1041 goto err_free_tx_0;
1042
1043 rc = sis190_init_ring(dev);
1044 if (rc < 0)
1045 goto err_free_rx_1;
1046
1047 INIT_WORK(&tp->phy_task, sis190_phy_task, dev);
1048
1049 sis190_request_timer(dev);
1050
1051 rc = request_irq(dev->irq, sis190_interrupt, SA_SHIRQ, dev->name, dev);
1052 if (rc < 0)
1053 goto err_release_timer_2;
1054
1055 sis190_hw_start(dev);
1056 out:
1057 return rc;
1058
1059 err_release_timer_2:
1060 sis190_delete_timer(dev);
1061 sis190_rx_clear(tp);
1062 err_free_rx_1:
1063 pci_free_consistent(tp->pci_dev, RX_RING_BYTES, tp->RxDescRing,
1064 tp->rx_dma);
1065 err_free_tx_0:
1066 pci_free_consistent(tp->pci_dev, TX_RING_BYTES, tp->TxDescRing,
1067 tp->tx_dma);
1068 goto out;
1069 }
1070
1071 static void sis190_tx_clear(struct sis190_private *tp)
1072 {
1073 unsigned int i;
1074
1075 for (i = 0; i < NUM_TX_DESC; i++) {
1076 struct sk_buff *skb = tp->Tx_skbuff[i];
1077
1078 if (!skb)
1079 continue;
1080
1081 sis190_unmap_tx_skb(tp->pci_dev, skb, tp->TxDescRing + i);
1082 tp->Tx_skbuff[i] = NULL;
1083 dev_kfree_skb(skb);
1084
1085 tp->stats.tx_dropped++;
1086 }
1087 tp->cur_tx = tp->dirty_tx = 0;
1088 }
1089
1090 static void sis190_down(struct net_device *dev)
1091 {
1092 struct sis190_private *tp = netdev_priv(dev);
1093 void __iomem *ioaddr = tp->mmio_addr;
1094 unsigned int poll_locked = 0;
1095
1096 sis190_delete_timer(dev);
1097
1098 netif_stop_queue(dev);
1099
1100 flush_scheduled_work();
1101
1102 do {
1103 spin_lock_irq(&tp->lock);
1104
1105 sis190_asic_down(ioaddr);
1106
1107 spin_unlock_irq(&tp->lock);
1108
1109 synchronize_irq(dev->irq);
1110
1111 if (!poll_locked) {
1112 netif_poll_disable(dev);
1113 poll_locked++;
1114 }
1115
1116 synchronize_sched();
1117
1118 } while (SIS_R32(IntrMask));
1119
1120 sis190_tx_clear(tp);
1121 sis190_rx_clear(tp);
1122 }
1123
1124 static int sis190_close(struct net_device *dev)
1125 {
1126 struct sis190_private *tp = netdev_priv(dev);
1127 struct pci_dev *pdev = tp->pci_dev;
1128
1129 sis190_down(dev);
1130
1131 free_irq(dev->irq, dev);
1132
1133 netif_poll_enable(dev);
1134
1135 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1136 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
1137
1138 tp->TxDescRing = NULL;
1139 tp->RxDescRing = NULL;
1140
1141 return 0;
1142 }
1143
1144 static int sis190_start_xmit(struct sk_buff *skb, struct net_device *dev)
1145 {
1146 struct sis190_private *tp = netdev_priv(dev);
1147 void __iomem *ioaddr = tp->mmio_addr;
1148 u32 len, entry, dirty_tx;
1149 struct TxDesc *desc;
1150 dma_addr_t mapping;
1151
1152 if (unlikely(skb->len < ETH_ZLEN)) {
1153 skb = skb_padto(skb, ETH_ZLEN);
1154 if (!skb) {
1155 tp->stats.tx_dropped++;
1156 goto out;
1157 }
1158 len = ETH_ZLEN;
1159 } else {
1160 len = skb->len;
1161 }
1162
1163 entry = tp->cur_tx % NUM_TX_DESC;
1164 desc = tp->TxDescRing + entry;
1165
1166 if (unlikely(le32_to_cpu(desc->status) & OWNbit)) {
1167 netif_stop_queue(dev);
1168 net_tx_err(tp, KERN_ERR PFX
1169 "%s: BUG! Tx Ring full when queue awake!\n",
1170 dev->name);
1171 return NETDEV_TX_BUSY;
1172 }
1173
1174 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
1175
1176 tp->Tx_skbuff[entry] = skb;
1177
1178 desc->PSize = cpu_to_le32(len);
1179 desc->addr = cpu_to_le32(mapping);
1180
1181 desc->size = cpu_to_le32(len);
1182 if (entry == (NUM_TX_DESC - 1))
1183 desc->size |= cpu_to_le32(RingEnd);
1184
1185 wmb();
1186
1187 desc->status = cpu_to_le32(OWNbit | INTbit | DEFbit | CRCbit | PADbit);
1188
1189 tp->cur_tx++;
1190
1191 smp_wmb();
1192
1193 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1194
1195 dev->trans_start = jiffies;
1196
1197 dirty_tx = tp->dirty_tx;
1198 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) {
1199 netif_stop_queue(dev);
1200 smp_rmb();
1201 if (dirty_tx != tp->dirty_tx)
1202 netif_wake_queue(dev);
1203 }
1204 out:
1205 return NETDEV_TX_OK;
1206 }
1207
1208 static struct net_device_stats *sis190_get_stats(struct net_device *dev)
1209 {
1210 struct sis190_private *tp = netdev_priv(dev);
1211
1212 return &tp->stats;
1213 }
1214
1215 static void sis190_free_phy(struct list_head *first_phy)
1216 {
1217 struct sis190_phy *cur, *next;
1218
1219 list_for_each_entry_safe(cur, next, first_phy, list) {
1220 kfree(cur);
1221 }
1222 }
1223
1224 /**
1225 * sis190_default_phy - Select default PHY for sis190 mac.
1226 * @dev: the net device to probe for
1227 *
1228 * Select first detected PHY with link as default.
1229 * If no one is link on, select PHY whose types is HOME as default.
1230 * If HOME doesn't exist, select LAN.
1231 */
1232 static u16 sis190_default_phy(struct net_device *dev)
1233 {
1234 struct sis190_phy *phy, *phy_home, *phy_default, *phy_lan;
1235 struct sis190_private *tp = netdev_priv(dev);
1236 struct mii_if_info *mii_if = &tp->mii_if;
1237 void __iomem *ioaddr = tp->mmio_addr;
1238 u16 status;
1239
1240 phy_home = phy_default = phy_lan = NULL;
1241
1242 list_for_each_entry(phy, &tp->first_phy, list) {
1243 status = mdio_read_latched(ioaddr, phy->phy_id, MII_BMSR);
1244
1245 // Link ON & Not select default PHY & not ghost PHY.
1246 if ((status & BMSR_LSTATUS) &&
1247 !phy_default &&
1248 (phy->type != UNKNOWN)) {
1249 phy_default = phy;
1250 } else {
1251 status = mdio_read(ioaddr, phy->phy_id, MII_BMCR);
1252 mdio_write(ioaddr, phy->phy_id, MII_BMCR,
1253 status | BMCR_ANENABLE | BMCR_ISOLATE);
1254 if (phy->type == HOME)
1255 phy_home = phy;
1256 else if (phy->type == LAN)
1257 phy_lan = phy;
1258 }
1259 }
1260
1261 if (!phy_default) {
1262 if (phy_home)
1263 phy_default = phy_home;
1264 else if (phy_lan)
1265 phy_default = phy_lan;
1266 else
1267 phy_default = list_entry(&tp->first_phy,
1268 struct sis190_phy, list);
1269 }
1270
1271 if (mii_if->phy_id != phy_default->phy_id) {
1272 mii_if->phy_id = phy_default->phy_id;
1273 net_probe(tp, KERN_INFO
1274 "%s: Using transceiver at address %d as default.\n",
1275 pci_name(tp->pci_dev), mii_if->phy_id);
1276 }
1277
1278 status = mdio_read(ioaddr, mii_if->phy_id, MII_BMCR);
1279 status &= (~BMCR_ISOLATE);
1280
1281 mdio_write(ioaddr, mii_if->phy_id, MII_BMCR, status);
1282 status = mdio_read_latched(ioaddr, mii_if->phy_id, MII_BMSR);
1283
1284 return status;
1285 }
1286
1287 static void sis190_init_phy(struct net_device *dev, struct sis190_private *tp,
1288 struct sis190_phy *phy, unsigned int phy_id,
1289 u16 mii_status)
1290 {
1291 void __iomem *ioaddr = tp->mmio_addr;
1292 struct mii_chip_info *p;
1293
1294 INIT_LIST_HEAD(&phy->list);
1295 phy->status = mii_status;
1296 phy->phy_id = phy_id;
1297
1298 phy->id[0] = mdio_read(ioaddr, phy_id, MII_PHYSID1);
1299 phy->id[1] = mdio_read(ioaddr, phy_id, MII_PHYSID2);
1300
1301 for (p = mii_chip_table; p->type; p++) {
1302 if ((p->id[0] == phy->id[0]) &&
1303 (p->id[1] == (phy->id[1] & 0xfff0))) {
1304 break;
1305 }
1306 }
1307
1308 if (p->id[1]) {
1309 phy->type = (p->type == MIX) ?
1310 ((mii_status & (BMSR_100FULL | BMSR_100HALF)) ?
1311 LAN : HOME) : p->type;
1312 } else
1313 phy->type = UNKNOWN;
1314
1315 net_probe(tp, KERN_INFO "%s: %s transceiver at address %d.\n",
1316 pci_name(tp->pci_dev),
1317 (phy->type == UNKNOWN) ? "Unknown PHY" : p->name, phy_id);
1318 }
1319
1320 /**
1321 * sis190_mii_probe - Probe MII PHY for sis190
1322 * @dev: the net device to probe for
1323 *
1324 * Search for total of 32 possible mii phy addresses.
1325 * Identify and set current phy if found one,
1326 * return error if it failed to found.
1327 */
1328 static int __devinit sis190_mii_probe(struct net_device *dev)
1329 {
1330 struct sis190_private *tp = netdev_priv(dev);
1331 struct mii_if_info *mii_if = &tp->mii_if;
1332 void __iomem *ioaddr = tp->mmio_addr;
1333 int phy_id;
1334 int rc = 0;
1335
1336 INIT_LIST_HEAD(&tp->first_phy);
1337
1338 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1339 struct sis190_phy *phy;
1340 u16 status;
1341
1342 status = mdio_read_latched(ioaddr, phy_id, MII_BMSR);
1343
1344 // Try next mii if the current one is not accessible.
1345 if (status == 0xffff || status == 0x0000)
1346 continue;
1347
1348 phy = kmalloc(sizeof(*phy), GFP_KERNEL);
1349 if (!phy) {
1350 sis190_free_phy(&tp->first_phy);
1351 rc = -ENOMEM;
1352 goto out;
1353 }
1354
1355 sis190_init_phy(dev, tp, phy, phy_id, status);
1356
1357 list_add(&tp->first_phy, &phy->list);
1358 }
1359
1360 if (list_empty(&tp->first_phy)) {
1361 net_probe(tp, KERN_INFO "%s: No MII transceivers found!\n",
1362 pci_name(tp->pci_dev));
1363 rc = -EIO;
1364 goto out;
1365 }
1366
1367 /* Select default PHY for mac */
1368 sis190_default_phy(dev);
1369
1370 mii_if->dev = dev;
1371 mii_if->mdio_read = __mdio_read;
1372 mii_if->mdio_write = __mdio_write;
1373 mii_if->phy_id_mask = PHY_ID_ANY;
1374 mii_if->reg_num_mask = MII_REG_ANY;
1375 out:
1376 return rc;
1377 }
1378
1379 static void __devexit sis190_mii_remove(struct net_device *dev)
1380 {
1381 struct sis190_private *tp = netdev_priv(dev);
1382
1383 sis190_free_phy(&tp->first_phy);
1384 }
1385
1386 static void sis190_release_board(struct pci_dev *pdev)
1387 {
1388 struct net_device *dev = pci_get_drvdata(pdev);
1389 struct sis190_private *tp = netdev_priv(dev);
1390
1391 iounmap(tp->mmio_addr);
1392 pci_release_regions(pdev);
1393 pci_disable_device(pdev);
1394 free_netdev(dev);
1395 }
1396
1397 static struct net_device * __devinit sis190_init_board(struct pci_dev *pdev)
1398 {
1399 struct sis190_private *tp;
1400 struct net_device *dev;
1401 void __iomem *ioaddr;
1402 int rc;
1403
1404 dev = alloc_etherdev(sizeof(*tp));
1405 if (!dev) {
1406 net_drv(&debug, KERN_ERR PFX "unable to alloc new ethernet\n");
1407 rc = -ENOMEM;
1408 goto err_out_0;
1409 }
1410
1411 SET_MODULE_OWNER(dev);
1412 SET_NETDEV_DEV(dev, &pdev->dev);
1413
1414 tp = netdev_priv(dev);
1415 tp->msg_enable = netif_msg_init(debug.msg_enable, SIS190_MSG_DEFAULT);
1416
1417 rc = pci_enable_device(pdev);
1418 if (rc < 0) {
1419 net_probe(tp, KERN_ERR "%s: enable failure\n", pci_name(pdev));
1420 goto err_free_dev_1;
1421 }
1422
1423 rc = -ENODEV;
1424
1425 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1426 net_probe(tp, KERN_ERR "%s: region #0 is no MMIO resource.\n",
1427 pci_name(pdev));
1428 goto err_pci_disable_2;
1429 }
1430 if (pci_resource_len(pdev, 0) < SIS190_REGS_SIZE) {
1431 net_probe(tp, KERN_ERR "%s: invalid PCI region size(s).\n",
1432 pci_name(pdev));
1433 goto err_pci_disable_2;
1434 }
1435
1436 rc = pci_request_regions(pdev, DRV_NAME);
1437 if (rc < 0) {
1438 net_probe(tp, KERN_ERR PFX "%s: could not request regions.\n",
1439 pci_name(pdev));
1440 goto err_pci_disable_2;
1441 }
1442
1443 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1444 if (rc < 0) {
1445 net_probe(tp, KERN_ERR "%s: DMA configuration failed.\n",
1446 pci_name(pdev));
1447 goto err_free_res_3;
1448 }
1449
1450 pci_set_master(pdev);
1451
1452 ioaddr = ioremap(pci_resource_start(pdev, 0), SIS190_REGS_SIZE);
1453 if (!ioaddr) {
1454 net_probe(tp, KERN_ERR "%s: cannot remap MMIO, aborting\n",
1455 pci_name(pdev));
1456 rc = -EIO;
1457 goto err_free_res_3;
1458 }
1459
1460 tp->pci_dev = pdev;
1461 tp->mmio_addr = ioaddr;
1462
1463 sis190_irq_mask_and_ack(ioaddr);
1464
1465 sis190_soft_reset(ioaddr);
1466 out:
1467 return dev;
1468
1469 err_free_res_3:
1470 pci_release_regions(pdev);
1471 err_pci_disable_2:
1472 pci_disable_device(pdev);
1473 err_free_dev_1:
1474 free_netdev(dev);
1475 err_out_0:
1476 dev = ERR_PTR(rc);
1477 goto out;
1478 }
1479
1480 static void sis190_tx_timeout(struct net_device *dev)
1481 {
1482 struct sis190_private *tp = netdev_priv(dev);
1483 void __iomem *ioaddr = tp->mmio_addr;
1484 u8 tmp8;
1485
1486 /* Disable Tx, if not already */
1487 tmp8 = SIS_R8(TxControl);
1488 if (tmp8 & CmdTxEnb)
1489 SIS_W8(TxControl, tmp8 & ~CmdTxEnb);
1490
1491
1492 net_tx_err(tp, KERN_INFO "%s: Transmit timeout, status %08x %08x.\n",
1493 dev->name, SIS_R32(TxControl), SIS_R32(TxSts));
1494
1495 /* Disable interrupts by clearing the interrupt mask. */
1496 SIS_W32(IntrMask, 0x0000);
1497
1498 /* Stop a shared interrupt from scavenging while we are. */
1499 spin_lock_irq(&tp->lock);
1500 sis190_tx_clear(tp);
1501 spin_unlock_irq(&tp->lock);
1502
1503 /* ...and finally, reset everything. */
1504 sis190_hw_start(dev);
1505
1506 netif_wake_queue(dev);
1507 }
1508
1509 static int __devinit sis190_get_mac_addr_from_eeprom(struct pci_dev *pdev,
1510 struct net_device *dev)
1511 {
1512 struct sis190_private *tp = netdev_priv(dev);
1513 void __iomem *ioaddr = tp->mmio_addr;
1514 u16 sig;
1515 int i;
1516
1517 net_probe(tp, KERN_INFO "%s: Read MAC address from EEPROM\n",
1518 pci_name(pdev));
1519
1520 /* Check to see if there is a sane EEPROM */
1521 sig = (u16) sis190_read_eeprom(ioaddr, EEPROMSignature);
1522
1523 if ((sig == 0xffff) || (sig == 0x0000)) {
1524 net_probe(tp, KERN_INFO "%s: Error EEPROM read %x.\n",
1525 pci_name(pdev), sig);
1526 return -EIO;
1527 }
1528
1529 /* Get MAC address from EEPROM */
1530 for (i = 0; i < MAC_ADDR_LEN / 2; i++) {
1531 __le16 w = sis190_read_eeprom(ioaddr, EEPROMMACAddr + i);
1532
1533 ((u16 *)dev->dev_addr)[0] = le16_to_cpu(w);
1534 }
1535
1536 return 0;
1537 }
1538
1539 /**
1540 * sis190_get_mac_addr_from_apc - Get MAC address for SiS965 model
1541 * @pdev: PCI device
1542 * @dev: network device to get address for
1543 *
1544 * SiS965 model, use APC CMOS RAM to store MAC address.
1545 * APC CMOS RAM is accessed through ISA bridge.
1546 * MAC address is read into @net_dev->dev_addr.
1547 */
1548 static int __devinit sis190_get_mac_addr_from_apc(struct pci_dev *pdev,
1549 struct net_device *dev)
1550 {
1551 struct sis190_private *tp = netdev_priv(dev);
1552 struct pci_dev *isa_bridge;
1553 u8 reg, tmp8;
1554 int i;
1555
1556 net_probe(tp, KERN_INFO "%s: Read MAC address from APC.\n",
1557 pci_name(pdev));
1558
1559 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0965, NULL);
1560 if (!isa_bridge) {
1561 net_probe(tp, KERN_INFO "%s: Can not find ISA bridge.\n",
1562 pci_name(pdev));
1563 return -EIO;
1564 }
1565
1566 /* Enable port 78h & 79h to access APC Registers. */
1567 pci_read_config_byte(isa_bridge, 0x48, &tmp8);
1568 reg = (tmp8 & ~0x02);
1569 pci_write_config_byte(isa_bridge, 0x48, reg);
1570 udelay(50);
1571 pci_read_config_byte(isa_bridge, 0x48, &reg);
1572
1573 for (i = 0; i < MAC_ADDR_LEN; i++) {
1574 outb(0x9 + i, 0x78);
1575 dev->dev_addr[i] = inb(0x79);
1576 }
1577
1578 outb(0x12, 0x78);
1579 reg = inb(0x79);
1580
1581 /* Restore the value to ISA Bridge */
1582 pci_write_config_byte(isa_bridge, 0x48, tmp8);
1583 pci_dev_put(isa_bridge);
1584
1585 return 0;
1586 }
1587
1588 /**
1589 * sis190_init_rxfilter - Initialize the Rx filter
1590 * @dev: network device to initialize
1591 *
1592 * Set receive filter address to our MAC address
1593 * and enable packet filtering.
1594 */
1595 static inline void sis190_init_rxfilter(struct net_device *dev)
1596 {
1597 struct sis190_private *tp = netdev_priv(dev);
1598 void __iomem *ioaddr = tp->mmio_addr;
1599 u16 ctl;
1600 int i;
1601
1602 ctl = SIS_R16(RxMacControl);
1603 /*
1604 * Disable packet filtering before setting filter.
1605 * Note: SiS's driver writes 32 bits but RxMacControl is 16 bits
1606 * only and followed by RxMacAddr (6 bytes). Strange. -- FR
1607 */
1608 SIS_W16(RxMacControl, ctl & ~0x0f00);
1609
1610 for (i = 0; i < MAC_ADDR_LEN; i++)
1611 SIS_W8(RxMacAddr + i, dev->dev_addr[i]);
1612
1613 SIS_W16(RxMacControl, ctl);
1614 SIS_PCI_COMMIT();
1615 }
1616
1617 static int sis190_get_mac_addr(struct pci_dev *pdev, struct net_device *dev)
1618 {
1619 u8 from;
1620
1621 pci_read_config_byte(pdev, 0x73, &from);
1622
1623 return (from & 0x00000001) ?
1624 sis190_get_mac_addr_from_apc(pdev, dev) :
1625 sis190_get_mac_addr_from_eeprom(pdev, dev);
1626 }
1627
1628 static void sis190_set_speed_auto(struct net_device *dev)
1629 {
1630 struct sis190_private *tp = netdev_priv(dev);
1631 void __iomem *ioaddr = tp->mmio_addr;
1632 int phy_id = tp->mii_if.phy_id;
1633 int val;
1634
1635 net_link(tp, KERN_INFO "%s: Enabling Auto-negotiation.\n", dev->name);
1636
1637 val = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
1638
1639 // Enable 10/100 Full/Half Mode, leave MII_ADVERTISE bit4:0
1640 // unchanged.
1641 mdio_write(ioaddr, phy_id, MII_ADVERTISE, (val & ADVERTISE_SLCT) |
1642 ADVERTISE_100FULL | ADVERTISE_10FULL |
1643 ADVERTISE_100HALF | ADVERTISE_10HALF);
1644
1645 // Enable 1000 Full Mode.
1646 mdio_write(ioaddr, phy_id, MII_CTRL1000, ADVERTISE_1000FULL);
1647
1648 // Enable auto-negotiation and restart auto-negotiation.
1649 mdio_write(ioaddr, phy_id, MII_BMCR,
1650 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET);
1651 }
1652
1653 static int sis190_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1654 {
1655 struct sis190_private *tp = netdev_priv(dev);
1656
1657 return mii_ethtool_gset(&tp->mii_if, cmd);
1658 }
1659
1660 static int sis190_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1661 {
1662 struct sis190_private *tp = netdev_priv(dev);
1663
1664 return mii_ethtool_sset(&tp->mii_if, cmd);
1665 }
1666
1667 static void sis190_get_drvinfo(struct net_device *dev,
1668 struct ethtool_drvinfo *info)
1669 {
1670 struct sis190_private *tp = netdev_priv(dev);
1671
1672 strcpy(info->driver, DRV_NAME);
1673 strcpy(info->version, DRV_VERSION);
1674 strcpy(info->bus_info, pci_name(tp->pci_dev));
1675 }
1676
1677 static int sis190_get_regs_len(struct net_device *dev)
1678 {
1679 return SIS190_REGS_SIZE;
1680 }
1681
1682 static void sis190_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1683 void *p)
1684 {
1685 struct sis190_private *tp = netdev_priv(dev);
1686 unsigned long flags;
1687
1688 if (regs->len > SIS190_REGS_SIZE)
1689 regs->len = SIS190_REGS_SIZE;
1690
1691 spin_lock_irqsave(&tp->lock, flags);
1692 memcpy_fromio(p, tp->mmio_addr, regs->len);
1693 spin_unlock_irqrestore(&tp->lock, flags);
1694 }
1695
1696 static int sis190_nway_reset(struct net_device *dev)
1697 {
1698 struct sis190_private *tp = netdev_priv(dev);
1699
1700 return mii_nway_restart(&tp->mii_if);
1701 }
1702
1703 static u32 sis190_get_msglevel(struct net_device *dev)
1704 {
1705 struct sis190_private *tp = netdev_priv(dev);
1706
1707 return tp->msg_enable;
1708 }
1709
1710 static void sis190_set_msglevel(struct net_device *dev, u32 value)
1711 {
1712 struct sis190_private *tp = netdev_priv(dev);
1713
1714 tp->msg_enable = value;
1715 }
1716
1717 static struct ethtool_ops sis190_ethtool_ops = {
1718 .get_settings = sis190_get_settings,
1719 .set_settings = sis190_set_settings,
1720 .get_drvinfo = sis190_get_drvinfo,
1721 .get_regs_len = sis190_get_regs_len,
1722 .get_regs = sis190_get_regs,
1723 .get_link = ethtool_op_get_link,
1724 .get_msglevel = sis190_get_msglevel,
1725 .set_msglevel = sis190_set_msglevel,
1726 .nway_reset = sis190_nway_reset,
1727 };
1728
1729 static int sis190_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1730 {
1731 struct sis190_private *tp = netdev_priv(dev);
1732
1733 return !netif_running(dev) ? -EINVAL :
1734 generic_mii_ioctl(&tp->mii_if, if_mii(ifr), cmd, NULL);
1735 }
1736
1737 static int __devinit sis190_init_one(struct pci_dev *pdev,
1738 const struct pci_device_id *ent)
1739 {
1740 static int printed_version = 0;
1741 struct sis190_private *tp;
1742 struct net_device *dev;
1743 void __iomem *ioaddr;
1744 int rc;
1745
1746 if (!printed_version) {
1747 net_drv(&debug, KERN_INFO SIS190_DRIVER_NAME " loaded.\n");
1748 printed_version = 1;
1749 }
1750
1751 dev = sis190_init_board(pdev);
1752 if (IS_ERR(dev)) {
1753 rc = PTR_ERR(dev);
1754 goto out;
1755 }
1756
1757 tp = netdev_priv(dev);
1758 ioaddr = tp->mmio_addr;
1759
1760 rc = sis190_get_mac_addr(pdev, dev);
1761 if (rc < 0)
1762 goto err_release_board;
1763
1764 sis190_init_rxfilter(dev);
1765
1766 INIT_WORK(&tp->phy_task, sis190_phy_task, dev);
1767
1768 dev->open = sis190_open;
1769 dev->stop = sis190_close;
1770 dev->do_ioctl = sis190_ioctl;
1771 dev->get_stats = sis190_get_stats;
1772 dev->tx_timeout = sis190_tx_timeout;
1773 dev->watchdog_timeo = SIS190_TX_TIMEOUT;
1774 dev->hard_start_xmit = sis190_start_xmit;
1775 #ifdef CONFIG_NET_POLL_CONTROLLER
1776 dev->poll_controller = sis190_netpoll;
1777 #endif
1778 dev->set_multicast_list = sis190_set_rx_mode;
1779 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops);
1780 dev->irq = pdev->irq;
1781 dev->base_addr = (unsigned long) 0xdead;
1782
1783 spin_lock_init(&tp->lock);
1784
1785 rc = sis190_mii_probe(dev);
1786 if (rc < 0)
1787 goto err_release_board;
1788
1789 rc = register_netdev(dev);
1790 if (rc < 0)
1791 goto err_remove_mii;
1792
1793 pci_set_drvdata(pdev, dev);
1794
1795 net_probe(tp, KERN_INFO "%s: %s at %p (IRQ: %d), "
1796 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
1797 pci_name(pdev), sis_chip_info[ent->driver_data].name,
1798 ioaddr, dev->irq,
1799 dev->dev_addr[0], dev->dev_addr[1],
1800 dev->dev_addr[2], dev->dev_addr[3],
1801 dev->dev_addr[4], dev->dev_addr[5]);
1802
1803 netif_carrier_off(dev);
1804
1805 sis190_set_speed_auto(dev);
1806 out:
1807 return rc;
1808
1809 err_remove_mii:
1810 sis190_mii_remove(dev);
1811 err_release_board:
1812 sis190_release_board(pdev);
1813 goto out;
1814 }
1815
1816 static void __devexit sis190_remove_one(struct pci_dev *pdev)
1817 {
1818 struct net_device *dev = pci_get_drvdata(pdev);
1819
1820 sis190_mii_remove(dev);
1821 unregister_netdev(dev);
1822 sis190_release_board(pdev);
1823 pci_set_drvdata(pdev, NULL);
1824 }
1825
1826 static struct pci_driver sis190_pci_driver = {
1827 .name = DRV_NAME,
1828 .id_table = sis190_pci_tbl,
1829 .probe = sis190_init_one,
1830 .remove = __devexit_p(sis190_remove_one),
1831 };
1832
1833 static int __init sis190_init_module(void)
1834 {
1835 return pci_module_init(&sis190_pci_driver);
1836 }
1837
1838 static void __exit sis190_cleanup_module(void)
1839 {
1840 pci_unregister_driver(&sis190_pci_driver);
1841 }
1842
1843 module_init(sis190_init_module);
1844 module_exit(sis190_cleanup_module);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree