arch/sh/include/asm/ubc.h

   1 /*
   2  * include/asm-sh/ubc.h
   3  *
   4  * Copyright (C) 1999 Niibe Yutaka
   5  * Copyright (C) 2002, 2003 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #ifndef __ASM_SH_UBC_H
  12 #define __ASM_SH_UBC_H
  13 #ifdef __KERNEL__
  14
  15 #include <cpu/ubc.h>
  16
  17 /* User Break Controller */
  18 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
  19 #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
  20 #else
  21 #define UBC_TYPE_SH7729 0
  22 #endif
  23
  24 #define BAMR_ASID               (1 << 2)
  25 #define BAMR_NONE               0
  26 #define BAMR_10                 0x1
  27 #define BAMR_12                 0x2
  28 #define BAMR_ALL                0x3
  29 #define BAMR_16                 0x8
  30 #define BAMR_20                 0x9
  31
  32 #define BBR_INST                (1 << 4)
  33 #define BBR_DATA                (2 << 4)
  34 #define BBR_READ                (1 << 2)
  35 #define BBR_WRITE               (2 << 2)
  36 #define BBR_BYTE                0x1
  37 #define BBR_HALF                0x2
  38 #define BBR_LONG                0x3
  39 #define BBR_QUAD                (1 << 6)        /* SH7750 */
  40 #define BBR_CPU                 (1 << 6)        /* SH7709A,SH7729 */
  41 #define BBR_DMA                 (2 << 6)        /* SH7709A,SH7729 */
  42
  43 #define BRCR_CMFA               (1 << 15)
  44 #define BRCR_CMFB               (1 << 14)
  45
  46 #if defined CONFIG_CPU_SH2A
  47 #define BRCR_CMFCA              (1 << 15)
  48 #define BRCR_CMFCB              (1 << 14)
  49 #define BRCR_CMFDA              (1 << 13)
  50 #define BRCR_CMFDB              (1 << 12)
  51 #define BRCR_PCBB               (1 << 6)        /* 1: after execution */
  52 #define BRCR_PCBA               (1 << 5)        /* 1: after execution */
  53 #define BRCR_PCTE               0
  54 #else
  55 #define BRCR_PCTE               (1 << 11)
  56 #define BRCR_PCBA               (1 << 10)       /* 1: after execution */
  57 #define BRCR_DBEB               (1 << 7)
  58 #define BRCR_PCBB               (1 << 6)
  59 #define BRCR_SEQ                (1 << 3)
  60 #define BRCR_UBDE               (1 << 0)
  61 #endif
  62
  63 #ifndef __ASSEMBLY__
  64 /* arch/sh/kernel/cpu/ubc.S */
  65 extern void ubc_sleep(void);
  66
  67 #ifdef CONFIG_UBC_WAKEUP
  68 extern void ubc_wakeup(void);
  69 #else
  70 #define ubc_wakeup()    do { } while (0)
  71 #endif
  72 #endif
  73
  74 #endif /* __KERNEL__ */
  75 #endif /* __ASM_SH_UBC_H */