1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/version.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/ethtool.h>
20 #include <linux/if_vlan.h>
21 #include <linux/timer.h>
22 #include <linux/mdio.h>
23 #include <linux/list.h>
24 #include <linux/pci.h>
25 #include <linux/device.h>
26 #include <linux/highmem.h>
27 #include <linux/workqueue.h>
28 #include <linux/i2c.h>
33 /**************************************************************************
37 **************************************************************************/
38 #ifndef EFX_DRIVER_NAME
39 #define EFX_DRIVER_NAME "sfc"
41 #define EFX_DRIVER_VERSION "3.0"
43 #ifdef EFX_ENABLE_DEBUG
44 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
47 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
48 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
51 /* Un-rate-limited logging */
52 #define EFX_ERR(efx, fmt, args...) \
53 dev_err(&((efx)->pci_dev->dev), "ERR: %s " fmt, efx_dev_name(efx), ##args)
55 #define EFX_INFO(efx, fmt, args...) \
56 dev_info(&((efx)->pci_dev->dev), "INFO: %s " fmt, efx_dev_name(efx), ##args)
58 #ifdef EFX_ENABLE_DEBUG
59 #define EFX_LOG(efx, fmt, args...) \
60 dev_info(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
62 #define EFX_LOG(efx, fmt, args...) \
63 dev_dbg(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
66 #define EFX_TRACE(efx, fmt, args...) do {} while (0)
68 #define EFX_REGDUMP(efx, fmt, args...) do {} while (0)
70 /* Rate-limited logging */
71 #define EFX_ERR_RL(efx, fmt, args...) \
72 do {if (net_ratelimit()) EFX_ERR(efx, fmt, ##args); } while (0)
74 #define EFX_INFO_RL(efx, fmt, args...) \
75 do {if (net_ratelimit()) EFX_INFO(efx, fmt, ##args); } while (0)
77 #define EFX_LOG_RL(efx, fmt, args...) \
78 do {if (net_ratelimit()) EFX_LOG(efx, fmt, ##args); } while (0)
80 /**************************************************************************
84 **************************************************************************/
86 #define EFX_MAX_CHANNELS 32
87 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
89 #define EFX_TX_QUEUE_OFFLOAD_CSUM 0
90 #define EFX_TX_QUEUE_NO_CSUM 1
91 #define EFX_TX_QUEUE_COUNT 2
94 * struct efx_special_buffer - An Efx special buffer
95 * @addr: CPU base address of the buffer
96 * @dma_addr: DMA base address of the buffer
97 * @len: Buffer length, in bytes
98 * @index: Buffer index within controller;s buffer table
99 * @entries: Number of buffer table entries
101 * Special buffers are used for the event queues and the TX and RX
102 * descriptor queues for each channel. They are *not* used for the
103 * actual transmit and receive buffers.
105 * Note that for Falcon, TX and RX descriptor queues live in host memory.
106 * Allocation and freeing procedures must take this into account.
108 struct efx_special_buffer
{
116 enum efx_flush_state
{
124 * struct efx_tx_buffer - An Efx TX buffer
125 * @skb: The associated socket buffer.
126 * Set only on the final fragment of a packet; %NULL for all other
127 * fragments. When this fragment completes, then we can free this
129 * @tsoh: The associated TSO header structure, or %NULL if this
130 * buffer is not a TSO header.
131 * @dma_addr: DMA address of the fragment.
132 * @len: Length of this fragment.
133 * This field is zero when the queue slot is empty.
134 * @continuation: True if this fragment is not the end of a packet.
135 * @unmap_single: True if pci_unmap_single should be used.
136 * @unmap_len: Length of this fragment to unmap
138 struct efx_tx_buffer
{
139 const struct sk_buff
*skb
;
140 struct efx_tso_header
*tsoh
;
145 unsigned short unmap_len
;
149 * struct efx_tx_queue - An Efx TX queue
151 * This is a ring buffer of TX fragments.
152 * Since the TX completion path always executes on the same
153 * CPU and the xmit path can operate on different CPUs,
154 * performance is increased by ensuring that the completion
155 * path and the xmit path operate on different cache lines.
156 * This is particularly important if the xmit path is always
157 * executing on one CPU which is different from the completion
158 * path. There is also a cache line for members which are
159 * read but not written on the fast path.
161 * @efx: The associated Efx NIC
162 * @queue: DMA queue number
163 * @channel: The associated channel
164 * @buffer: The software buffer ring
165 * @txd: The hardware descriptor ring
166 * @flushed: Used when handling queue flushing
167 * @read_count: Current read pointer.
168 * This is the number of buffers that have been removed from both rings.
169 * @stopped: Stopped count.
170 * Set if this TX queue is currently stopping its port.
171 * @insert_count: Current insert pointer
172 * This is the number of buffers that have been added to the
174 * @write_count: Current write pointer
175 * This is the number of buffers that have been added to the
177 * @old_read_count: The value of read_count when last checked.
178 * This is here for performance reasons. The xmit path will
179 * only get the up-to-date value of read_count if this
180 * variable indicates that the queue is full. This is to
181 * avoid cache-line ping-pong between the xmit path and the
183 * @tso_headers_free: A list of TSO headers allocated for this TX queue
184 * that are not in use, and so available for new TSO sends. The list
185 * is protected by the TX queue lock.
186 * @tso_bursts: Number of times TSO xmit invoked by kernel
187 * @tso_long_headers: Number of packets with headers too long for standard
189 * @tso_packets: Number of packets via the TSO xmit path
191 struct efx_tx_queue
{
192 /* Members which don't change on the fast path */
193 struct efx_nic
*efx ____cacheline_aligned_in_smp
;
195 struct efx_channel
*channel
;
197 struct efx_tx_buffer
*buffer
;
198 struct efx_special_buffer txd
;
199 enum efx_flush_state flushed
;
201 /* Members used mainly on the completion path */
202 unsigned int read_count ____cacheline_aligned_in_smp
;
205 /* Members used only on the xmit path */
206 unsigned int insert_count ____cacheline_aligned_in_smp
;
207 unsigned int write_count
;
208 unsigned int old_read_count
;
209 struct efx_tso_header
*tso_headers_free
;
210 unsigned int tso_bursts
;
211 unsigned int tso_long_headers
;
212 unsigned int tso_packets
;
216 * struct efx_rx_buffer - An Efx RX data buffer
217 * @dma_addr: DMA base address of the buffer
218 * @skb: The associated socket buffer, if any.
219 * If both this and page are %NULL, the buffer slot is currently free.
220 * @page: The associated page buffer, if any.
221 * If both this and skb are %NULL, the buffer slot is currently free.
222 * @data: Pointer to ethernet header
223 * @len: Buffer length, in bytes.
224 * @unmap_addr: DMA address to unmap
226 struct efx_rx_buffer
{
232 dma_addr_t unmap_addr
;
236 * struct efx_rx_queue - An Efx RX queue
237 * @efx: The associated Efx NIC
238 * @queue: DMA queue number
239 * @channel: The associated channel
240 * @buffer: The software buffer ring
241 * @rxd: The hardware descriptor ring
242 * @added_count: Number of buffers added to the receive queue.
243 * @notified_count: Number of buffers given to NIC (<= @added_count).
244 * @removed_count: Number of buffers removed from the receive queue.
245 * @add_lock: Receive queue descriptor add spin lock.
246 * This lock must be held in order to add buffers to the RX
247 * descriptor ring (rxd and buffer) and to update added_count (but
248 * not removed_count).
249 * @max_fill: RX descriptor maximum fill level (<= ring size)
250 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
252 * @fast_fill_limit: The level to which a fast fill will fill
253 * (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
254 * @min_fill: RX descriptor minimum non-zero fill level.
255 * This records the minimum fill level observed when a ring
256 * refill was triggered.
257 * @min_overfill: RX descriptor minimum overflow fill level.
258 * This records the minimum fill level at which RX queue
259 * overflow was observed. It should never be set.
260 * @alloc_page_count: RX allocation strategy counter.
261 * @alloc_skb_count: RX allocation strategy counter.
262 * @work: Descriptor push work thread
263 * @buf_page: Page for next RX buffer.
264 * We can use a single page for multiple RX buffers. This tracks
265 * the remaining space in the allocation.
266 * @buf_dma_addr: Page's DMA address.
267 * @buf_data: Page's host address.
268 * @flushed: Use when handling queue flushing
270 struct efx_rx_queue
{
273 struct efx_channel
*channel
;
274 struct efx_rx_buffer
*buffer
;
275 struct efx_special_buffer rxd
;
281 unsigned int max_fill
;
282 unsigned int fast_fill_trigger
;
283 unsigned int fast_fill_limit
;
284 unsigned int min_fill
;
285 unsigned int min_overfill
;
286 unsigned int alloc_page_count
;
287 unsigned int alloc_skb_count
;
288 struct delayed_work work
;
289 unsigned int slow_fill_count
;
291 struct page
*buf_page
;
292 dma_addr_t buf_dma_addr
;
294 enum efx_flush_state flushed
;
298 * struct efx_buffer - An Efx general-purpose buffer
299 * @addr: host base address of the buffer
300 * @dma_addr: DMA base address of the buffer
301 * @len: Buffer length, in bytes
303 * Falcon uses these buffers for its interrupt status registers and
313 /* Flags for channel->used_flags */
314 #define EFX_USED_BY_RX 1
315 #define EFX_USED_BY_TX 2
316 #define EFX_USED_BY_RX_TX (EFX_USED_BY_RX | EFX_USED_BY_TX)
318 enum efx_rx_alloc_method
{
319 RX_ALLOC_METHOD_AUTO
= 0,
320 RX_ALLOC_METHOD_SKB
= 1,
321 RX_ALLOC_METHOD_PAGE
= 2,
325 * struct efx_channel - An Efx channel
327 * A channel comprises an event queue, at least one TX queue, at least
328 * one RX queue, and an associated tasklet for processing the event
331 * @efx: Associated Efx NIC
332 * @channel: Channel instance number
333 * @name: Name for channel and IRQ
334 * @used_flags: Channel is used by net driver
335 * @enabled: Channel enabled indicator
336 * @irq: IRQ number (MSI and MSI-X only)
337 * @irq_moderation: IRQ moderation value (in hardware ticks)
338 * @napi_dev: Net device used with NAPI
339 * @napi_str: NAPI control structure
340 * @reset_work: Scheduled reset work thread
341 * @work_pending: Is work pending via NAPI?
342 * @eventq: Event queue buffer
343 * @eventq_read_ptr: Event queue read pointer
344 * @last_eventq_read_ptr: Last event queue read pointer value.
345 * @eventq_magic: Event queue magic value for driver-generated test events
346 * @irq_count: Number of IRQs since last adaptive moderation decision
347 * @irq_mod_score: IRQ moderation score
348 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
349 * and diagnostic counters
350 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
352 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
353 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
354 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
355 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
356 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
357 * @n_rx_overlength: Count of RX_OVERLENGTH errors
358 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
363 char name
[IFNAMSIZ
+ 6];
367 unsigned int irq_moderation
;
368 struct net_device
*napi_dev
;
369 struct napi_struct napi_str
;
371 struct efx_special_buffer eventq
;
372 unsigned int eventq_read_ptr
;
373 unsigned int last_eventq_read_ptr
;
374 unsigned int eventq_magic
;
376 unsigned int irq_count
;
377 unsigned int irq_mod_score
;
380 int rx_alloc_push_pages
;
382 unsigned n_rx_tobe_disc
;
383 unsigned n_rx_ip_hdr_chksum_err
;
384 unsigned n_rx_tcp_udp_chksum_err
;
385 unsigned n_rx_mcast_mismatch
;
386 unsigned n_rx_frm_trunc
;
387 unsigned n_rx_overlength
;
388 unsigned n_skbuff_leaks
;
390 /* Used to pipeline received packets in order to optimise memory
391 * access with prefetches.
393 struct efx_rx_buffer
*rx_pkt
;
404 #define STRING_TABLE_LOOKUP(val, member) \
405 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
407 extern const char *efx_loopback_mode_names
[];
408 extern const unsigned int efx_loopback_mode_max
;
409 #define LOOPBACK_MODE(efx) \
410 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
412 extern const char *efx_interrupt_mode_names
[];
413 extern const unsigned int efx_interrupt_mode_max
;
414 #define INT_MODE(efx) \
415 STRING_TABLE_LOOKUP(efx->interrupt_mode, efx_interrupt_mode)
417 extern const char *efx_reset_type_names
[];
418 extern const unsigned int efx_reset_type_max
;
419 #define RESET_TYPE(type) \
420 STRING_TABLE_LOOKUP(type, efx_reset_type)
423 /* Be careful if altering to correct macro below */
424 EFX_INT_MODE_MSIX
= 0,
425 EFX_INT_MODE_MSI
= 1,
426 EFX_INT_MODE_LEGACY
= 2,
427 EFX_INT_MODE_MAX
/* Insert any new items before this */
429 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
431 #define EFX_IS10G(efx) ((efx)->link_state.speed == 10000)
442 * Alignment of page-allocated RX buffers
444 * Controls the number of bytes inserted at the start of an RX buffer.
445 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
446 * of the skb->head for hardware DMA].
448 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
449 #define EFX_PAGE_IP_ALIGN 0
451 #define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
455 * Alignment of the skb->head which wraps a page-allocated RX buffer
457 * The skb allocated to wrap an rx_buffer can have this alignment. Since
458 * the data is memcpy'd from the rx_buf, it does not need to be equal to
461 #define EFX_PAGE_SKB_ALIGN 2
463 /* Forward declaration */
466 /* Pseudo bit-mask flow control field */
468 EFX_FC_RX
= FLOW_CTRL_RX
,
469 EFX_FC_TX
= FLOW_CTRL_TX
,
474 * struct efx_link_state - Current state of the link
476 * @fd: Link is full-duplex
477 * @fc: Actual flow control flags
478 * @speed: Link speed (Mbps)
480 struct efx_link_state
{
487 static inline bool efx_link_state_equal(const struct efx_link_state
*left
,
488 const struct efx_link_state
*right
)
490 return left
->up
== right
->up
&& left
->fd
== right
->fd
&&
491 left
->fc
== right
->fc
&& left
->speed
== right
->speed
;
495 * struct efx_mac_operations - Efx MAC operations table
496 * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
497 * @update_stats: Update statistics
498 * @check_fault: Check fault state. True if fault present.
500 struct efx_mac_operations
{
501 int (*reconfigure
) (struct efx_nic
*efx
);
502 void (*update_stats
) (struct efx_nic
*efx
);
503 bool (*check_fault
)(struct efx_nic
*efx
);
507 * struct efx_phy_operations - Efx PHY operations table
508 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
509 * efx->loopback_modes.
510 * @init: Initialise PHY
511 * @fini: Shut down PHY
512 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
513 * @poll: Update @link_state and report whether it changed.
514 * Serialised by the mac_lock.
515 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
516 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
517 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
518 * (only needed where AN bit is set in mmds)
519 * @test_name: Get the name of a PHY-specific test/result
520 * @run_tests: Run tests and record results as appropriate.
521 * Flags are the ethtool tests flags.
523 struct efx_phy_operations
{
524 int (*probe
) (struct efx_nic
*efx
);
525 int (*init
) (struct efx_nic
*efx
);
526 void (*fini
) (struct efx_nic
*efx
);
527 void (*remove
) (struct efx_nic
*efx
);
528 int (*reconfigure
) (struct efx_nic
*efx
);
529 bool (*poll
) (struct efx_nic
*efx
);
530 void (*get_settings
) (struct efx_nic
*efx
,
531 struct ethtool_cmd
*ecmd
);
532 int (*set_settings
) (struct efx_nic
*efx
,
533 struct ethtool_cmd
*ecmd
);
534 void (*set_npage_adv
) (struct efx_nic
*efx
, u32
);
535 const char *(*test_name
) (struct efx_nic
*efx
, unsigned int index
);
536 int (*run_tests
) (struct efx_nic
*efx
, int *results
, unsigned flags
);
540 * @enum efx_phy_mode - PHY operating mode flags
541 * @PHY_MODE_NORMAL: on and should pass traffic
542 * @PHY_MODE_TX_DISABLED: on with TX disabled
543 * @PHY_MODE_LOW_POWER: set to low power through MDIO
544 * @PHY_MODE_OFF: switched off through external control
545 * @PHY_MODE_SPECIAL: on but will not pass traffic
549 PHY_MODE_TX_DISABLED
= 1,
550 PHY_MODE_LOW_POWER
= 2,
552 PHY_MODE_SPECIAL
= 8,
555 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode
)
557 return !!(mode
& ~PHY_MODE_TX_DISABLED
);
561 * Efx extended statistics
563 * Not all statistics are provided by all supported MACs. The purpose
564 * is this structure is to contain the raw statistics provided by each
567 struct efx_mac_stats
{
571 unsigned long tx_packets
;
572 unsigned long tx_bad
;
573 unsigned long tx_pause
;
574 unsigned long tx_control
;
575 unsigned long tx_unicast
;
576 unsigned long tx_multicast
;
577 unsigned long tx_broadcast
;
578 unsigned long tx_lt64
;
580 unsigned long tx_65_to_127
;
581 unsigned long tx_128_to_255
;
582 unsigned long tx_256_to_511
;
583 unsigned long tx_512_to_1023
;
584 unsigned long tx_1024_to_15xx
;
585 unsigned long tx_15xx_to_jumbo
;
586 unsigned long tx_gtjumbo
;
587 unsigned long tx_collision
;
588 unsigned long tx_single_collision
;
589 unsigned long tx_multiple_collision
;
590 unsigned long tx_excessive_collision
;
591 unsigned long tx_deferred
;
592 unsigned long tx_late_collision
;
593 unsigned long tx_excessive_deferred
;
594 unsigned long tx_non_tcpudp
;
595 unsigned long tx_mac_src_error
;
596 unsigned long tx_ip_src_error
;
600 unsigned long rx_packets
;
601 unsigned long rx_good
;
602 unsigned long rx_bad
;
603 unsigned long rx_pause
;
604 unsigned long rx_control
;
605 unsigned long rx_unicast
;
606 unsigned long rx_multicast
;
607 unsigned long rx_broadcast
;
608 unsigned long rx_lt64
;
610 unsigned long rx_65_to_127
;
611 unsigned long rx_128_to_255
;
612 unsigned long rx_256_to_511
;
613 unsigned long rx_512_to_1023
;
614 unsigned long rx_1024_to_15xx
;
615 unsigned long rx_15xx_to_jumbo
;
616 unsigned long rx_gtjumbo
;
617 unsigned long rx_bad_lt64
;
618 unsigned long rx_bad_64_to_15xx
;
619 unsigned long rx_bad_15xx_to_jumbo
;
620 unsigned long rx_bad_gtjumbo
;
621 unsigned long rx_overflow
;
622 unsigned long rx_missed
;
623 unsigned long rx_false_carrier
;
624 unsigned long rx_symbol_error
;
625 unsigned long rx_align_error
;
626 unsigned long rx_length_error
;
627 unsigned long rx_internal_error
;
628 unsigned long rx_good_lt64
;
631 /* Number of bits used in a multicast filter hash address */
632 #define EFX_MCAST_HASH_BITS 8
634 /* Number of (single-bit) entries in a multicast filter hash */
635 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
637 /* An Efx multicast filter hash */
638 union efx_multicast_hash
{
639 u8 byte
[EFX_MCAST_HASH_ENTRIES
/ 8];
640 efx_oword_t oword
[EFX_MCAST_HASH_ENTRIES
/ sizeof(efx_oword_t
) / 8];
644 * struct efx_nic - an Efx NIC
645 * @name: Device name (net device name or bus id before net device registered)
646 * @pci_dev: The PCI device
647 * @type: Controller type attributes
648 * @legacy_irq: IRQ number
649 * @workqueue: Workqueue for port reconfigures and the HW monitor.
650 * Work items do not hold and must not acquire RTNL.
651 * @workqueue_name: Name of workqueue
652 * @reset_work: Scheduled reset workitem
653 * @monitor_work: Hardware monitor workitem
654 * @membase_phys: Memory BAR value as physical address
655 * @membase: Memory BAR value
656 * @biu_lock: BIU (bus interface unit) lock
657 * @interrupt_mode: Interrupt mode
658 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
659 * @irq_rx_moderation: IRQ moderation time for RX event queues
660 * @state: Device state flag. Serialised by the rtnl_lock.
661 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
662 * @tx_queue: TX DMA queues
663 * @rx_queue: RX DMA queues
665 * @next_buffer_table: First available buffer table id
666 * @n_rx_queues: Number of RX queues
667 * @n_channels: Number of channels in use
668 * @rx_buffer_len: RX buffer length
669 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
670 * @int_error_count: Number of internal errors seen recently
671 * @int_error_expire: Time at which error count will be expired
672 * @irq_status: Interrupt status buffer
673 * @last_irq_cpu: Last CPU to handle interrupt.
674 * This register is written with the SMP processor ID whenever an
675 * interrupt is handled. It is used by falcon_test_interrupt()
676 * to verify that an interrupt has occurred.
677 * @spi_flash: SPI flash device
678 * This field will be %NULL if no flash device is present (or for Siena).
679 * @spi_eeprom: SPI EEPROM device
680 * This field will be %NULL if no EEPROM device is present (or for Siena).
681 * @spi_lock: SPI bus lock
682 * @mtd_list: List of MTDs attached to the NIC
683 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
684 * @nic_data: Hardware dependant state
685 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
686 * @port_inhibited, efx_monitor() and efx_reconfigure_port()
687 * @port_enabled: Port enabled indicator.
688 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
689 * efx_mac_work() with kernel interfaces. Safe to read under any
690 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
691 * be held to modify it.
692 * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
693 * @port_initialized: Port initialized?
694 * @net_dev: Operating system network device. Consider holding the rtnl lock
695 * @rx_checksum_enabled: RX checksumming enabled
696 * @netif_stop_count: Port stop count
697 * @netif_stop_lock: Port stop lock
698 * @mac_stats: MAC statistics. These include all statistics the MACs
699 * can provide. Generic code converts these into a standard
700 * &struct net_device_stats.
701 * @stats_buffer: DMA buffer for statistics
702 * @stats_lock: Statistics update lock. Serialises statistics fetches
703 * @mac_op: MAC interface
704 * @mac_address: Permanent MAC address
705 * @phy_type: PHY type
706 * @mdio_lock: MDIO lock
707 * @phy_op: PHY interface
708 * @phy_data: PHY private data (including PHY-specific stats)
709 * @mdio: PHY MDIO interface
710 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
711 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
712 * @xmac_poll_required: XMAC link state needs polling
713 * @link_advertising: Autonegotiation advertising flags
714 * @link_state: Current state of the link
715 * @n_link_state_changes: Number of times the link has changed state
716 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
717 * @multicast_hash: Multicast hash table
718 * @wanted_fc: Wanted flow control flags
719 * @mac_work: Work item for changing MAC promiscuity and multicast hash
720 * @loopback_mode: Loopback status
721 * @loopback_modes: Supported loopback mode bitmask
722 * @loopback_selftest: Offline self-test private state
724 * The @priv field of the corresponding &struct net_device points to
729 struct pci_dev
*pci_dev
;
730 const struct efx_nic_type
*type
;
732 struct workqueue_struct
*workqueue
;
733 char workqueue_name
[16];
734 struct work_struct reset_work
;
735 struct delayed_work monitor_work
;
736 resource_size_t membase_phys
;
737 void __iomem
*membase
;
739 enum efx_int_mode interrupt_mode
;
740 bool irq_rx_adaptive
;
741 unsigned int irq_rx_moderation
;
743 enum nic_state state
;
744 enum reset_type reset_pending
;
746 struct efx_tx_queue tx_queue
[EFX_TX_QUEUE_COUNT
];
747 struct efx_rx_queue rx_queue
[EFX_MAX_RX_QUEUES
];
748 struct efx_channel channel
[EFX_MAX_CHANNELS
];
750 unsigned next_buffer_table
;
753 unsigned int rx_buffer_len
;
754 unsigned int rx_buffer_order
;
756 unsigned int_error_count
;
757 unsigned long int_error_expire
;
759 struct efx_buffer irq_status
;
760 volatile signed int last_irq_cpu
;
761 unsigned long irq_zero_count
;
763 struct efx_spi_device
*spi_flash
;
764 struct efx_spi_device
*spi_eeprom
;
765 struct mutex spi_lock
;
766 #ifdef CONFIG_SFC_MTD
767 struct list_head mtd_list
;
770 unsigned n_rx_nodesc_drop_cnt
;
774 struct mutex mac_lock
;
775 struct work_struct mac_work
;
779 bool port_initialized
;
780 struct net_device
*net_dev
;
781 bool rx_checksum_enabled
;
783 atomic_t netif_stop_count
;
784 spinlock_t netif_stop_lock
;
786 struct efx_mac_stats mac_stats
;
787 struct efx_buffer stats_buffer
;
788 spinlock_t stats_lock
;
790 struct efx_mac_operations
*mac_op
;
791 unsigned char mac_address
[ETH_ALEN
];
793 unsigned int phy_type
;
794 struct mutex mdio_lock
;
795 struct efx_phy_operations
*phy_op
;
797 struct mdio_if_info mdio
;
798 unsigned int mdio_bus
;
799 enum efx_phy_mode phy_mode
;
801 bool xmac_poll_required
;
802 u32 link_advertising
;
803 struct efx_link_state link_state
;
804 unsigned int n_link_state_changes
;
807 union efx_multicast_hash multicast_hash
;
808 enum efx_fc_type wanted_fc
;
811 enum efx_loopback_mode loopback_mode
;
814 void *loopback_selftest
;
817 static inline int efx_dev_registered(struct efx_nic
*efx
)
819 return efx
->net_dev
->reg_state
== NETREG_REGISTERED
;
822 /* Net device name, for inclusion in log messages if it has been registered.
823 * Use efx->name not efx->net_dev->name so that races with (un)registration
826 static inline const char *efx_dev_name(struct efx_nic
*efx
)
828 return efx_dev_registered(efx
) ? efx
->name
: "";
831 static inline unsigned int efx_port_num(struct efx_nic
*efx
)
833 return PCI_FUNC(efx
->pci_dev
->devfn
);
837 * struct efx_nic_type - Efx device type definition
838 * @probe: Probe the controller
839 * @remove: Free resources allocated by probe()
840 * @init: Initialise the controller
841 * @fini: Shut down the controller
842 * @monitor: Periodic function for polling link state and hardware monitor
843 * @reset: Reset the controller hardware and possibly the PHY. This will
844 * be called while the controller is uninitialised.
845 * @probe_port: Probe the MAC and PHY
846 * @remove_port: Free resources allocated by probe_port()
847 * @prepare_flush: Prepare the hardware for flushing the DMA queues
848 * @update_stats: Update statistics not provided by event handling
849 * @start_stats: Start the regular fetching of statistics
850 * @stop_stats: Stop the regular fetching of statistics
851 * @set_id_led: Set state of identifying LED or revert to automatic function
852 * @push_irq_moderation: Apply interrupt moderation value
853 * @push_multicast_hash: Apply multicast hash table
854 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
855 * @get_wol: Get WoL configuration from driver state
856 * @set_wol: Push WoL configuration to the NIC
857 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
858 * @test_registers: Test read/write functionality of control registers
859 * @test_nvram: Test validity of NVRAM contents
860 * @default_mac_ops: efx_mac_operations to set at startup
861 * @revision: Hardware architecture revision
862 * @mem_map_size: Memory BAR mapped size
863 * @txd_ptr_tbl_base: TX descriptor ring base address
864 * @rxd_ptr_tbl_base: RX descriptor ring base address
865 * @buf_tbl_base: Buffer table base address
866 * @evq_ptr_tbl_base: Event queue pointer table base address
867 * @evq_rptr_tbl_base: Event queue read-pointer table base address
868 * @max_dma_mask: Maximum possible DMA mask
869 * @rx_buffer_padding: Padding added to each RX buffer
870 * @max_interrupt_mode: Highest capability interrupt mode supported
871 * from &enum efx_init_mode.
872 * @phys_addr_channels: Number of channels with physically addressed
874 * @tx_dc_base: Base address in SRAM of TX queue descriptor caches
875 * @rx_dc_base: Base address in SRAM of RX queue descriptor caches
876 * @offload_features: net_device feature flags for protocol offload
877 * features implemented in hardware
878 * @reset_world_flags: Flags for additional components covered by
879 * reset method RESET_TYPE_WORLD
881 struct efx_nic_type
{
882 int (*probe
)(struct efx_nic
*efx
);
883 void (*remove
)(struct efx_nic
*efx
);
884 int (*init
)(struct efx_nic
*efx
);
885 void (*fini
)(struct efx_nic
*efx
);
886 void (*monitor
)(struct efx_nic
*efx
);
887 int (*reset
)(struct efx_nic
*efx
, enum reset_type method
);
888 int (*probe_port
)(struct efx_nic
*efx
);
889 void (*remove_port
)(struct efx_nic
*efx
);
890 void (*prepare_flush
)(struct efx_nic
*efx
);
891 void (*update_stats
)(struct efx_nic
*efx
);
892 void (*start_stats
)(struct efx_nic
*efx
);
893 void (*stop_stats
)(struct efx_nic
*efx
);
894 void (*set_id_led
)(struct efx_nic
*efx
, enum efx_led_mode mode
);
895 void (*push_irq_moderation
)(struct efx_channel
*channel
);
896 void (*push_multicast_hash
)(struct efx_nic
*efx
);
897 int (*reconfigure_port
)(struct efx_nic
*efx
);
898 void (*get_wol
)(struct efx_nic
*efx
, struct ethtool_wolinfo
*wol
);
899 int (*set_wol
)(struct efx_nic
*efx
, u32 type
);
900 void (*resume_wol
)(struct efx_nic
*efx
);
901 int (*test_registers
)(struct efx_nic
*efx
);
902 int (*test_nvram
)(struct efx_nic
*efx
);
903 struct efx_mac_operations
*default_mac_ops
;
906 unsigned int mem_map_size
;
907 unsigned int txd_ptr_tbl_base
;
908 unsigned int rxd_ptr_tbl_base
;
909 unsigned int buf_tbl_base
;
910 unsigned int evq_ptr_tbl_base
;
911 unsigned int evq_rptr_tbl_base
;
913 unsigned int rx_buffer_padding
;
914 unsigned int max_interrupt_mode
;
915 unsigned int phys_addr_channels
;
916 unsigned int tx_dc_base
;
917 unsigned int rx_dc_base
;
918 unsigned long offload_features
;
919 u32 reset_world_flags
;
922 /**************************************************************************
924 * Prototypes and inline functions
926 *************************************************************************/
928 /* Iterate over all used channels */
929 #define efx_for_each_channel(_channel, _efx) \
930 for (_channel = &_efx->channel[0]; \
931 _channel < &_efx->channel[EFX_MAX_CHANNELS]; \
933 if (!_channel->used_flags) \
937 /* Iterate over all used TX queues */
938 #define efx_for_each_tx_queue(_tx_queue, _efx) \
939 for (_tx_queue = &_efx->tx_queue[0]; \
940 _tx_queue < &_efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
943 /* Iterate over all TX queues belonging to a channel */
944 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
945 for (_tx_queue = &_channel->efx->tx_queue[0]; \
946 _tx_queue < &_channel->efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
948 if (_tx_queue->channel != _channel) \
952 /* Iterate over all used RX queues */
953 #define efx_for_each_rx_queue(_rx_queue, _efx) \
954 for (_rx_queue = &_efx->rx_queue[0]; \
955 _rx_queue < &_efx->rx_queue[_efx->n_rx_queues]; \
958 /* Iterate over all RX queues belonging to a channel */
959 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
960 for (_rx_queue = &_channel->efx->rx_queue[_channel->channel]; \
963 if (_rx_queue->channel != _channel) \
967 /* Returns a pointer to the specified receive buffer in the RX
970 static inline struct efx_rx_buffer
*efx_rx_buffer(struct efx_rx_queue
*rx_queue
,
973 return (&rx_queue
->buffer
[index
]);
976 /* Set bit in a little-endian bitfield */
977 static inline void set_bit_le(unsigned nr
, unsigned char *addr
)
979 addr
[nr
/ 8] |= (1 << (nr
% 8));
982 /* Clear bit in a little-endian bitfield */
983 static inline void clear_bit_le(unsigned nr
, unsigned char *addr
)
985 addr
[nr
/ 8] &= ~(1 << (nr
% 8));
990 * EFX_MAX_FRAME_LEN - calculate maximum frame length
992 * This calculates the maximum frame length that will be used for a
993 * given MTU. The frame length will be equal to the MTU plus a
994 * constant amount of header space and padding. This is the quantity
995 * that the net driver will program into the MAC as the maximum frame
998 * The 10G MAC used in Falcon requires 8-byte alignment on the frame
999 * length, so we round up to the nearest 8.
1001 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1002 * XGMII cycle). If the frame length reaches the maximum value in the
1003 * same cycle, the XMAC can miss the IPG altogether. We work around
1004 * this by adding a further 16 bytes.
1006 #define EFX_MAX_FRAME_LEN(mtu) \
1007 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1010 #endif /* EFX_NET_DRIVER_H */