1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2009 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/rtnetlink.h>
12 #include "net_driver.h"
18 #include "workarounds.h"
20 /* Macros for unpacking the board revision */
21 /* The revision info is in host byte order. */
22 #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23 #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24 #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
27 #define FALCON_BOARD_SFE4001 0x01
28 #define FALCON_BOARD_SFE4002 0x02
29 #define FALCON_BOARD_SFN4111T 0x51
30 #define FALCON_BOARD_SFN4112F 0x52
32 /*****************************************************************************
33 * Support for LM87 sensor chip used on several boards
35 #define LM87_REG_ALARMS1 0x41
36 #define LM87_REG_ALARMS2 0x42
37 #define LM87_IN_LIMITS(nr, _min, _max) \
38 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
39 #define LM87_AIN_LIMITS(nr, _min, _max) \
40 0x3B + (nr), _max, 0x1A + (nr), _min
41 #define LM87_TEMP_INT_LIMITS(_min, _max) \
42 0x39, _max, 0x3A, _min
43 #define LM87_TEMP_EXT1_LIMITS(_min, _max) \
44 0x37, _max, 0x38, _min
46 #define LM87_ALARM_TEMP_INT 0x10
47 #define LM87_ALARM_TEMP_EXT1 0x20
49 #if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
51 static int efx_init_lm87(struct efx_nic
*efx
, struct i2c_board_info
*info
,
54 struct falcon_board
*board
= falcon_board(efx
);
55 struct i2c_client
*client
= i2c_new_device(&board
->i2c_adap
, info
);
62 u8 reg
= *reg_values
++;
63 u8 value
= *reg_values
++;
64 rc
= i2c_smbus_write_byte_data(client
, reg
, value
);
69 board
->hwmon_client
= client
;
73 i2c_unregister_device(client
);
77 static void efx_fini_lm87(struct efx_nic
*efx
)
79 i2c_unregister_device(falcon_board(efx
)->hwmon_client
);
82 static int efx_check_lm87(struct efx_nic
*efx
, unsigned mask
)
84 struct i2c_client
*client
= falcon_board(efx
)->hwmon_client
;
87 /* If link is up then do not monitor temperature */
88 if (EFX_WORKAROUND_7884(efx
) && efx
->link_state
.up
)
91 alarms1
= i2c_smbus_read_byte_data(client
, LM87_REG_ALARMS1
);
92 alarms2
= i2c_smbus_read_byte_data(client
, LM87_REG_ALARMS2
);
99 if (alarms1
|| alarms2
) {
101 "LM87 detected a hardware failure (status %02x:%02x)"
104 (alarms1
& LM87_ALARM_TEMP_INT
) ? " INTERNAL" : "",
105 (alarms1
& LM87_ALARM_TEMP_EXT1
) ? " EXTERNAL" : "");
112 #else /* !CONFIG_SENSORS_LM87 */
115 efx_init_lm87(struct efx_nic
*efx
, struct i2c_board_info
*info
,
116 const u8
*reg_values
)
120 static inline void efx_fini_lm87(struct efx_nic
*efx
)
123 static inline int efx_check_lm87(struct efx_nic
*efx
, unsigned mask
)
128 #endif /* CONFIG_SENSORS_LM87 */
130 /*****************************************************************************
131 * Support for the SFE4001 and SFN4111T NICs.
133 * The SFE4001 does not power-up fully at reset due to its high power
134 * consumption. We control its power via a PCA9539 I/O expander.
135 * Both boards have a MAX6647 temperature monitor which we expose to
138 * This also provides minimal support for reflashing the PHY, which is
139 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
140 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
141 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
142 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
143 * exclusive with the network device being open.
146 /**************************************************************************
147 * Support for I2C IO Expander device on SFE4001
153 #define P0_INVERT 0x04
154 #define P0_CONFIG 0x06
156 #define P0_EN_1V0X_LBN 0
157 #define P0_EN_1V0X_WIDTH 1
158 #define P0_EN_1V2_LBN 1
159 #define P0_EN_1V2_WIDTH 1
160 #define P0_EN_2V5_LBN 2
161 #define P0_EN_2V5_WIDTH 1
162 #define P0_EN_3V3X_LBN 3
163 #define P0_EN_3V3X_WIDTH 1
164 #define P0_EN_5V_LBN 4
165 #define P0_EN_5V_WIDTH 1
166 #define P0_SHORTEN_JTAG_LBN 5
167 #define P0_SHORTEN_JTAG_WIDTH 1
168 #define P0_X_TRST_LBN 6
169 #define P0_X_TRST_WIDTH 1
170 #define P0_DSP_RESET_LBN 7
171 #define P0_DSP_RESET_WIDTH 1
175 #define P1_INVERT 0x05
176 #define P1_CONFIG 0x07
178 #define P1_AFE_PWD_LBN 0
179 #define P1_AFE_PWD_WIDTH 1
180 #define P1_DSP_PWD25_LBN 1
181 #define P1_DSP_PWD25_WIDTH 1
182 #define P1_RESERVED_LBN 2
183 #define P1_RESERVED_WIDTH 2
184 #define P1_SPARE_LBN 4
185 #define P1_SPARE_WIDTH 4
187 /* Temperature Sensor */
188 #define MAX664X_REG_RSL 0x02
189 #define MAX664X_REG_WLHO 0x0B
191 static void sfe4001_poweroff(struct efx_nic
*efx
)
193 struct i2c_client
*ioexp_client
= falcon_board(efx
)->ioexp_client
;
194 struct i2c_client
*hwmon_client
= falcon_board(efx
)->hwmon_client
;
196 /* Turn off all power rails and disable outputs */
197 i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, 0xff);
198 i2c_smbus_write_byte_data(ioexp_client
, P1_CONFIG
, 0xff);
199 i2c_smbus_write_byte_data(ioexp_client
, P0_CONFIG
, 0xff);
201 /* Clear any over-temperature alert */
202 i2c_smbus_read_byte_data(hwmon_client
, MAX664X_REG_RSL
);
205 static int sfe4001_poweron(struct efx_nic
*efx
)
207 struct i2c_client
*ioexp_client
= falcon_board(efx
)->ioexp_client
;
208 struct i2c_client
*hwmon_client
= falcon_board(efx
)->hwmon_client
;
213 /* Clear any previous over-temperature alert */
214 rc
= i2c_smbus_read_byte_data(hwmon_client
, MAX664X_REG_RSL
);
218 /* Enable port 0 and port 1 outputs on IO expander */
219 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_CONFIG
, 0x00);
222 rc
= i2c_smbus_write_byte_data(ioexp_client
, P1_CONFIG
,
223 0xff & ~(1 << P1_SPARE_LBN
));
227 /* If PHY power is on, turn it all off and wait 1 second to
228 * ensure a full reset.
230 rc
= i2c_smbus_read_byte_data(ioexp_client
, P0_OUT
);
233 out
= 0xff & ~((0 << P0_EN_1V2_LBN
) | (0 << P0_EN_2V5_LBN
) |
234 (0 << P0_EN_3V3X_LBN
) | (0 << P0_EN_5V_LBN
) |
235 (0 << P0_EN_1V0X_LBN
));
237 EFX_INFO(efx
, "power-cycling PHY\n");
238 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
241 schedule_timeout_uninterruptible(HZ
);
244 for (i
= 0; i
< 20; ++i
) {
245 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
246 out
= 0xff & ~((1 << P0_EN_1V2_LBN
) | (1 << P0_EN_2V5_LBN
) |
247 (1 << P0_EN_3V3X_LBN
) | (1 << P0_EN_5V_LBN
) |
248 (1 << P0_X_TRST_LBN
));
249 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
250 out
|= 1 << P0_EN_3V3X_LBN
;
252 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
257 /* Turn on 1V power rail */
258 out
&= ~(1 << P0_EN_1V0X_LBN
);
259 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
263 EFX_INFO(efx
, "waiting for DSP boot (attempt %d)...\n", i
);
265 /* In flash config mode, DSP does not turn on AFE, so
266 * just wait 1 second.
268 if (efx
->phy_mode
& PHY_MODE_SPECIAL
) {
269 schedule_timeout_uninterruptible(HZ
);
273 for (j
= 0; j
< 10; ++j
) {
276 /* Check DSP has asserted AFE power line */
277 rc
= i2c_smbus_read_byte_data(ioexp_client
, P1_IN
);
280 if (rc
& (1 << P1_AFE_PWD_LBN
))
285 EFX_INFO(efx
, "timed out waiting for DSP boot\n");
288 sfe4001_poweroff(efx
);
292 static int sfn4111t_reset(struct efx_nic
*efx
)
294 struct falcon_board
*board
= falcon_board(efx
);
297 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
298 i2c_lock_adapter(&board
->i2c_adap
);
300 /* Pull RST_N (GPIO 2) low then let it up again, setting the
301 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
302 * output enables; the output levels should always be 0 (low)
303 * and we rely on external pull-ups. */
304 efx_reado(efx
, ®
, FR_AB_GPIO_CTL
);
305 EFX_SET_OWORD_FIELD(reg
, FRF_AB_GPIO2_OEN
, true);
306 efx_writeo(efx
, ®
, FR_AB_GPIO_CTL
);
308 EFX_SET_OWORD_FIELD(reg
, FRF_AB_GPIO2_OEN
, false);
309 EFX_SET_OWORD_FIELD(reg
, FRF_AB_GPIO3_OEN
,
310 !!(efx
->phy_mode
& PHY_MODE_SPECIAL
));
311 efx_writeo(efx
, ®
, FR_AB_GPIO_CTL
);
314 i2c_unlock_adapter(&board
->i2c_adap
);
320 static ssize_t
show_phy_flash_cfg(struct device
*dev
,
321 struct device_attribute
*attr
, char *buf
)
323 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
324 return sprintf(buf
, "%d\n", !!(efx
->phy_mode
& PHY_MODE_SPECIAL
));
327 static ssize_t
set_phy_flash_cfg(struct device
*dev
,
328 struct device_attribute
*attr
,
329 const char *buf
, size_t count
)
331 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
332 enum efx_phy_mode old_mode
, new_mode
;
336 old_mode
= efx
->phy_mode
;
337 if (count
== 0 || *buf
== '0')
338 new_mode
= old_mode
& ~PHY_MODE_SPECIAL
;
340 new_mode
= PHY_MODE_SPECIAL
;
341 if (old_mode
== new_mode
) {
343 } else if (efx
->state
!= STATE_RUNNING
|| netif_running(efx
->net_dev
)) {
346 /* Reset the PHY, reconfigure the MAC and enable/disable
347 * MAC stats accordingly. */
348 efx
->phy_mode
= new_mode
;
349 if (new_mode
& PHY_MODE_SPECIAL
)
350 falcon_stop_nic_stats(efx
);
351 if (falcon_board(efx
)->type
->id
== FALCON_BOARD_SFE4001
)
352 err
= sfe4001_poweron(efx
);
354 err
= sfn4111t_reset(efx
);
356 err
= efx_reconfigure_port(efx
);
357 if (!(new_mode
& PHY_MODE_SPECIAL
))
358 falcon_start_nic_stats(efx
);
362 return err
? err
: count
;
365 static DEVICE_ATTR(phy_flash_cfg
, 0644, show_phy_flash_cfg
, set_phy_flash_cfg
);
367 static void sfe4001_fini(struct efx_nic
*efx
)
369 struct falcon_board
*board
= falcon_board(efx
);
371 EFX_INFO(efx
, "%s\n", __func__
);
373 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
374 sfe4001_poweroff(efx
);
375 i2c_unregister_device(board
->ioexp_client
);
376 i2c_unregister_device(board
->hwmon_client
);
379 static int sfe4001_check_hw(struct efx_nic
*efx
)
383 /* If XAUI link is up then do not monitor */
384 if (EFX_WORKAROUND_7884(efx
) && !efx
->xmac_poll_required
)
387 /* Check the powered status of the PHY. Lack of power implies that
388 * the MAX6647 has shut down power to it, probably due to a temp.
389 * alarm. Reading the power status rather than the MAX6647 status
390 * directly because the later is read-to-clear and would thus
391 * start to power up the PHY again when polled, causing us to blip
392 * the power undesirably.
393 * We know we can read from the IO expander because we did
394 * it during power-on. Assume failure now is bad news. */
395 status
= i2c_smbus_read_byte_data(falcon_board(efx
)->ioexp_client
, P1_IN
);
397 (status
& ((1 << P1_AFE_PWD_LBN
) | (1 << P1_DSP_PWD25_LBN
))) != 0)
400 /* Use board power control, not PHY power control */
401 sfe4001_poweroff(efx
);
402 efx
->phy_mode
= PHY_MODE_OFF
;
404 return (status
< 0) ? -EIO
: -ERANGE
;
407 static struct i2c_board_info sfe4001_hwmon_info
= {
408 I2C_BOARD_INFO("max6647", 0x4e),
411 /* This board uses an I2C expander to provider power to the PHY, which needs to
412 * be turned on before the PHY can be used.
413 * Context: Process context, rtnl lock held
415 static int sfe4001_init(struct efx_nic
*efx
)
417 struct falcon_board
*board
= falcon_board(efx
);
420 #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
421 board
->hwmon_client
=
422 i2c_new_device(&board
->i2c_adap
, &sfe4001_hwmon_info
);
424 board
->hwmon_client
=
425 i2c_new_dummy(&board
->i2c_adap
, sfe4001_hwmon_info
.addr
);
427 if (!board
->hwmon_client
)
430 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
431 rc
= i2c_smbus_write_byte_data(board
->hwmon_client
,
432 MAX664X_REG_WLHO
, 90);
436 board
->ioexp_client
= i2c_new_dummy(&board
->i2c_adap
, PCA9539
);
437 if (!board
->ioexp_client
) {
442 if (efx
->phy_mode
& PHY_MODE_SPECIAL
) {
443 /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
445 falcon_stop_nic_stats(efx
);
447 rc
= sfe4001_poweron(efx
);
451 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
455 EFX_INFO(efx
, "PHY is powered on\n");
459 sfe4001_poweroff(efx
);
461 i2c_unregister_device(board
->ioexp_client
);
463 i2c_unregister_device(board
->hwmon_client
);
467 static int sfn4111t_check_hw(struct efx_nic
*efx
)
471 /* If XAUI link is up then do not monitor */
472 if (EFX_WORKAROUND_7884(efx
) && !efx
->xmac_poll_required
)
475 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
476 status
= i2c_smbus_read_byte_data(falcon_board(efx
)->hwmon_client
,
485 static void sfn4111t_fini(struct efx_nic
*efx
)
487 EFX_INFO(efx
, "%s\n", __func__
);
489 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
490 i2c_unregister_device(falcon_board(efx
)->hwmon_client
);
493 static struct i2c_board_info sfn4111t_a0_hwmon_info
= {
494 I2C_BOARD_INFO("max6647", 0x4e),
497 static struct i2c_board_info sfn4111t_r5_hwmon_info
= {
498 I2C_BOARD_INFO("max6646", 0x4d),
501 static void sfn4111t_init_phy(struct efx_nic
*efx
)
503 if (!(efx
->phy_mode
& PHY_MODE_SPECIAL
)) {
504 if (sft9001_wait_boot(efx
) != -EINVAL
)
507 efx
->phy_mode
= PHY_MODE_SPECIAL
;
508 falcon_stop_nic_stats(efx
);
512 sft9001_wait_boot(efx
);
515 static int sfn4111t_init(struct efx_nic
*efx
)
517 struct falcon_board
*board
= falcon_board(efx
);
520 board
->hwmon_client
=
521 i2c_new_device(&board
->i2c_adap
,
523 &sfn4111t_a0_hwmon_info
:
524 &sfn4111t_r5_hwmon_info
);
525 if (!board
->hwmon_client
)
528 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
532 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
533 /* PHY may not generate a 156.25 MHz clock and MAC
534 * stats fetch will fail. */
535 falcon_stop_nic_stats(efx
);
540 i2c_unregister_device(board
->hwmon_client
);
544 /*****************************************************************************
545 * Support for the SFE4002
548 static u8 sfe4002_lm87_channel
= 0x03; /* use AIN not FAN inputs */
550 static const u8 sfe4002_lm87_regs
[] = {
551 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
552 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
553 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
554 LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
555 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
556 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
557 LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
558 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
559 LM87_TEMP_INT_LIMITS(10, 60), /* board */
560 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
564 static struct i2c_board_info sfe4002_hwmon_info
= {
565 I2C_BOARD_INFO("lm87", 0x2e),
566 .platform_data
= &sfe4002_lm87_channel
,
569 /****************************************************************************/
570 /* LED allocations. Note that on rev A0 boards the schematic and the reality
571 * differ: red and green are swapped. Below is the fixed (A1) layout (there
572 * are only 3 A0 boards in existence, so no real reason to make this
575 #define SFE4002_FAULT_LED (2) /* Red */
576 #define SFE4002_RX_LED (0) /* Green */
577 #define SFE4002_TX_LED (1) /* Amber */
579 static void sfe4002_init_phy(struct efx_nic
*efx
)
581 /* Set the TX and RX LEDs to reflect status and activity, and the
583 falcon_qt202x_set_led(efx
, SFE4002_TX_LED
,
584 QUAKE_LED_TXLINK
| QUAKE_LED_LINK_ACTSTAT
);
585 falcon_qt202x_set_led(efx
, SFE4002_RX_LED
,
586 QUAKE_LED_RXLINK
| QUAKE_LED_LINK_ACTSTAT
);
587 falcon_qt202x_set_led(efx
, SFE4002_FAULT_LED
, QUAKE_LED_OFF
);
590 static void sfe4002_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
592 falcon_qt202x_set_led(
593 efx
, SFE4002_FAULT_LED
,
594 (mode
== EFX_LED_ON
) ? QUAKE_LED_ON
: QUAKE_LED_OFF
);
597 static int sfe4002_check_hw(struct efx_nic
*efx
)
599 struct falcon_board
*board
= falcon_board(efx
);
601 /* A0 board rev. 4002s report a temperature fault the whole time
602 * (bad sensor) so we mask it out. */
603 unsigned alarm_mask
=
604 (board
->major
== 0 && board
->minor
== 0) ?
605 ~LM87_ALARM_TEMP_EXT1
: ~0;
607 return efx_check_lm87(efx
, alarm_mask
);
610 static int sfe4002_init(struct efx_nic
*efx
)
612 return efx_init_lm87(efx
, &sfe4002_hwmon_info
, sfe4002_lm87_regs
);
615 /*****************************************************************************
616 * Support for the SFN4112F
619 static u8 sfn4112f_lm87_channel
= 0x03; /* use AIN not FAN inputs */
621 static const u8 sfn4112f_lm87_regs
[] = {
622 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
623 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
624 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
625 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
626 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
627 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
628 LM87_TEMP_INT_LIMITS(10, 60), /* board */
629 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
633 static struct i2c_board_info sfn4112f_hwmon_info
= {
634 I2C_BOARD_INFO("lm87", 0x2e),
635 .platform_data
= &sfn4112f_lm87_channel
,
638 #define SFN4112F_ACT_LED 0
639 #define SFN4112F_LINK_LED 1
641 static void sfn4112f_init_phy(struct efx_nic
*efx
)
643 falcon_qt202x_set_led(efx
, SFN4112F_ACT_LED
,
644 QUAKE_LED_RXLINK
| QUAKE_LED_LINK_ACT
);
645 falcon_qt202x_set_led(efx
, SFN4112F_LINK_LED
,
646 QUAKE_LED_RXLINK
| QUAKE_LED_LINK_STAT
);
649 static void sfn4112f_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
661 reg
= QUAKE_LED_RXLINK
| QUAKE_LED_LINK_STAT
;
665 falcon_qt202x_set_led(efx
, SFN4112F_LINK_LED
, reg
);
668 static int sfn4112f_check_hw(struct efx_nic
*efx
)
670 /* Mask out unused sensors */
671 return efx_check_lm87(efx
, ~0x48);
674 static int sfn4112f_init(struct efx_nic
*efx
)
676 return efx_init_lm87(efx
, &sfn4112f_hwmon_info
, sfn4112f_lm87_regs
);
679 static const struct falcon_board_type board_types
[] = {
681 .id
= FALCON_BOARD_SFE4001
,
682 .ref_model
= "SFE4001",
683 .gen_type
= "10GBASE-T adapter",
684 .init
= sfe4001_init
,
685 .init_phy
= efx_port_dummy_op_void
,
686 .fini
= sfe4001_fini
,
687 .set_id_led
= tenxpress_set_id_led
,
688 .monitor
= sfe4001_check_hw
,
691 .id
= FALCON_BOARD_SFE4002
,
692 .ref_model
= "SFE4002",
693 .gen_type
= "XFP adapter",
694 .init
= sfe4002_init
,
695 .init_phy
= sfe4002_init_phy
,
696 .fini
= efx_fini_lm87
,
697 .set_id_led
= sfe4002_set_id_led
,
698 .monitor
= sfe4002_check_hw
,
701 .id
= FALCON_BOARD_SFN4111T
,
702 .ref_model
= "SFN4111T",
703 .gen_type
= "100/1000/10GBASE-T adapter",
704 .init
= sfn4111t_init
,
705 .init_phy
= sfn4111t_init_phy
,
706 .fini
= sfn4111t_fini
,
707 .set_id_led
= tenxpress_set_id_led
,
708 .monitor
= sfn4111t_check_hw
,
711 .id
= FALCON_BOARD_SFN4112F
,
712 .ref_model
= "SFN4112F",
713 .gen_type
= "SFP+ adapter",
714 .init
= sfn4112f_init
,
715 .init_phy
= sfn4112f_init_phy
,
716 .fini
= efx_fini_lm87
,
717 .set_id_led
= sfn4112f_set_id_led
,
718 .monitor
= sfn4112f_check_hw
,
722 static const struct falcon_board_type falcon_dummy_board
= {
723 .init
= efx_port_dummy_op_int
,
724 .init_phy
= efx_port_dummy_op_void
,
725 .fini
= efx_port_dummy_op_void
,
726 .set_id_led
= efx_port_dummy_op_set_id_led
,
727 .monitor
= efx_port_dummy_op_int
,
730 void falcon_probe_board(struct efx_nic
*efx
, u16 revision_info
)
732 struct falcon_board
*board
= falcon_board(efx
);
733 u8 type_id
= FALCON_BOARD_TYPE(revision_info
);
736 board
->major
= FALCON_BOARD_MAJOR(revision_info
);
737 board
->minor
= FALCON_BOARD_MINOR(revision_info
);
739 for (i
= 0; i
< ARRAY_SIZE(board_types
); i
++)
740 if (board_types
[i
].id
== type_id
)
741 board
->type
= &board_types
[i
];
744 EFX_INFO(efx
, "board is %s rev %c%d\n",
745 (efx
->pci_dev
->subsystem_vendor
== EFX_VENDID_SFC
)
746 ? board
->type
->ref_model
: board
->type
->gen_type
,
747 'A' + board
->major
, board
->minor
);
749 EFX_ERR(efx
, "unknown board type %d\n", type_id
);
750 board
->type
= &falcon_dummy_board
;