drivers/net/tulip/media.c

   1 /*
   2         drivers/net/tulip/media.c
   3
   4         Copyright 2000,2001  The Linux Kernel Team
   5         Written/copyright 1994-2001 by Donald Becker.
   6
   7         This software may be used and distributed according to the terms
   8         of the GNU General Public License, incorporated herein by reference.
   9
  10         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
  11         for more information on this driver.
  12
  13         Please submit bugs to http://bugzilla.kernel.org/ .
  14 */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/mii.h>
  18 #include <linux/init.h>
  19 #include <linux/delay.h>
  20 #include <linux/pci.h>
  21 #include "tulip.h"
  22
  23
  24 /* The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
  25    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
  26    "overclocking" issues or future 66Mhz PCI. */
  27 #define mdio_delay() ioread32(mdio_addr)
  28
  29 /* Read and write the MII registers using software-generated serial
  30    MDIO protocol.  It is just different enough from the EEPROM protocol
  31    to not share code.  The maxium data clock rate is 2.5 Mhz. */
  32 #define MDIO_SHIFT_CLK          0x10000
  33 #define MDIO_DATA_WRITE0        0x00000
  34 #define MDIO_DATA_WRITE1        0x20000
  35 #define MDIO_ENB                0x00000 /* Ignore the 0x02000 databook setting. */
  36 #define MDIO_ENB_IN             0x40000
  37 #define MDIO_DATA_READ          0x80000
  38
  39 static const unsigned char comet_miireg2offset[32] = {
  40         0xB4, 0xB8, 0xBC, 0xC0,  0xC4, 0xC8, 0xCC, 0,  0,0,0,0,  0,0,0,0,
  41         0,0xD0,0,0,  0,0,0,0,  0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
  42
  43
  44 /* MII transceiver control section.
  45    Read and write the MII registers using software-generated serial
  46    MDIO protocol.
  47    See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
  48    or DP83840A data sheet for more details.
  49    */
  50
  51 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
  52 {
  53         struct tulip_private *tp = netdev_priv(dev);
  54         int i;
  55         int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location;
  56         int retval = 0;
  57         void __iomem *ioaddr = tp->base_addr;
  58         void __iomem *mdio_addr = ioaddr + CSR9;
  59         unsigned long flags;
  60
  61         if (location & ~0x1f)
  62                 return 0xffff;
  63
  64         if (tp->chip_id == COMET  &&  phy_id == 30) {
  65                 if (comet_miireg2offset[location])
  66                         return ioread32(ioaddr + comet_miireg2offset[location]);
  67                 return 0xffff;
  68         }
  69
  70         spin_lock_irqsave(&tp->mii_lock, flags);
  71         if (tp->chip_id == LC82C168) {
  72                 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
  73                 ioread32(ioaddr + 0xA0);
  74                 ioread32(ioaddr + 0xA0);
  75                 for (i = 1000; i >= 0; --i) {
  76                         barrier();
  77                         if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
  78                                 break;
  79                 }
  80                 spin_unlock_irqrestore(&tp->mii_lock, flags);
  81                 return retval & 0xffff;
  82         }
  83
  84         /* Establish sync by sending at least 32 logic ones. */
  85         for (i = 32; i >= 0; i--) {
  86                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
  87                 mdio_delay();
  88                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
  89                 mdio_delay();
  90         }
  91         /* Shift the read command bits out. */
  92         for (i = 15; i >= 0; i--) {
  93                 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
  94
  95                 iowrite32(MDIO_ENB | dataval, mdio_addr);
  96                 mdio_delay();
  97                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
  98                 mdio_delay();
  99         }
 100         /* Read the two transition, 16 data, and wire-idle bits. */
 101         for (i = 19; i > 0; i--) {
 102                 iowrite32(MDIO_ENB_IN, mdio_addr);
 103                 mdio_delay();
 104                 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
 105                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 106                 mdio_delay();
 107         }
 108
 109         spin_unlock_irqrestore(&tp->mii_lock, flags);
 110         return (retval>>1) & 0xffff;
 111 }
 112
 113 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
 114 {
 115         struct tulip_private *tp = netdev_priv(dev);
 116         int i;
 117         int cmd = (0x5002 << 16) | ((phy_id & 0x1f) << 23) | (location<<18) | (val & 0xffff);
 118         void __iomem *ioaddr = tp->base_addr;
 119         void __iomem *mdio_addr = ioaddr + CSR9;
 120         unsigned long flags;
 121
 122         if (location & ~0x1f)
 123                 return;
 124
 125         if (tp->chip_id == COMET && phy_id == 30) {
 126                 if (comet_miireg2offset[location])
 127                         iowrite32(val, ioaddr + comet_miireg2offset[location]);
 128                 return;
 129         }
 130
 131         spin_lock_irqsave(&tp->mii_lock, flags);
 132         if (tp->chip_id == LC82C168) {
 133                 iowrite32(cmd, ioaddr + 0xA0);
 134                 for (i = 1000; i >= 0; --i) {
 135                         barrier();
 136                         if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
 137                                 break;
 138                 }
 139                 spin_unlock_irqrestore(&tp->mii_lock, flags);
 140                 return;
 141         }
 142
 143         /* Establish sync by sending 32 logic ones. */
 144         for (i = 32; i >= 0; i--) {
 145                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
 146                 mdio_delay();
 147                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
 148                 mdio_delay();
 149         }
 150         /* Shift the command bits out. */
 151         for (i = 31; i >= 0; i--) {
 152                 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
 153                 iowrite32(MDIO_ENB | dataval, mdio_addr);
 154                 mdio_delay();
 155                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
 156                 mdio_delay();
 157         }
 158         /* Clear out extra bits. */
 159         for (i = 2; i > 0; i--) {
 160                 iowrite32(MDIO_ENB_IN, mdio_addr);
 161                 mdio_delay();
 162                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 163                 mdio_delay();
 164         }
 165
 166         spin_unlock_irqrestore(&tp->mii_lock, flags);
 167 }
 168
 169
 170 /* Set up the transceiver control registers for the selected media type. */
 171 void tulip_select_media(struct net_device *dev, int startup)
 172 {
 173         struct tulip_private *tp = netdev_priv(dev);
 174         void __iomem *ioaddr = tp->base_addr;
 175         struct mediatable *mtable = tp->mtable;
 176         u32 new_csr6;
 177         int i;
 178
 179         if (mtable) {
 180                 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
 181                 unsigned char *p = mleaf->leafdata;
 182                 switch (mleaf->type) {
 183                 case 0:                                 /* 21140 non-MII xcvr. */
 184                         if (tulip_debug > 1)
 185                                 netdev_dbg(dev, "Using a 21140 non-MII transceiver with control setting %02x\n",
 186                                            p[1]);
 187                         dev->if_port = p[0];
 188                         if (startup)
 189                                 iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 190                         iowrite32(p[1], ioaddr + CSR12);
 191                         new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
 192                         break;
 193                 case 2: case 4: {
 194                         u16 setup[5];
 195                         u32 csr13val, csr14val, csr15dir, csr15val;
 196                         for (i = 0; i < 5; i++)
 197                                 setup[i] = get_u16(&p[i*2 + 1]);
 198
 199                         dev->if_port = p[0] & MEDIA_MASK;
 200                         if (tulip_media_cap[dev->if_port] & MediaAlwaysFD)
 201                                 tp->full_duplex = 1;
 202
 203                         if (startup && mtable->has_reset) {
 204                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 205                                 unsigned char *rst = rleaf->leafdata;
 206                                 if (tulip_debug > 1)
 207                                         netdev_dbg(dev, "Resetting the transceiver\n");
 208                                 for (i = 0; i < rst[0]; i++)
 209                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 210                         }
 211                         if (tulip_debug > 1)
 212                                 netdev_dbg(dev, "21143 non-MII %s transceiver control %04x/%04x\n",
 213                                            medianame[dev->if_port],
 214                                            setup[0], setup[1]);
 215                         if (p[0] & 0x40) {      /* SIA (CSR13-15) setup values are provided. */
 216                                 csr13val = setup[0];
 217                                 csr14val = setup[1];
 218                                 csr15dir = (setup[3]<<16) | setup[2];
 219                                 csr15val = (setup[4]<<16) | setup[2];
 220                                 iowrite32(0, ioaddr + CSR13);
 221                                 iowrite32(csr14val, ioaddr + CSR14);
 222                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 223                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 224                                 iowrite32(csr13val, ioaddr + CSR13);
 225                         } else {
 226                                 csr13val = 1;
 227                                 csr14val = 0;
 228                                 csr15dir = (setup[0]<<16) | 0x0008;
 229                                 csr15val = (setup[1]<<16) | 0x0008;
 230                                 if (dev->if_port <= 4)
 231                                         csr14val = t21142_csr14[dev->if_port];
 232                                 if (startup) {
 233                                         iowrite32(0, ioaddr + CSR13);
 234                                         iowrite32(csr14val, ioaddr + CSR14);
 235                                 }
 236                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 237                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 238                                 if (startup) iowrite32(csr13val, ioaddr + CSR13);
 239                         }
 240                         if (tulip_debug > 1)
 241                                 netdev_dbg(dev, "Setting CSR15 to %08x/%08x\n",
 242                                            csr15dir, csr15val);
 243                         if (mleaf->type == 4)
 244                                 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
 245                         else
 246                                 new_csr6 = 0x82420000;
 247                         break;
 248                 }
 249                 case 1: case 3: {
 250                         int phy_num = p[0];
 251                         int init_length = p[1];
 252                         u16 *misc_info, tmp_info;
 253
 254                         dev->if_port = 11;
 255                         new_csr6 = 0x020E0000;
 256                         if (mleaf->type == 3) { /* 21142 */
 257                                 u16 *init_sequence = (u16*)(p+2);
 258                                 u16 *reset_sequence = &((u16*)(p+3))[init_length];
 259                                 int reset_length = p[2 + init_length*2];
 260                                 misc_info = reset_sequence + reset_length;
 261                                 if (startup) {
 262                                         int timeout = 10;       /* max 1 ms */
 263                                         for (i = 0; i < reset_length; i++)
 264                                                 iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
 265
 266                                         /* flush posted writes */
 267                                         ioread32(ioaddr + CSR15);
 268
 269                                         /* Sect 3.10.3 in DP83840A.pdf (p39) */
 270                                         udelay(500);
 271
 272                                         /* Section 4.2 in DP83840A.pdf (p43) */
 273                                         /* and IEEE 802.3 "22.2.4.1.1 Reset" */
 274                                         while (timeout-- &&
 275                                                 (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
 276                                                 udelay(100);
 277                                 }
 278                                 for (i = 0; i < init_length; i++)
 279                                         iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
 280
 281                                 ioread32(ioaddr + CSR15);       /* flush posted writes */
 282                         } else {
 283                                 u8 *init_sequence = p + 2;
 284                                 u8 *reset_sequence = p + 3 + init_length;
 285                                 int reset_length = p[2 + init_length];
 286                                 misc_info = (u16*)(reset_sequence + reset_length);
 287                                 if (startup) {
 288                                         int timeout = 10;       /* max 1 ms */
 289                                         iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 290                                         for (i = 0; i < reset_length; i++)
 291                                                 iowrite32(reset_sequence[i], ioaddr + CSR12);
 292
 293                                         /* flush posted writes */
 294                                         ioread32(ioaddr + CSR12);
 295
 296                                         /* Sect 3.10.3 in DP83840A.pdf (p39) */
 297                                         udelay(500);
 298
 299                                         /* Section 4.2 in DP83840A.pdf (p43) */
 300                                         /* and IEEE 802.3 "22.2.4.1.1 Reset" */
 301                                         while (timeout-- &&
 302                                                 (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
 303                                                 udelay(100);
 304                                 }
 305                                 for (i = 0; i < init_length; i++)
 306                                         iowrite32(init_sequence[i], ioaddr + CSR12);
 307
 308                                 ioread32(ioaddr + CSR12);       /* flush posted writes */
 309                         }
 310
 311                         tmp_info = get_u16(&misc_info[1]);
 312                         if (tmp_info)
 313                                 tp->advertising[phy_num] = tmp_info | 1;
 314                         if (tmp_info && startup < 2) {
 315                                 if (tp->mii_advertise == 0)
 316                                         tp->mii_advertise = tp->advertising[phy_num];
 317                                 if (tulip_debug > 1)
 318                                         netdev_dbg(dev, " Advertising %04x on MII %d\n",
 319                                                    tp->mii_advertise,
 320                                                    tp->phys[phy_num]);
 321                                 tulip_mdio_write(dev, tp->phys[phy_num], 4, tp->mii_advertise);
 322                         }
 323                         break;
 324                 }
 325                 case 5: case 6: {
 326                         u16 setup[5];
 327
 328                         new_csr6 = 0; /* FIXME */
 329
 330                         for (i = 0; i < 5; i++)
 331                                 setup[i] = get_u16(&p[i*2 + 1]);
 332
 333                         if (startup && mtable->has_reset) {
 334                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 335                                 unsigned char *rst = rleaf->leafdata;
 336                                 if (tulip_debug > 1)
 337                                         netdev_dbg(dev, "Resetting the transceiver\n");
 338                                 for (i = 0; i < rst[0]; i++)
 339                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 340                         }
 341
 342                         break;
 343                 }
 344                 default:
 345                         netdev_dbg(dev, " Invalid media table selection %d\n",
 346                                    mleaf->type);
 347                         new_csr6 = 0x020E0000;
 348                 }
 349                 if (tulip_debug > 1)
 350                         netdev_dbg(dev, "Using media type %s, CSR12 is %02x\n",
 351                                    medianame[dev->if_port],
 352                                    ioread32(ioaddr + CSR12) & 0xff);
 353         } else if (tp->chip_id == LC82C168) {
 354                 if (startup && ! tp->medialock)
 355                         dev->if_port = tp->mii_cnt ? 11 : 0;
 356                 if (tulip_debug > 1)
 357                         netdev_dbg(dev, "PNIC PHY status is %3.3x, media %s\n",
 358                                    ioread32(ioaddr + 0xB8),
 359                                    medianame[dev->if_port]);
 360                 if (tp->mii_cnt) {
 361                         new_csr6 = 0x810C0000;
 362                         iowrite32(0x0001, ioaddr + CSR15);
 363                         iowrite32(0x0201B07A, ioaddr + 0xB8);
 364                 } else if (startup) {
 365                         /* Start with 10mbps to do autonegotiation. */
 366                         iowrite32(0x32, ioaddr + CSR12);
 367                         new_csr6 = 0x00420000;
 368                         iowrite32(0x0001B078, ioaddr + 0xB8);
 369                         iowrite32(0x0201B078, ioaddr + 0xB8);
 370                 } else if (dev->if_port == 3  ||  dev->if_port == 5) {
 371                         iowrite32(0x33, ioaddr + CSR12);
 372                         new_csr6 = 0x01860000;
 373                         /* Trigger autonegotiation. */
 374                         iowrite32(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
 375                 } else {
 376                         iowrite32(0x32, ioaddr + CSR12);
 377                         new_csr6 = 0x00420000;
 378                         iowrite32(0x1F078, ioaddr + 0xB8);
 379                 }
 380         } else {                                        /* Unknown chip type with no media table. */
 381                 if (tp->default_port == 0)
 382                         dev->if_port = tp->mii_cnt ? 11 : 3;
 383                 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
 384                         new_csr6 = 0x020E0000;
 385                 } else if (tulip_media_cap[dev->if_port] & MediaIsFx) {
 386                         new_csr6 = 0x02860000;
 387                 } else
 388                         new_csr6 = 0x03860000;
 389                 if (tulip_debug > 1)
 390                         netdev_dbg(dev, "No media description table, assuming %s transceiver, CSR12 %02x\n",
 391                                    medianame[dev->if_port],
 392                                    ioread32(ioaddr + CSR12));
 393         }
 394
 395         tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
 396
 397         mdelay(1);
 398 }
 399
 400 /*
 401   Check the MII negotiated duplex and change the CSR6 setting if
 402   required.
 403   Return 0 if everything is OK.
 404   Return < 0 if the transceiver is missing or has no link beat.
 405   */
 406 int tulip_check_duplex(struct net_device *dev)
 407 {
 408         struct tulip_private *tp = netdev_priv(dev);
 409         unsigned int bmsr, lpa, negotiated, new_csr6;
 410
 411         bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 412         lpa = tulip_mdio_read(dev, tp->phys[0], MII_LPA);
 413         if (tulip_debug > 1)
 414                 dev_info(&dev->dev, "MII status %04x, Link partner report %04x\n",
 415                          bmsr, lpa);
 416         if (bmsr == 0xffff)
 417                 return -2;
 418         if ((bmsr & BMSR_LSTATUS) == 0) {
 419                 int new_bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 420                 if ((new_bmsr & BMSR_LSTATUS) == 0) {
 421                         if (tulip_debug  > 1)
 422                                 dev_info(&dev->dev,
 423                                          "No link beat on the MII interface, status %04x\n",
 424                                          new_bmsr);
 425                         return -1;
 426                 }
 427         }
 428         negotiated = lpa & tp->advertising[0];
 429         tp->full_duplex = mii_duplex(tp->full_duplex_lock, negotiated);
 430
 431         new_csr6 = tp->csr6;
 432
 433         if (negotiated & LPA_100) new_csr6 &= ~TxThreshold;
 434         else                      new_csr6 |= TxThreshold;
 435         if (tp->full_duplex) new_csr6 |= FullDuplex;
 436         else                 new_csr6 &= ~FullDuplex;
 437
 438         if (new_csr6 != tp->csr6) {
 439                 tp->csr6 = new_csr6;
 440                 tulip_restart_rxtx(tp);
 441
 442                 if (tulip_debug > 0)
 443                         dev_info(&dev->dev,
 444                                  "Setting %s-duplex based on MII#%d link partner capability of %04x\n",
 445                                  tp->full_duplex ? "full" : "half",
 446                                  tp->phys[0], lpa);
 447                 return 1;
 448         }
 449
 450         return 0;
 451 }
 452
 453 void __devinit tulip_find_mii (struct net_device *dev, int board_idx)
 454 {
 455         struct tulip_private *tp = netdev_priv(dev);
 456         int phyn, phy_idx = 0;
 457         int mii_reg0;
 458         int mii_advert;
 459         unsigned int to_advert, new_bmcr, ane_switch;
 460
 461         /* Find the connected MII xcvrs.
 462            Doing this in open() would allow detecting external xcvrs later,
 463            but takes much time. */
 464         for (phyn = 1; phyn <= 32 && phy_idx < sizeof (tp->phys); phyn++) {
 465                 int phy = phyn & 0x1f;
 466                 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
 467                 if ((mii_status & 0x8301) == 0x8001 ||
 468                     ((mii_status & BMSR_100BASE4) == 0 &&
 469                      (mii_status & 0x7800) != 0)) {
 470                         /* preserve Becker logic, gain indentation level */
 471                 } else {
 472                         continue;
 473                 }
 474
 475                 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
 476                 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
 477                 ane_switch = 0;
 478
 479                 /* if not advertising at all, gen an
 480                  * advertising value from the capability
 481                  * bits in BMSR
 482                  */
 483                 if ((mii_advert & ADVERTISE_ALL) == 0) {
 484                         unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
 485                         mii_advert = ((tmpadv >> 6) & 0x3e0) | 1;
 486                 }
 487
 488                 if (tp->mii_advertise) {
 489                         tp->advertising[phy_idx] =
 490                         to_advert = tp->mii_advertise;
 491                 } else if (tp->advertising[phy_idx]) {
 492                         to_advert = tp->advertising[phy_idx];
 493                 } else {
 494                         tp->advertising[phy_idx] =
 495                         tp->mii_advertise =
 496                         to_advert = mii_advert;
 497                 }
 498
 499                 tp->phys[phy_idx++] = phy;
 500
 501                 pr_info("tulip%d:  MII transceiver #%d config %04x status %04x advertising %04x\n",
 502                         board_idx, phy, mii_reg0, mii_status, mii_advert);
 503
 504                 /* Fixup for DLink with miswired PHY. */
 505                 if (mii_advert != to_advert) {
 506                         pr_debug("tulip%d:  Advertising %04x on PHY %d, previously advertising %04x\n",
 507                                  board_idx, to_advert, phy, mii_advert);
 508                         tulip_mdio_write (dev, phy, 4, to_advert);
 509                 }
 510
 511                 /* Enable autonegotiation: some boards default to off. */
 512                 if (tp->default_port == 0) {
 513                         new_bmcr = mii_reg0 | BMCR_ANENABLE;
 514                         if (new_bmcr != mii_reg0) {
 515                                 new_bmcr |= BMCR_ANRESTART;
 516                                 ane_switch = 1;
 517                         }
 518                 }
 519                 /* ...or disable nway, if forcing media */
 520                 else {
 521                         new_bmcr = mii_reg0 & ~BMCR_ANENABLE;
 522                         if (new_bmcr != mii_reg0)
 523                                 ane_switch = 1;
 524                 }
 525
 526                 /* clear out bits we never want at this point */
 527                 new_bmcr &= ~(BMCR_CTST | BMCR_FULLDPLX | BMCR_ISOLATE |
 528                               BMCR_PDOWN | BMCR_SPEED100 | BMCR_LOOPBACK |
 529                               BMCR_RESET);
 530
 531                 if (tp->full_duplex)
 532                         new_bmcr |= BMCR_FULLDPLX;
 533                 if (tulip_media_cap[tp->default_port] & MediaIs100)
 534                         new_bmcr |= BMCR_SPEED100;
 535
 536                 if (new_bmcr != mii_reg0) {
 537                         /* some phys need the ANE switch to
 538                          * happen before forced media settings
 539                          * will "take."  However, we write the
 540                          * same value twice in order not to
 541                          * confuse the sane phys.
 542                          */
 543                         if (ane_switch) {
 544                                 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 545                                 udelay (10);
 546                         }
 547                         tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 548                 }
 549         }
 550         tp->mii_cnt = phy_idx;
 551         if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
 552                 pr_info("tulip%d: ***WARNING***: No MII transceiver found!\n",
 553                         board_idx);
 554                 tp->phys[0] = 1;
 555         }
 556 }