2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/sched.h>
24 #include <linux/mmc/sdio.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/semaphore.h>
27 #include <linux/firmware.h>
28 #include <asm/unaligned.h>
30 #include <brcmu_wifi.h>
31 #include <brcmu_utils.h>
32 #include <brcm_hw_ids.h>
34 #include "sdio_host.h"
37 /* register access macros */
40 #define R_REG(r, typ) \
41 brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
43 #define R_REG(r, typ) \
45 __typeof(*(r)) __osl_v; \
46 __asm__ __volatile__("sync"); \
47 __osl_v = brcmf_sdcard_reg_read(NULL, (r),\
49 __asm__ __volatile__("sync"); \
54 #else /* __BIG_ENDIAN */
55 #define R_REG(r, typ) \
56 brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
57 #endif /* __BIG_ENDIAN */
59 #define OR_REG(r, v, typ) \
60 brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), R_REG(r, typ) | (v))
64 /* ARM trap handling */
66 /* Trap types defined by ARM (see arminc.h) */
68 #if defined(__ARM_ARCH_4T__)
69 #define MAX_TRAP_TYPE (TR_FIQ + 1)
70 #elif defined(__ARM_ARCH_7M__)
71 #define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
72 #endif /* __ARM_ARCH_7M__ */
74 /* The trap structure is defined here as offsets for assembly */
80 #define TR_REG(n) (TR_REGS + (n) * 4)
81 #define TR_SP TR_REG(13)
82 #define TR_LR TR_REG(14)
83 #define TR_PC TR_REG(15)
85 #define TRAP_T_SIZE 80
110 #define CBUF_LEN (128)
113 u32 buf
; /* Can't be pointer on (64-bit) hosts */
116 char *_buf_compat
; /* Redundant pointer for backward compat. */
121 * When there is no UART (e.g. Quickturn),
122 * the host should write a complete
123 * input line directly into cbuf and then write
124 * the length into vcons_in.
125 * This may also be used when there is a real UART
126 * (at risk of conflicting with
127 * the real UART). vcons_out is currently unused.
129 volatile uint vcons_in
;
130 volatile uint vcons_out
;
132 /* Output (logging) buffer
133 * Console output is written to a ring buffer log_buf at index log_idx.
134 * The host may read the output when it sees log_idx advance.
135 * Output will be lost if the output wraps around faster than the host
140 /* Console input line buffer
141 * Characters are read one at a time into cbuf
142 * until <CR> is received, then
143 * the buffer is processed as a command line.
144 * Also used for virtual UART.
151 #include <chipcommon.h>
155 #include "dngl_stats.h"
158 #include "dhd_proto.h"
162 #define TXQLEN 2048 /* bulk tx queue length */
163 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
164 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
167 #define TXRETRIES 2 /* # of retries for tx frames */
169 #if defined(CONFIG_MACH_SANDGATE2G)
170 #define BRCMF_RXBOUND 250 /* Default for max rx frames in
173 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
175 #endif /* defined(CONFIG_MACH_SANDGATE2G) */
177 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
180 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
182 #define MEMBLOCK 2048 /* Block size used for downloading
184 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
185 biggest possible glom */
187 #ifndef BRCMF_FIRSTREAD
188 #define BRCMF_FIRSTREAD 32
190 #if !ISPOWEROF2(BRCMF_FIRSTREAD)
191 #error BRCMF_FIRSTREAD is not a power of 2!
194 /* Total length of frame header for dongle protocol */
195 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
197 #define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
199 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
203 * Software allocation of To SB Mailbox resources
206 /* tosbmailbox bits corresponding to intstatus bits */
207 #define SMB_NAK (1 << 0) /* Frame NAK */
208 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
209 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
210 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
212 /* tosbmailboxdata */
213 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
216 * Software allocation of To Host Mailbox resources
220 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
221 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
222 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
223 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
225 /* tohostmailboxdata */
226 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
227 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
228 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
229 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
231 #define HMB_DATA_FCDATA_MASK 0xff000000
232 #define HMB_DATA_FCDATA_SHIFT 24
234 #define HMB_DATA_VERSION_MASK 0x00ff0000
235 #define HMB_DATA_VERSION_SHIFT 16
238 * Software-defined protocol header
241 /* Current protocol version */
242 #define SDPCM_PROT_VERSION 4
244 /* SW frame header */
245 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
247 #define SDPCM_CHANNEL_MASK 0x00000f00
248 #define SDPCM_CHANNEL_SHIFT 8
249 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
251 #define SDPCM_NEXTLEN_OFFSET 2
253 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
254 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
255 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
256 #define SDPCM_DOFFSET_MASK 0xff000000
257 #define SDPCM_DOFFSET_SHIFT 24
258 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
259 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
260 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
261 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
263 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
265 /* logical channel numbers */
266 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
267 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
268 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
269 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
270 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
272 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
274 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
276 /* For TEST_CHANNEL packets, define another 4-byte header */
277 #define SDPCM_TEST_HDRLEN 4 /*
278 * Generally: Cmd(1), Ext(1), Len(2);
279 * Semantics of Ext byte depend on
280 * command. Len is current or requested
281 * frame length, not including test
282 * header; sent little-endian.
284 #define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
285 #define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
286 #define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
287 #define SDPCM_TEST_BURST 0x04 /*
288 * Receiver to send a burst.
289 * Ext is a frame count
291 #define SDPCM_TEST_SEND 0x05 /*
292 * Receiver sets send mode.
293 * Ext is boolean on/off
296 /* Handy macro for filling in datagen packets with a pattern */
297 #define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
300 * Shared structure between dongle and the host.
301 * The structure contains pointers to trap or assert information.
303 #define SDPCM_SHARED_VERSION 0x0002
304 #define SDPCM_SHARED_VERSION_MASK 0x00FF
305 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
306 #define SDPCM_SHARED_ASSERT 0x0200
307 #define SDPCM_SHARED_TRAP 0x0400
310 /* Space for header read, limit for data packets */
312 #define MAX_HDR_READ 32
314 #if !ISPOWEROF2(MAX_HDR_READ)
315 #error MAX_HDR_READ is not a power of 2!
318 #define MAX_RX_DATASZ 2048
320 /* Maximum milliseconds to wait for F2 to come up */
321 #define BRCMF_WAIT_F2RDY 3000
323 /* Bump up limit on waiting for HT to account for first startup;
324 * if the image is doing a CRC calculation before programming the PMU
325 * for HT availability, it could take a couple hundred ms more, so
326 * max out at a 1 second (1000000us).
328 #if (PMU_MAX_TRANSITION_DLY <= 1000000)
329 #undef PMU_MAX_TRANSITION_DLY
330 #define PMU_MAX_TRANSITION_DLY 1000000
333 /* Value for ChipClockCSR during initial setup */
334 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
335 SBSDIO_ALP_AVAIL_REQ)
337 /* Flags for SDH calls */
338 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
341 #define SBIM_IBE 0x20000 /* inbanderror */
342 #define SBIM_TO 0x40000 /* timeout */
343 #define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
344 #define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
347 #define SBTML_RESET 0x0001 /* reset */
348 #define SBTML_REJ_MASK 0x0006 /* reject field */
349 #define SBTML_REJ 0x0002 /* reject */
350 #define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */
352 #define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */
355 #define SBTMH_SERR 0x0001 /* serror */
356 #define SBTMH_INT 0x0002 /* interrupt */
357 #define SBTMH_BUSY 0x0004 /* busy */
358 #define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
360 #define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */
363 #define SBIDL_INIT 0x80 /* initiator */
366 #define SBIDH_RC_MASK 0x000f /* revision code */
367 #define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
368 #define SBIDH_RCE_SHIFT 8
369 #define SBCOREREV(sbidh) \
370 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
371 #define SBIDH_CC_MASK 0x8ff0 /* core code */
372 #define SBIDH_CC_SHIFT 4
373 #define SBIDH_VC_MASK 0xffff0000 /* vendor code */
374 #define SBIDH_VC_SHIFT 16
377 * Conversion of 802.1D priority to precedence level
379 #define PRIO2PREC(prio) \
380 (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
383 BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep
);
386 * Core reg address translation.
387 * Both macro's returns a 32 bits byte address on the backplane bus.
389 #define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
390 #define CORE_BUS_REG(base, field) \
391 (base + offsetof(struct sdpcmd_regs, field))
392 #define CORE_SB(base, field) \
393 (base + SBCONFIGOFF + offsetof(struct sbconfig, field))
397 u32 corecontrol
; /* 0x00, rev8 */
398 u32 corestatus
; /* rev8 */
400 u32 biststatus
; /* rev8 */
403 u16 pcmciamesportaladdr
; /* 0x010, rev8 */
405 u16 pcmciamesportalmask
; /* rev8 */
407 u16 pcmciawrframebc
; /* rev8 */
409 u16 pcmciaunderflowtimer
; /* rev8 */
413 u32 intstatus
; /* 0x020, rev8 */
414 u32 hostintmask
; /* rev8 */
415 u32 intmask
; /* rev8 */
416 u32 sbintstatus
; /* rev8 */
417 u32 sbintmask
; /* rev8 */
418 u32 funcintmask
; /* rev4 */
420 u32 tosbmailbox
; /* 0x040, rev8 */
421 u32 tohostmailbox
; /* rev8 */
422 u32 tosbmailboxdata
; /* rev8 */
423 u32 tohostmailboxdata
; /* rev8 */
425 /* synchronized access to registers in SDIO clock domain */
426 u32 sdioaccess
; /* 0x050, rev8 */
429 /* PCMCIA frame control */
430 u8 pcmciaframectrl
; /* 0x060, rev8 */
432 u8 pcmciawatermark
; /* rev8 */
435 /* interrupt batching control */
436 u32 intrcvlazy
; /* 0x100, rev8 */
440 u32 cmd52rd
; /* 0x110, rev8 */
441 u32 cmd52wr
; /* rev8 */
442 u32 cmd53rd
; /* rev8 */
443 u32 cmd53wr
; /* rev8 */
444 u32 abort
; /* rev8 */
445 u32 datacrcerror
; /* rev8 */
446 u32 rdoutofsync
; /* rev8 */
447 u32 wroutofsync
; /* rev8 */
448 u32 writebusy
; /* rev8 */
449 u32 readwait
; /* rev8 */
450 u32 readterm
; /* rev8 */
451 u32 writeterm
; /* rev8 */
453 u32 clockctlstatus
; /* rev8 */
456 u32 PAD
[128]; /* DMA engines */
458 /* SDIO/PCMCIA CIS region */
459 char cis
[512]; /* 0x400-0x5ff, rev6 */
461 /* PCMCIA function control registers */
462 char pcmciafcr
[256]; /* 0x600-6ff, rev6 */
465 /* PCMCIA backplane access */
466 u16 backplanecsr
; /* 0x76E, rev6 */
467 u16 backplaneaddr0
; /* rev6 */
468 u16 backplaneaddr1
; /* rev6 */
469 u16 backplaneaddr2
; /* rev6 */
470 u16 backplaneaddr3
; /* rev6 */
471 u16 backplanedata0
; /* rev6 */
472 u16 backplanedata1
; /* rev6 */
473 u16 backplanedata2
; /* rev6 */
474 u16 backplanedata3
; /* rev6 */
477 /* sprom "size" & "blank" info */
478 u16 spromstatus
; /* 0x7BE, rev2 */
485 /* Device console log buffer state */
486 struct brcmf_console
{
487 uint count
; /* Poll interval msec counter */
488 uint log_addr
; /* Log struct address (fixed) */
489 struct rte_log log
; /* Log struct (host copy) */
490 uint bufsize
; /* Size of log buffer */
491 u8
*buf
; /* Log buffer (host copy) */
492 uint last
; /* Last buffer read index */
496 struct sdpcm_shared
{
500 u32 assert_file_addr
;
502 u32 console_addr
; /* Address of struct rte_console */
508 /* misc chip info needed by some of the routines */
515 u32 buscorebase
; /* 32 bits backplane bus address */
524 /* Private data for SDIO bus interaction */
526 struct brcmf_pub
*drvr
;
528 struct brcmf_sdio_card
*card
; /* Handle for sdio card calls */
529 struct chip_info
*ci
; /* Chip info struct */
530 char *vars
; /* Variables (from CIS and/or other) */
531 uint varsz
; /* Size of variables buffer */
533 u32 ramsize
; /* Size of RAM in SOCRAM (bytes) */
534 u32 orig_ramsize
; /* Size of RAM in SOCRAM (bytes) */
536 u32 bus
; /* gSPI or SDIO bus */
537 u32 hostintmask
; /* Copy of Host Interrupt Mask */
538 u32 intstatus
; /* Intstatus bits (events) pending */
539 bool dpc_sched
; /* Indicates DPC schedule (intrpt rcvd) */
540 bool fcstate
; /* State of dongle flow-control */
542 u16 cl_devid
; /* cached devid for brcmf_sdio_probe_attach() */
544 uint blocksize
; /* Block size of SDIO transfers */
545 uint roundup
; /* Max roundup limit */
547 struct pktq txq
; /* Queue length used for flow-control */
548 u8 flowcontrol
; /* per prio flow control bitmask */
549 u8 tx_seq
; /* Transmit sequence number (next) */
550 u8 tx_max
; /* Maximum transmit sequence allowed */
552 u8 hdrbuf
[MAX_HDR_READ
+ BRCMF_SDALIGN
];
553 u8
*rxhdr
; /* Header of current rx frame (in hdrbuf) */
554 u16 nextlen
; /* Next Read Len from last header */
555 u8 rx_seq
; /* Receive sequence number (expected) */
556 bool rxskip
; /* Skip receive (awaiting NAK ACK) */
558 struct sk_buff
*glomd
; /* Packet containing glomming descriptor */
559 struct sk_buff
*glom
; /* Packet chain for glommed superframe */
560 uint glomerr
; /* Glom packet read errors */
562 u8
*rxbuf
; /* Buffer for receiving control packets */
563 uint rxblen
; /* Allocated length of rxbuf */
564 u8
*rxctl
; /* Aligned pointer into rxbuf */
565 u8
*databuf
; /* Buffer for receiving big glom packet */
566 u8
*dataptr
; /* Aligned pointer into databuf */
567 uint rxlen
; /* Length of valid data in buffer */
569 u8 sdpcm_ver
; /* Bus protocol reported by dongle */
571 bool intr
; /* Use interrupts */
572 bool poll
; /* Use polling */
573 bool ipend
; /* Device interrupt is pending */
574 bool intdis
; /* Interrupts disabled by isr */
575 uint intrcount
; /* Count of device interrupt callbacks */
576 uint lastintrs
; /* Count as of last watchdog timer */
577 uint spurious
; /* Count of spurious interrupts */
578 uint pollrate
; /* Ticks between device polls */
579 uint polltick
; /* Tick counter */
580 uint pollcnt
; /* Count of active polls */
583 struct brcmf_console console
; /* Console output polling support */
584 uint console_addr
; /* Console address from shared struct */
587 uint regfails
; /* Count of R_REG failures */
589 uint clkstate
; /* State of sd and backplane clock(s) */
590 bool activity
; /* Activity flag for clock down */
591 s32 idletime
; /* Control for activity timeout */
592 s32 idlecount
; /* Activity timeout counter */
593 s32 idleclock
; /* How to set bus driver when idle */
595 bool use_rxchain
; /* If brcmf should use PKT chains */
596 bool sleeping
; /* Is SDIO bus sleeping? */
597 bool rxflow_mode
; /* Rx flow control mode */
598 bool rxflow
; /* Is rx flow control on */
599 bool alp_only
; /* Don't use HT clock (ALP only) */
600 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
604 /* external loopback */
608 /* pktgen configuration */
609 uint pktgen_freq
; /* Ticks between bursts */
610 uint pktgen_count
; /* Packets to send each burst */
611 uint pktgen_print
; /* Bursts between count displays */
612 uint pktgen_total
; /* Stop after this many */
613 uint pktgen_minlen
; /* Minimum packet data len */
614 uint pktgen_maxlen
; /* Maximum packet data len */
615 uint pktgen_mode
; /* Configured mode: tx, rx, or echo */
616 uint pktgen_stop
; /* Number of tx failures causing stop */
618 /* active pktgen fields */
619 uint pktgen_tick
; /* Tick counter for bursts */
620 uint pktgen_ptick
; /* Burst counter for printing */
621 uint pktgen_sent
; /* Number of test packets generated */
622 uint pktgen_rcvd
; /* Number of test packets received */
623 uint pktgen_fail
; /* Number of failed send attempts */
624 u16 pktgen_len
; /* Length of next packet to send */
627 /* Some additional counters */
628 uint tx_sderrs
; /* Count of tx attempts with sd errors */
629 uint fcqueued
; /* Tx packets that got queued */
630 uint rxrtx
; /* Count of rtx requests (NAK to dongle) */
631 uint rx_toolong
; /* Receive frames too long to receive */
632 uint rxc_errors
; /* SDIO errors when reading control frames */
633 uint rx_hdrfail
; /* SDIO errors on header reads */
634 uint rx_badhdr
; /* Bad received headers (roosync?) */
635 uint rx_badseq
; /* Mismatched rx sequence number */
636 uint fc_rcvd
; /* Number of flow-control events received */
637 uint fc_xoff
; /* Number which turned on flow-control */
638 uint fc_xon
; /* Number which turned off flow-control */
639 uint rxglomfail
; /* Failed deglom attempts */
640 uint rxglomframes
; /* Number of glom frames (superframes) */
641 uint rxglompkts
; /* Number of packets from glom frames */
642 uint f2rxhdrs
; /* Number of header reads */
643 uint f2rxdata
; /* Number of frame data reads */
644 uint f2txdata
; /* Number of f2 frame writes */
645 uint f1regdata
; /* Number of f1 register accesses */
649 bool ctrl_frame_stat
;
652 wait_queue_head_t ctrl_wait
;
654 struct timer_list timer
;
655 struct completion watchdog_wait
;
656 struct task_struct
*watchdog_tsk
;
659 struct tasklet_struct tasklet
;
660 struct task_struct
*dpc_tsk
;
661 struct completion dpc_wait
;
664 struct semaphore sdsem
;
668 const struct firmware
*firmware
;
675 u32 sbipsflag
; /* initiator port ocp slave flag */
677 u32 sbtpsflag
; /* target port ocp slave flag */
679 u32 sbtmerrloga
; /* (sonics >= 2.3) */
681 u32 sbtmerrlog
; /* (sonics >= 2.3) */
683 u32 sbadmatch3
; /* address match3 */
685 u32 sbadmatch2
; /* address match2 */
687 u32 sbadmatch1
; /* address match1 */
689 u32 sbimstate
; /* initiator agent state */
690 u32 sbintvec
; /* interrupt mask */
691 u32 sbtmstatelow
; /* target state */
692 u32 sbtmstatehigh
; /* target state */
693 u32 sbbwa0
; /* bandwidth allocation table0 */
695 u32 sbimconfiglow
; /* initiator configuration */
696 u32 sbimconfighigh
; /* initiator configuration */
697 u32 sbadmatch0
; /* address match0 */
699 u32 sbtmconfiglow
; /* target configuration */
700 u32 sbtmconfighigh
; /* target configuration */
701 u32 sbbconfig
; /* broadcast configuration */
703 u32 sbbstate
; /* broadcast state */
705 u32 sbactcnfg
; /* activate configuration */
707 u32 sbflagst
; /* current sbflags */
709 u32 sbidlow
; /* identification */
710 u32 sbidhigh
; /* identification */
716 #define CLK_PENDING 2 /* Not used yet */
719 #define BRCMF_NOPMU(brcmf) (false)
722 static int qcount
[NUMPRIO
];
723 static int tx_packets
[NUMPRIO
];
726 /* Deferred transmit */
727 uint brcmf_deferred_tx
= 1;
728 module_param(brcmf_deferred_tx
, uint
, 0);
730 /* Watchdog thread priority, -1 to use kernel timer */
731 int brcmf_watchdog_prio
= 97;
732 module_param(brcmf_watchdog_prio
, int, 0);
734 /* Watchdog interval */
735 uint brcmf_watchdog_ms
= 10;
736 module_param(brcmf_watchdog_ms
, uint
, 0);
738 /* DPC thread priority, -1 to use tasklet */
739 int brcmf_dpc_prio
= 98;
740 module_param(brcmf_dpc_prio
, int, 0);
743 /* Console poll interval */
744 uint brcmf_console_ms
;
745 module_param(brcmf_console_ms
, uint
, 0);
753 /* override the RAM size if possible */
754 #define DONGLE_MIN_MEMSIZE (128 * 1024)
755 int brcmf_dongle_memsize
;
757 static bool brcmf_alignctl
;
761 static bool retrydata
;
762 #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
764 static const uint watermark
= 8;
765 static const uint firstread
= BRCMF_FIRSTREAD
;
767 /* Retry count for register access failures */
768 static const uint retry_limit
= 2;
770 /* Force even SD lengths (some host controllers mess up on odd bytes) */
771 static bool forcealign
;
775 #define PKTALIGN(_p, _len, _align) \
778 datalign = (unsigned long)((_p)->data); \
779 datalign = roundup(datalign, (_align)) - datalign; \
780 ASSERT(datalign < (_align)); \
781 ASSERT((_p)->len >= ((_len) + datalign)); \
783 skb_pull((_p), datalign); \
784 __skb_trim((_p), (_len)); \
787 /* Limit on rounding up frames */
788 static const uint max_roundup
= 512;
790 /* Try doing readahead */
791 static bool brcmf_readahead
;
793 /* To check if there's window offered */
794 #define DATAOK(bus) \
795 (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
796 (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
799 * Reads a register in the SDIO hardware block. This block occupies a series of
800 * adresses on the 32 bit backplane bus.
803 r_sdreg32(struct brcmf_bus
*bus
, u32
*regvar
, u32 reg_offset
, u32
*retryvar
)
807 *regvar
= R_REG(bus
->ci
->buscorebase
+ reg_offset
, u32
);
808 } while (brcmf_sdcard_regfail(bus
->card
) &&
809 (++(*retryvar
) <= retry_limit
));
811 bus
->regfails
+= (*retryvar
-1);
812 if (*retryvar
> retry_limit
) {
813 DHD_ERROR(("FAILED READ %Xh\n", reg_offset
));
820 w_sdreg32(struct brcmf_bus
*bus
, u32 regval
, u32 reg_offset
, u32
*retryvar
)
824 brcmf_sdcard_reg_write(NULL
, bus
->ci
->buscorebase
+ reg_offset
,
825 sizeof(u32
), regval
);
826 } while (brcmf_sdcard_regfail(bus
->card
) &&
827 (++(*retryvar
) <= retry_limit
));
829 bus
->regfails
+= (*retryvar
-1);
830 if (*retryvar
> retry_limit
)
831 DHD_ERROR(("FAILED REGISTER WRITE %Xh\n", reg_offset
));
835 #define BRCMF_BUS SDIO_BUS
837 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
839 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
842 static void brcmf_sdbrcm_checkdied(struct brcmf_bus
*bus
, void *pkt
, uint seq
);
843 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus
*bus
, bool start
);
847 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub
*drvr
,
848 unsigned char *msg
, uint msglen
);
849 static int brcmf_sdbrcm_checkdied(struct brcmf_bus
*bus
, u8
*data
, uint size
);
850 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus
*bus
);
852 static int brcmf_sdbrcm_download_state(struct brcmf_bus
*bus
, bool enter
);
854 static void brcmf_sdbrcm_release(struct brcmf_bus
*bus
);
855 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus
*bus
);
856 static void brcmf_sdbrcm_disconnect(void *ptr
);
857 static bool brcmf_sdbrcm_chipmatch(u16 chipid
);
858 static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus
*bus
, void *card
,
859 u32 regsva
, u16 devid
);
860 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus
*bus
, void *card
);
861 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus
*bus
, void *card
);
862 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus
*bus
);
864 static uint
brcmf_process_nvram_vars(char *varbuf
, uint len
);
866 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus
*bus
, int mem_size
);
867 static int brcmf_sdbrcm_send_buf(struct brcmf_bus
*bus
, u32 addr
, uint fn
,
868 uint flags
, u8
*buf
, uint nbytes
,
870 void (*complete
)(void *handle
, int status
,
874 static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus
*bus
, void *card
);
875 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus
*bus
);
877 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus
*bus
);
878 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus
*bus
);
881 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card
*card
, u32 corebase
);
883 static int brcmf_sdbrcm_chip_attach(struct brcmf_bus
*bus
, u32 regs
);
886 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card
*card
, u32 corebase
);
888 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus
*bus
,
890 static void brcmf_sdbrcm_chip_detach(struct brcmf_bus
*bus
);
891 static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus
*bus
, bool *lockvar
);
892 static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus
*bus
);
893 static void brcmf_sdbrcm_watchdog(unsigned long data
);
894 static int brcmf_sdbrcm_watchdog_thread(void *data
);
895 static int brcmf_sdbrcm_dpc_thread(void *data
);
896 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data
);
897 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus
*bus
);
898 static void brcmf_sdbrcm_sdlock(struct brcmf_bus
*bus
);
899 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus
*bus
);
900 static int brcmf_sdbrcm_get_image(char *buf
, int len
, struct brcmf_bus
*bus
);
902 /* Packet free applicable unconditionally for sdio and sdspi.
903 * Conditional if bufpool was present for gspi bus.
905 static void brcmf_sdbrcm_pktfree2(struct brcmf_bus
*bus
, struct sk_buff
*pkt
)
907 if ((bus
->bus
!= SPI_BUS
) || bus
->usebufpool
)
908 brcmu_pkt_buf_free_skb(pkt
);
911 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus
*bus
, int mem_size
)
913 s32 min_size
= DONGLE_MIN_MEMSIZE
;
914 /* Restrict the memsize to user specified limit */
915 DHD_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
916 brcmf_dongle_memsize
, min_size
));
917 if ((brcmf_dongle_memsize
> min_size
) &&
918 (brcmf_dongle_memsize
< (s32
) bus
->orig_ramsize
))
919 bus
->ramsize
= brcmf_dongle_memsize
;
922 static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus
*bus
, u32 address
)
925 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_FUNC1_SBADDRLOW
,
926 (address
>> 8) & SBSDIO_SBADDRLOW_MASK
, &err
);
928 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
,
929 SBSDIO_FUNC1_SBADDRMID
,
930 (address
>> 16) & SBSDIO_SBADDRMID_MASK
, &err
);
932 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
,
933 SBSDIO_FUNC1_SBADDRHIGH
,
934 (address
>> 24) & SBSDIO_SBADDRHIGH_MASK
,
939 /* Turn backplane clock on or off */
940 static int brcmf_sdbrcm_htclk(struct brcmf_bus
*bus
, bool on
, bool pendok
)
943 u8 clkctl
, clkreq
, devctl
;
944 struct brcmf_sdio_card
*card
;
946 DHD_TRACE(("%s: Enter\n", __func__
));
952 /* Request HT Avail */
954 bus
->alp_only
? SBSDIO_ALP_AVAIL_REQ
: SBSDIO_HT_AVAIL_REQ
;
956 if ((bus
->ci
->chip
== BCM4329_CHIP_ID
)
957 && (bus
->ci
->chiprev
== 0))
958 clkreq
|= SBSDIO_FORCE_ALP
;
960 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
961 SBSDIO_FUNC1_CHIPCLKCSR
, clkreq
, &err
);
963 DHD_ERROR(("%s: HT Avail request error: %d\n",
968 if (pendok
&& ((bus
->ci
->buscoretype
== PCMCIA_CORE_ID
)
969 && (bus
->ci
->buscorerev
== 9))) {
971 r_sdreg32(bus
, &dummy
,
972 offsetof(struct sdpcmd_regs
, clockctlstatus
),
976 /* Check current status */
977 clkctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
978 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
980 DHD_ERROR(("%s: HT Avail read error: %d\n",
985 /* Go to pending and await interrupt if appropriate */
986 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
) && pendok
) {
987 /* Allow only clock-available interrupt */
988 devctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
989 SBSDIO_DEVICE_CTL
, &err
);
991 DHD_ERROR(("%s: Devctl error setting CA: %d\n",
996 devctl
|= SBSDIO_DEVCTL_CA_INT_ONLY
;
997 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
998 SBSDIO_DEVICE_CTL
, devctl
, &err
);
999 DHD_INFO(("CLKCTL: set PENDING\n"));
1000 bus
->clkstate
= CLK_PENDING
;
1003 } else if (bus
->clkstate
== CLK_PENDING
) {
1004 /* Cancel CA-only interrupt filter */
1006 brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
1007 SBSDIO_DEVICE_CTL
, &err
);
1008 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
1009 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1010 SBSDIO_DEVICE_CTL
, devctl
, &err
);
1013 /* Otherwise, wait here (polling) for HT Avail */
1014 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
1015 BRCMF_SPINWAIT_SLEEP(sdioh_spinwait_sleep
,
1017 brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
1018 SBSDIO_FUNC1_CHIPCLKCSR
,
1020 !SBSDIO_CLKAV(clkctl
, bus
->alp_only
)),
1021 PMU_MAX_TRANSITION_DLY
);
1024 DHD_ERROR(("%s: HT Avail request error: %d\n",
1028 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
1029 DHD_ERROR(("%s: HT Avail timeout (%d): clkctl 0x%02x\n",
1030 __func__
, PMU_MAX_TRANSITION_DLY
, clkctl
));
1034 /* Mark clock available */
1035 bus
->clkstate
= CLK_AVAIL
;
1036 DHD_INFO(("CLKCTL: turned ON\n"));
1039 if (bus
->alp_only
!= true) {
1040 if (SBSDIO_ALPONLY(clkctl
)) {
1041 DHD_ERROR(("%s: HT Clock should be on.\n",
1045 #endif /* defined (BCMDBG) */
1047 bus
->activity
= true;
1051 if (bus
->clkstate
== CLK_PENDING
) {
1052 /* Cancel CA-only interrupt filter */
1053 devctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
1054 SBSDIO_DEVICE_CTL
, &err
);
1055 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
1056 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1057 SBSDIO_DEVICE_CTL
, devctl
, &err
);
1060 bus
->clkstate
= CLK_SDONLY
;
1061 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1062 SBSDIO_FUNC1_CHIPCLKCSR
, clkreq
, &err
);
1063 DHD_INFO(("CLKCTL: turned OFF\n"));
1065 DHD_ERROR(("%s: Failed access turning clock off: %d\n",
1073 /* Change idle/active SD state */
1074 static int brcmf_sdbrcm_sdclk(struct brcmf_bus
*bus
, bool on
)
1076 DHD_TRACE(("%s: Enter\n", __func__
));
1079 bus
->clkstate
= CLK_SDONLY
;
1081 bus
->clkstate
= CLK_NONE
;
1086 /* Transition SD and backplane clock readiness */
1087 static int brcmf_sdbrcm_clkctl(struct brcmf_bus
*bus
, uint target
, bool pendok
)
1090 uint oldstate
= bus
->clkstate
;
1093 DHD_TRACE(("%s: Enter\n", __func__
));
1095 /* Early exit if we're already there */
1096 if (bus
->clkstate
== target
) {
1097 if (target
== CLK_AVAIL
) {
1098 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
1099 bus
->activity
= true;
1106 /* Make sure SD clock is available */
1107 if (bus
->clkstate
== CLK_NONE
)
1108 brcmf_sdbrcm_sdclk(bus
, true);
1109 /* Now request HT Avail on the backplane */
1110 brcmf_sdbrcm_htclk(bus
, true, pendok
);
1111 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
1112 bus
->activity
= true;
1116 /* Remove HT request, or bring up SD clock */
1117 if (bus
->clkstate
== CLK_NONE
)
1118 brcmf_sdbrcm_sdclk(bus
, true);
1119 else if (bus
->clkstate
== CLK_AVAIL
)
1120 brcmf_sdbrcm_htclk(bus
, false, false);
1122 DHD_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
1123 "\n", bus
->clkstate
, target
));
1124 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
1128 /* Make sure to remove HT request */
1129 if (bus
->clkstate
== CLK_AVAIL
)
1130 brcmf_sdbrcm_htclk(bus
, false, false);
1131 /* Now remove the SD clock */
1132 brcmf_sdbrcm_sdclk(bus
, false);
1133 brcmf_sdbrcm_wd_timer(bus
, 0);
1137 DHD_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n", oldstate
, bus
->clkstate
));
1143 int brcmf_sdbrcm_bussleep(struct brcmf_bus
*bus
, bool sleep
)
1145 struct brcmf_sdio_card
*card
= bus
->card
;
1148 DHD_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
1149 (sleep
? "SLEEP" : "WAKE"),
1150 (bus
->sleeping
? "SLEEP" : "WAKE")));
1152 /* Done if we're already in the requested state */
1153 if (sleep
== bus
->sleeping
)
1156 /* Going to sleep: set the alarm and turn off the lights... */
1158 /* Don't sleep if something is pending */
1159 if (bus
->dpc_sched
|| bus
->rxskip
|| pktq_len(&bus
->txq
))
1162 /* Disable SDIO interrupts (no longer interested) */
1163 brcmf_sdcard_intr_disable(bus
->card
);
1165 /* Make sure the controller has the bus up */
1166 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
1168 /* Tell device to start using OOB wakeup */
1169 w_sdreg32(bus
, SMB_USE_OOB
,
1170 offsetof(struct sdpcmd_regs
, tosbmailbox
), &retries
);
1171 if (retries
> retry_limit
)
1172 DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
1174 /* Turn off our contribution to the HT clock request */
1175 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
1177 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1178 SBSDIO_FUNC1_CHIPCLKCSR
,
1179 SBSDIO_FORCE_HW_CLKREQ_OFF
, NULL
);
1181 /* Isolate the bus */
1182 if (bus
->ci
->chip
!= BCM4329_CHIP_ID
1183 && bus
->ci
->chip
!= BCM4319_CHIP_ID
) {
1184 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1186 SBSDIO_DEVCTL_PADS_ISO
, NULL
);
1190 bus
->sleeping
= true;
1193 /* Waking up: bus power up is ok, set local state */
1195 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1196 SBSDIO_FUNC1_CHIPCLKCSR
, 0, NULL
);
1198 /* Force pad isolation off if possible
1199 (in case power never toggled) */
1200 if ((bus
->ci
->buscoretype
== PCMCIA_CORE_ID
)
1201 && (bus
->ci
->buscorerev
>= 10))
1202 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1203 SBSDIO_DEVICE_CTL
, 0, NULL
);
1205 /* Make sure the controller has the bus up */
1206 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
1208 /* Send misc interrupt to indicate OOB not needed */
1209 w_sdreg32(bus
, 0, offsetof(struct sdpcmd_regs
, tosbmailboxdata
),
1211 if (retries
<= retry_limit
)
1212 w_sdreg32(bus
, SMB_DEV_INT
,
1213 offsetof(struct sdpcmd_regs
, tosbmailbox
),
1216 if (retries
> retry_limit
)
1217 DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
1219 /* Make sure we have SD bus access */
1220 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
1223 bus
->sleeping
= false;
1225 /* Enable interrupts again */
1226 if (bus
->intr
&& (bus
->drvr
->busstate
== BRCMF_BUS_DATA
)) {
1227 bus
->intdis
= false;
1228 brcmf_sdcard_intr_enable(bus
->card
);
1235 #define BUS_WAKE(bus) \
1237 if ((bus)->sleeping) \
1238 brcmf_sdbrcm_bussleep((bus), false); \
1241 /* Writes a HW/SW header into the packet and sends it. */
1242 /* Assumes: (a) header space already there, (b) caller holds lock */
1243 static int brcmf_sdbrcm_txpkt(struct brcmf_bus
*bus
, struct sk_buff
*pkt
, uint chan
,
1251 struct brcmf_sdio_card
*card
;
1252 struct sk_buff
*new;
1255 DHD_TRACE(("%s: Enter\n", __func__
));
1259 if (bus
->drvr
->dongle_reset
) {
1264 frame
= (u8
*) (pkt
->data
);
1266 /* Add alignment padding, allocate new packet if needed */
1267 pad
= ((unsigned long)frame
% BRCMF_SDALIGN
);
1269 if (skb_headroom(pkt
) < pad
) {
1270 DHD_INFO(("%s: insufficient headroom %d for %d pad\n",
1271 __func__
, skb_headroom(pkt
), pad
));
1272 bus
->drvr
->tx_realloc
++;
1273 new = brcmu_pkt_buf_get_skb(pkt
->len
+ BRCMF_SDALIGN
);
1275 DHD_ERROR(("%s: couldn't allocate new %d-byte "
1277 __func__
, pkt
->len
+ BRCMF_SDALIGN
));
1282 PKTALIGN(new, pkt
->len
, BRCMF_SDALIGN
);
1283 memcpy(new->data
, pkt
->data
, pkt
->len
);
1285 brcmu_pkt_buf_free_skb(pkt
);
1286 /* free the pkt if canned one is not used */
1289 frame
= (u8
*) (pkt
->data
);
1290 ASSERT(((unsigned long)frame
% BRCMF_SDALIGN
) == 0);
1294 frame
= (u8
*) (pkt
->data
);
1296 ASSERT((pad
+ SDPCM_HDRLEN
) <= (int)(pkt
->len
));
1297 memset(frame
, 0, pad
+ SDPCM_HDRLEN
);
1300 ASSERT(pad
< BRCMF_SDALIGN
);
1302 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1303 len
= (u16
) (pkt
->len
);
1304 *(u16
*) frame
= cpu_to_le16(len
);
1305 *(((u16
*) frame
) + 1) = cpu_to_le16(~len
);
1307 /* Software tag: channel, sequence number, data offset */
1309 ((chan
<< SDPCM_CHANNEL_SHIFT
) & SDPCM_CHANNEL_MASK
) | bus
->tx_seq
|
1311 SDPCM_HDRLEN
) << SDPCM_DOFFSET_SHIFT
) & SDPCM_DOFFSET_MASK
);
1313 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
1314 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
1317 tx_packets
[pkt
->priority
]++;
1318 if (DHD_BYTES_ON() &&
1319 (((DHD_CTL_ON() && (chan
== SDPCM_CONTROL_CHANNEL
)) ||
1320 (DHD_DATA_ON() && (chan
!= SDPCM_CONTROL_CHANNEL
))))) {
1321 printk(KERN_DEBUG
"Tx Frame:\n");
1322 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
, frame
, len
);
1323 } else if (DHD_HDRS_ON()) {
1324 printk(KERN_DEBUG
"TxHdr:\n");
1325 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
1326 frame
, min_t(u16
, len
, 16));
1330 /* Raise len to next SDIO block to eliminate tail command */
1331 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
1332 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
1333 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
1335 } else if (len
% BRCMF_SDALIGN
) {
1336 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
1339 /* Some controllers have trouble with odd bytes -- round to even */
1340 if (forcealign
&& (len
& (ALIGNMENT
- 1))) {
1341 len
= roundup(len
, ALIGNMENT
);
1345 ret
= brcmf_sdbrcm_send_buf(bus
, brcmf_sdcard_cur_sbwad(card
),
1346 SDIO_FUNC_2
, F2SYNC
, frame
, len
, pkt
, NULL
, NULL
);
1348 ASSERT(ret
!= -BCME_PENDING
);
1351 /* On failure, abort the command
1352 and terminate the frame */
1353 DHD_INFO(("%s: sdio error %d, abort command and "
1354 "terminate frame.\n", __func__
, ret
));
1357 brcmf_sdcard_abort(card
, SDIO_FUNC_2
);
1358 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1359 SBSDIO_FUNC1_FRAMECTRL
, SFC_WF_TERM
,
1363 for (i
= 0; i
< 3; i
++) {
1365 hi
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
1366 SBSDIO_FUNC1_WFRAMEBCHI
,
1368 lo
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
1369 SBSDIO_FUNC1_WFRAMEBCLO
,
1371 bus
->f1regdata
+= 2;
1372 if ((hi
== 0) && (lo
== 0))
1378 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
1380 } while ((ret
< 0) && retrydata
&& retries
++ < TXRETRIES
);
1383 /* restore pkt buffer pointer before calling tx complete routine */
1384 skb_pull(pkt
, SDPCM_HDRLEN
+ pad
);
1385 brcmf_sdbrcm_sdunlock(bus
);
1386 brcmf_txcomplete(bus
->drvr
, pkt
, ret
!= 0);
1387 brcmf_sdbrcm_sdlock(bus
);
1390 brcmu_pkt_buf_free_skb(pkt
);
1395 int brcmf_sdbrcm_bus_txdata(struct brcmf_bus
*bus
, struct sk_buff
*pkt
)
1400 DHD_TRACE(("%s: Enter\n", __func__
));
1405 /* Push the test header if doing loopback */
1406 if (bus
->ext_loop
) {
1408 skb_push(pkt
, SDPCM_TEST_HDRLEN
);
1410 *data
++ = SDPCM_TEST_ECHOREQ
;
1411 *data
++ = (u8
) bus
->loopid
++;
1412 *data
++ = (datalen
>> 0);
1413 *data
++ = (datalen
>> 8);
1414 datalen
+= SDPCM_TEST_HDRLEN
;
1418 /* Add space for the header */
1419 skb_push(pkt
, SDPCM_HDRLEN
);
1420 ASSERT(IS_ALIGNED((unsigned long)(pkt
->data
), 2));
1422 prec
= PRIO2PREC((pkt
->priority
& PRIOMASK
));
1424 /* Check for existing queue, current flow-control,
1425 pending event, or pending clock */
1426 if (brcmf_deferred_tx
|| bus
->fcstate
|| pktq_len(&bus
->txq
)
1427 || bus
->dpc_sched
|| (!DATAOK(bus
))
1428 || (bus
->flowcontrol
& NBITVAL(prec
))
1429 || (bus
->clkstate
!= CLK_AVAIL
)) {
1430 DHD_TRACE(("%s: deferring pktq len %d\n", __func__
,
1431 pktq_len(&bus
->txq
)));
1434 /* Priority based enq */
1435 spin_lock_bh(&bus
->txqlock
);
1436 if (brcmf_c_prec_enq(bus
->drvr
, &bus
->txq
, pkt
, prec
) == false) {
1437 skb_pull(pkt
, SDPCM_HDRLEN
);
1438 brcmf_txcomplete(bus
->drvr
, pkt
, false);
1439 brcmu_pkt_buf_free_skb(pkt
);
1440 DHD_ERROR(("%s: out of bus->txq !!!\n", __func__
));
1445 spin_unlock_bh(&bus
->txqlock
);
1447 if (pktq_len(&bus
->txq
) >= TXHI
)
1448 brcmf_txflowcontrol(bus
->drvr
, 0, ON
);
1451 if (pktq_plen(&bus
->txq
, prec
) > qcount
[prec
])
1452 qcount
[prec
] = pktq_plen(&bus
->txq
, prec
);
1454 /* Schedule DPC if needed to send queued packet(s) */
1455 if (brcmf_deferred_tx
&& !bus
->dpc_sched
) {
1456 bus
->dpc_sched
= true;
1457 brcmf_sdbrcm_sched_dpc(bus
);
1460 /* Lock: we're about to use shared data/code (and SDIO) */
1461 brcmf_sdbrcm_sdlock(bus
);
1463 /* Otherwise, send it now */
1465 /* Make sure back plane ht clk is on, no pending allowed */
1466 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, true);
1469 DHD_TRACE(("%s: calling txpkt\n", __func__
));
1470 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_DATA_CHANNEL
, true);
1472 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
,
1473 (bus
->ext_loop
? SDPCM_TEST_CHANNEL
:
1474 SDPCM_DATA_CHANNEL
), true);
1477 bus
->drvr
->tx_errors
++;
1479 bus
->drvr
->dstats
.tx_bytes
+= datalen
;
1481 if (bus
->idletime
== BRCMF_IDLE_IMMEDIATE
&&
1483 bus
->activity
= false;
1484 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
1487 brcmf_sdbrcm_sdunlock(bus
);
1493 static uint
brcmf_sdbrcm_sendfromq(struct brcmf_bus
*bus
, uint maxframes
)
1495 struct sk_buff
*pkt
;
1498 int ret
= 0, prec_out
;
1503 struct brcmf_pub
*drvr
= bus
->drvr
;
1505 DHD_TRACE(("%s: Enter\n", __func__
));
1507 tx_prec_map
= ~bus
->flowcontrol
;
1509 /* Send frames until the limit or some other event */
1510 for (cnt
= 0; (cnt
< maxframes
) && DATAOK(bus
); cnt
++) {
1511 spin_lock_bh(&bus
->txqlock
);
1512 pkt
= brcmu_pktq_mdeq(&bus
->txq
, tx_prec_map
, &prec_out
);
1514 spin_unlock_bh(&bus
->txqlock
);
1517 spin_unlock_bh(&bus
->txqlock
);
1518 datalen
= pkt
->len
- SDPCM_HDRLEN
;
1521 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_DATA_CHANNEL
, true);
1523 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
,
1524 (bus
->ext_loop
? SDPCM_TEST_CHANNEL
:
1525 SDPCM_DATA_CHANNEL
), true);
1528 bus
->drvr
->tx_errors
++;
1530 bus
->drvr
->dstats
.tx_bytes
+= datalen
;
1532 /* In poll mode, need to check for other events */
1533 if (!bus
->intr
&& cnt
) {
1534 /* Check device status, signal pending interrupt */
1535 r_sdreg32(bus
, &intstatus
,
1536 offsetof(struct sdpcmd_regs
, intstatus
),
1539 if (brcmf_sdcard_regfail(bus
->card
))
1541 if (intstatus
& bus
->hostintmask
)
1546 /* Deflow-control stack if needed */
1547 if (drvr
->up
&& (drvr
->busstate
== BRCMF_BUS_DATA
) &&
1548 drvr
->txoff
&& (pktq_len(&bus
->txq
) < TXLOW
))
1549 brcmf_txflowcontrol(drvr
, 0, OFF
);
1555 brcmf_sdbrcm_bus_txctl(struct brcmf_bus
*bus
, unsigned char *msg
, uint msglen
)
1561 struct brcmf_sdio_card
*card
= bus
->card
;
1566 DHD_TRACE(("%s: Enter\n", __func__
));
1568 if (bus
->drvr
->dongle_reset
)
1571 /* Back the pointer to make a room for bus header */
1572 frame
= msg
- SDPCM_HDRLEN
;
1573 len
= (msglen
+= SDPCM_HDRLEN
);
1575 /* Add alignment padding (optional for ctl frames) */
1576 if (brcmf_alignctl
) {
1577 doff
= ((unsigned long)frame
% BRCMF_SDALIGN
);
1582 memset(frame
, 0, doff
+ SDPCM_HDRLEN
);
1584 ASSERT(doff
< BRCMF_SDALIGN
);
1586 doff
+= SDPCM_HDRLEN
;
1588 /* Round send length to next SDIO block */
1589 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
1590 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
1591 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
1593 } else if (len
% BRCMF_SDALIGN
) {
1594 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
1597 /* Satisfy length-alignment requirements */
1598 if (forcealign
&& (len
& (ALIGNMENT
- 1)))
1599 len
= roundup(len
, ALIGNMENT
);
1601 ASSERT(IS_ALIGNED((unsigned long)frame
, 2));
1603 /* Need to lock here to protect txseq and SDIO tx calls */
1604 brcmf_sdbrcm_sdlock(bus
);
1608 /* Make sure backplane clock is on */
1609 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
1611 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1612 *(u16
*) frame
= cpu_to_le16((u16
) msglen
);
1613 *(((u16
*) frame
) + 1) = cpu_to_le16(~msglen
);
1615 /* Software tag: channel, sequence number, data offset */
1617 ((SDPCM_CONTROL_CHANNEL
<< SDPCM_CHANNEL_SHIFT
) &
1619 | bus
->tx_seq
| ((doff
<< SDPCM_DOFFSET_SHIFT
) &
1620 SDPCM_DOFFSET_MASK
);
1621 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
1622 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
1625 DHD_INFO(("%s: No bus credit bus->tx_max %d, bus->tx_seq %d\n",
1626 __func__
, bus
->tx_max
, bus
->tx_seq
));
1627 bus
->ctrl_frame_stat
= true;
1629 bus
->ctrl_frame_buf
= frame
;
1630 bus
->ctrl_frame_len
= len
;
1632 brcmf_sdbrcm_wait_for_event(bus
, &bus
->ctrl_frame_stat
);
1634 if (bus
->ctrl_frame_stat
== false) {
1635 DHD_INFO(("%s: ctrl_frame_stat == false\n", __func__
));
1638 DHD_INFO(("%s: ctrl_frame_stat == true\n", __func__
));
1645 if (DHD_BYTES_ON() && DHD_CTL_ON()) {
1646 printk(KERN_DEBUG
"Tx Frame:\n");
1647 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
1649 } else if (DHD_HDRS_ON()) {
1650 printk(KERN_DEBUG
"TxHdr:\n");
1651 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
1652 frame
, min_t(u16
, len
, 16));
1657 bus
->ctrl_frame_stat
= false;
1658 ret
= brcmf_sdbrcm_send_buf(bus
,
1659 brcmf_sdcard_cur_sbwad(card
), SDIO_FUNC_2
,
1660 F2SYNC
, frame
, len
, NULL
, NULL
, NULL
);
1662 ASSERT(ret
!= -BCME_PENDING
);
1665 /* On failure, abort the command and
1666 terminate the frame */
1667 DHD_INFO(("%s: sdio error %d, abort command and terminate frame.\n",
1671 brcmf_sdcard_abort(card
, SDIO_FUNC_2
);
1673 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
1674 SBSDIO_FUNC1_FRAMECTRL
,
1678 for (i
= 0; i
< 3; i
++) {
1680 hi
= brcmf_sdcard_cfg_read(card
,
1682 SBSDIO_FUNC1_WFRAMEBCHI
,
1684 lo
= brcmf_sdcard_cfg_read(card
,
1686 SBSDIO_FUNC1_WFRAMEBCLO
,
1688 bus
->f1regdata
+= 2;
1689 if ((hi
== 0) && (lo
== 0))
1696 (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
1698 } while ((ret
< 0) && retries
++ < TXRETRIES
);
1701 if ((bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) && !bus
->dpc_sched
) {
1702 bus
->activity
= false;
1703 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
1706 brcmf_sdbrcm_sdunlock(bus
);
1709 bus
->drvr
->tx_ctlerrs
++;
1711 bus
->drvr
->tx_ctlpkts
++;
1713 return ret
? -EIO
: 0;
1716 int brcmf_sdbrcm_bus_rxctl(struct brcmf_bus
*bus
, unsigned char *msg
, uint msglen
)
1722 DHD_TRACE(("%s: Enter\n", __func__
));
1724 if (bus
->drvr
->dongle_reset
)
1727 /* Wait until control frame is available */
1728 timeleft
= brcmf_os_ioctl_resp_wait(bus
->drvr
, &bus
->rxlen
, &pending
);
1730 brcmf_sdbrcm_sdlock(bus
);
1732 memcpy(msg
, bus
->rxctl
, min(msglen
, rxlen
));
1734 brcmf_sdbrcm_sdunlock(bus
);
1737 DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
1738 __func__
, rxlen
, msglen
));
1739 } else if (timeleft
== 0) {
1740 DHD_ERROR(("%s: resumed on timeout\n", __func__
));
1742 brcmf_sdbrcm_sdlock(bus
);
1743 brcmf_sdbrcm_checkdied(bus
, NULL
, 0);
1744 brcmf_sdbrcm_sdunlock(bus
);
1746 } else if (pending
== true) {
1747 DHD_CTL(("%s: cancelled\n", __func__
));
1748 return -ERESTARTSYS
;
1750 DHD_CTL(("%s: resumed for unknown reason?\n", __func__
));
1752 brcmf_sdbrcm_sdlock(bus
);
1753 brcmf_sdbrcm_checkdied(bus
, NULL
, 0);
1754 brcmf_sdbrcm_sdunlock(bus
);
1759 bus
->drvr
->rx_ctlpkts
++;
1761 bus
->drvr
->rx_ctlerrs
++;
1763 return rxlen
? (int)rxlen
: -ETIMEDOUT
;
1805 const struct brcmu_iovar brcmf_sdio_iovars
[] = {
1806 {"intr", IOV_INTR
, 0, IOVT_BOOL
, 0},
1807 {"sleep", IOV_SLEEP
, 0, IOVT_BOOL
, 0},
1808 {"pollrate", IOV_POLLRATE
, 0, IOVT_UINT32
, 0},
1809 {"idletime", IOV_IDLETIME
, 0, IOVT_INT32
, 0},
1810 {"idleclock", IOV_IDLECLOCK
, 0, IOVT_INT32
, 0},
1811 {"sd1idle", IOV_SD1IDLE
, 0, IOVT_BOOL
, 0},
1812 {"membytes", IOV_MEMBYTES
, 0, IOVT_BUFFER
, 2 * sizeof(int)},
1813 {"memsize", IOV_MEMSIZE
, 0, IOVT_UINT32
, 0},
1814 {"download", IOV_DOWNLOAD
, 0, IOVT_BOOL
, 0},
1815 {"vars", IOV_VARS
, 0, IOVT_BUFFER
, 0},
1816 {"sdiod_drive", IOV_SDIOD_DRIVE
, 0, IOVT_UINT32
, 0},
1817 {"readahead", IOV_READAHEAD
, 0, IOVT_BOOL
, 0},
1818 {"sdrxchain", IOV_SDRXCHAIN
, 0, IOVT_BOOL
, 0},
1819 {"alignctl", IOV_ALIGNCTL
, 0, IOVT_BOOL
, 0},
1820 {"sdalign", IOV_SDALIGN
, 0, IOVT_BOOL
, 0},
1821 {"devreset", IOV_DEVRESET
, 0, IOVT_BOOL
, 0},
1822 {"wdtick", IOV_WDTICK
, 0, IOVT_UINT32
, 0},
1824 {"cons", IOV_CONS
, 0, IOVT_BUFFER
, 0}
1826 {"dconpoll", IOV_DCONSOLE_POLL
, 0, IOVT_UINT32
, 0}
1828 {"sdreg", IOV_SDREG
, 0, IOVT_BUFFER
, sizeof(struct brcmf_sdreg
)}
1830 {"sbreg", IOV_SBREG
, 0, IOVT_BUFFER
, sizeof(struct brcmf_sdreg
)}
1832 {"sd_cis", IOV_SDCIS
, 0, IOVT_BUFFER
, BRCMF_IOCTL_MAXLEN
}
1834 {"forcealign", IOV_FORCEEVEN
, 0, IOVT_BOOL
, 0}
1836 {"txbound", IOV_TXBOUND
, 0, IOVT_UINT32
, 0}
1838 {"rxbound", IOV_RXBOUND
, 0, IOVT_UINT32
, 0}
1840 {"txminmax", IOV_TXMINMAX
, 0, IOVT_UINT32
, 0}
1842 {"cpu", IOV_CPU
, 0, IOVT_BOOL
, 0}
1844 {"checkdied", IOV_CHECKDIED
, 0, IOVT_BUFFER
, 0}
1848 {"extloop", IOV_EXTLOOP
, 0, IOVT_BOOL
, 0}
1850 {"pktgen", IOV_PKTGEN
, 0, IOVT_BUFFER
, sizeof(struct brcmf_pktgen
)}
1858 brcmf_dump_pct(struct brcmu_strbuf
*strbuf
, char *desc
, uint num
, uint div
)
1863 brcmu_bprintf(strbuf
, "%s N/A", desc
);
1866 q2
= (100 * (num
- (q1
* div
))) / div
;
1867 brcmu_bprintf(strbuf
, "%s %d.%02d", desc
, q1
, q2
);
1871 void brcmf_sdbrcm_bus_dump(struct brcmf_pub
*drvr
, struct brcmu_strbuf
*strbuf
)
1873 struct brcmf_bus
*bus
= drvr
->bus
;
1875 brcmu_bprintf(strbuf
, "Bus SDIO structure:\n");
1876 brcmu_bprintf(strbuf
,
1877 "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
1878 bus
->hostintmask
, bus
->intstatus
, bus
->sdpcm_ver
);
1879 brcmu_bprintf(strbuf
,
1880 "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
1881 bus
->fcstate
, pktq_len(&bus
->txq
), bus
->tx_seq
, bus
->tx_max
,
1882 bus
->rxskip
, bus
->rxlen
, bus
->rx_seq
);
1883 brcmu_bprintf(strbuf
, "intr %d intrcount %d lastintrs %d spurious %d\n",
1884 bus
->intr
, bus
->intrcount
, bus
->lastintrs
, bus
->spurious
);
1885 brcmu_bprintf(strbuf
, "pollrate %d pollcnt %d regfails %d\n",
1886 bus
->pollrate
, bus
->pollcnt
, bus
->regfails
);
1888 brcmu_bprintf(strbuf
, "\nAdditional counters:\n");
1889 brcmu_bprintf(strbuf
,
1890 "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
1891 bus
->tx_sderrs
, bus
->fcqueued
, bus
->rxrtx
, bus
->rx_toolong
,
1893 brcmu_bprintf(strbuf
, "rx_hdrfail %d badhdr %d badseq %d\n",
1894 bus
->rx_hdrfail
, bus
->rx_badhdr
, bus
->rx_badseq
);
1895 brcmu_bprintf(strbuf
, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
1896 bus
->fc_rcvd
, bus
->fc_xoff
, bus
->fc_xon
);
1897 brcmu_bprintf(strbuf
, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
1898 bus
->rxglomfail
, bus
->rxglomframes
, bus
->rxglompkts
);
1899 brcmu_bprintf(strbuf
, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
1901 (bus
->f2rxhdrs
+ bus
->f2rxdata
), bus
->f2rxhdrs
,
1902 bus
->f2rxdata
, bus
->f2txdata
, bus
->f1regdata
);
1904 brcmf_dump_pct(strbuf
, "\nRx: pkts/f2rd", bus
->drvr
->rx_packets
,
1905 (bus
->f2rxhdrs
+ bus
->f2rxdata
));
1906 brcmf_dump_pct(strbuf
, ", pkts/f1sd", bus
->drvr
->rx_packets
,
1908 brcmf_dump_pct(strbuf
, ", pkts/sd", bus
->drvr
->rx_packets
,
1909 (bus
->f2rxhdrs
+ bus
->f2rxdata
+ bus
->f1regdata
));
1910 brcmf_dump_pct(strbuf
, ", pkts/int", bus
->drvr
->rx_packets
,
1912 brcmu_bprintf(strbuf
, "\n");
1914 brcmf_dump_pct(strbuf
, "Rx: glom pct", (100 * bus
->rxglompkts
),
1915 bus
->drvr
->rx_packets
);
1916 brcmf_dump_pct(strbuf
, ", pkts/glom", bus
->rxglompkts
,
1918 brcmu_bprintf(strbuf
, "\n");
1920 brcmf_dump_pct(strbuf
, "Tx: pkts/f2wr", bus
->drvr
->tx_packets
,
1922 brcmf_dump_pct(strbuf
, ", pkts/f1sd", bus
->drvr
->tx_packets
,
1924 brcmf_dump_pct(strbuf
, ", pkts/sd", bus
->drvr
->tx_packets
,
1925 (bus
->f2txdata
+ bus
->f1regdata
));
1926 brcmf_dump_pct(strbuf
, ", pkts/int", bus
->drvr
->tx_packets
,
1928 brcmu_bprintf(strbuf
, "\n");
1930 brcmf_dump_pct(strbuf
, "Total: pkts/f2rw",
1931 (bus
->drvr
->tx_packets
+ bus
->drvr
->rx_packets
),
1932 (bus
->f2txdata
+ bus
->f2rxhdrs
+ bus
->f2rxdata
));
1933 brcmf_dump_pct(strbuf
, ", pkts/f1sd",
1934 (bus
->drvr
->tx_packets
+ bus
->drvr
->rx_packets
),
1936 brcmf_dump_pct(strbuf
, ", pkts/sd",
1937 (bus
->drvr
->tx_packets
+ bus
->drvr
->rx_packets
),
1938 (bus
->f2txdata
+ bus
->f2rxhdrs
+ bus
->f2rxdata
+
1940 brcmf_dump_pct(strbuf
, ", pkts/int",
1941 (bus
->drvr
->tx_packets
+ bus
->drvr
->rx_packets
),
1943 brcmu_bprintf(strbuf
, "\n\n");
1947 if (bus
->pktgen_count
) {
1948 brcmu_bprintf(strbuf
, "pktgen config and count:\n");
1949 brcmu_bprintf(strbuf
,
1950 "freq %d count %d print %d total %d min %d len %d\n",
1951 bus
->pktgen_freq
, bus
->pktgen_count
,
1952 bus
->pktgen_print
, bus
->pktgen_total
,
1953 bus
->pktgen_minlen
, bus
->pktgen_maxlen
);
1954 brcmu_bprintf(strbuf
, "send attempts %d rcvd %d fail %d\n",
1955 bus
->pktgen_sent
, bus
->pktgen_rcvd
,
1960 brcmu_bprintf(strbuf
, "dpc_sched %d host interrupt%spending\n",
1961 bus
->dpc_sched
, " not ");
1962 brcmu_bprintf(strbuf
, "blocksize %d roundup %d\n", bus
->blocksize
,
1965 brcmu_bprintf(strbuf
,
1966 "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
1967 bus
->clkstate
, bus
->activity
, bus
->idletime
, bus
->idlecount
,
1971 void brcmf_bus_clearcounts(struct brcmf_pub
*drvr
)
1973 struct brcmf_bus
*bus
= (struct brcmf_bus
*) drvr
->bus
;
1975 bus
->intrcount
= bus
->lastintrs
= bus
->spurious
= bus
->regfails
= 0;
1976 bus
->rxrtx
= bus
->rx_toolong
= bus
->rxc_errors
= 0;
1977 bus
->rx_hdrfail
= bus
->rx_badhdr
= bus
->rx_badseq
= 0;
1978 bus
->tx_sderrs
= bus
->fc_rcvd
= bus
->fc_xoff
= bus
->fc_xon
= 0;
1979 bus
->rxglomfail
= bus
->rxglomframes
= bus
->rxglompkts
= 0;
1980 bus
->f2rxhdrs
= bus
->f2rxdata
= bus
->f2txdata
= bus
->f1regdata
= 0;
1984 static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus
*bus
, u8
*arg
)
1986 struct brcmf_pktgen pktgen
;
1988 pktgen
.version
= BRCMF_PKTGEN_VERSION
;
1989 pktgen
.freq
= bus
->pktgen_freq
;
1990 pktgen
.count
= bus
->pktgen_count
;
1991 pktgen
.print
= bus
->pktgen_print
;
1992 pktgen
.total
= bus
->pktgen_total
;
1993 pktgen
.minlen
= bus
->pktgen_minlen
;
1994 pktgen
.maxlen
= bus
->pktgen_maxlen
;
1995 pktgen
.numsent
= bus
->pktgen_sent
;
1996 pktgen
.numrcvd
= bus
->pktgen_rcvd
;
1997 pktgen
.numfail
= bus
->pktgen_fail
;
1998 pktgen
.mode
= bus
->pktgen_mode
;
1999 pktgen
.stop
= bus
->pktgen_stop
;
2001 memcpy(arg
, &pktgen
, sizeof(pktgen
));
2006 static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus
*bus
, u8
*arg
)
2008 struct brcmf_pktgen pktgen
;
2009 uint oldcnt
, oldmode
;
2011 memcpy(&pktgen
, arg
, sizeof(pktgen
));
2012 if (pktgen
.version
!= BRCMF_PKTGEN_VERSION
)
2015 oldcnt
= bus
->pktgen_count
;
2016 oldmode
= bus
->pktgen_mode
;
2018 bus
->pktgen_freq
= pktgen
.freq
;
2019 bus
->pktgen_count
= pktgen
.count
;
2020 bus
->pktgen_print
= pktgen
.print
;
2021 bus
->pktgen_total
= pktgen
.total
;
2022 bus
->pktgen_minlen
= pktgen
.minlen
;
2023 bus
->pktgen_maxlen
= pktgen
.maxlen
;
2024 bus
->pktgen_mode
= pktgen
.mode
;
2025 bus
->pktgen_stop
= pktgen
.stop
;
2027 bus
->pktgen_tick
= bus
->pktgen_ptick
= 0;
2028 bus
->pktgen_len
= max(bus
->pktgen_len
, bus
->pktgen_minlen
);
2029 bus
->pktgen_len
= min(bus
->pktgen_len
, bus
->pktgen_maxlen
);
2031 /* Clear counts for a new pktgen (mode change, or was stopped) */
2032 if (bus
->pktgen_count
&& (!oldcnt
|| oldmode
!= bus
->pktgen_mode
))
2033 bus
->pktgen_sent
= bus
->pktgen_rcvd
= bus
->pktgen_fail
= 0;
2040 brcmf_sdbrcm_membytes(struct brcmf_bus
*bus
, bool write
, u32 address
, u8
*data
,
2047 /* Determine initial transfer parameters */
2048 sdaddr
= address
& SBSDIO_SB_OFT_ADDR_MASK
;
2049 if ((sdaddr
+ size
) & SBSDIO_SBWINDOW_MASK
)
2050 dsize
= (SBSDIO_SB_OFT_ADDR_LIMIT
- sdaddr
);
2054 /* Set the backplane window to include the start address */
2055 bcmerror
= brcmf_sdbrcm_set_siaddr_window(bus
, address
);
2057 DHD_ERROR(("%s: window change failed\n", __func__
));
2061 /* Do the transfer(s) */
2063 DHD_INFO(("%s: %s %d bytes at offset 0x%08x in window 0x%08x\n",
2064 __func__
, (write
? "write" : "read"), dsize
,
2065 sdaddr
, (address
& SBSDIO_SBWINDOW_MASK
)));
2067 brcmf_sdcard_rwdata(bus
->card
, write
, sdaddr
, data
, dsize
);
2069 DHD_ERROR(("%s: membytes transfer failed\n", __func__
));
2073 /* Adjust for next transfer (if any) */
2078 bcmerror
= brcmf_sdbrcm_set_siaddr_window(bus
, address
);
2080 DHD_ERROR(("%s: window change failed\n",
2085 dsize
= min_t(uint
, SBSDIO_SB_OFT_ADDR_LIMIT
, size
);
2090 /* Return the window to backplane enumeration space for core access */
2091 if (brcmf_sdbrcm_set_siaddr_window(bus
,
2092 brcmf_sdcard_cur_sbwad(bus
->card
))) {
2093 DHD_ERROR(("%s: FAILED to set window back to 0x%x\n",
2094 __func__
, brcmf_sdcard_cur_sbwad(bus
->card
)));
2101 static int brcmf_sdbrcm_readshared(struct brcmf_bus
*bus
, struct sdpcm_shared
*sh
)
2106 /* Read last word in memory to determine address of
2107 sdpcm_shared structure */
2108 rv
= brcmf_sdbrcm_membytes(bus
, false, bus
->ramsize
- 4, (u8
*)&addr
,
2113 addr
= le32_to_cpu(addr
);
2115 DHD_INFO(("sdpcm_shared address 0x%08X\n", addr
));
2118 * Check if addr is valid.
2119 * NVRAM length at the end of memory should have been overwritten.
2121 if (addr
== 0 || ((~addr
>> 16) & 0xffff) == (addr
& 0xffff)) {
2122 DHD_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
2127 /* Read rte_shared structure */
2128 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, (u8
*) sh
,
2129 sizeof(struct sdpcm_shared
));
2134 sh
->flags
= le32_to_cpu(sh
->flags
);
2135 sh
->trap_addr
= le32_to_cpu(sh
->trap_addr
);
2136 sh
->assert_exp_addr
= le32_to_cpu(sh
->assert_exp_addr
);
2137 sh
->assert_file_addr
= le32_to_cpu(sh
->assert_file_addr
);
2138 sh
->assert_line
= le32_to_cpu(sh
->assert_line
);
2139 sh
->console_addr
= le32_to_cpu(sh
->console_addr
);
2140 sh
->msgtrace_addr
= le32_to_cpu(sh
->msgtrace_addr
);
2142 if ((sh
->flags
& SDPCM_SHARED_VERSION_MASK
) != SDPCM_SHARED_VERSION
) {
2143 DHD_ERROR(("%s: sdpcm_shared version %d in brcmf "
2144 "is different than sdpcm_shared version %d in dongle\n",
2145 __func__
, SDPCM_SHARED_VERSION
,
2146 sh
->flags
& SDPCM_SHARED_VERSION_MASK
));
2153 static int brcmf_sdbrcm_checkdied(struct brcmf_bus
*bus
, u8
*data
, uint size
)
2157 char *mbuffer
= NULL
;
2158 uint maxstrlen
= 256;
2160 struct brcmf_trap tr
;
2161 struct sdpcm_shared sdpcm_shared
;
2162 struct brcmu_strbuf strbuf
;
2164 DHD_TRACE(("%s: Enter\n", __func__
));
2168 * Called after a rx ctrl timeout. "data" is NULL.
2169 * allocate memory to trace the trap or assert.
2172 mbuffer
= data
= kmalloc(msize
, GFP_ATOMIC
);
2173 if (mbuffer
== NULL
) {
2174 DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__
,
2181 str
= kmalloc(maxstrlen
, GFP_ATOMIC
);
2183 DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__
, maxstrlen
));
2188 bcmerror
= brcmf_sdbrcm_readshared(bus
, &sdpcm_shared
);
2192 brcmu_binit(&strbuf
, data
, size
);
2194 brcmu_bprintf(&strbuf
,
2195 "msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
2196 sdpcm_shared
.msgtrace_addr
, sdpcm_shared
.console_addr
);
2198 if ((sdpcm_shared
.flags
& SDPCM_SHARED_ASSERT_BUILT
) == 0) {
2199 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2200 * (Avoids conflict with real asserts for programmatic
2201 * parsing of output.)
2203 brcmu_bprintf(&strbuf
, "Assrt not built in dongle\n");
2206 if ((sdpcm_shared
.flags
& (SDPCM_SHARED_ASSERT
| SDPCM_SHARED_TRAP
)) ==
2208 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2209 * (Avoids conflict with real asserts for programmatic
2210 * parsing of output.)
2212 brcmu_bprintf(&strbuf
, "No trap%s in dongle",
2213 (sdpcm_shared
.flags
& SDPCM_SHARED_ASSERT_BUILT
)
2216 if (sdpcm_shared
.flags
& SDPCM_SHARED_ASSERT
) {
2217 /* Download assert */
2218 brcmu_bprintf(&strbuf
, "Dongle assert");
2219 if (sdpcm_shared
.assert_exp_addr
!= 0) {
2221 bcmerror
= brcmf_sdbrcm_membytes(bus
, false,
2222 sdpcm_shared
.assert_exp_addr
,
2223 (u8
*) str
, maxstrlen
);
2227 str
[maxstrlen
- 1] = '\0';
2228 brcmu_bprintf(&strbuf
, " expr \"%s\"", str
);
2231 if (sdpcm_shared
.assert_file_addr
!= 0) {
2233 bcmerror
= brcmf_sdbrcm_membytes(bus
, false,
2234 sdpcm_shared
.assert_file_addr
,
2235 (u8
*) str
, maxstrlen
);
2239 str
[maxstrlen
- 1] = '\0';
2240 brcmu_bprintf(&strbuf
, " file \"%s\"", str
);
2243 brcmu_bprintf(&strbuf
, " line %d ",
2244 sdpcm_shared
.assert_line
);
2247 if (sdpcm_shared
.flags
& SDPCM_SHARED_TRAP
) {
2248 bcmerror
= brcmf_sdbrcm_membytes(bus
, false,
2249 sdpcm_shared
.trap_addr
, (u8
*)&tr
,
2250 sizeof(struct brcmf_trap
));
2254 brcmu_bprintf(&strbuf
,
2255 "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
2256 "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
2257 "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
2258 tr
.type
, tr
.epc
, tr
.cpsr
, tr
.spsr
, tr
.r13
,
2259 tr
.r14
, tr
.pc
, sdpcm_shared
.trap_addr
,
2260 tr
.r0
, tr
.r1
, tr
.r2
, tr
.r3
, tr
.r4
, tr
.r5
,
2265 if (sdpcm_shared
.flags
& (SDPCM_SHARED_ASSERT
| SDPCM_SHARED_TRAP
))
2266 DHD_ERROR(("%s: %s\n", __func__
, strbuf
.origbuf
));
2269 if (sdpcm_shared
.flags
& SDPCM_SHARED_TRAP
) {
2270 /* Mem dump to a file on device */
2271 brcmf_sdbrcm_mem_dump(bus
);
2282 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus
*bus
)
2285 int size
; /* Full mem size */
2286 int start
= 0; /* Start address */
2287 int read_size
= 0; /* Read size of each iteration */
2288 u8
*buf
= NULL
, *databuf
= NULL
;
2290 /* Get full mem size */
2291 size
= bus
->ramsize
;
2292 buf
= kmalloc(size
, GFP_ATOMIC
);
2294 DHD_ERROR(("%s: Out of memory (%d bytes)\n", __func__
, size
));
2298 /* Read mem content */
2299 printk(KERN_DEBUG
"Dump dongle memory");
2302 read_size
= min(MEMBLOCK
, size
);
2303 ret
= brcmf_sdbrcm_membytes(bus
, false, start
, databuf
,
2306 DHD_ERROR(("%s: Error membytes %d\n", __func__
, ret
));
2312 /* Decrement size and increment start address */
2315 databuf
+= read_size
;
2317 printk(KERN_DEBUG
"Done\n");
2319 /* free buf before return !!! */
2320 if (brcmf_write_to_file(bus
->drvr
, buf
, bus
->ramsize
)) {
2321 DHD_ERROR(("%s: Error writing to files\n", __func__
));
2325 /* buf free handled in brcmf_write_to_file, not here */
2329 #define CONSOLE_LINE_MAX 192
2331 static int brcmf_sdbrcm_readconsole(struct brcmf_bus
*bus
)
2333 struct brcmf_console
*c
= &bus
->console
;
2334 u8 line
[CONSOLE_LINE_MAX
], ch
;
2338 /* Don't do anything until FWREADY updates console address */
2339 if (bus
->console_addr
== 0)
2342 /* Read console log struct */
2343 addr
= bus
->console_addr
+ offsetof(struct rte_console
, log
);
2344 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, (u8
*)&c
->log
,
2349 /* Allocate console buffer (one time only) */
2350 if (c
->buf
== NULL
) {
2351 c
->bufsize
= le32_to_cpu(c
->log
.buf_size
);
2352 c
->buf
= kmalloc(c
->bufsize
, GFP_ATOMIC
);
2357 idx
= le32_to_cpu(c
->log
.idx
);
2359 /* Protect against corrupt value */
2360 if (idx
> c
->bufsize
)
2363 /* Skip reading the console buffer if the index pointer
2368 /* Read the console buffer */
2369 addr
= le32_to_cpu(c
->log
.buf
);
2370 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, c
->buf
, c
->bufsize
);
2374 while (c
->last
!= idx
) {
2375 for (n
= 0; n
< CONSOLE_LINE_MAX
- 2; n
++) {
2376 if (c
->last
== idx
) {
2377 /* This would output a partial line.
2379 * the buffer pointer and output this
2380 * line next time around.
2385 c
->last
= c
->bufsize
- n
;
2388 ch
= c
->buf
[c
->last
];
2389 c
->last
= (c
->last
+ 1) % c
->bufsize
;
2396 if (line
[n
- 1] == '\r')
2399 printk(KERN_DEBUG
"CONSOLE: %s\n", line
);
2408 int brcmf_sdbrcm_downloadvars(struct brcmf_bus
*bus
, void *arg
, int len
)
2412 DHD_TRACE(("%s: Enter\n", __func__
));
2414 /* Basic sanity checks */
2415 if (bus
->drvr
->up
) {
2416 bcmerror
= -EISCONN
;
2420 bcmerror
= -EOVERFLOW
;
2424 /* Free the old ones and replace with passed variables */
2427 bus
->vars
= kmalloc(len
, GFP_ATOMIC
);
2428 bus
->varsz
= bus
->vars
? len
: 0;
2429 if (bus
->vars
== NULL
) {
2434 /* Copy the passed variables, which should include the
2435 terminating double-null */
2436 memcpy(bus
->vars
, arg
, bus
->varsz
);
2442 brcmf_sdbrcm_doiovar(struct brcmf_bus
*bus
, const struct brcmu_iovar
*vi
, u32 actionid
,
2443 const char *name
, void *params
, int plen
, void *arg
, int len
,
2450 DHD_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
2451 "len %d val_size %d\n",
2452 __func__
, actionid
, name
, params
, plen
, arg
, len
, val_size
));
2454 bcmerror
= brcmu_iovar_lencheck(vi
, arg
, len
, IOV_ISSET(actionid
));
2458 if (plen
>= (int)sizeof(int_val
))
2459 memcpy(&int_val
, params
, sizeof(int_val
));
2461 bool_val
= (int_val
!= 0) ? true : false;
2463 /* Some ioctls use the bus */
2464 brcmf_sdbrcm_sdlock(bus
);
2466 /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
2467 if (bus
->drvr
->dongle_reset
&& !(actionid
== IOV_SVAL(IOV_DEVRESET
) ||
2468 actionid
== IOV_GVAL(IOV_DEVRESET
))) {
2473 /* Handle sleep stuff before any clock mucking */
2474 if (vi
->varid
== IOV_SLEEP
) {
2475 if (IOV_ISSET(actionid
)) {
2476 bcmerror
= brcmf_sdbrcm_bussleep(bus
, bool_val
);
2478 int_val
= (s32
) bus
->sleeping
;
2479 memcpy(arg
, &int_val
, val_size
);
2484 /* Request clock to allow SDIO accesses */
2485 if (!bus
->drvr
->dongle_reset
) {
2487 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
2491 case IOV_GVAL(IOV_INTR
):
2492 int_val
= (s32
) bus
->intr
;
2493 memcpy(arg
, &int_val
, val_size
);
2496 case IOV_SVAL(IOV_INTR
):
2497 bus
->intr
= bool_val
;
2498 bus
->intdis
= false;
2499 if (bus
->drvr
->up
) {
2501 DHD_INTR(("%s: enable SDIO device interrupts\n",
2503 brcmf_sdcard_intr_enable(bus
->card
);
2505 DHD_INTR(("%s: disable SDIO interrupts\n",
2507 brcmf_sdcard_intr_disable(bus
->card
);
2512 case IOV_GVAL(IOV_POLLRATE
):
2513 int_val
= (s32
) bus
->pollrate
;
2514 memcpy(arg
, &int_val
, val_size
);
2517 case IOV_SVAL(IOV_POLLRATE
):
2518 bus
->pollrate
= (uint
) int_val
;
2519 bus
->poll
= (bus
->pollrate
!= 0);
2522 case IOV_GVAL(IOV_IDLETIME
):
2523 int_val
= bus
->idletime
;
2524 memcpy(arg
, &int_val
, val_size
);
2527 case IOV_SVAL(IOV_IDLETIME
):
2528 if ((int_val
< 0) && (int_val
!= BRCMF_IDLE_IMMEDIATE
))
2531 bus
->idletime
= int_val
;
2534 case IOV_GVAL(IOV_IDLECLOCK
):
2535 int_val
= (s32
) bus
->idleclock
;
2536 memcpy(arg
, &int_val
, val_size
);
2539 case IOV_SVAL(IOV_IDLECLOCK
):
2540 bus
->idleclock
= int_val
;
2543 case IOV_GVAL(IOV_SD1IDLE
):
2544 int_val
= (s32
) sd1idle
;
2545 memcpy(arg
, &int_val
, val_size
);
2548 case IOV_SVAL(IOV_SD1IDLE
):
2552 case IOV_SVAL(IOV_MEMBYTES
):
2553 case IOV_GVAL(IOV_MEMBYTES
):
2559 bool set
= (actionid
== IOV_SVAL(IOV_MEMBYTES
));
2561 ASSERT(plen
>= 2 * sizeof(int));
2563 address
= (u32
) int_val
;
2564 memcpy(&int_val
, (char *)params
+ sizeof(int_val
),
2566 size
= (uint
) int_val
;
2568 /* Do some validation */
2569 dsize
= set
? plen
- (2 * sizeof(int)) : len
;
2571 DHD_ERROR(("%s: error on %s membytes, addr "
2572 "0x%08x size %d dsize %d\n",
2573 __func__
, (set
? "set" : "get"),
2574 address
, size
, dsize
));
2579 DHD_INFO(("%s: Request to %s %d bytes at address "
2581 __func__
, (set
? "write" : "read"), size
, address
));
2583 /* If we know about SOCRAM, check for a fit */
2584 if ((bus
->orig_ramsize
) &&
2585 ((address
> bus
->orig_ramsize
)
2586 || (address
+ size
> bus
->orig_ramsize
))) {
2587 DHD_ERROR(("%s: ramsize 0x%08x doesn't have %d "
2588 "bytes at 0x%08x\n",
2589 __func__
, bus
->orig_ramsize
, size
, address
));
2594 /* Generate the actual data pointer */
2596 set
? (u8
*) params
+
2597 2 * sizeof(int) : (u8
*) arg
;
2599 /* Call to do the transfer */
2600 bcmerror
= brcmf_sdbrcm_membytes(bus
, set
, address
,
2606 case IOV_GVAL(IOV_MEMSIZE
):
2607 int_val
= (s32
) bus
->ramsize
;
2608 memcpy(arg
, &int_val
, val_size
);
2611 case IOV_GVAL(IOV_SDIOD_DRIVE
):
2612 int_val
= (s32
) brcmf_sdiod_drive_strength
;
2613 memcpy(arg
, &int_val
, val_size
);
2616 case IOV_SVAL(IOV_SDIOD_DRIVE
):
2617 brcmf_sdiod_drive_strength
= int_val
;
2618 brcmf_sdbrcm_sdiod_drive_strength_init(bus
,
2619 brcmf_sdiod_drive_strength
);
2622 case IOV_SVAL(IOV_DOWNLOAD
):
2623 bcmerror
= brcmf_sdbrcm_download_state(bus
, bool_val
);
2626 case IOV_SVAL(IOV_VARS
):
2627 bcmerror
= brcmf_sdbrcm_downloadvars(bus
, arg
, len
);
2630 case IOV_GVAL(IOV_READAHEAD
):
2631 int_val
= (s32
) brcmf_readahead
;
2632 memcpy(arg
, &int_val
, val_size
);
2635 case IOV_SVAL(IOV_READAHEAD
):
2636 if (bool_val
&& !brcmf_readahead
)
2638 brcmf_readahead
= bool_val
;
2641 case IOV_GVAL(IOV_SDRXCHAIN
):
2642 int_val
= (s32
) bus
->use_rxchain
;
2643 memcpy(arg
, &int_val
, val_size
);
2646 case IOV_SVAL(IOV_SDRXCHAIN
):
2647 if (bool_val
&& !bus
->sd_rxchain
)
2648 bcmerror
= -ENOTSUPP
;
2650 bus
->use_rxchain
= bool_val
;
2652 case IOV_GVAL(IOV_ALIGNCTL
):
2653 int_val
= (s32
) brcmf_alignctl
;
2654 memcpy(arg
, &int_val
, val_size
);
2657 case IOV_SVAL(IOV_ALIGNCTL
):
2658 brcmf_alignctl
= bool_val
;
2661 case IOV_GVAL(IOV_SDALIGN
):
2662 int_val
= BRCMF_SDALIGN
;
2663 memcpy(arg
, &int_val
, val_size
);
2667 case IOV_GVAL(IOV_VARS
):
2668 if (bus
->varsz
< (uint
) len
)
2669 memcpy(arg
, bus
->vars
, bus
->varsz
);
2671 bcmerror
= -EOVERFLOW
;
2676 case IOV_GVAL(IOV_DCONSOLE_POLL
):
2677 int_val
= (s32
) brcmf_console_ms
;
2678 memcpy(arg
, &int_val
, val_size
);
2681 case IOV_SVAL(IOV_DCONSOLE_POLL
):
2682 brcmf_console_ms
= (uint
) int_val
;
2685 case IOV_SVAL(IOV_CONS
):
2687 bcmerror
= brcmf_sdbrcm_bus_console_in(bus
->drvr
,
2691 case IOV_GVAL(IOV_SDREG
):
2693 struct brcmf_sdreg
*sd_ptr
;
2696 sd_ptr
= (struct brcmf_sdreg
*) params
;
2698 addr
= bus
->ci
->buscorebase
+ sd_ptr
->offset
;
2699 size
= sd_ptr
->func
;
2700 int_val
= (s32
) brcmf_sdcard_reg_read(bus
->card
, addr
,
2702 if (brcmf_sdcard_regfail(bus
->card
))
2704 memcpy(arg
, &int_val
, sizeof(s32
));
2708 case IOV_SVAL(IOV_SDREG
):
2710 struct brcmf_sdreg
*sd_ptr
;
2713 sd_ptr
= (struct brcmf_sdreg
*) params
;
2715 addr
= bus
->ci
->buscorebase
+ sd_ptr
->offset
;
2716 size
= sd_ptr
->func
;
2717 brcmf_sdcard_reg_write(bus
->card
, addr
, size
,
2719 if (brcmf_sdcard_regfail(bus
->card
))
2724 /* Same as above, but offset is not backplane
2726 case IOV_GVAL(IOV_SBREG
):
2728 struct brcmf_sdreg sdreg
;
2731 memcpy(&sdreg
, params
, sizeof(sdreg
));
2733 addr
= SI_ENUM_BASE
+ sdreg
.offset
;
2735 int_val
= (s32
) brcmf_sdcard_reg_read(bus
->card
, addr
,
2737 if (brcmf_sdcard_regfail(bus
->card
))
2739 memcpy(arg
, &int_val
, sizeof(s32
));
2743 case IOV_SVAL(IOV_SBREG
):
2745 struct brcmf_sdreg sdreg
;
2748 memcpy(&sdreg
, params
, sizeof(sdreg
));
2750 addr
= SI_ENUM_BASE
+ sdreg
.offset
;
2752 brcmf_sdcard_reg_write(bus
->card
, addr
, size
,
2754 if (brcmf_sdcard_regfail(bus
->card
))
2759 case IOV_GVAL(IOV_SDCIS
):
2763 strcat(arg
, "\nFunc 0\n");
2764 brcmf_sdcard_cis_read(bus
->card
, 0x10,
2765 (u8
*) arg
+ strlen(arg
),
2766 SBSDIO_CIS_SIZE_LIMIT
);
2767 strcat(arg
, "\nFunc 1\n");
2768 brcmf_sdcard_cis_read(bus
->card
, 0x11,
2769 (u8
*) arg
+ strlen(arg
),
2770 SBSDIO_CIS_SIZE_LIMIT
);
2771 strcat(arg
, "\nFunc 2\n");
2772 brcmf_sdcard_cis_read(bus
->card
, 0x12,
2773 (u8
*) arg
+ strlen(arg
),
2774 SBSDIO_CIS_SIZE_LIMIT
);
2778 case IOV_GVAL(IOV_FORCEEVEN
):
2779 int_val
= (s32
) forcealign
;
2780 memcpy(arg
, &int_val
, val_size
);
2783 case IOV_SVAL(IOV_FORCEEVEN
):
2784 forcealign
= bool_val
;
2787 case IOV_GVAL(IOV_TXBOUND
):
2788 int_val
= (s32
) brcmf_txbound
;
2789 memcpy(arg
, &int_val
, val_size
);
2792 case IOV_SVAL(IOV_TXBOUND
):
2793 brcmf_txbound
= (uint
) int_val
;
2796 case IOV_GVAL(IOV_RXBOUND
):
2797 int_val
= (s32
) brcmf_rxbound
;
2798 memcpy(arg
, &int_val
, val_size
);
2801 case IOV_SVAL(IOV_RXBOUND
):
2802 brcmf_rxbound
= (uint
) int_val
;
2805 case IOV_GVAL(IOV_TXMINMAX
):
2806 int_val
= (s32
) brcmf_txminmax
;
2807 memcpy(arg
, &int_val
, val_size
);
2810 case IOV_SVAL(IOV_TXMINMAX
):
2811 brcmf_txminmax
= (uint
) int_val
;
2816 case IOV_GVAL(IOV_EXTLOOP
):
2817 int_val
= (s32
) bus
->ext_loop
;
2818 memcpy(arg
, &int_val
, val_size
);
2821 case IOV_SVAL(IOV_EXTLOOP
):
2822 bus
->ext_loop
= bool_val
;
2825 case IOV_GVAL(IOV_PKTGEN
):
2826 bcmerror
= brcmf_sdbrcm_pktgen_get(bus
, arg
);
2829 case IOV_SVAL(IOV_PKTGEN
):
2830 bcmerror
= brcmf_sdbrcm_pktgen_set(bus
, arg
);
2834 case IOV_SVAL(IOV_DEVRESET
):
2835 DHD_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
2837 __func__
, bool_val
, bus
->drvr
->dongle_reset
,
2838 bus
->drvr
->busstate
));
2840 brcmf_bus_devreset(bus
->drvr
, (u8
) bool_val
);
2844 case IOV_GVAL(IOV_DEVRESET
):
2845 DHD_TRACE(("%s: Called get IOV_DEVRESET\n", __func__
));
2847 /* Get its status */
2848 int_val
= (bool) bus
->drvr
->dongle_reset
;
2849 memcpy(arg
, &int_val
, val_size
);
2853 case IOV_GVAL(IOV_WDTICK
):
2854 int_val
= (s32
) brcmf_watchdog_ms
;
2855 memcpy(arg
, &int_val
, val_size
);
2858 case IOV_SVAL(IOV_WDTICK
):
2859 if (!bus
->drvr
->up
) {
2860 bcmerror
= -ENOLINK
;
2863 brcmf_sdbrcm_wd_timer(bus
, (uint
) int_val
);
2867 bcmerror
= -ENOTSUPP
;
2872 if ((bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) && !bus
->dpc_sched
) {
2873 bus
->activity
= false;
2874 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
2877 brcmf_sdbrcm_sdunlock(bus
);
2879 if (actionid
== IOV_SVAL(IOV_DEVRESET
) && bool_val
== false)
2880 brcmf_c_preinit_ioctls(bus
->drvr
);
2885 static int brcmf_sdbrcm_write_vars(struct brcmf_bus
*bus
)
2893 char *nvram_ularray
;
2896 /* Even if there are no vars are to be written, we still
2897 need to set the ramsize. */
2898 varsize
= bus
->varsz
? roundup(bus
->varsz
, 4) : 0;
2899 varaddr
= (bus
->ramsize
- 4) - varsize
;
2902 vbuffer
= kzalloc(varsize
, GFP_ATOMIC
);
2906 memcpy(vbuffer
, bus
->vars
, bus
->varsz
);
2908 /* Write the vars list */
2910 brcmf_sdbrcm_membytes(bus
, true, varaddr
, vbuffer
, varsize
);
2912 /* Verify NVRAM bytes */
2913 DHD_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize
));
2914 nvram_ularray
= kmalloc(varsize
, GFP_ATOMIC
);
2918 /* Upload image to verify downloaded contents. */
2919 memset(nvram_ularray
, 0xaa, varsize
);
2921 /* Read the vars list to temp buffer for comparison */
2923 brcmf_sdbrcm_membytes(bus
, false, varaddr
, nvram_ularray
,
2926 DHD_ERROR(("%s: error %d on reading %d nvram bytes at "
2927 "0x%08x\n", __func__
, bcmerror
, varsize
, varaddr
));
2929 /* Compare the org NVRAM with the one read from RAM */
2930 if (memcmp(vbuffer
, nvram_ularray
, varsize
)) {
2931 DHD_ERROR(("%s: Downloaded NVRAM image is corrupted.\n",
2934 DHD_ERROR(("%s: Download/Upload/Compare of NVRAM ok.\n",
2937 kfree(nvram_ularray
);
2943 /* adjust to the user specified RAM */
2944 DHD_INFO(("Physical memory size: %d, usable memory size: %d\n",
2945 bus
->orig_ramsize
, bus
->ramsize
));
2946 DHD_INFO(("Vars are at %d, orig varsize is %d\n", varaddr
, varsize
));
2947 varsize
= ((bus
->orig_ramsize
- 4) - varaddr
);
2950 * Determine the length token:
2951 * Varsize, converted to words, in lower 16-bits, checksum
2957 varsizew
= varsize
/ 4;
2958 varsizew
= (~varsizew
<< 16) | (varsizew
& 0x0000FFFF);
2959 varsizew
= cpu_to_le32(varsizew
);
2962 DHD_INFO(("New varsize is %d, length token=0x%08x\n", varsize
,
2965 /* Write the length token to the last word */
2966 bcmerror
= brcmf_sdbrcm_membytes(bus
, true, (bus
->orig_ramsize
- 4),
2967 (u8
*)&varsizew
, 4);
2972 static int brcmf_sdbrcm_download_state(struct brcmf_bus
*bus
, bool enter
)
2978 /* To enter download state, disable ARM and reset SOCRAM.
2979 * To exit download state, simply reset ARM (default is RAM boot).
2982 bus
->alp_only
= true;
2984 brcmf_sdbrcm_chip_disablecore(bus
->card
, bus
->ci
->armcorebase
);
2986 brcmf_sdbrcm_chip_resetcore(bus
->card
, bus
->ci
->ramcorebase
);
2988 /* Clear the top bit of memory */
2991 brcmf_sdbrcm_membytes(bus
, true, bus
->ramsize
- 4,
2995 regdata
= brcmf_sdcard_reg_read(bus
->card
,
2996 CORE_SB(bus
->ci
->ramcorebase
, sbtmstatelow
), 4);
2997 regdata
&= (SBTML_RESET
| SBTML_REJ_MASK
|
2998 (SICF_CLOCK_EN
<< SBTML_SICF_SHIFT
));
2999 if ((SICF_CLOCK_EN
<< SBTML_SICF_SHIFT
) != regdata
) {
3000 DHD_ERROR(("%s: SOCRAM core is down after reset?\n",
3006 bcmerror
= brcmf_sdbrcm_write_vars(bus
);
3008 DHD_ERROR(("%s: no vars written to RAM\n", __func__
));
3012 w_sdreg32(bus
, 0xFFFFFFFF,
3013 offsetof(struct sdpcmd_regs
, intstatus
), &retries
);
3015 brcmf_sdbrcm_chip_resetcore(bus
->card
, bus
->ci
->armcorebase
);
3017 /* Allow HT Clock now that the ARM is running. */
3018 bus
->alp_only
= false;
3020 bus
->drvr
->busstate
= BRCMF_BUS_LOAD
;
3027 brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub
*drvr
, const char *name
,
3028 void *params
, int plen
, void *arg
, int len
, bool set
)
3030 struct brcmf_bus
*bus
= drvr
->bus
;
3031 const struct brcmu_iovar
*vi
= NULL
;
3036 DHD_TRACE(("%s: Enter\n", __func__
));
3041 /* Get MUST have return space */
3042 ASSERT(set
|| (arg
&& len
));
3044 /* Set does NOT take qualifiers */
3045 ASSERT(!set
|| (!params
&& !plen
));
3047 /* Look up var locally; if not found pass to host driver */
3048 vi
= brcmu_iovar_lookup(brcmf_sdio_iovars
, name
);
3050 brcmf_sdbrcm_sdlock(bus
);
3054 /* Turn on clock in case SD command needs backplane */
3055 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3057 bcmerror
= brcmf_sdcard_iovar_op(bus
->card
, name
, params
, plen
,
3060 /* Similar check for blocksize change */
3061 if (set
&& strcmp(name
, "sd_blocksize") == 0) {
3063 if (brcmf_sdcard_iovar_op
3064 (bus
->card
, "sd_blocksize", &fnum
, sizeof(s32
),
3065 &bus
->blocksize
, sizeof(s32
),
3068 DHD_ERROR(("%s: fail on %s get\n", __func__
,
3071 DHD_INFO(("%s: noted %s update, value now %d\n",
3072 __func__
, "sd_blocksize",
3076 bus
->roundup
= min(max_roundup
, bus
->blocksize
);
3078 if (bus
->idletime
== BRCMF_IDLE_IMMEDIATE
&&
3080 bus
->activity
= false;
3081 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
3084 brcmf_sdbrcm_sdunlock(bus
);
3088 DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__
,
3089 name
, (set
? "set" : "get"), len
, plen
));
3091 /* set up 'params' pointer in case this is a set command so that
3092 * the convenience int and bool code can be common to set and get
3094 if (params
== NULL
) {
3099 if (vi
->type
== IOVT_VOID
)
3101 else if (vi
->type
== IOVT_BUFFER
)
3104 /* all other types are integer sized */
3105 val_size
= sizeof(int);
3107 actionid
= set
? IOV_SVAL(vi
->varid
) : IOV_GVAL(vi
->varid
);
3108 bcmerror
= brcmf_sdbrcm_doiovar(bus
, vi
, actionid
, name
, params
, plen
,
3109 arg
, len
, val_size
);
3115 void brcmf_sdbrcm_bus_stop(struct brcmf_bus
*bus
, bool enforce_mutex
)
3117 u32 local_hostintmask
;
3122 DHD_TRACE(("%s: Enter\n", __func__
));
3125 brcmf_sdbrcm_sdlock(bus
);
3129 /* Enable clock for device interrupts */
3130 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3132 if (bus
->watchdog_tsk
) {
3133 send_sig(SIGTERM
, bus
->watchdog_tsk
, 1);
3134 kthread_stop(bus
->watchdog_tsk
);
3135 bus
->watchdog_tsk
= NULL
;
3139 send_sig(SIGTERM
, bus
->dpc_tsk
, 1);
3140 kthread_stop(bus
->dpc_tsk
);
3141 bus
->dpc_tsk
= NULL
;
3143 tasklet_kill(&bus
->tasklet
);
3145 /* Disable and clear interrupts at the chip level also */
3146 w_sdreg32(bus
, 0, offsetof(struct sdpcmd_regs
, hostintmask
), &retries
);
3147 local_hostintmask
= bus
->hostintmask
;
3148 bus
->hostintmask
= 0;
3150 /* Change our idea of bus state */
3151 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
3153 /* Force clocks on backplane to be sure F2 interrupt propagates */
3154 saveclk
= brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_1
,
3155 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3157 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
,
3158 SBSDIO_FUNC1_CHIPCLKCSR
,
3159 (saveclk
| SBSDIO_FORCE_HT
), &err
);
3162 DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
3166 /* Turn off the bus (F2), free any pending packets */
3167 DHD_INTR(("%s: disable SDIO interrupts\n", __func__
));
3168 brcmf_sdcard_intr_disable(bus
->card
);
3169 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_0
, SDIO_CCCR_IOEx
,
3170 SDIO_FUNC_ENABLE_1
, NULL
);
3172 /* Clear any pending interrupts now that F2 is disabled */
3173 w_sdreg32(bus
, local_hostintmask
,
3174 offsetof(struct sdpcmd_regs
, intstatus
), &retries
);
3176 /* Turn off the backplane clock (only) */
3177 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
3179 /* Clear the data packet queues */
3180 brcmu_pktq_flush(&bus
->txq
, true, NULL
, NULL
);
3182 /* Clear any held glomming stuff */
3184 brcmu_pkt_buf_free_skb(bus
->glomd
);
3187 brcmu_pkt_buf_free_skb(bus
->glom
);
3189 bus
->glom
= bus
->glomd
= NULL
;
3191 /* Clear rx control and wake any waiters */
3193 brcmf_os_ioctl_resp_wake(bus
->drvr
);
3195 /* Reset some F2 state stuff */
3196 bus
->rxskip
= false;
3197 bus
->tx_seq
= bus
->rx_seq
= 0;
3200 brcmf_sdbrcm_sdunlock(bus
);
3203 int brcmf_sdbrcm_bus_init(struct brcmf_pub
*drvr
, bool enforce_mutex
)
3205 struct brcmf_bus
*bus
= drvr
->bus
;
3206 struct brcmf_timeout tmo
;
3212 DHD_TRACE(("%s: Enter\n", __func__
));
3214 /* try to download image and nvram to the dongle */
3215 if (drvr
->busstate
== BRCMF_BUS_DOWN
) {
3216 if (!(brcmf_sdbrcm_download_firmware(bus
, bus
->card
)))
3224 /* Start the watchdog timer */
3225 bus
->drvr
->tickcnt
= 0;
3226 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
3229 brcmf_sdbrcm_sdlock(bus
);
3231 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3232 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3233 if (bus
->clkstate
!= CLK_AVAIL
)
3236 /* Force clocks on backplane to be sure F2 interrupt propagates */
3238 brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_1
,
3239 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3241 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
,
3242 SBSDIO_FUNC1_CHIPCLKCSR
,
3243 (saveclk
| SBSDIO_FORCE_HT
), &err
);
3246 DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
3251 /* Enable function 2 (frame transfers) */
3252 w_sdreg32(bus
, SDPCM_PROT_VERSION
<< SMB_DATA_VERSION_SHIFT
,
3253 offsetof(struct sdpcmd_regs
, tosbmailboxdata
), &retries
);
3254 enable
= (SDIO_FUNC_ENABLE_1
| SDIO_FUNC_ENABLE_2
);
3256 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_0
, SDIO_CCCR_IOEx
, enable
,
3259 /* Give the dongle some time to do its thing and set IOR2 */
3260 brcmf_timeout_start(&tmo
, BRCMF_WAIT_F2RDY
* 1000);
3263 while (ready
!= enable
&& !brcmf_timeout_expired(&tmo
))
3264 ready
= brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_0
,
3265 SDIO_CCCR_IORx
, NULL
);
3267 DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
3268 __func__
, enable
, ready
, tmo
.elapsed
));
3270 /* If F2 successfully enabled, set core and enable interrupts */
3271 if (ready
== enable
) {
3272 /* Set up the interrupt mask and enable interrupts */
3273 bus
->hostintmask
= HOSTINTMASK
;
3274 w_sdreg32(bus
, bus
->hostintmask
,
3275 offsetof(struct sdpcmd_regs
, hostintmask
), &retries
);
3277 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_WATERMARK
,
3278 (u8
) watermark
, &err
);
3280 /* Set bus state according to enable result */
3281 drvr
->busstate
= BRCMF_BUS_DATA
;
3283 bus
->intdis
= false;
3285 DHD_INTR(("%s: enable SDIO device interrupts\n",
3287 brcmf_sdcard_intr_enable(bus
->card
);
3289 DHD_INTR(("%s: disable SDIO interrupts\n", __func__
));
3290 brcmf_sdcard_intr_disable(bus
->card
);
3296 /* Disable F2 again */
3297 enable
= SDIO_FUNC_ENABLE_1
;
3298 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_0
, SDIO_CCCR_IOEx
,
3302 /* Restore previous clock setting */
3303 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_FUNC1_CHIPCLKCSR
,
3306 #if defined(OOB_INTR_ONLY)
3307 /* Host registration for OOB interrupt */
3308 if (brcmf_sdio_register_oob_intr(bus
->dhd
)) {
3309 brcmf_sdbrcm_wd_timer(bus
, 0);
3310 DHD_ERROR(("%s Host failed to resgister for OOB\n", __func__
));
3315 /* Enable oob at firmware */
3316 brcmf_sdbrcm_enable_oob_intr(bus
, true);
3317 #endif /* defined(OOB_INTR_ONLY) */
3319 /* If we didn't come up, turn off backplane clock */
3320 if (drvr
->busstate
!= BRCMF_BUS_DATA
)
3321 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3325 brcmf_sdbrcm_sdunlock(bus
);
3330 static void brcmf_sdbrcm_rxfail(struct brcmf_bus
*bus
, bool abort
, bool rtx
)
3332 struct brcmf_sdio_card
*card
= bus
->card
;
3338 DHD_ERROR(("%s: %sterminate frame%s\n", __func__
,
3339 (abort
? "abort command, " : ""),
3340 (rtx
? ", send NAK" : "")));
3343 brcmf_sdcard_abort(card
, SDIO_FUNC_2
);
3345 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
, SBSDIO_FUNC1_FRAMECTRL
,
3349 /* Wait until the packet has been flushed (device/FIFO stable) */
3350 for (lastrbc
= retries
= 0xffff; retries
> 0; retries
--) {
3351 hi
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
3352 SBSDIO_FUNC1_RFRAMEBCHI
, NULL
);
3353 lo
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
3354 SBSDIO_FUNC1_RFRAMEBCLO
, NULL
);
3355 bus
->f1regdata
+= 2;
3357 if ((hi
== 0) && (lo
== 0))
3360 if ((hi
> (lastrbc
>> 8)) && (lo
> (lastrbc
& 0x00ff))) {
3361 DHD_ERROR(("%s: count growing: last 0x%04x now "
3363 __func__
, lastrbc
, ((hi
<< 8) + lo
)));
3365 lastrbc
= (hi
<< 8) + lo
;
3369 DHD_ERROR(("%s: count never zeroed: last 0x%04x\n",
3370 __func__
, lastrbc
));
3372 DHD_INFO(("%s: flush took %d iterations\n", __func__
,
3373 (0xffff - retries
)));
3378 w_sdreg32(bus
, SMB_NAK
,
3379 offsetof(struct sdpcmd_regs
, tosbmailbox
), &retries
);
3382 if (retries
<= retry_limit
)
3386 /* Clear partial in any case */
3389 /* If we can't reach the device, signal failure */
3390 if (err
|| brcmf_sdcard_regfail(card
))
3391 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
3395 brcmf_sdbrcm_read_control(struct brcmf_bus
*bus
, u8
*hdr
, uint len
, uint doff
)
3397 struct brcmf_sdio_card
*card
= bus
->card
;
3402 DHD_TRACE(("%s: Enter\n", __func__
));
3404 /* Control data already received in aligned rxctl */
3405 if ((bus
->bus
== SPI_BUS
) && (!bus
->usebufpool
))
3409 /* Set rxctl for frame (w/optional alignment) */
3410 bus
->rxctl
= bus
->rxbuf
;
3411 if (brcmf_alignctl
) {
3412 bus
->rxctl
+= firstread
;
3413 pad
= ((unsigned long)bus
->rxctl
% BRCMF_SDALIGN
);
3415 bus
->rxctl
+= (BRCMF_SDALIGN
- pad
);
3416 bus
->rxctl
-= firstread
;
3418 ASSERT(bus
->rxctl
>= bus
->rxbuf
);
3420 /* Copy the already-read portion over */
3421 memcpy(bus
->rxctl
, hdr
, firstread
);
3422 if (len
<= firstread
)
3425 /* Copy the full data pkt in gSPI case and process ioctl. */
3426 if (bus
->bus
== SPI_BUS
) {
3427 memcpy(bus
->rxctl
, hdr
, len
);
3431 /* Raise rdlen to next SDIO block to avoid tail command */
3432 rdlen
= len
- firstread
;
3433 if (bus
->roundup
&& bus
->blocksize
&& (rdlen
> bus
->blocksize
)) {
3434 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
3435 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
3436 ((len
+ pad
) < bus
->drvr
->maxctl
))
3438 } else if (rdlen
% BRCMF_SDALIGN
) {
3439 rdlen
+= BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
3442 /* Satisfy length-alignment requirements */
3443 if (forcealign
&& (rdlen
& (ALIGNMENT
- 1)))
3444 rdlen
= roundup(rdlen
, ALIGNMENT
);
3446 /* Drop if the read is too big or it exceeds our maximum */
3447 if ((rdlen
+ firstread
) > bus
->drvr
->maxctl
) {
3448 DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n",
3449 __func__
, rdlen
, bus
->drvr
->maxctl
));
3450 bus
->drvr
->rx_errors
++;
3451 brcmf_sdbrcm_rxfail(bus
, false, false);
3455 if ((len
- doff
) > bus
->drvr
->maxctl
) {
3456 DHD_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
3458 __func__
, len
, (len
- doff
), bus
->drvr
->maxctl
));
3459 bus
->drvr
->rx_errors
++;
3461 brcmf_sdbrcm_rxfail(bus
, false, false);
3465 /* Read remainder of frame body into the rxctl buffer */
3466 sdret
= brcmf_sdcard_recv_buf(card
, brcmf_sdcard_cur_sbwad(card
),
3468 F2SYNC
, (bus
->rxctl
+ firstread
), rdlen
,
3471 ASSERT(sdret
!= -BCME_PENDING
);
3473 /* Control frame failures need retransmission */
3475 DHD_ERROR(("%s: read %d control bytes failed: %d\n",
3476 __func__
, rdlen
, sdret
));
3478 brcmf_sdbrcm_rxfail(bus
, true, true);
3485 if (DHD_BYTES_ON() && DHD_CTL_ON()) {
3486 printk(KERN_DEBUG
"RxCtrl:\n");
3487 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
, bus
->rxctl
, len
);
3491 /* Point to valid data and indicate its length */
3493 bus
->rxlen
= len
- doff
;
3496 /* Awake any waiters */
3497 brcmf_os_ioctl_resp_wake(bus
->drvr
);
3500 static u8
brcmf_sdbrcm_rxglom(struct brcmf_bus
*bus
, u8 rxseq
)
3506 struct sk_buff
*pfirst
, *plast
, *pnext
, *save_pfirst
;
3509 u8 chan
, seq
, doff
, sfdoff
;
3513 bool usechain
= bus
->use_rxchain
;
3515 /* If packets, issue read(s) and send up packet chain */
3516 /* Return sequence numbers consumed? */
3518 DHD_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n", bus
->glomd
,
3521 /* If there's a descriptor, generate the packet chain */
3523 pfirst
= plast
= pnext
= NULL
;
3524 dlen
= (u16
) (bus
->glomd
->len
);
3525 dptr
= bus
->glomd
->data
;
3526 if (!dlen
|| (dlen
& 1)) {
3527 DHD_ERROR(("%s: bad glomd len(%d), ignore descriptor\n",
3532 for (totlen
= num
= 0; dlen
; num
++) {
3533 /* Get (and move past) next length */
3534 sublen
= get_unaligned_le16(dptr
);
3535 dlen
-= sizeof(u16
);
3536 dptr
+= sizeof(u16
);
3537 if ((sublen
< SDPCM_HDRLEN
) ||
3538 ((num
== 0) && (sublen
< (2 * SDPCM_HDRLEN
)))) {
3539 DHD_ERROR(("%s: descriptor len %d bad: %d\n",
3540 __func__
, num
, sublen
));
3544 if (sublen
% BRCMF_SDALIGN
) {
3545 DHD_ERROR(("%s: sublen %d not multiple of %d\n",
3546 __func__
, sublen
, BRCMF_SDALIGN
));
3551 /* For last frame, adjust read len so total
3552 is a block multiple */
3555 (roundup(totlen
, bus
->blocksize
) - totlen
);
3556 totlen
= roundup(totlen
, bus
->blocksize
);
3559 /* Allocate/chain packet for next subframe */
3560 pnext
= brcmu_pkt_buf_get_skb(sublen
+ BRCMF_SDALIGN
);
3561 if (pnext
== NULL
) {
3562 DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
3563 "num %d len %d\n", __func__
,
3567 ASSERT(!(pnext
->prev
));
3570 pfirst
= plast
= pnext
;
3573 plast
->next
= pnext
;
3577 /* Adhere to start alignment requirements */
3578 PKTALIGN(pnext
, sublen
, BRCMF_SDALIGN
);
3581 /* If all allocations succeeded, save packet chain
3584 DHD_GLOM(("%s: allocated %d-byte packet chain for %d "
3585 "subframes\n", __func__
, totlen
, num
));
3586 if (DHD_GLOM_ON() && bus
->nextlen
) {
3587 if (totlen
!= bus
->nextlen
) {
3588 DHD_GLOM(("%s: glomdesc mismatch: nextlen %d glomdesc %d " "rxseq %d\n",
3589 __func__
, bus
->nextlen
,
3594 pfirst
= pnext
= NULL
;
3597 brcmu_pkt_buf_free_skb(pfirst
);
3602 /* Done with descriptor packet */
3603 brcmu_pkt_buf_free_skb(bus
->glomd
);
3608 /* Ok -- either we just generated a packet chain,
3609 or had one from before */
3611 if (DHD_GLOM_ON()) {
3612 DHD_GLOM(("%s: try superframe read, packet chain:\n",
3614 for (pnext
= bus
->glom
; pnext
; pnext
= pnext
->next
) {
3615 DHD_GLOM((" %p: %p len 0x%04x (%d)\n",
3616 pnext
, (u8
*) (pnext
->data
),
3617 pnext
->len
, pnext
->len
));
3622 dlen
= (u16
) brcmu_pkttotlen(pfirst
);
3624 /* Do an SDIO read for the superframe. Configurable iovar to
3625 * read directly into the chained packet, or allocate a large
3626 * packet and and copy into the chain.
3629 errcode
= brcmf_sdcard_recv_buf(bus
->card
,
3630 brcmf_sdcard_cur_sbwad(bus
->card
),
3632 F2SYNC
, (u8
*) pfirst
->data
, dlen
,
3633 pfirst
, NULL
, NULL
);
3634 } else if (bus
->dataptr
) {
3635 errcode
= brcmf_sdcard_recv_buf(bus
->card
,
3636 brcmf_sdcard_cur_sbwad(bus
->card
),
3638 F2SYNC
, bus
->dataptr
, dlen
,
3640 sublen
= (u16
) brcmu_pktfrombuf(pfirst
, 0, dlen
,
3642 if (sublen
!= dlen
) {
3643 DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n",
3644 __func__
, dlen
, sublen
));
3649 DHD_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
3654 ASSERT(errcode
!= -BCME_PENDING
);
3656 /* On failure, kill the superframe, allow a couple retries */
3658 DHD_ERROR(("%s: glom read of %d bytes failed: %d\n",
3659 __func__
, dlen
, errcode
));
3660 bus
->drvr
->rx_errors
++;
3662 if (bus
->glomerr
++ < 3) {
3663 brcmf_sdbrcm_rxfail(bus
, true, true);
3666 brcmf_sdbrcm_rxfail(bus
, true, false);
3667 brcmu_pkt_buf_free_skb(bus
->glom
);
3674 if (DHD_GLOM_ON()) {
3675 printk(KERN_DEBUG
"SUPERFRAME:\n");
3676 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
3677 pfirst
->data
, min_t(int, pfirst
->len
, 48));
3681 /* Validate the superframe header */
3682 dptr
= (u8
*) (pfirst
->data
);
3683 sublen
= get_unaligned_le16(dptr
);
3684 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
3686 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
3687 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3688 bus
->nextlen
= dptr
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
3689 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
3690 DHD_INFO(("%s: nextlen too large (%d) seq %d\n",
3691 __func__
, bus
->nextlen
, seq
));
3694 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3695 txmax
= SDPCM_WINDOW_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3698 if ((u16
)~(sublen
^ check
)) {
3699 DHD_ERROR(("%s (superframe): HW hdr error: len/check "
3700 "0x%04x/0x%04x\n", __func__
, sublen
, check
));
3702 } else if (roundup(sublen
, bus
->blocksize
) != dlen
) {
3703 DHD_ERROR(("%s (superframe): len 0x%04x, rounded "
3704 "0x%04x, expect 0x%04x\n",
3706 roundup(sublen
, bus
->blocksize
), dlen
));
3708 } else if (SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]) !=
3709 SDPCM_GLOM_CHANNEL
) {
3710 DHD_ERROR(("%s (superframe): bad channel %d\n",
3712 SDPCM_PACKET_CHANNEL(&dptr
3713 [SDPCM_FRAMETAG_LEN
])));
3715 } else if (SDPCM_GLOMDESC(&dptr
[SDPCM_FRAMETAG_LEN
])) {
3716 DHD_ERROR(("%s (superframe): got second descriptor?\n",
3719 } else if ((doff
< SDPCM_HDRLEN
) ||
3720 (doff
> (pfirst
->len
- SDPCM_HDRLEN
))) {
3721 DHD_ERROR(("%s (superframe): Bad data offset %d: HW %d "
3723 __func__
, doff
, sublen
,
3724 pfirst
->len
, SDPCM_HDRLEN
));
3728 /* Check sequence number of superframe SW header */
3730 DHD_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
3731 __func__
, seq
, rxseq
));
3736 /* Check window for sanity */
3737 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
3738 DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
3739 __func__
, txmax
, bus
->tx_seq
));
3740 txmax
= bus
->tx_seq
+ 2;
3742 bus
->tx_max
= txmax
;
3744 /* Remove superframe header, remember offset */
3745 skb_pull(pfirst
, doff
);
3748 /* Validate all the subframe headers */
3749 for (num
= 0, pnext
= pfirst
; pnext
&& !errcode
;
3750 num
++, pnext
= pnext
->next
) {
3751 dptr
= (u8
*) (pnext
->data
);
3752 dlen
= (u16
) (pnext
->len
);
3753 sublen
= get_unaligned_le16(dptr
);
3754 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
3755 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
3756 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3758 if (DHD_GLOM_ON()) {
3759 printk(KERN_DEBUG
"subframe:\n");
3760 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
3765 if ((u16
)~(sublen
^ check
)) {
3766 DHD_ERROR(("%s (subframe %d): HW hdr error: "
3767 "len/check 0x%04x/0x%04x\n",
3768 __func__
, num
, sublen
, check
));
3770 } else if ((sublen
> dlen
) || (sublen
< SDPCM_HDRLEN
)) {
3771 DHD_ERROR(("%s (subframe %d): length mismatch: "
3772 "len 0x%04x, expect 0x%04x\n",
3773 __func__
, num
, sublen
, dlen
));
3775 } else if ((chan
!= SDPCM_DATA_CHANNEL
) &&
3776 (chan
!= SDPCM_EVENT_CHANNEL
)) {
3777 DHD_ERROR(("%s (subframe %d): bad channel %d\n",
3778 __func__
, num
, chan
));
3780 } else if ((doff
< SDPCM_HDRLEN
) || (doff
> sublen
)) {
3781 DHD_ERROR(("%s (subframe %d): Bad data offset %d: HW %d min %d\n",
3782 __func__
, num
, doff
, sublen
,
3789 /* Terminate frame on error, request
3791 if (bus
->glomerr
++ < 3) {
3792 /* Restore superframe header space */
3793 skb_push(pfirst
, sfdoff
);
3794 brcmf_sdbrcm_rxfail(bus
, true, true);
3797 brcmf_sdbrcm_rxfail(bus
, true, false);
3798 brcmu_pkt_buf_free_skb(bus
->glom
);
3806 /* Basic SD framing looks ok - process each packet (header) */
3807 save_pfirst
= pfirst
;
3811 for (num
= 0; pfirst
; rxseq
++, pfirst
= pnext
) {
3812 pnext
= pfirst
->next
;
3813 pfirst
->next
= NULL
;
3815 dptr
= (u8
*) (pfirst
->data
);
3816 sublen
= get_unaligned_le16(dptr
);
3817 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
3818 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3819 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
3821 DHD_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
3823 __func__
, num
, pfirst
, pfirst
->data
,
3824 pfirst
->len
, sublen
, chan
, seq
));
3826 ASSERT((chan
== SDPCM_DATA_CHANNEL
)
3827 || (chan
== SDPCM_EVENT_CHANNEL
));
3830 DHD_GLOM(("%s: rx_seq %d, expected %d\n",
3831 __func__
, seq
, rxseq
));
3836 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
3837 printk(KERN_DEBUG
"Rx Subframe Data:\n");
3838 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
3843 __skb_trim(pfirst
, sublen
);
3844 skb_pull(pfirst
, doff
);
3846 if (pfirst
->len
== 0) {
3847 brcmu_pkt_buf_free_skb(pfirst
);
3849 plast
->next
= pnext
;
3851 ASSERT(save_pfirst
== pfirst
);
3852 save_pfirst
= pnext
;
3855 } else if (brcmf_proto_hdrpull(bus
->drvr
, &ifidx
, pfirst
)
3857 DHD_ERROR(("%s: rx protocol error\n",
3859 bus
->drvr
->rx_errors
++;
3860 brcmu_pkt_buf_free_skb(pfirst
);
3862 plast
->next
= pnext
;
3864 ASSERT(save_pfirst
== pfirst
);
3865 save_pfirst
= pnext
;
3870 /* this packet will go up, link back into
3871 chain and count it */
3872 pfirst
->next
= pnext
;
3877 if (DHD_GLOM_ON()) {
3878 DHD_GLOM(("%s subframe %d to stack, %p(%p/%d) "
3880 __func__
, num
, pfirst
, pfirst
->data
,
3881 pfirst
->len
, pfirst
->next
,
3883 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
3885 min_t(int, pfirst
->len
, 32));
3890 brcmf_sdbrcm_sdunlock(bus
);
3891 brcmf_rx_frame(bus
->drvr
, ifidx
, save_pfirst
, num
);
3892 brcmf_sdbrcm_sdlock(bus
);
3895 bus
->rxglomframes
++;
3896 bus
->rxglompkts
+= num
;
3901 /* Return true if there may be more frames to read */
3903 brcmf_sdbrcm_readframes(struct brcmf_bus
*bus
, uint maxframes
, bool *finished
)
3905 struct brcmf_sdio_card
*card
= bus
->card
;
3907 u16 len
, check
; /* Extracted hardware header fields */
3908 u8 chan
, seq
, doff
; /* Extracted software header fields */
3909 u8 fcbits
; /* Extracted fcbits from software header */
3911 struct sk_buff
*pkt
; /* Packet for event or data frames */
3912 u16 pad
; /* Number of pad bytes to read */
3913 u16 rdlen
; /* Total number of bytes to read */
3914 u8 rxseq
; /* Next sequence number to expect */
3915 uint rxleft
= 0; /* Remaining number of frames allowed */
3916 int sdret
; /* Return code from calls */
3917 u8 txmax
; /* Maximum tx sequence offered */
3918 bool len_consistent
; /* Result of comparing readahead len and
3922 uint rxcount
= 0; /* Total frames read */
3924 #if defined(BCMDBG) || defined(SDTEST)
3925 bool sdtest
= false; /* To limit message spew from test mode */
3928 DHD_TRACE(("%s: Enter\n", __func__
));
3933 /* Allow pktgen to override maxframes */
3934 if (bus
->pktgen_count
&& (bus
->pktgen_mode
== BRCMF_PKTGEN_RECV
)) {
3935 maxframes
= bus
->pktgen_count
;
3940 /* Not finished unless we encounter no more frames indication */
3943 for (rxseq
= bus
->rx_seq
, rxleft
= maxframes
;
3944 !bus
->rxskip
&& rxleft
&& bus
->drvr
->busstate
!= BRCMF_BUS_DOWN
;
3945 rxseq
++, rxleft
--) {
3947 /* Handle glomming separately */
3948 if (bus
->glom
|| bus
->glomd
) {
3950 DHD_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
3951 __func__
, bus
->glomd
, bus
->glom
));
3952 cnt
= brcmf_sdbrcm_rxglom(bus
, rxseq
);
3953 DHD_GLOM(("%s: rxglom returned %d\n", __func__
, cnt
));
3955 rxleft
= (rxleft
> cnt
) ? (rxleft
- cnt
) : 1;
3959 /* Try doing single read if we can */
3960 if (brcmf_readahead
&& bus
->nextlen
) {
3961 u16 nextlen
= bus
->nextlen
;
3964 if (bus
->bus
== SPI_BUS
) {
3965 rdlen
= len
= nextlen
;
3967 rdlen
= len
= nextlen
<< 4;
3969 /* Pad read to blocksize for efficiency */
3970 if (bus
->roundup
&& bus
->blocksize
3971 && (rdlen
> bus
->blocksize
)) {
3974 (rdlen
% bus
->blocksize
);
3975 if ((pad
<= bus
->roundup
)
3976 && (pad
< bus
->blocksize
)
3977 && ((rdlen
+ pad
+ firstread
) <
3980 } else if (rdlen
% BRCMF_SDALIGN
) {
3982 BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
3986 /* We use bus->rxctl buffer in WinXP for initial
3987 * control pkt receives.
3988 * Later we use buffer-poll for data as well
3989 * as control packets.
3990 * This is required because dhd receives full
3991 * frame in gSPI unlike SDIO.
3992 * After the frame is received we have to
3993 * distinguish whether it is data
3994 * or non-data frame.
3996 /* Allocate a packet buffer */
3997 pkt
= brcmu_pkt_buf_get_skb(rdlen
+ BRCMF_SDALIGN
);
3999 if (bus
->bus
== SPI_BUS
) {
4000 bus
->usebufpool
= false;
4001 bus
->rxctl
= bus
->rxbuf
;
4002 if (brcmf_alignctl
) {
4003 bus
->rxctl
+= firstread
;
4004 pad
= ((unsigned long)bus
->rxctl
%
4008 (BRCMF_SDALIGN
- pad
);
4009 bus
->rxctl
-= firstread
;
4011 ASSERT(bus
->rxctl
>= bus
->rxbuf
);
4013 /* Read the entire frame */
4014 sdret
= brcmf_sdcard_recv_buf(card
,
4015 brcmf_sdcard_cur_sbwad(card
),
4016 SDIO_FUNC_2
, F2SYNC
,
4020 ASSERT(sdret
!= -BCME_PENDING
);
4022 /* Control frame failures need
4025 DHD_ERROR(("%s: read %d control bytes failed: %d\n",
4028 /* dhd.rx_ctlerrs is higher */
4030 brcmf_sdbrcm_rxfail(bus
, true,
4038 request rtx of events */
4039 DHD_ERROR(("%s (nextlen): "
4040 "brcmu_pkt_buf_get_skb "
4042 " len %d rdlen %d expected"
4043 " rxseq %d\n", __func__
,
4044 len
, rdlen
, rxseq
));
4048 if (bus
->bus
== SPI_BUS
)
4049 bus
->usebufpool
= true;
4051 ASSERT(!(pkt
->prev
));
4052 PKTALIGN(pkt
, rdlen
, BRCMF_SDALIGN
);
4053 rxbuf
= (u8
*) (pkt
->data
);
4054 /* Read the entire frame */
4055 sdret
= brcmf_sdcard_recv_buf(card
,
4056 brcmf_sdcard_cur_sbwad(card
),
4057 SDIO_FUNC_2
, F2SYNC
,
4061 ASSERT(sdret
!= -BCME_PENDING
);
4064 DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n",
4065 __func__
, rdlen
, sdret
));
4066 brcmu_pkt_buf_free_skb(pkt
);
4067 bus
->drvr
->rx_errors
++;
4068 /* Force retry w/normal header read.
4069 * Don't attempt NAK for
4072 brcmf_sdbrcm_rxfail(bus
, true,
4080 /* Now check the header */
4081 memcpy(bus
->rxhdr
, rxbuf
, SDPCM_HDRLEN
);
4083 /* Extract hardware header fields */
4084 len
= get_unaligned_le16(bus
->rxhdr
);
4085 check
= get_unaligned_le16(bus
->rxhdr
+ sizeof(u16
));
4087 /* All zeros means readahead info was bad */
4088 if (!(len
| check
)) {
4089 DHD_INFO(("%s (nextlen): read zeros in HW "
4090 "header???\n", __func__
));
4091 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4095 /* Validate check bytes */
4096 if ((u16
)~(len
^ check
)) {
4097 DHD_ERROR(("%s (nextlen): HW hdr error:"
4098 " nextlen/len/check"
4099 " 0x%04x/0x%04x/0x%04x\n",
4100 __func__
, nextlen
, len
, check
));
4102 brcmf_sdbrcm_rxfail(bus
, false, false);
4103 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4107 /* Validate frame length */
4108 if (len
< SDPCM_HDRLEN
) {
4109 DHD_ERROR(("%s (nextlen): HW hdr length "
4110 "invalid: %d\n", __func__
, len
));
4111 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4115 /* Check for consistency withreadahead info */
4116 len_consistent
= (nextlen
!= (roundup(len
, 16) >> 4));
4117 if (len_consistent
) {
4118 /* Mismatch, force retry w/normal
4119 header (may be >4K) */
4120 DHD_ERROR(("%s (nextlen): mismatch, "
4121 "nextlen %d len %d rnd %d; "
4122 "expected rxseq %d\n",
4124 len
, roundup(len
, 16), rxseq
));
4125 brcmf_sdbrcm_rxfail(bus
, true,
4126 bus
->bus
!= SPI_BUS
);
4127 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4131 /* Extract software header fields */
4132 chan
= SDPCM_PACKET_CHANNEL(
4133 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4134 seq
= SDPCM_PACKET_SEQUENCE(
4135 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4136 doff
= SDPCM_DOFFSET_VALUE(
4137 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4138 txmax
= SDPCM_WINDOW_VALUE(
4139 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4142 bus
->rxhdr
[SDPCM_FRAMETAG_LEN
+
4143 SDPCM_NEXTLEN_OFFSET
];
4144 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
4145 DHD_INFO(("%s (nextlen): got frame w/nextlen too large" " (%d), seq %d\n",
4146 __func__
, bus
->nextlen
, seq
));
4150 bus
->drvr
->rx_readahead_cnt
++;
4152 /* Handle Flow Control */
4153 fcbits
= SDPCM_FCMASK_VALUE(
4154 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4156 if (bus
->flowcontrol
!= fcbits
) {
4157 if (~bus
->flowcontrol
& fcbits
)
4160 if (bus
->flowcontrol
& ~fcbits
)
4164 bus
->flowcontrol
= fcbits
;
4167 /* Check and update sequence number */
4169 DHD_INFO(("%s (nextlen): rx_seq %d, expected "
4170 "%d\n", __func__
, seq
, rxseq
));
4175 /* Check window for sanity */
4176 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
4177 DHD_ERROR(("%s: got unlikely tx max %d with "
4179 __func__
, txmax
, bus
->tx_seq
));
4180 txmax
= bus
->tx_seq
+ 2;
4182 bus
->tx_max
= txmax
;
4185 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
4186 printk(KERN_DEBUG
"Rx Data:\n");
4187 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
4189 } else if (DHD_HDRS_ON()) {
4190 printk(KERN_DEBUG
"RxHdr:\n");
4191 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
4192 bus
->rxhdr
, SDPCM_HDRLEN
);
4196 if (chan
== SDPCM_CONTROL_CHANNEL
) {
4197 if (bus
->bus
== SPI_BUS
) {
4198 brcmf_sdbrcm_read_control(bus
, rxbuf
,
4201 DHD_ERROR(("%s (nextlen): readahead on control" " packet %d?\n",
4203 /* Force retry w/normal header read */
4205 brcmf_sdbrcm_rxfail(bus
, false, true);
4207 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4211 if ((bus
->bus
== SPI_BUS
) && !bus
->usebufpool
) {
4212 DHD_ERROR(("Received %d bytes on %d channel. Running out of " "rx pktbuf's or not yet malloced.\n",
4217 /* Validate data offset */
4218 if ((doff
< SDPCM_HDRLEN
) || (doff
> len
)) {
4219 DHD_ERROR(("%s (nextlen): bad data offset %d: "
4220 "HW len %d min %d\n",
4221 __func__
, doff
, len
, SDPCM_HDRLEN
));
4222 brcmf_sdbrcm_rxfail(bus
, false, false);
4223 brcmf_sdbrcm_pktfree2(bus
, pkt
);
4227 /* All done with this one -- now deliver the packet */
4230 /* gSPI frames should not be handled in fractions */
4231 if (bus
->bus
== SPI_BUS
)
4234 /* Read frame header (hardware and software) */
4235 sdret
= brcmf_sdcard_recv_buf(card
,
4236 brcmf_sdcard_cur_sbwad(card
),
4237 SDIO_FUNC_2
, F2SYNC
, bus
->rxhdr
, firstread
,
4240 ASSERT(sdret
!= -BCME_PENDING
);
4243 DHD_ERROR(("%s: RXHEADER FAILED: %d\n", __func__
,
4246 brcmf_sdbrcm_rxfail(bus
, true, true);
4250 if (DHD_BYTES_ON() || DHD_HDRS_ON()) {
4251 printk(KERN_DEBUG
"RxHdr:\n");
4252 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
4253 bus
->rxhdr
, SDPCM_HDRLEN
);
4257 /* Extract hardware header fields */
4258 len
= get_unaligned_le16(bus
->rxhdr
);
4259 check
= get_unaligned_le16(bus
->rxhdr
+ sizeof(u16
));
4261 /* All zeros means no more frames */
4262 if (!(len
| check
)) {
4267 /* Validate check bytes */
4268 if ((u16
) ~(len
^ check
)) {
4269 DHD_ERROR(("%s: HW hdr err: len/check 0x%04x/0x%04x\n",
4270 __func__
, len
, check
));
4272 brcmf_sdbrcm_rxfail(bus
, false, false);
4276 /* Validate frame length */
4277 if (len
< SDPCM_HDRLEN
) {
4278 DHD_ERROR(("%s: HW hdr length invalid: %d\n",
4283 /* Extract software header fields */
4284 chan
= SDPCM_PACKET_CHANNEL(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4285 seq
= SDPCM_PACKET_SEQUENCE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4286 doff
= SDPCM_DOFFSET_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4287 txmax
= SDPCM_WINDOW_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4289 /* Validate data offset */
4290 if ((doff
< SDPCM_HDRLEN
) || (doff
> len
)) {
4291 DHD_ERROR(("%s: Bad data offset %d: HW len %d, min %d "
4293 __func__
, doff
, len
, SDPCM_HDRLEN
, seq
));
4296 brcmf_sdbrcm_rxfail(bus
, false, false);
4300 /* Save the readahead length if there is one */
4302 bus
->rxhdr
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
4303 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
4304 DHD_INFO(("%s (nextlen): got frame w/nextlen too large "
4306 __func__
, bus
->nextlen
, seq
));
4310 /* Handle Flow Control */
4311 fcbits
= SDPCM_FCMASK_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
4313 if (bus
->flowcontrol
!= fcbits
) {
4314 if (~bus
->flowcontrol
& fcbits
)
4317 if (bus
->flowcontrol
& ~fcbits
)
4321 bus
->flowcontrol
= fcbits
;
4324 /* Check and update sequence number */
4326 DHD_INFO(("%s: rx_seq %d, expected %d\n", __func__
,
4332 /* Check window for sanity */
4333 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
4334 DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
4335 __func__
, txmax
, bus
->tx_seq
));
4336 txmax
= bus
->tx_seq
+ 2;
4338 bus
->tx_max
= txmax
;
4340 /* Call a separate function for control frames */
4341 if (chan
== SDPCM_CONTROL_CHANNEL
) {
4342 brcmf_sdbrcm_read_control(bus
, bus
->rxhdr
, len
, doff
);
4346 ASSERT((chan
== SDPCM_DATA_CHANNEL
)
4347 || (chan
== SDPCM_EVENT_CHANNEL
)
4348 || (chan
== SDPCM_TEST_CHANNEL
)
4349 || (chan
== SDPCM_GLOM_CHANNEL
));
4351 /* Length to read */
4352 rdlen
= (len
> firstread
) ? (len
- firstread
) : 0;
4354 /* May pad read to blocksize for efficiency */
4355 if (bus
->roundup
&& bus
->blocksize
&&
4356 (rdlen
> bus
->blocksize
)) {
4357 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
4358 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
4359 ((rdlen
+ pad
+ firstread
) < MAX_RX_DATASZ
))
4361 } else if (rdlen
% BRCMF_SDALIGN
) {
4362 rdlen
+= BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
4365 /* Satisfy length-alignment requirements */
4366 if (forcealign
&& (rdlen
& (ALIGNMENT
- 1)))
4367 rdlen
= roundup(rdlen
, ALIGNMENT
);
4369 if ((rdlen
+ firstread
) > MAX_RX_DATASZ
) {
4370 /* Too long -- skip this frame */
4371 DHD_ERROR(("%s: too long: len %d rdlen %d\n",
4372 __func__
, len
, rdlen
));
4373 bus
->drvr
->rx_errors
++;
4375 brcmf_sdbrcm_rxfail(bus
, false, false);
4379 pkt
= brcmu_pkt_buf_get_skb(rdlen
+ firstread
+ BRCMF_SDALIGN
);
4381 /* Give up on data, request rtx of events */
4382 DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed: rdlen %d"
4383 " chan %d\n", __func__
, rdlen
, chan
));
4384 bus
->drvr
->rx_dropped
++;
4385 brcmf_sdbrcm_rxfail(bus
, false, RETRYCHAN(chan
));
4389 ASSERT(!(pkt
->prev
));
4391 /* Leave room for what we already read, and align remainder */
4392 ASSERT(firstread
< pkt
->len
);
4393 skb_pull(pkt
, firstread
);
4394 PKTALIGN(pkt
, rdlen
, BRCMF_SDALIGN
);
4396 /* Read the remaining frame data */
4397 sdret
= brcmf_sdcard_recv_buf(card
,
4398 brcmf_sdcard_cur_sbwad(card
),
4399 SDIO_FUNC_2
, F2SYNC
, ((u8
*) (pkt
->data
)),
4400 rdlen
, pkt
, NULL
, NULL
);
4402 ASSERT(sdret
!= -BCME_PENDING
);
4405 DHD_ERROR(("%s: read %d %s bytes failed: %d\n",
4408 SDPCM_EVENT_CHANNEL
) ? "event" : ((chan
==
4410 ? "data" : "test")),
4412 brcmu_pkt_buf_free_skb(pkt
);
4413 bus
->drvr
->rx_errors
++;
4414 brcmf_sdbrcm_rxfail(bus
, true, RETRYCHAN(chan
));
4418 /* Copy the already-read portion */
4419 skb_push(pkt
, firstread
);
4420 memcpy(pkt
->data
, bus
->rxhdr
, firstread
);
4423 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
4424 printk(KERN_DEBUG
"Rx Data:\n");
4425 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
4431 /* Save superframe descriptor and allocate packet frame */
4432 if (chan
== SDPCM_GLOM_CHANNEL
) {
4433 if (SDPCM_GLOMDESC(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
])) {
4434 DHD_GLOM(("%s: glom descriptor, %d bytes:\n",
4437 if (DHD_GLOM_ON()) {
4438 printk(KERN_DEBUG
"Glom Data:\n");
4439 print_hex_dump_bytes("",
4444 __skb_trim(pkt
, len
);
4445 ASSERT(doff
== SDPCM_HDRLEN
);
4446 skb_pull(pkt
, SDPCM_HDRLEN
);
4449 DHD_ERROR(("%s: glom superframe w/o "
4450 "descriptor!\n", __func__
));
4451 brcmf_sdbrcm_rxfail(bus
, false, false);
4456 /* Fill in packet len and prio, deliver upward */
4457 __skb_trim(pkt
, len
);
4458 skb_pull(pkt
, doff
);
4461 /* Test channel packets are processed separately */
4462 if (chan
== SDPCM_TEST_CHANNEL
) {
4463 brcmf_sdbrcm_checkdied(bus
, pkt
, seq
);
4468 if (pkt
->len
== 0) {
4469 brcmu_pkt_buf_free_skb(pkt
);
4471 } else if (brcmf_proto_hdrpull(bus
->drvr
, &ifidx
, pkt
) != 0) {
4472 DHD_ERROR(("%s: rx protocol error\n", __func__
));
4473 brcmu_pkt_buf_free_skb(pkt
);
4474 bus
->drvr
->rx_errors
++;
4478 /* Unlock during rx call */
4479 brcmf_sdbrcm_sdunlock(bus
);
4480 brcmf_rx_frame(bus
->drvr
, ifidx
, pkt
, 1);
4481 brcmf_sdbrcm_sdlock(bus
);
4483 rxcount
= maxframes
- rxleft
;
4485 /* Message if we hit the limit */
4486 if (!rxleft
&& !sdtest
)
4487 DHD_DATA(("%s: hit rx limit of %d frames\n", __func__
,
4491 DHD_DATA(("%s: processed %d frames\n", __func__
, rxcount
));
4492 /* Back off rxseq if awaiting rtx, update rx_seq */
4495 bus
->rx_seq
= rxseq
;
4500 static u32
brcmf_sdbrcm_hostmail(struct brcmf_bus
*bus
)
4507 DHD_TRACE(("%s: Enter\n", __func__
));
4509 /* Read mailbox data and ack that we did so */
4510 r_sdreg32(bus
, &hmb_data
,
4511 offsetof(struct sdpcmd_regs
, tohostmailboxdata
), &retries
);
4513 if (retries
<= retry_limit
)
4514 w_sdreg32(bus
, SMB_INT_ACK
,
4515 offsetof(struct sdpcmd_regs
, tosbmailbox
), &retries
);
4516 bus
->f1regdata
+= 2;
4518 /* Dongle recomposed rx frames, accept them again */
4519 if (hmb_data
& HMB_DATA_NAKHANDLED
) {
4520 DHD_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
4523 DHD_ERROR(("%s: unexpected NAKHANDLED!\n", __func__
));
4525 bus
->rxskip
= false;
4526 intstatus
|= I_HMB_FRAME_IND
;
4530 * DEVREADY does not occur with gSPI.
4532 if (hmb_data
& (HMB_DATA_DEVREADY
| HMB_DATA_FWREADY
)) {
4534 (hmb_data
& HMB_DATA_VERSION_MASK
) >>
4535 HMB_DATA_VERSION_SHIFT
;
4536 if (bus
->sdpcm_ver
!= SDPCM_PROT_VERSION
)
4537 DHD_ERROR(("Version mismatch, dongle reports %d, "
4539 bus
->sdpcm_ver
, SDPCM_PROT_VERSION
));
4541 DHD_INFO(("Dongle ready, protocol version %d\n",
4546 * Flow Control has been moved into the RX headers and this out of band
4547 * method isn't used any more.
4548 * remaining backward compatible with older dongles.
4550 if (hmb_data
& HMB_DATA_FC
) {
4551 fcbits
= (hmb_data
& HMB_DATA_FCDATA_MASK
) >>
4552 HMB_DATA_FCDATA_SHIFT
;
4554 if (fcbits
& ~bus
->flowcontrol
)
4557 if (bus
->flowcontrol
& ~fcbits
)
4561 bus
->flowcontrol
= fcbits
;
4564 /* Shouldn't be any others */
4565 if (hmb_data
& ~(HMB_DATA_DEVREADY
|
4566 HMB_DATA_NAKHANDLED
|
4569 HMB_DATA_FCDATA_MASK
| HMB_DATA_VERSION_MASK
)) {
4570 DHD_ERROR(("Unknown mailbox data content: 0x%02x\n", hmb_data
));
4576 static bool brcmf_sdbrcm_dpc(struct brcmf_bus
*bus
)
4578 struct brcmf_sdio_card
*card
= bus
->card
;
4579 u32 intstatus
, newstatus
= 0;
4581 uint rxlimit
= brcmf_rxbound
; /* Rx frames to read before resched */
4582 uint txlimit
= brcmf_txbound
; /* Tx frames to send before resched */
4583 uint framecnt
= 0; /* Temporary counter of tx/rx frames */
4584 bool rxdone
= true; /* Flag for no more read data */
4585 bool resched
= false; /* Flag indicating resched wanted */
4587 DHD_TRACE(("%s: Enter\n", __func__
));
4589 /* Start with leftover status bits */
4590 intstatus
= bus
->intstatus
;
4592 brcmf_sdbrcm_sdlock(bus
);
4594 /* If waiting for HTAVAIL, check status */
4595 if (bus
->clkstate
== CLK_PENDING
) {
4597 u8 clkctl
, devctl
= 0;
4600 /* Check for inconsistent device control */
4601 devctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
4602 SBSDIO_DEVICE_CTL
, &err
);
4604 DHD_ERROR(("%s: error reading DEVCTL: %d\n",
4606 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
4608 ASSERT(devctl
& SBSDIO_DEVCTL_CA_INT_ONLY
);
4612 /* Read CSR, if clock on switch to AVAIL, else ignore */
4613 clkctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
4614 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
4616 DHD_ERROR(("%s: error reading CSR: %d\n", __func__
,
4618 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
4621 DHD_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", devctl
,
4624 if (SBSDIO_HTAV(clkctl
)) {
4625 devctl
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
4626 SBSDIO_DEVICE_CTL
, &err
);
4628 DHD_ERROR(("%s: error reading DEVCTL: %d\n",
4630 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
4632 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
4633 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
4634 SBSDIO_DEVICE_CTL
, devctl
, &err
);
4636 DHD_ERROR(("%s: error writing DEVCTL: %d\n",
4638 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
4640 bus
->clkstate
= CLK_AVAIL
;
4648 /* Make sure backplane clock is on */
4649 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, true);
4650 if (bus
->clkstate
== CLK_PENDING
)
4653 /* Pending interrupt indicates new device status */
4656 r_sdreg32(bus
, &newstatus
,
4657 offsetof(struct sdpcmd_regs
, intstatus
), &retries
);
4659 if (brcmf_sdcard_regfail(bus
->card
))
4661 newstatus
&= bus
->hostintmask
;
4662 bus
->fcstate
= !!(newstatus
& I_HMB_FC_STATE
);
4664 w_sdreg32(bus
, newstatus
,
4665 offsetof(struct sdpcmd_regs
, intstatus
),
4671 /* Merge new bits with previous */
4672 intstatus
|= newstatus
;
4675 /* Handle flow-control change: read new state in case our ack
4676 * crossed another change interrupt. If change still set, assume
4677 * FC ON for safety, let next loop through do the debounce.
4679 if (intstatus
& I_HMB_FC_CHANGE
) {
4680 intstatus
&= ~I_HMB_FC_CHANGE
;
4681 w_sdreg32(bus
, I_HMB_FC_CHANGE
,
4682 offsetof(struct sdpcmd_regs
, intstatus
), &retries
);
4684 r_sdreg32(bus
, &newstatus
,
4685 offsetof(struct sdpcmd_regs
, intstatus
), &retries
);
4686 bus
->f1regdata
+= 2;
4688 !!(newstatus
& (I_HMB_FC_STATE
| I_HMB_FC_CHANGE
));
4689 intstatus
|= (newstatus
& bus
->hostintmask
);
4692 /* Handle host mailbox indication */
4693 if (intstatus
& I_HMB_HOST_INT
) {
4694 intstatus
&= ~I_HMB_HOST_INT
;
4695 intstatus
|= brcmf_sdbrcm_hostmail(bus
);
4698 /* Generally don't ask for these, can get CRC errors... */
4699 if (intstatus
& I_WR_OOSYNC
) {
4700 DHD_ERROR(("Dongle reports WR_OOSYNC\n"));
4701 intstatus
&= ~I_WR_OOSYNC
;
4704 if (intstatus
& I_RD_OOSYNC
) {
4705 DHD_ERROR(("Dongle reports RD_OOSYNC\n"));
4706 intstatus
&= ~I_RD_OOSYNC
;
4709 if (intstatus
& I_SBINT
) {
4710 DHD_ERROR(("Dongle reports SBINT\n"));
4711 intstatus
&= ~I_SBINT
;
4714 /* Would be active due to wake-wlan in gSPI */
4715 if (intstatus
& I_CHIPACTIVE
) {
4716 DHD_INFO(("Dongle reports CHIPACTIVE\n"));
4717 intstatus
&= ~I_CHIPACTIVE
;
4720 /* Ignore frame indications if rxskip is set */
4722 intstatus
&= ~I_HMB_FRAME_IND
;
4724 /* On frame indication, read available frames */
4725 if (PKT_AVAILABLE()) {
4726 framecnt
= brcmf_sdbrcm_readframes(bus
, rxlimit
, &rxdone
);
4727 if (rxdone
|| bus
->rxskip
)
4728 intstatus
&= ~I_HMB_FRAME_IND
;
4729 rxlimit
-= min(framecnt
, rxlimit
);
4732 /* Keep still-pending events for next scheduling */
4733 bus
->intstatus
= intstatus
;
4736 /* Re-enable interrupts to detect new device events (mailbox, rx frame)
4737 * or clock availability. (Allows tx loop to check ipend if desired.)
4738 * (Unless register access seems hosed, as we may not be able to ACK...)
4740 if (bus
->intr
&& bus
->intdis
&& !brcmf_sdcard_regfail(card
)) {
4741 DHD_INTR(("%s: enable SDIO interrupts, rxdone %d framecnt %d\n",
4742 __func__
, rxdone
, framecnt
));
4743 bus
->intdis
= false;
4744 brcmf_sdcard_intr_enable(card
);
4747 if (DATAOK(bus
) && bus
->ctrl_frame_stat
&&
4748 (bus
->clkstate
== CLK_AVAIL
)) {
4751 ret
= brcmf_sdbrcm_send_buf(bus
, brcmf_sdcard_cur_sbwad(card
),
4752 SDIO_FUNC_2
, F2SYNC
, (u8
*) bus
->ctrl_frame_buf
,
4753 (u32
) bus
->ctrl_frame_len
, NULL
, NULL
, NULL
);
4754 ASSERT(ret
!= -BCME_PENDING
);
4757 /* On failure, abort the command and
4758 terminate the frame */
4759 DHD_INFO(("%s: sdio error %d, abort command and "
4760 "terminate frame.\n", __func__
, ret
));
4763 brcmf_sdcard_abort(card
, SDIO_FUNC_2
);
4765 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
,
4766 SBSDIO_FUNC1_FRAMECTRL
, SFC_WF_TERM
,
4770 for (i
= 0; i
< 3; i
++) {
4772 hi
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
4773 SBSDIO_FUNC1_WFRAMEBCHI
,
4775 lo
= brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
4776 SBSDIO_FUNC1_WFRAMEBCLO
,
4778 bus
->f1regdata
+= 2;
4779 if ((hi
== 0) && (lo
== 0))
4785 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
4787 DHD_INFO(("Return_dpc value is : %d\n", ret
));
4788 bus
->ctrl_frame_stat
= false;
4789 brcmf_sdbrcm_wait_event_wakeup(bus
);
4791 /* Send queued frames (limit 1 if rx may still be pending) */
4792 else if ((bus
->clkstate
== CLK_AVAIL
) && !bus
->fcstate
&&
4793 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) && txlimit
4795 framecnt
= rxdone
? txlimit
: min(txlimit
, brcmf_txminmax
);
4796 framecnt
= brcmf_sdbrcm_sendfromq(bus
, framecnt
);
4797 txlimit
-= framecnt
;
4800 /* Resched if events or tx frames are pending,
4801 else await next interrupt */
4802 /* On failed register access, all bets are off:
4803 no resched or interrupts */
4804 if ((bus
->drvr
->busstate
== BRCMF_BUS_DOWN
) ||
4805 brcmf_sdcard_regfail(card
)) {
4806 DHD_ERROR(("%s: failed backplane access over SDIO, halting "
4807 "operation %d\n", __func__
,
4808 brcmf_sdcard_regfail(card
)));
4809 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
4811 } else if (bus
->clkstate
== CLK_PENDING
) {
4812 DHD_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
4813 "I_CHIPACTIVE interrupt\n", __func__
));
4815 } else if (bus
->intstatus
|| bus
->ipend
||
4816 (!bus
->fcstate
&& brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
)
4817 && DATAOK(bus
)) || PKT_AVAILABLE()) {
4821 bus
->dpc_sched
= resched
;
4823 /* If we're done for now, turn off clock request. */
4824 if ((bus
->clkstate
!= CLK_PENDING
)
4825 && bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) {
4826 bus
->activity
= false;
4827 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
4830 brcmf_sdbrcm_sdunlock(bus
);
4835 void brcmf_sdbrcm_isr(void *arg
)
4837 struct brcmf_bus
*bus
= (struct brcmf_bus
*) arg
;
4838 struct brcmf_sdio_card
*card
;
4840 DHD_TRACE(("%s: Enter\n", __func__
));
4843 DHD_ERROR(("%s : bus is null pointer , exit\n", __func__
));
4848 if (bus
->drvr
->busstate
== BRCMF_BUS_DOWN
) {
4849 DHD_ERROR(("%s : bus is down. we have nothing to do\n",
4853 /* Count the interrupt call */
4857 /* Shouldn't get this interrupt if we're sleeping? */
4858 if (bus
->sleeping
) {
4859 DHD_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
4863 /* Disable additional interrupts (is this needed now)? */
4865 DHD_INTR(("%s: disable SDIO interrupts\n", __func__
));
4867 DHD_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
4869 brcmf_sdcard_intr_disable(card
);
4872 #if defined(SDIO_ISR_THREAD)
4873 DHD_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__
));
4874 while (brcmf_sdbrcm_dpc(bus
))
4877 bus
->dpc_sched
= true;
4878 brcmf_sdbrcm_sched_dpc(bus
);
4884 static void brcmf_sdbrcm_pktgen_init(struct brcmf_bus
*bus
)
4886 /* Default to specified length, or full range */
4887 if (brcmf_pktgen_len
) {
4888 bus
->pktgen_maxlen
= min(brcmf_pktgen_len
,
4889 BRCMF_MAX_PKTGEN_LEN
);
4890 bus
->pktgen_minlen
= bus
->pktgen_maxlen
;
4892 bus
->pktgen_maxlen
= BRCMF_MAX_PKTGEN_LEN
;
4893 bus
->pktgen_minlen
= 0;
4895 bus
->pktgen_len
= (u16
) bus
->pktgen_minlen
;
4897 /* Default to per-watchdog burst with 10s print time */
4898 bus
->pktgen_freq
= 1;
4899 bus
->pktgen_print
= 10000 / brcmf_watchdog_ms
;
4900 bus
->pktgen_count
= (brcmf_pktgen
* brcmf_watchdog_ms
+ 999) / 1000;
4902 /* Default to echo mode */
4903 bus
->pktgen_mode
= BRCMF_PKTGEN_ECHO
;
4904 bus
->pktgen_stop
= 1;
4907 static void brcmf_sdbrcm_pktgen(struct brcmf_bus
*bus
)
4909 struct sk_buff
*pkt
;
4915 /* Display current count if appropriate */
4916 if (bus
->pktgen_print
&& (++bus
->pktgen_ptick
>= bus
->pktgen_print
)) {
4917 bus
->pktgen_ptick
= 0;
4918 printk(KERN_DEBUG
"%s: send attempts %d rcvd %d\n",
4919 __func__
, bus
->pktgen_sent
, bus
->pktgen_rcvd
);
4922 /* For recv mode, just make sure dongle has started sending */
4923 if (bus
->pktgen_mode
== BRCMF_PKTGEN_RECV
) {
4924 if (!bus
->pktgen_rcvd
)
4925 brcmf_sdbrcm_sdtest_set(bus
, true);
4929 /* Otherwise, generate or request the specified number of packets */
4930 for (pktcount
= 0; pktcount
< bus
->pktgen_count
; pktcount
++) {
4931 /* Stop if total has been reached */
4932 if (bus
->pktgen_total
4933 && (bus
->pktgen_sent
>= bus
->pktgen_total
)) {
4934 bus
->pktgen_count
= 0;
4938 /* Allocate an appropriate-sized packet */
4939 len
= bus
->pktgen_len
;
4940 pkt
= brcmu_pkt_buf_get_skb(
4941 len
+ SDPCM_HDRLEN
+ SDPCM_TEST_HDRLEN
+ BRCMF_SDALIGN
,
4944 DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
4948 PKTALIGN(pkt
, (len
+ SDPCM_HDRLEN
+ SDPCM_TEST_HDRLEN
),
4950 data
= (u8
*) (pkt
->data
) + SDPCM_HDRLEN
;
4952 /* Write test header cmd and extra based on mode */
4953 switch (bus
->pktgen_mode
) {
4954 case BRCMF_PKTGEN_ECHO
:
4955 *data
++ = SDPCM_TEST_ECHOREQ
;
4956 *data
++ = (u8
) bus
->pktgen_sent
;
4959 case BRCMF_PKTGEN_SEND
:
4960 *data
++ = SDPCM_TEST_DISCARD
;
4961 *data
++ = (u8
) bus
->pktgen_sent
;
4964 case BRCMF_PKTGEN_RXBURST
:
4965 *data
++ = SDPCM_TEST_BURST
;
4966 *data
++ = (u8
) bus
->pktgen_count
;
4970 DHD_ERROR(("Unrecognized pktgen mode %d\n",
4972 brcmu_pkt_buf_free_skb(pkt
, true);
4973 bus
->pktgen_count
= 0;
4977 /* Write test header length field */
4978 *data
++ = (len
>> 0);
4979 *data
++ = (len
>> 8);
4981 /* Then fill in the remainder -- N/A for burst,
4983 for (fillbyte
= 0; fillbyte
< len
; fillbyte
++)
4985 SDPCM_TEST_FILL(fillbyte
, (u8
) bus
->pktgen_sent
);
4988 if (DHD_BYTES_ON() && DHD_DATA_ON()) {
4989 data
= (u8
*) (pkt
->data
) + SDPCM_HDRLEN
;
4990 printk(KERN_DEBUG
"brcmf_sdbrcm_pktgen: Tx Data:\n");
4991 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
, data
,
4992 pkt
->len
- SDPCM_HDRLEN
);
4997 if (brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_TEST_CHANNEL
, true)) {
4999 if (bus
->pktgen_stop
5000 && bus
->pktgen_stop
== bus
->pktgen_fail
)
5001 bus
->pktgen_count
= 0;
5005 /* Bump length if not fixed, wrap at max */
5006 if (++bus
->pktgen_len
> bus
->pktgen_maxlen
)
5007 bus
->pktgen_len
= (u16
) bus
->pktgen_minlen
;
5009 /* Special case for burst mode: just send one request! */
5010 if (bus
->pktgen_mode
== BRCMF_PKTGEN_RXBURST
)
5015 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus
*bus
, bool start
)
5017 struct sk_buff
*pkt
;
5020 /* Allocate the packet */
5021 pkt
= brcmu_pkt_buf_get_skb(SDPCM_HDRLEN
+ SDPCM_TEST_HDRLEN
+
5022 BRCMF_SDALIGN
, true);
5024 DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__
));
5027 PKTALIGN(pkt
, (SDPCM_HDRLEN
+ SDPCM_TEST_HDRLEN
), BRCMF_SDALIGN
);
5028 data
= (u8
*) (pkt
->data
) + SDPCM_HDRLEN
;
5030 /* Fill in the test header */
5031 *data
++ = SDPCM_TEST_SEND
;
5033 *data
++ = (bus
->pktgen_maxlen
>> 0);
5034 *data
++ = (bus
->pktgen_maxlen
>> 8);
5037 if (brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_TEST_CHANNEL
, true))
5042 brcmf_sdbrcm_checkdied(struct brcmf_bus
*bus
, struct sk_buff
*pkt
, uint seq
)
5052 /* Check for min length */
5054 if (pktlen
< SDPCM_TEST_HDRLEN
) {
5055 DHD_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
5057 brcmu_pkt_buf_free_skb(pkt
, false);
5061 /* Extract header fields */
5066 len
+= *data
++ << 8;
5068 /* Check length for relevant commands */
5069 if (cmd
== SDPCM_TEST_DISCARD
|| cmd
== SDPCM_TEST_ECHOREQ
5070 || cmd
== SDPCM_TEST_ECHORSP
) {
5071 if (pktlen
!= len
+ SDPCM_TEST_HDRLEN
) {
5072 DHD_ERROR(("brcmf_sdbrcm_checkdied: frame length "
5073 "mismatch, pktlen %d seq %d" " cmd %d extra %d "
5075 pktlen
, seq
, cmd
, extra
, len
));
5076 brcmu_pkt_buf_free_skb(pkt
, false);
5081 /* Process as per command */
5083 case SDPCM_TEST_ECHOREQ
:
5084 /* Rx->Tx turnaround ok (even on NDIS w/current
5086 *(u8
*) (pkt
->data
) = SDPCM_TEST_ECHORSP
;
5087 if (brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_TEST_CHANNEL
, true) == 0)
5091 brcmu_pkt_buf_free_skb(pkt
, false);
5096 case SDPCM_TEST_ECHORSP
:
5097 if (bus
->ext_loop
) {
5098 brcmu_pkt_buf_free_skb(pkt
, false);
5103 for (offset
= 0; offset
< len
; offset
++, data
++) {
5104 if (*data
!= SDPCM_TEST_FILL(offset
, extra
)) {
5105 DHD_ERROR(("brcmf_sdbrcm_checkdied: echo data "
5106 "mismatch: " "offset %d (len %d) "
5107 "expect 0x%02x rcvd 0x%02x\n",
5109 SDPCM_TEST_FILL(offset
, extra
),
5114 brcmu_pkt_buf_free_skb(pkt
, false);
5118 case SDPCM_TEST_DISCARD
:
5119 brcmu_pkt_buf_free_skb(pkt
, false);
5123 case SDPCM_TEST_BURST
:
5124 case SDPCM_TEST_SEND
:
5126 DHD_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
5127 "command, pktlen %d seq %d" " cmd %d extra %d len %d\n",
5128 pktlen
, seq
, cmd
, extra
, len
));
5129 brcmu_pkt_buf_free_skb(pkt
, false);
5133 /* For recv mode, stop at limie (and tell dongle to stop sending) */
5134 if (bus
->pktgen_mode
== BRCMF_PKTGEN_RECV
) {
5135 if (bus
->pktgen_total
5136 && (bus
->pktgen_rcvd
>= bus
->pktgen_total
)) {
5137 bus
->pktgen_count
= 0;
5138 brcmf_sdbrcm_sdtest_set(bus
, false);
5144 extern bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub
*drvr
)
5146 struct brcmf_bus
*bus
;
5148 DHD_TIMER(("%s: Enter\n", __func__
));
5152 if (bus
->drvr
->dongle_reset
)
5155 /* Ignore the timer if simulating bus down */
5159 brcmf_sdbrcm_sdlock(bus
);
5161 /* Poll period: check device if appropriate. */
5162 if (bus
->poll
&& (++bus
->polltick
>= bus
->pollrate
)) {
5165 /* Reset poll tick */
5168 /* Check device if no interrupts */
5169 if (!bus
->intr
|| (bus
->intrcount
== bus
->lastintrs
)) {
5171 if (!bus
->dpc_sched
) {
5173 devpend
= brcmf_sdcard_cfg_read(bus
->card
,
5174 SDIO_FUNC_0
, SDIO_CCCR_INTx
,
5177 devpend
& (INTR_STATUS_FUNC1
|
5181 /* If there is something, make like the ISR and
5187 brcmf_sdcard_intr_disable(bus
->card
);
5189 bus
->dpc_sched
= true;
5190 brcmf_sdbrcm_sched_dpc(bus
);
5195 /* Update interrupt tracking */
5196 bus
->lastintrs
= bus
->intrcount
;
5199 /* Poll for console output periodically */
5200 if (drvr
->busstate
== BRCMF_BUS_DATA
&& brcmf_console_ms
!= 0) {
5201 bus
->console
.count
+= brcmf_watchdog_ms
;
5202 if (bus
->console
.count
>= brcmf_console_ms
) {
5203 bus
->console
.count
-= brcmf_console_ms
;
5204 /* Make sure backplane clock is on */
5205 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
5206 if (brcmf_sdbrcm_readconsole(bus
) < 0)
5207 brcmf_console_ms
= 0; /* On error,
5214 /* Generate packets if configured */
5215 if (bus
->pktgen_count
&& (++bus
->pktgen_tick
>= bus
->pktgen_freq
)) {
5216 /* Make sure backplane clock is on */
5217 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
5218 bus
->pktgen_tick
= 0;
5219 brcmf_sdbrcm_pktgen(bus
);
5223 /* On idle timeout clear activity flag and/or turn off clock */
5224 if ((bus
->idletime
> 0) && (bus
->clkstate
== CLK_AVAIL
)) {
5225 if (++bus
->idlecount
>= bus
->idletime
) {
5227 if (bus
->activity
) {
5228 bus
->activity
= false;
5229 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
5231 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
5236 brcmf_sdbrcm_sdunlock(bus
);
5242 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub
*drvr
,
5243 unsigned char *msg
, uint msglen
)
5245 struct brcmf_bus
*bus
= drvr
->bus
;
5248 struct sk_buff
*pkt
;
5250 /* Address could be zero if CONSOLE := 0 in dongle Makefile */
5251 if (bus
->console_addr
== 0)
5254 /* Exclusive bus access */
5255 brcmf_sdbrcm_sdlock(bus
);
5257 /* Don't allow input if dongle is in reset */
5258 if (bus
->drvr
->dongle_reset
) {
5259 brcmf_sdbrcm_sdunlock(bus
);
5263 /* Request clock to allow SDIO accesses */
5265 /* No pend allowed since txpkt is called later, ht clk has to be on */
5266 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
5268 /* Zero cbuf_index */
5269 addr
= bus
->console_addr
+ offsetof(struct rte_console
, cbuf_idx
);
5270 val
= cpu_to_le32(0);
5271 rv
= brcmf_sdbrcm_membytes(bus
, true, addr
, (u8
*)&val
, sizeof(val
));
5275 /* Write message into cbuf */
5276 addr
= bus
->console_addr
+ offsetof(struct rte_console
, cbuf
);
5277 rv
= brcmf_sdbrcm_membytes(bus
, true, addr
, (u8
*)msg
, msglen
);
5281 /* Write length into vcons_in */
5282 addr
= bus
->console_addr
+ offsetof(struct rte_console
, vcons_in
);
5283 val
= cpu_to_le32(msglen
);
5284 rv
= brcmf_sdbrcm_membytes(bus
, true, addr
, (u8
*)&val
, sizeof(val
));
5288 /* Bump dongle by sending an empty event pkt.
5289 * sdpcm_sendup (RX) checks for virtual console input.
5291 pkt
= brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE
);
5292 if ((pkt
!= NULL
) && bus
->clkstate
== CLK_AVAIL
)
5293 brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_EVENT_CHANNEL
, true);
5296 if ((bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) && !bus
->dpc_sched
) {
5297 bus
->activity
= false;
5298 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
5301 brcmf_sdbrcm_sdunlock(bus
);
5307 static bool brcmf_sdbrcm_chipmatch(u16 chipid
)
5309 if (chipid
== BCM4325_CHIP_ID
)
5311 if (chipid
== BCM4329_CHIP_ID
)
5313 if (chipid
== BCM4319_CHIP_ID
)
5318 static void *brcmf_sdbrcm_probe(u16 venid
, u16 devid
, u16 bus_no
,
5319 u16 slot
, u16 func
, uint bustype
, u32 regsva
,
5323 struct brcmf_bus
*bus
;
5325 /* Init global variables at run-time, not as part of the declaration.
5326 * This is required to support init/de-init of the driver.
5328 * of globals as part of the declaration results in non-deterministic
5329 * behavior since the value of the globals may be different on the
5330 * first time that the driver is initialized vs subsequent
5333 brcmf_txbound
= BRCMF_TXBOUND
;
5334 brcmf_rxbound
= BRCMF_RXBOUND
;
5335 brcmf_alignctl
= true;
5337 brcmf_readahead
= true;
5339 brcmf_dongle_memsize
= 0;
5340 brcmf_txminmax
= BRCMF_TXMINMAX
;
5346 DHD_TRACE(("%s: Enter\n", __func__
));
5347 DHD_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__
, venid
, devid
));
5349 /* We make assumptions about address window mappings */
5350 ASSERT(regsva
== SI_ENUM_BASE
);
5352 /* SDIO car passes venid and devid based on CIS parsing -- but
5354 * means early parse could fail, so here we should get either an ID
5355 * we recognize OR (-1) indicating we must request power first.
5357 /* Check the Vendor ID */
5360 case PCI_VENDOR_ID_BROADCOM
:
5363 DHD_ERROR(("%s: unknown vendor: 0x%04x\n", __func__
, venid
));
5367 /* Check the Device ID and make sure it's one that we support */
5369 case BCM4325_D11DUAL_ID
: /* 4325 802.11a/g id */
5370 case BCM4325_D11G_ID
: /* 4325 802.11g 2.4Ghz band id */
5371 case BCM4325_D11A_ID
: /* 4325 802.11a 5Ghz band id */
5372 DHD_INFO(("%s: found 4325 Dongle\n", __func__
));
5374 case BCM4329_D11NDUAL_ID
: /* 4329 802.11n dualband device */
5375 case BCM4329_D11N2G_ID
: /* 4329 802.11n 2.4G device */
5376 case BCM4329_D11N5G_ID
: /* 4329 802.11n 5G device */
5378 DHD_INFO(("%s: found 4329 Dongle\n", __func__
));
5380 case BCM4319_D11N_ID
: /* 4319 802.11n id */
5381 case BCM4319_D11N2G_ID
: /* 4319 802.11n2g id */
5382 case BCM4319_D11N5G_ID
: /* 4319 802.11n5g id */
5383 DHD_INFO(("%s: found 4319 Dongle\n", __func__
));
5386 DHD_INFO(("%s: allow device id 0, will check chip internals\n",
5391 DHD_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n",
5392 __func__
, venid
, devid
));
5396 /* Allocate private bus interface state */
5397 bus
= kzalloc(sizeof(struct brcmf_bus
), GFP_ATOMIC
);
5399 DHD_ERROR(("%s: kmalloc of struct dhd_bus failed\n", __func__
));
5403 bus
->cl_devid
= (u16
) devid
;
5404 bus
->bus
= BRCMF_BUS
;
5405 bus
->tx_seq
= SDPCM_SEQUENCE_WRAP
- 1;
5406 bus
->usebufpool
= false; /* Use bufpool if allocated,
5407 else use locally malloced rxbuf */
5409 /* attempt to attach to the dongle */
5410 if (!(brcmf_sdbrcm_probe_attach(bus
, card
, regsva
, devid
))) {
5411 DHD_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n", __func__
));
5415 spin_lock_init(&bus
->txqlock
);
5416 init_waitqueue_head(&bus
->ctrl_wait
);
5418 /* Set up the watchdog timer */
5419 init_timer(&bus
->timer
);
5420 bus
->timer
.data
= (unsigned long)bus
;
5421 bus
->timer
.function
= brcmf_sdbrcm_watchdog
;
5423 /* Initialize thread based operation and lock */
5424 if ((brcmf_watchdog_prio
>= 0) && (brcmf_dpc_prio
>= 0)) {
5425 bus
->threads_only
= true;
5426 sema_init(&bus
->sdsem
, 1);
5428 bus
->threads_only
= false;
5429 spin_lock_init(&bus
->sdlock
);
5432 if (brcmf_dpc_prio
>= 0) {
5433 /* Initialize watchdog thread */
5434 init_completion(&bus
->watchdog_wait
);
5435 bus
->watchdog_tsk
= kthread_run(brcmf_sdbrcm_watchdog_thread
,
5436 bus
, "brcmf_watchdog");
5437 if (IS_ERR(bus
->watchdog_tsk
)) {
5439 "brcmf_watchdog thread failed to start\n");
5440 bus
->watchdog_tsk
= NULL
;
5443 bus
->watchdog_tsk
= NULL
;
5445 /* Set up the bottom half handler */
5446 if (brcmf_dpc_prio
>= 0) {
5447 /* Initialize DPC thread */
5448 init_completion(&bus
->dpc_wait
);
5449 bus
->dpc_tsk
= kthread_run(brcmf_sdbrcm_dpc_thread
,
5451 if (IS_ERR(bus
->dpc_tsk
)) {
5453 "brcmf_dpc thread failed to start\n");
5454 bus
->dpc_tsk
= NULL
;
5457 tasklet_init(&bus
->tasklet
, brcmf_sdbrcm_dpc_tasklet
,
5458 (unsigned long)bus
);
5459 bus
->dpc_tsk
= NULL
;
5462 /* Attach to the brcmf/OS/network interface */
5463 bus
->drvr
= brcmf_attach(bus
, SDPCM_RESERVE
);
5465 DHD_ERROR(("%s: brcmf_attach failed\n", __func__
));
5469 /* Allocate buffers */
5470 if (!(brcmf_sdbrcm_probe_malloc(bus
, card
))) {
5471 DHD_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n", __func__
));
5475 if (!(brcmf_sdbrcm_probe_init(bus
, card
))) {
5476 DHD_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__
));
5480 /* Register interrupt callback, but mask it (not operational yet). */
5481 DHD_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
5483 brcmf_sdcard_intr_disable(card
);
5484 ret
= brcmf_sdcard_intr_reg(card
, brcmf_sdbrcm_isr
, bus
);
5486 DHD_ERROR(("%s: FAILED: sdcard_intr_reg returned %d\n",
5490 DHD_INTR(("%s: registered SDIO interrupt function ok\n", __func__
));
5492 DHD_INFO(("%s: completed!!\n", __func__
));
5494 /* if firmware path present try to download and bring up bus */
5495 ret
= brcmf_bus_start(bus
->drvr
);
5497 if (ret
== -ENOLINK
) {
5498 DHD_ERROR(("%s: dongle is not responding\n", __func__
));
5502 /* Ok, have the per-port tell the stack we're open for business */
5503 if (brcmf_net_attach(bus
->drvr
, 0) != 0) {
5504 DHD_ERROR(("%s: Net attach failed!!\n", __func__
));
5511 brcmf_sdbrcm_release(bus
);
5516 brcmf_sdbrcm_probe_attach(struct brcmf_bus
*bus
, void *card
, u32 regsva
,
5522 bus
->alp_only
= true;
5524 /* Return the window to backplane enumeration space for core access */
5525 if (brcmf_sdbrcm_set_siaddr_window(bus
, SI_ENUM_BASE
))
5526 DHD_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", __func__
));
5529 printk(KERN_DEBUG
"F1 signature read @0x18000000=0x%4x\n",
5530 brcmf_sdcard_reg_read(bus
->card
, SI_ENUM_BASE
, 4));
5535 * Force PLL off until brcmf_sdbrcm_chip_attach()
5536 * programs PLL control regs
5539 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
, SBSDIO_FUNC1_CHIPCLKCSR
,
5540 BRCMF_INIT_CLKCTL1
, &err
);
5543 brcmf_sdcard_cfg_read(card
, SDIO_FUNC_1
,
5544 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
5546 if (err
|| ((clkctl
& ~SBSDIO_AVBITS
) != BRCMF_INIT_CLKCTL1
)) {
5547 DHD_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d wrote"
5548 " 0x%02x read 0x%02x\n",
5549 err
, BRCMF_INIT_CLKCTL1
, clkctl
));
5553 if (brcmf_sdbrcm_chip_attach(bus
, regsva
)) {
5554 DHD_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n", __func__
));
5558 if (!brcmf_sdbrcm_chipmatch((u16
) bus
->ci
->chip
)) {
5559 DHD_ERROR(("%s: unsupported chip: 0x%04x\n",
5560 __func__
, bus
->ci
->chip
));
5564 brcmf_sdbrcm_sdiod_drive_strength_init(bus
, brcmf_sdiod_drive_strength
);
5566 /* Get info on the ARM and SOCRAM cores... */
5567 if (!BRCMF_NOPMU(bus
)) {
5568 brcmf_sdcard_reg_read(bus
->card
,
5569 CORE_SB(bus
->ci
->armcorebase
, sbidhigh
), 4);
5570 bus
->orig_ramsize
= bus
->ci
->ramsize
;
5571 if (!(bus
->orig_ramsize
)) {
5572 DHD_ERROR(("%s: failed to find SOCRAM memory!\n",
5576 bus
->ramsize
= bus
->orig_ramsize
;
5577 if (brcmf_dongle_memsize
)
5578 brcmf_sdbrcm_setmemsize(bus
, brcmf_dongle_memsize
);
5580 DHD_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
5581 bus
->ramsize
, bus
->orig_ramsize
));
5584 /* Set core control so an SDIO reset does a backplane reset */
5585 OR_REG(bus
->ci
->buscorebase
+ offsetof(struct sdpcmd_regs
,
5589 brcmu_pktq_init(&bus
->txq
, (PRIOMASK
+ 1), TXQLEN
);
5591 /* Locate an appropriately-aligned portion of hdrbuf */
5592 bus
->rxhdr
= (u8
*) roundup((unsigned long)&bus
->hdrbuf
[0],
5595 /* Set the poll and/or interrupt flags */
5596 bus
->intr
= (bool) brcmf_intr
;
5597 bus
->poll
= (bool) brcmf_poll
;
5607 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus
*bus
, void *card
)
5609 DHD_TRACE(("%s: Enter\n", __func__
));
5611 if (bus
->drvr
->maxctl
) {
5613 roundup((bus
->drvr
->maxctl
+ SDPCM_HDRLEN
),
5614 ALIGNMENT
) + BRCMF_SDALIGN
;
5615 bus
->rxbuf
= kmalloc(bus
->rxblen
, GFP_ATOMIC
);
5616 if (!(bus
->rxbuf
)) {
5617 DHD_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
5618 __func__
, bus
->rxblen
));
5623 /* Allocate buffer to receive glomed packet */
5624 bus
->databuf
= kmalloc(MAX_DATA_BUF
, GFP_ATOMIC
);
5625 if (!(bus
->databuf
)) {
5626 DHD_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
5627 __func__
, MAX_DATA_BUF
));
5628 /* release rxbuf which was already located as above */
5634 /* Align the buffer */
5635 if ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
)
5636 bus
->dataptr
= bus
->databuf
+ (BRCMF_SDALIGN
-
5637 ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
));
5639 bus
->dataptr
= bus
->databuf
;
5647 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus
*bus
, void *card
)
5651 DHD_TRACE(("%s: Enter\n", __func__
));
5654 brcmf_sdbrcm_pktgen_init(bus
);
5657 /* Disable F2 to clear any intermediate frame state on the dongle */
5658 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_0
, SDIO_CCCR_IOEx
,
5659 SDIO_FUNC_ENABLE_1
, NULL
);
5661 bus
->drvr
->busstate
= BRCMF_BUS_DOWN
;
5662 bus
->sleeping
= false;
5663 bus
->rxflow
= false;
5665 /* Done with backplane-dependent accesses, can drop clock... */
5666 brcmf_sdcard_cfg_write(card
, SDIO_FUNC_1
, SBSDIO_FUNC1_CHIPCLKCSR
, 0,
5669 /* ...and initialize clock/power states */
5670 bus
->clkstate
= CLK_SDONLY
;
5671 bus
->idletime
= (s32
) brcmf_idletime
;
5672 bus
->idleclock
= BRCMF_IDLE_ACTIVE
;
5674 /* Query the F2 block size, set roundup accordingly */
5676 if (brcmf_sdcard_iovar_op(card
, "sd_blocksize", &fnum
, sizeof(s32
),
5677 &bus
->blocksize
, sizeof(s32
), false) != 0) {
5679 DHD_ERROR(("%s: fail on %s get\n", __func__
, "sd_blocksize"));
5681 DHD_INFO(("%s: Initial value for %s is %d\n",
5682 __func__
, "sd_blocksize", bus
->blocksize
));
5684 bus
->roundup
= min(max_roundup
, bus
->blocksize
);
5686 /* Query if bus module supports packet chaining,
5687 default to use if supported */
5688 if (brcmf_sdcard_iovar_op(card
, "sd_rxchain", NULL
, 0,
5689 &bus
->sd_rxchain
, sizeof(s32
),
5691 bus
->sd_rxchain
= false;
5693 DHD_INFO(("%s: bus module (through sdiocard API) %s chaining\n",
5695 (bus
->sd_rxchain
? "supports" : "does not support")));
5697 bus
->use_rxchain
= (bool) bus
->sd_rxchain
;
5703 brcmf_sdbrcm_download_firmware(struct brcmf_bus
*bus
, void *card
)
5707 /* Download the firmware */
5708 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
5710 ret
= _brcmf_sdbrcm_download_firmware(bus
) == 0;
5712 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
5717 /* Detach and free everything */
5718 static void brcmf_sdbrcm_release(struct brcmf_bus
*bus
)
5720 DHD_TRACE(("%s: Enter\n", __func__
));
5723 /* De-register interrupt handler */
5724 brcmf_sdcard_intr_disable(bus
->card
);
5725 brcmf_sdcard_intr_dereg(bus
->card
);
5728 brcmf_detach(bus
->drvr
);
5729 brcmf_sdbrcm_release_dongle(bus
);
5733 brcmf_sdbrcm_release_malloc(bus
);
5738 DHD_TRACE(("%s: Disconnected\n", __func__
));
5741 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus
*bus
)
5743 DHD_TRACE(("%s: Enter\n", __func__
));
5745 if (bus
->drvr
&& bus
->drvr
->dongle_reset
)
5749 bus
->rxctl
= bus
->rxbuf
= NULL
;
5752 kfree(bus
->databuf
);
5753 bus
->databuf
= NULL
;
5756 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus
*bus
)
5758 DHD_TRACE(("%s: Enter\n", __func__
));
5760 if (bus
->drvr
&& bus
->drvr
->dongle_reset
)
5764 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
5765 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
5766 brcmf_sdbrcm_chip_detach(bus
);
5767 if (bus
->vars
&& bus
->varsz
)
5772 DHD_TRACE(("%s: Disconnected\n", __func__
));
5775 static void brcmf_sdbrcm_disconnect(void *ptr
)
5777 struct brcmf_bus
*bus
= (struct brcmf_bus
*)ptr
;
5779 DHD_TRACE(("%s: Enter\n", __func__
));
5783 brcmf_sdbrcm_release(bus
);
5786 DHD_TRACE(("%s: Disconnected\n", __func__
));
5789 /* Register/Unregister functions are called by the main DHD entry
5790 * point (e.g. module insertion) to link with the bus driver, in
5791 * order to look for or await the device.
5794 static struct brcmf_sdioh_driver brcmf_sdio
= {
5796 brcmf_sdbrcm_disconnect
5799 int brcmf_bus_register(void)
5801 DHD_TRACE(("%s: Enter\n", __func__
));
5803 /* Sanity check on the module parameters */
5805 /* Both watchdog and DPC as tasklets are ok */
5806 if ((brcmf_watchdog_prio
< 0) && (brcmf_dpc_prio
< 0))
5809 /* If both watchdog and DPC are threads, TX must be deferred */
5810 if ((brcmf_watchdog_prio
>= 0) && (brcmf_dpc_prio
>= 0)
5811 && brcmf_deferred_tx
)
5814 DHD_ERROR(("Invalid module parameters.\n"));
5818 return brcmf_sdio_register(&brcmf_sdio
);
5821 void brcmf_bus_unregister(void)
5823 DHD_TRACE(("%s: Enter\n", __func__
));
5825 brcmf_sdio_unregister();
5828 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus
*bus
)
5832 u8
*memblock
= NULL
, *memptr
;
5835 DHD_INFO(("%s: Enter\n", __func__
));
5837 bus
->fw_name
= BCM4329_FW_NAME
;
5838 ret
= request_firmware(&bus
->firmware
, bus
->fw_name
,
5839 &gInstance
->func
[2]->dev
);
5841 DHD_ERROR(("%s: Fail to request firmware %d\n", __func__
, ret
));
5846 memptr
= memblock
= kmalloc(MEMBLOCK
+ BRCMF_SDALIGN
, GFP_ATOMIC
);
5847 if (memblock
== NULL
) {
5848 DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
5849 __func__
, MEMBLOCK
));
5853 if ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
)
5854 memptr
+= (BRCMF_SDALIGN
-
5855 ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
));
5857 /* Download image */
5859 brcmf_sdbrcm_get_image((char *)memptr
, MEMBLOCK
, bus
))) {
5860 ret
= brcmf_sdbrcm_membytes(bus
, true, offset
, memptr
, len
);
5862 DHD_ERROR(("%s: error %d on writing %d membytes at "
5863 "0x%08x\n", __func__
, ret
, MEMBLOCK
, offset
));
5873 release_firmware(bus
->firmware
);
5880 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
5881 * and ending in a NUL.
5882 * Removes carriage returns, empty lines, comment lines, and converts
5884 * Shortens buffer as needed and pads with NULs. End of buffer is marked
5888 static uint
brcmf_process_nvram_vars(char *varbuf
, uint len
)
5897 findNewline
= false;
5900 for (n
= 0; n
< len
; n
++) {
5903 if (varbuf
[n
] == '\r')
5905 if (findNewline
&& varbuf
[n
] != '\n')
5907 findNewline
= false;
5908 if (varbuf
[n
] == '#') {
5912 if (varbuf
[n
] == '\n') {
5922 buf_len
= dp
- varbuf
;
5924 while (dp
< varbuf
+ n
)
5930 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus
*bus
)
5933 char *memblock
= NULL
;
5937 bus
->nv_name
= BCM4329_NV_NAME
;
5938 ret
= request_firmware(&bus
->firmware
, bus
->nv_name
,
5939 &gInstance
->func
[2]->dev
);
5941 DHD_ERROR(("%s: Fail to request nvram %d\n", __func__
, ret
));
5946 memblock
= kmalloc(MEMBLOCK
, GFP_ATOMIC
);
5947 if (memblock
== NULL
) {
5948 DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
5949 __func__
, MEMBLOCK
));
5954 len
= brcmf_sdbrcm_get_image(memblock
, MEMBLOCK
, bus
);
5956 if (len
> 0 && len
< MEMBLOCK
) {
5957 bufp
= (char *)memblock
;
5959 len
= brcmf_process_nvram_vars(bufp
, len
);
5963 ret
= brcmf_sdbrcm_downloadvars(bus
, memblock
, len
+ 1);
5965 DHD_ERROR(("%s: error downloading vars: %d\n",
5968 DHD_ERROR(("%s: error reading nvram file: %d\n",
5976 release_firmware(bus
->firmware
);
5982 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus
*bus
)
5986 /* Keep arm in reset */
5987 if (brcmf_sdbrcm_download_state(bus
, true)) {
5988 DHD_ERROR(("%s: error placing ARM core in reset\n", __func__
));
5992 /* External image takes precedence if specified */
5993 if (brcmf_sdbrcm_download_code_file(bus
)) {
5994 DHD_ERROR(("%s: dongle image file download failed\n",
5999 /* External nvram takes precedence if specified */
6000 if (brcmf_sdbrcm_download_nvram(bus
)) {
6001 DHD_ERROR(("%s: dongle nvram file download failed\n",
6005 /* Take arm out of reset */
6006 if (brcmf_sdbrcm_download_state(bus
, false)) {
6007 DHD_ERROR(("%s: error getting out of ARM core reset\n",
6020 brcmf_sdbrcm_send_buf(struct brcmf_bus
*bus
, u32 addr
, uint fn
, uint flags
,
6021 u8
*buf
, uint nbytes
, struct sk_buff
*pkt
,
6022 void (*complete
)(void *handle
, int status
,
6026 return brcmf_sdcard_send_buf
6027 (bus
->card
, addr
, fn
, flags
, buf
, nbytes
, pkt
, complete
,
6031 int brcmf_bus_devreset(struct brcmf_pub
*drvr
, u8 flag
)
6034 struct brcmf_bus
*bus
;
6039 brcmf_sdbrcm_wd_timer(bus
, 0);
6040 if (!bus
->drvr
->dongle_reset
) {
6041 /* Expect app to have torn down any
6042 connection before calling */
6043 /* Stop the bus, disable F2 */
6044 brcmf_sdbrcm_bus_stop(bus
, false);
6046 /* Clean tx/rx buffer pointers,
6047 detach from the dongle */
6048 brcmf_sdbrcm_release_dongle(bus
);
6050 bus
->drvr
->dongle_reset
= true;
6051 bus
->drvr
->up
= false;
6053 DHD_TRACE(("%s: WLAN OFF DONE\n", __func__
));
6054 /* App can now remove power from device */
6058 /* App must have restored power to device before calling */
6060 DHD_TRACE(("\n\n%s: == WLAN ON ==\n", __func__
));
6062 if (bus
->drvr
->dongle_reset
) {
6065 /* Attempt to re-attach & download */
6066 if (brcmf_sdbrcm_probe_attach(bus
, bus
->card
,
6069 /* Attempt to download binary to the dongle */
6070 if (brcmf_sdbrcm_probe_init(bus
, bus
->card
)) {
6071 /* Re-init bus, enable F2 transfer */
6072 brcmf_sdbrcm_bus_init(bus
->drvr
, false);
6074 bus
->drvr
->dongle_reset
= false;
6075 bus
->drvr
->up
= true;
6077 DHD_TRACE(("%s: WLAN ON DONE\n",
6084 bcmerror
= -EISCONN
;
6085 DHD_ERROR(("%s: Set DEVRESET=false invoked when device "
6086 "is on\n", __func__
));
6089 brcmf_sdbrcm_wd_timer(bus
, brcmf_watchdog_ms
);
6095 brcmf_sdbrcm_chip_recognition(struct brcmf_sdio_card
*card
,
6096 struct chip_info
*ci
, u32 regs
)
6102 * Chipid is assume to be at offset 0 from regs arg
6103 * For different chiptypes or old sdio hosts w/o chipcommon,
6104 * other ways of recognition should be added here.
6106 ci
->cccorebase
= regs
;
6107 regdata
= brcmf_sdcard_reg_read(card
,
6108 CORE_CC_REG(ci
->cccorebase
, chipid
), 4);
6109 ci
->chip
= regdata
& CID_ID_MASK
;
6110 ci
->chiprev
= (regdata
& CID_REV_MASK
) >> CID_REV_SHIFT
;
6112 DHD_INFO(("%s: chipid=0x%x chiprev=%d\n",
6113 __func__
, ci
->chip
, ci
->chiprev
));
6115 /* Address of cores for new chips should be added here */
6117 case BCM4329_CHIP_ID
:
6118 ci
->buscorebase
= BCM4329_CORE_BUS_BASE
;
6119 ci
->ramcorebase
= BCM4329_CORE_SOCRAM_BASE
;
6120 ci
->armcorebase
= BCM4329_CORE_ARM_BASE
;
6121 ci
->ramsize
= BCM4329_RAMSIZE
;
6124 DHD_ERROR(("%s: chipid 0x%x is not supported\n",
6125 __func__
, ci
->chip
));
6129 regdata
= brcmf_sdcard_reg_read(card
,
6130 CORE_SB(ci
->cccorebase
, sbidhigh
), 4);
6131 ci
->ccrev
= SBCOREREV(regdata
);
6133 regdata
= brcmf_sdcard_reg_read(card
,
6134 CORE_CC_REG(ci
->cccorebase
, pmucapabilities
), 4);
6135 ci
->pmurev
= regdata
& PCAP_REV_MASK
;
6137 regdata
= brcmf_sdcard_reg_read(card
,
6138 CORE_SB(ci
->buscorebase
, sbidhigh
), 4);
6139 ci
->buscorerev
= SBCOREREV(regdata
);
6140 ci
->buscoretype
= (regdata
& SBIDH_CC_MASK
) >> SBIDH_CC_SHIFT
;
6142 DHD_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
6143 __func__
, ci
->ccrev
, ci
->pmurev
,
6144 ci
->buscorerev
, ci
->buscoretype
));
6146 /* get chipcommon capabilites */
6147 ci
->cccaps
= brcmf_sdcard_reg_read(card
,
6148 CORE_CC_REG(ci
->cccorebase
, capabilities
), 4);
6154 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card
*card
, u32 corebase
)
6158 regdata
= brcmf_sdcard_reg_read(card
,
6159 CORE_SB(corebase
, sbtmstatelow
), 4);
6160 if (regdata
& SBTML_RESET
)
6163 regdata
= brcmf_sdcard_reg_read(card
,
6164 CORE_SB(corebase
, sbtmstatelow
), 4);
6165 if ((regdata
& (SICF_CLOCK_EN
<< SBTML_SICF_SHIFT
)) != 0) {
6167 * set target reject and spin until busy is clear
6168 * (preserve core-specific bits)
6170 regdata
= brcmf_sdcard_reg_read(card
,
6171 CORE_SB(corebase
, sbtmstatelow
), 4);
6172 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatelow
), 4,
6173 regdata
| SBTML_REJ
);
6175 regdata
= brcmf_sdcard_reg_read(card
,
6176 CORE_SB(corebase
, sbtmstatelow
), 4);
6178 SPINWAIT((brcmf_sdcard_reg_read(card
,
6179 CORE_SB(corebase
, sbtmstatehigh
), 4) &
6180 SBTMH_BUSY
), 100000);
6182 regdata
= brcmf_sdcard_reg_read(card
,
6183 CORE_SB(corebase
, sbtmstatehigh
), 4);
6184 if (regdata
& SBTMH_BUSY
)
6185 DHD_ERROR(("%s: ARM core still busy\n", __func__
));
6187 regdata
= brcmf_sdcard_reg_read(card
,
6188 CORE_SB(corebase
, sbidlow
), 4);
6189 if (regdata
& SBIDL_INIT
) {
6190 regdata
= brcmf_sdcard_reg_read(card
,
6191 CORE_SB(corebase
, sbimstate
), 4) |
6193 brcmf_sdcard_reg_write(card
,
6194 CORE_SB(corebase
, sbimstate
), 4,
6196 regdata
= brcmf_sdcard_reg_read(card
,
6197 CORE_SB(corebase
, sbimstate
), 4);
6199 SPINWAIT((brcmf_sdcard_reg_read(card
,
6200 CORE_SB(corebase
, sbimstate
), 4) &
6204 /* set reset and reject while enabling the clocks */
6205 brcmf_sdcard_reg_write(card
,
6206 CORE_SB(corebase
, sbtmstatelow
), 4,
6207 (((SICF_FGC
| SICF_CLOCK_EN
) << SBTML_SICF_SHIFT
) |
6208 SBTML_REJ
| SBTML_RESET
));
6209 regdata
= brcmf_sdcard_reg_read(card
,
6210 CORE_SB(corebase
, sbtmstatelow
), 4);
6213 /* clear the initiator reject bit */
6214 regdata
= brcmf_sdcard_reg_read(card
,
6215 CORE_SB(corebase
, sbidlow
), 4);
6216 if (regdata
& SBIDL_INIT
) {
6217 regdata
= brcmf_sdcard_reg_read(card
,
6218 CORE_SB(corebase
, sbimstate
), 4) &
6220 brcmf_sdcard_reg_write(card
,
6221 CORE_SB(corebase
, sbimstate
), 4,
6226 /* leave reset and reject asserted */
6227 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatelow
), 4,
6228 (SBTML_REJ
| SBTML_RESET
));
6233 brcmf_sdbrcm_chip_attach(struct brcmf_bus
*bus
, u32 regs
)
6235 struct chip_info
*ci
;
6239 DHD_TRACE(("%s: Enter\n", __func__
));
6241 /* alloc chip_info_t */
6242 ci
= kmalloc(sizeof(struct chip_info
), GFP_ATOMIC
);
6244 DHD_ERROR(("%s: malloc failed!\n", __func__
));
6248 memset((unsigned char *)ci
, 0, sizeof(struct chip_info
));
6250 /* bus/core/clk setup for register access */
6251 /* Try forcing SDIO core to do ALPAvail request only */
6252 clkset
= SBSDIO_FORCE_HW_CLKREQ_OFF
| SBSDIO_ALP_AVAIL_REQ
;
6253 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_FUNC1_CHIPCLKCSR
,
6256 DHD_ERROR(("%s: error writing for HT off\n", __func__
));
6260 /* If register supported, wait for ALPAvail and then force ALP */
6261 /* This may take up to 15 milliseconds */
6262 clkval
= brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_1
,
6263 SBSDIO_FUNC1_CHIPCLKCSR
, NULL
);
6264 if ((clkval
& ~SBSDIO_AVBITS
) == clkset
) {
6266 brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_1
,
6267 SBSDIO_FUNC1_CHIPCLKCSR
,
6269 !SBSDIO_ALPAV(clkval
)),
6270 PMU_MAX_TRANSITION_DLY
);
6271 if (!SBSDIO_ALPAV(clkval
)) {
6272 DHD_ERROR(("%s: timeout on ALPAV wait, clkval 0x%02x\n",
6277 clkset
= SBSDIO_FORCE_HW_CLKREQ_OFF
|
6279 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
,
6280 SBSDIO_FUNC1_CHIPCLKCSR
,
6284 DHD_ERROR(("%s: ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
6285 __func__
, clkset
, clkval
));
6290 /* Also, disable the extra SDIO pull-ups */
6291 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_FUNC1_SDIOPULLUP
,
6294 err
= brcmf_sdbrcm_chip_recognition(bus
->card
, ci
, regs
);
6299 * Make sure any on-chip ARM is off (in case strapping is wrong),
6300 * or downloaded code was already running.
6302 brcmf_sdbrcm_chip_disablecore(bus
->card
, ci
->armcorebase
);
6304 brcmf_sdcard_reg_write(bus
->card
,
6305 CORE_CC_REG(ci
->cccorebase
, gpiopullup
), 4, 0);
6306 brcmf_sdcard_reg_write(bus
->card
,
6307 CORE_CC_REG(ci
->cccorebase
, gpiopulldown
), 4, 0);
6309 /* Disable F2 to clear any intermediate frame state on the dongle */
6310 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_0
, SDIO_CCCR_IOEx
,
6311 SDIO_FUNC_ENABLE_1
, NULL
);
6313 /* WAR: cmd52 backplane read so core HW will drop ALPReq */
6314 clkval
= brcmf_sdcard_cfg_read(bus
->card
, SDIO_FUNC_1
,
6317 /* Done with backplane-dependent accesses, can drop clock... */
6318 brcmf_sdcard_cfg_write(bus
->card
, SDIO_FUNC_1
, SBSDIO_FUNC1_CHIPCLKCSR
,
6330 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card
*card
, u32 corebase
)
6335 * Must do the disable sequence first to work for
6336 * arbitrary current core state.
6338 brcmf_sdbrcm_chip_disablecore(card
, corebase
);
6341 * Now do the initialization sequence.
6342 * set reset while enabling the clock and
6343 * forcing them on throughout the core
6345 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatelow
), 4,
6346 ((SICF_FGC
| SICF_CLOCK_EN
) << SBTML_SICF_SHIFT
) |
6350 regdata
= brcmf_sdcard_reg_read(card
, CORE_SB(corebase
, sbtmstatehigh
),
6352 if (regdata
& SBTMH_SERR
)
6353 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatehigh
),
6356 regdata
= brcmf_sdcard_reg_read(card
, CORE_SB(corebase
, sbimstate
), 4);
6357 if (regdata
& (SBIM_IBE
| SBIM_TO
))
6358 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbimstate
), 4,
6359 regdata
& ~(SBIM_IBE
| SBIM_TO
));
6361 /* clear reset and allow it to propagate throughout the core */
6362 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatelow
), 4,
6363 (SICF_FGC
<< SBTML_SICF_SHIFT
) |
6364 (SICF_CLOCK_EN
<< SBTML_SICF_SHIFT
));
6367 /* leave clock enabled */
6368 brcmf_sdcard_reg_write(card
, CORE_SB(corebase
, sbtmstatelow
), 4,
6369 (SICF_CLOCK_EN
<< SBTML_SICF_SHIFT
));
6373 /* SDIO Pad drive strength to select value mappings */
6374 struct sdiod_drive_str
{
6375 u8 strength
; /* Pad Drive Strength in mA */
6376 u8 sel
; /* Chip-specific select value */
6379 /* SDIO Drive Strength to sel value table for PMU Rev 1 */
6380 static const struct sdiod_drive_str sdiod_drive_strength_tab1
[] = {
6388 /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
6389 static const struct sdiod_drive_str sdiod_drive_strength_tab2
[] = {
6400 /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
6401 static const struct sdiod_drive_str sdiod_drive_strength_tab3
[] = {
6413 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
6416 brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus
*bus
, u32 drivestrength
) {
6417 struct sdiod_drive_str
*str_tab
= NULL
;
6422 if (!(bus
->ci
->cccaps
& CC_CAP_PMU
))
6425 switch (SDIOD_DRVSTR_KEY(bus
->ci
->chip
, bus
->ci
->pmurev
)) {
6426 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID
, 1):
6427 str_tab
= (struct sdiod_drive_str
*)&sdiod_drive_strength_tab1
;
6428 str_mask
= 0x30000000;
6431 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID
, 2):
6432 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID
, 3):
6433 str_tab
= (struct sdiod_drive_str
*)&sdiod_drive_strength_tab2
;
6434 str_mask
= 0x00003800;
6437 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID
, 8):
6438 str_tab
= (struct sdiod_drive_str
*)&sdiod_drive_strength_tab3
;
6439 str_mask
= 0x00003800;
6443 DHD_ERROR(("No SDIO Drive strength init"
6444 "done for chip %s rev %d pmurev %d\n",
6445 brcmu_chipname(bus
->ci
->chip
, chn
, 8),
6446 bus
->ci
->chiprev
, bus
->ci
->pmurev
));
6450 if (str_tab
!= NULL
) {
6451 u32 drivestrength_sel
= 0;
6455 for (i
= 0; str_tab
[i
].strength
!= 0; i
++) {
6456 if (drivestrength
>= str_tab
[i
].strength
) {
6457 drivestrength_sel
= str_tab
[i
].sel
;
6462 brcmf_sdcard_reg_write(bus
->card
,
6463 CORE_CC_REG(bus
->ci
->cccorebase
, chipcontrol_addr
),
6465 cc_data_temp
= brcmf_sdcard_reg_read(bus
->card
,
6466 CORE_CC_REG(bus
->ci
->cccorebase
, chipcontrol_addr
), 4);
6467 cc_data_temp
&= ~str_mask
;
6468 drivestrength_sel
<<= str_shift
;
6469 cc_data_temp
|= drivestrength_sel
;
6470 brcmf_sdcard_reg_write(bus
->card
,
6471 CORE_CC_REG(bus
->ci
->cccorebase
, chipcontrol_addr
),
6474 DHD_INFO(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
6475 drivestrength
, cc_data_temp
));
6480 brcmf_sdbrcm_chip_detach(struct brcmf_bus
*bus
)
6482 DHD_TRACE(("%s: Enter\n", __func__
));
6489 brcmf_sdbrcm_wait_for_event(struct brcmf_bus
*bus
, bool *lockvar
)
6491 brcmf_sdbrcm_sdunlock(bus
);
6492 wait_event_interruptible_timeout(bus
->ctrl_wait
,
6493 (*lockvar
== false), HZ
* 2);
6494 brcmf_sdbrcm_sdlock(bus
);
6499 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus
*bus
)
6501 if (waitqueue_active(&bus
->ctrl_wait
))
6502 wake_up_interruptible(&bus
->ctrl_wait
);
6507 brcmf_sdbrcm_watchdog_thread(void *data
)
6509 struct brcmf_bus
*bus
= (struct brcmf_bus
*)data
;
6511 /* This thread doesn't need any user-level access,
6512 * so get rid of all our resources
6514 if (brcmf_watchdog_prio
> 0) {
6515 struct sched_param param
;
6516 param
.sched_priority
= (brcmf_watchdog_prio
< MAX_RT_PRIO
) ?
6517 brcmf_watchdog_prio
: (MAX_RT_PRIO
- 1);
6518 sched_setscheduler(current
, SCHED_FIFO
, ¶m
);
6521 allow_signal(SIGTERM
);
6522 /* Run until signal received */
6524 if (kthread_should_stop())
6526 if (!wait_for_completion_interruptible(&bus
->watchdog_wait
)) {
6527 if (bus
->drvr
->dongle_reset
== false)
6528 brcmf_sdbrcm_bus_watchdog(bus
->drvr
);
6529 /* Count the tick for reference */
6530 bus
->drvr
->tickcnt
++;
6538 brcmf_sdbrcm_watchdog(unsigned long data
)
6540 struct brcmf_bus
*bus
= (struct brcmf_bus
*)data
;
6542 if (brcmf_watchdog_prio
>= 0) {
6543 if (bus
->watchdog_tsk
)
6544 complete(&bus
->watchdog_wait
);
6548 brcmf_sdbrcm_bus_watchdog(bus
->drvr
);
6550 /* Count the tick for reference */
6551 bus
->drvr
->tickcnt
++;
6554 /* Reschedule the watchdog */
6555 if (bus
->wd_timer_valid
)
6556 mod_timer(&bus
->timer
, jiffies
+ brcmf_watchdog_ms
* HZ
/ 1000);
6560 brcmf_sdbrcm_wd_timer(struct brcmf_bus
*bus
, uint wdtick
)
6562 static uint save_ms
;
6564 /* don't start the wd until fw is loaded */
6565 if (bus
->drvr
->busstate
== BRCMF_BUS_DOWN
)
6568 /* Totally stop the timer */
6569 if (!wdtick
&& bus
->wd_timer_valid
== true) {
6570 del_timer_sync(&bus
->timer
);
6571 bus
->wd_timer_valid
= false;
6577 brcmf_watchdog_ms
= (uint
) wdtick
;
6579 if (save_ms
!= brcmf_watchdog_ms
) {
6580 if (bus
->wd_timer_valid
== true)
6581 /* Stop timer and restart at new value */
6582 del_timer_sync(&bus
->timer
);
6584 /* Create timer again when watchdog period is
6585 dynamically changed or in the first instance
6587 bus
->timer
.expires
=
6588 jiffies
+ brcmf_watchdog_ms
* HZ
/ 1000;
6589 add_timer(&bus
->timer
);
6592 /* Re arm the timer, at last watchdog period */
6593 mod_timer(&bus
->timer
,
6594 jiffies
+ brcmf_watchdog_ms
* HZ
/ 1000);
6597 bus
->wd_timer_valid
= true;
6602 static int brcmf_sdbrcm_dpc_thread(void *data
)
6604 struct brcmf_bus
*bus
= (struct brcmf_bus
*) data
;
6606 /* This thread doesn't need any user-level access,
6607 * so get rid of all our resources
6609 if (brcmf_dpc_prio
> 0) {
6610 struct sched_param param
;
6611 param
.sched_priority
= (brcmf_dpc_prio
< MAX_RT_PRIO
) ?
6612 brcmf_dpc_prio
: (MAX_RT_PRIO
- 1);
6613 sched_setscheduler(current
, SCHED_FIFO
, ¶m
);
6616 allow_signal(SIGTERM
);
6617 /* Run until signal received */
6619 if (kthread_should_stop())
6621 if (!wait_for_completion_interruptible(&bus
->dpc_wait
)) {
6622 /* Call bus dpc unless it indicated down
6623 (then clean stop) */
6624 if (bus
->drvr
->busstate
!= BRCMF_BUS_DOWN
) {
6625 if (brcmf_sdbrcm_dpc(bus
))
6626 complete(&bus
->dpc_wait
);
6628 brcmf_sdbrcm_bus_stop(bus
, true);
6636 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data
)
6638 struct brcmf_bus
*bus
= (struct brcmf_bus
*) data
;
6640 /* Call bus dpc unless it indicated down (then clean stop) */
6641 if (bus
->drvr
->busstate
!= BRCMF_BUS_DOWN
) {
6642 if (brcmf_sdbrcm_dpc(bus
))
6643 tasklet_schedule(&bus
->tasklet
);
6645 brcmf_sdbrcm_bus_stop(bus
, true);
6648 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus
*bus
)
6651 complete(&bus
->dpc_wait
);
6655 tasklet_schedule(&bus
->tasklet
);
6658 static void brcmf_sdbrcm_sdlock(struct brcmf_bus
*bus
)
6660 if (bus
->threads_only
)
6663 spin_lock_bh(&bus
->sdlock
);
6666 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus
*bus
)
6668 if (bus
->threads_only
)
6671 spin_unlock_bh(&bus
->sdlock
);
6674 static int brcmf_sdbrcm_get_image(char *buf
, int len
, struct brcmf_bus
*bus
)
6676 if (bus
->firmware
->size
< bus
->fw_ptr
+ len
)
6677 len
= bus
->firmware
->size
- bus
->fw_ptr
;
6679 memcpy(buf
, &bus
->firmware
->data
[bus
->fw_ptr
], len
);
6684 MODULE_FIRMWARE(BCM4329_FW_NAME
);
6685 MODULE_FIRMWARE(BCM4329_NV_NAME
);