2 * orion_spi.c -- Marvell Orion SPI controller driver
4 * Author: Shadi Ammouri <shadi@marvell.com>
5 * Copyright (C) 2007-2008 Marvell Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/err.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/orion_spi.h>
20 #include <asm/unaligned.h>
22 #define DRIVER_NAME "orion_spi"
24 #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
25 #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
27 #define ORION_SPI_IF_CTRL_REG 0x00
28 #define ORION_SPI_IF_CONFIG_REG 0x04
29 #define ORION_SPI_DATA_OUT_REG 0x08
30 #define ORION_SPI_DATA_IN_REG 0x0c
31 #define ORION_SPI_INT_CAUSE_REG 0x10
33 #define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
34 #define ORION_SPI_CLK_PRESCALE_MASK 0x1F
37 struct work_struct work
;
39 /* Lock access to transfer list. */
42 struct list_head msg_queue
;
43 struct spi_master
*master
;
45 unsigned int max_speed
;
46 unsigned int min_speed
;
47 struct orion_spi_info
*spi_info
;
50 static struct workqueue_struct
*orion_spi_wq
;
52 static inline void __iomem
*spi_reg(struct orion_spi
*orion_spi
, u32 reg
)
54 return orion_spi
->base
+ reg
;
58 orion_spi_setbits(struct orion_spi
*orion_spi
, u32 reg
, u32 mask
)
60 void __iomem
*reg_addr
= spi_reg(orion_spi
, reg
);
63 val
= readl(reg_addr
);
65 writel(val
, reg_addr
);
69 orion_spi_clrbits(struct orion_spi
*orion_spi
, u32 reg
, u32 mask
)
71 void __iomem
*reg_addr
= spi_reg(orion_spi
, reg
);
74 val
= readl(reg_addr
);
76 writel(val
, reg_addr
);
79 static int orion_spi_set_transfer_size(struct orion_spi
*orion_spi
, int size
)
82 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
83 ORION_SPI_IF_8_16_BIT_MODE
);
84 } else if (size
== 8) {
85 orion_spi_clrbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
86 ORION_SPI_IF_8_16_BIT_MODE
);
88 pr_debug("Bad bits per word value %d (only 8 or 16 are "
96 static int orion_spi_baudrate_set(struct spi_device
*spi
, unsigned int speed
)
102 struct orion_spi
*orion_spi
;
104 orion_spi
= spi_master_get_devdata(spi
->master
);
106 tclk_hz
= orion_spi
->spi_info
->tclk
;
109 * the supported rates are: 4,6,8...30
110 * round up as we look for equal or less speed
112 rate
= DIV_ROUND_UP(tclk_hz
, speed
);
113 rate
= roundup(rate
, 2);
115 /* check if requested speed is too small */
122 /* Convert the rate to SPI clock divisor value. */
123 prescale
= 0x10 + rate
/2;
125 reg
= readl(spi_reg(orion_spi
, ORION_SPI_IF_CONFIG_REG
));
126 reg
= ((reg
& ~ORION_SPI_CLK_PRESCALE_MASK
) | prescale
);
127 writel(reg
, spi_reg(orion_spi
, ORION_SPI_IF_CONFIG_REG
));
133 * called only when no transfer is active on the bus
136 orion_spi_setup_transfer(struct spi_device
*spi
, struct spi_transfer
*t
)
138 struct orion_spi
*orion_spi
;
139 unsigned int speed
= spi
->max_speed_hz
;
140 unsigned int bits_per_word
= spi
->bits_per_word
;
143 orion_spi
= spi_master_get_devdata(spi
->master
);
145 if ((t
!= NULL
) && t
->speed_hz
)
148 if ((t
!= NULL
) && t
->bits_per_word
)
149 bits_per_word
= t
->bits_per_word
;
151 rc
= orion_spi_baudrate_set(spi
, speed
);
155 return orion_spi_set_transfer_size(orion_spi
, bits_per_word
);
158 static void orion_spi_set_cs(struct orion_spi
*orion_spi
, int enable
)
161 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CTRL_REG
, 0x1);
163 orion_spi_clrbits(orion_spi
, ORION_SPI_IF_CTRL_REG
, 0x1);
166 static inline int orion_spi_wait_till_ready(struct orion_spi
*orion_spi
)
170 for (i
= 0; i
< ORION_SPI_WAIT_RDY_MAX_LOOP
; i
++) {
171 if (readl(spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
)))
181 orion_spi_write_read_8bit(struct spi_device
*spi
,
182 const u8
**tx_buf
, u8
**rx_buf
)
184 void __iomem
*tx_reg
, *rx_reg
, *int_reg
;
185 struct orion_spi
*orion_spi
;
187 orion_spi
= spi_master_get_devdata(spi
->master
);
188 tx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_OUT_REG
);
189 rx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_IN_REG
);
190 int_reg
= spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
);
192 /* clear the interrupt cause register */
193 writel(0x0, int_reg
);
195 if (tx_buf
&& *tx_buf
)
196 writel(*(*tx_buf
)++, tx_reg
);
200 if (orion_spi_wait_till_ready(orion_spi
) < 0) {
201 dev_err(&spi
->dev
, "TXS timed out\n");
205 if (rx_buf
&& *rx_buf
)
206 *(*rx_buf
)++ = readl(rx_reg
);
212 orion_spi_write_read_16bit(struct spi_device
*spi
,
213 const u16
**tx_buf
, u16
**rx_buf
)
215 void __iomem
*tx_reg
, *rx_reg
, *int_reg
;
216 struct orion_spi
*orion_spi
;
218 orion_spi
= spi_master_get_devdata(spi
->master
);
219 tx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_OUT_REG
);
220 rx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_IN_REG
);
221 int_reg
= spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
);
223 /* clear the interrupt cause register */
224 writel(0x0, int_reg
);
226 if (tx_buf
&& *tx_buf
)
227 writel(__cpu_to_le16(get_unaligned((*tx_buf
)++)), tx_reg
);
231 if (orion_spi_wait_till_ready(orion_spi
) < 0) {
232 dev_err(&spi
->dev
, "TXS timed out\n");
236 if (rx_buf
&& *rx_buf
)
237 put_unaligned(__le16_to_cpu(readl(rx_reg
)), (*rx_buf
)++);
243 orion_spi_write_read(struct spi_device
*spi
, struct spi_transfer
*xfer
)
245 struct orion_spi
*orion_spi
;
249 orion_spi
= spi_master_get_devdata(spi
->master
);
250 word_len
= spi
->bits_per_word
;
254 const u8
*tx
= xfer
->tx_buf
;
255 u8
*rx
= xfer
->rx_buf
;
258 if (orion_spi_write_read_8bit(spi
, &tx
, &rx
) < 0)
262 } else if (word_len
== 16) {
263 const u16
*tx
= xfer
->tx_buf
;
264 u16
*rx
= xfer
->rx_buf
;
267 if (orion_spi_write_read_16bit(spi
, &tx
, &rx
) < 0)
274 return xfer
->len
- count
;
278 static void orion_spi_work(struct work_struct
*work
)
280 struct orion_spi
*orion_spi
=
281 container_of(work
, struct orion_spi
, work
);
283 spin_lock_irq(&orion_spi
->lock
);
284 while (!list_empty(&orion_spi
->msg_queue
)) {
285 struct spi_message
*m
;
286 struct spi_device
*spi
;
287 struct spi_transfer
*t
= NULL
;
288 int par_override
= 0;
292 m
= container_of(orion_spi
->msg_queue
.next
, struct spi_message
,
295 list_del_init(&m
->queue
);
296 spin_unlock_irq(&orion_spi
->lock
);
301 status
= orion_spi_setup_transfer(spi
, NULL
);
306 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
307 if (par_override
|| t
->speed_hz
|| t
->bits_per_word
) {
309 status
= orion_spi_setup_transfer(spi
, t
);
312 if (!t
->speed_hz
&& !t
->bits_per_word
)
317 orion_spi_set_cs(orion_spi
, 1);
323 orion_spi_write_read(spi
, t
);
326 udelay(t
->delay_usecs
);
329 orion_spi_set_cs(orion_spi
, 0);
336 orion_spi_set_cs(orion_spi
, 0);
339 m
->complete(m
->context
);
341 spin_lock_irq(&orion_spi
->lock
);
344 spin_unlock_irq(&orion_spi
->lock
);
347 static int __init
orion_spi_reset(struct orion_spi
*orion_spi
)
349 /* Verify that the CS is deasserted */
350 orion_spi_set_cs(orion_spi
, 0);
355 static int orion_spi_setup(struct spi_device
*spi
)
357 struct orion_spi
*orion_spi
;
359 orion_spi
= spi_master_get_devdata(spi
->master
);
361 /* Fix ac timing if required. */
362 if (orion_spi
->spi_info
->enable_clock_fix
)
363 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
366 if ((spi
->max_speed_hz
== 0)
367 || (spi
->max_speed_hz
> orion_spi
->max_speed
))
368 spi
->max_speed_hz
= orion_spi
->max_speed
;
370 if (spi
->max_speed_hz
< orion_spi
->min_speed
) {
371 dev_err(&spi
->dev
, "setup: requested speed too low %d Hz\n",
377 * baudrate & width will be set orion_spi_setup_transfer
382 static int orion_spi_transfer(struct spi_device
*spi
, struct spi_message
*m
)
384 struct orion_spi
*orion_spi
;
385 struct spi_transfer
*t
= NULL
;
388 m
->actual_length
= 0;
391 /* reject invalid messages and transfers */
392 if (list_empty(&m
->transfers
) || !m
->complete
)
395 orion_spi
= spi_master_get_devdata(spi
->master
);
397 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
398 unsigned int bits_per_word
= spi
->bits_per_word
;
400 if (t
->tx_buf
== NULL
&& t
->rx_buf
== NULL
&& t
->len
) {
402 "message rejected : "
403 "invalid transfer data buffers\n");
407 if (t
->bits_per_word
)
408 bits_per_word
= t
->bits_per_word
;
410 if ((bits_per_word
!= 8) && (bits_per_word
!= 16)) {
412 "message rejected : "
413 "invalid transfer bits_per_word (%d bits)\n",
417 /*make sure buffer length is even when working in 16 bit mode*/
418 if ((t
->bits_per_word
== 16) && (t
->len
& 1)) {
420 "message rejected : "
421 "odd data length (%d) while in 16 bit mode\n",
426 if (t
->speed_hz
&& t
->speed_hz
< orion_spi
->min_speed
) {
428 "message rejected : "
429 "device min speed (%d Hz) exceeds "
430 "required transfer speed (%d Hz)\n",
431 orion_spi
->min_speed
, t
->speed_hz
);
437 spin_lock_irqsave(&orion_spi
->lock
, flags
);
438 list_add_tail(&m
->queue
, &orion_spi
->msg_queue
);
439 queue_work(orion_spi_wq
, &orion_spi
->work
);
440 spin_unlock_irqrestore(&orion_spi
->lock
, flags
);
444 /* Message rejected and not queued */
447 m
->complete(m
->context
);
451 static int __init
orion_spi_probe(struct platform_device
*pdev
)
453 struct spi_master
*master
;
454 struct orion_spi
*spi
;
456 struct orion_spi_info
*spi_info
;
459 spi_info
= pdev
->dev
.platform_data
;
461 master
= spi_alloc_master(&pdev
->dev
, sizeof *spi
);
462 if (master
== NULL
) {
463 dev_dbg(&pdev
->dev
, "master allocation failed\n");
468 master
->bus_num
= pdev
->id
;
470 /* we support only mode 0, and no options */
471 master
->mode_bits
= 0;
473 master
->setup
= orion_spi_setup
;
474 master
->transfer
= orion_spi_transfer
;
475 master
->num_chipselect
= ORION_NUM_CHIPSELECTS
;
477 dev_set_drvdata(&pdev
->dev
, master
);
479 spi
= spi_master_get_devdata(master
);
480 spi
->master
= master
;
481 spi
->spi_info
= spi_info
;
483 spi
->max_speed
= DIV_ROUND_UP(spi_info
->tclk
, 4);
484 spi
->min_speed
= DIV_ROUND_UP(spi_info
->tclk
, 30);
486 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
492 if (!request_mem_region(r
->start
, (r
->end
- r
->start
) + 1,
493 dev_name(&pdev
->dev
))) {
497 spi
->base
= ioremap(r
->start
, SZ_1K
);
499 INIT_WORK(&spi
->work
, orion_spi_work
);
501 spin_lock_init(&spi
->lock
);
502 INIT_LIST_HEAD(&spi
->msg_queue
);
504 if (orion_spi_reset(spi
) < 0)
507 status
= spi_register_master(master
);
514 release_mem_region(r
->start
, (r
->end
- r
->start
) + 1);
517 spi_master_put(master
);
522 static int __exit
orion_spi_remove(struct platform_device
*pdev
)
524 struct spi_master
*master
;
525 struct orion_spi
*spi
;
528 master
= dev_get_drvdata(&pdev
->dev
);
529 spi
= spi_master_get_devdata(master
);
531 cancel_work_sync(&spi
->work
);
533 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
534 release_mem_region(r
->start
, (r
->end
- r
->start
) + 1);
536 spi_unregister_master(master
);
541 MODULE_ALIAS("platform:" DRIVER_NAME
);
543 static struct platform_driver orion_spi_driver
= {
546 .owner
= THIS_MODULE
,
548 .remove
= __exit_p(orion_spi_remove
),
551 static int __init
orion_spi_init(void)
553 orion_spi_wq
= create_singlethread_workqueue(
554 orion_spi_driver
.driver
.name
);
555 if (orion_spi_wq
== NULL
)
558 return platform_driver_probe(&orion_spi_driver
, orion_spi_probe
);
560 module_init(orion_spi_init
);
562 static void __exit
orion_spi_exit(void)
564 flush_workqueue(orion_spi_wq
);
565 platform_driver_unregister(&orion_spi_driver
);
567 destroy_workqueue(orion_spi_wq
);
569 module_exit(orion_spi_exit
);
571 MODULE_DESCRIPTION("Orion SPI driver");
572 MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
573 MODULE_LICENSE("GPL");