1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
70 /* required last entry */
74 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
76 void igb_reset(struct igb_adapter
*);
77 static int igb_setup_all_tx_resources(struct igb_adapter
*);
78 static int igb_setup_all_rx_resources(struct igb_adapter
*);
79 static void igb_free_all_tx_resources(struct igb_adapter
*);
80 static void igb_free_all_rx_resources(struct igb_adapter
*);
81 void igb_update_stats(struct igb_adapter
*);
82 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
83 static void __devexit
igb_remove(struct pci_dev
*pdev
);
84 static int igb_sw_init(struct igb_adapter
*);
85 static int igb_open(struct net_device
*);
86 static int igb_close(struct net_device
*);
87 static void igb_configure_tx(struct igb_adapter
*);
88 static void igb_configure_rx(struct igb_adapter
*);
89 static void igb_setup_rctl(struct igb_adapter
*);
90 static void igb_clean_all_tx_rings(struct igb_adapter
*);
91 static void igb_clean_all_rx_rings(struct igb_adapter
*);
92 static void igb_clean_tx_ring(struct igb_ring
*);
93 static void igb_clean_rx_ring(struct igb_ring
*);
94 static void igb_set_multi(struct net_device
*);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct
*);
98 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
100 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
101 static struct net_device_stats
*igb_get_stats(struct net_device
*);
102 static int igb_change_mtu(struct net_device
*, int);
103 static int igb_set_mac(struct net_device
*, void *);
104 static irqreturn_t
igb_intr(int irq
, void *);
105 static irqreturn_t
igb_intr_msi(int irq
, void *);
106 static irqreturn_t
igb_msix_other(int irq
, void *);
107 static irqreturn_t
igb_msix_rx(int irq
, void *);
108 static irqreturn_t
igb_msix_tx(int irq
, void *);
109 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
110 #ifdef CONFIG_IGB_DCA
111 static void igb_update_rx_dca(struct igb_ring
*);
112 static void igb_update_tx_dca(struct igb_ring
*);
113 static void igb_setup_dca(struct igb_adapter
*);
114 #endif /* CONFIG_IGB_DCA */
115 static bool igb_clean_tx_irq(struct igb_ring
*);
116 static int igb_poll(struct napi_struct
*, int);
117 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
118 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
119 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
120 static void igb_tx_timeout(struct net_device
*);
121 static void igb_reset_task(struct work_struct
*);
122 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
123 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
124 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
125 static void igb_restore_vlan(struct igb_adapter
*);
127 static int igb_suspend(struct pci_dev
*, pm_message_t
);
129 static int igb_resume(struct pci_dev
*);
131 static void igb_shutdown(struct pci_dev
*);
132 #ifdef CONFIG_IGB_DCA
133 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
134 static struct notifier_block dca_notifier
= {
135 .notifier_call
= igb_notify_dca
,
141 #ifdef CONFIG_NET_POLL_CONTROLLER
142 /* for netdump / net console */
143 static void igb_netpoll(struct net_device
*);
146 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
147 pci_channel_state_t
);
148 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
149 static void igb_io_resume(struct pci_dev
*);
151 static struct pci_error_handlers igb_err_handler
= {
152 .error_detected
= igb_io_error_detected
,
153 .slot_reset
= igb_io_slot_reset
,
154 .resume
= igb_io_resume
,
158 static struct pci_driver igb_driver
= {
159 .name
= igb_driver_name
,
160 .id_table
= igb_pci_tbl
,
162 .remove
= __devexit_p(igb_remove
),
164 /* Power Managment Hooks */
165 .suspend
= igb_suspend
,
166 .resume
= igb_resume
,
168 .shutdown
= igb_shutdown
,
169 .err_handler
= &igb_err_handler
172 static int global_quad_port_a
; /* global quad port a indication */
174 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
175 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
176 MODULE_LICENSE("GPL");
177 MODULE_VERSION(DRV_VERSION
);
180 * Scale the NIC clock cycle by a large factor so that
181 * relatively small clock corrections can be added or
182 * substracted at each clock tick. The drawbacks of a
183 * large factor are a) that the clock register overflows
184 * more quickly (not such a big deal) and b) that the
185 * increment per tick has to fit into 24 bits.
188 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
190 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
192 * The base scale factor is intentionally a power of two
193 * so that the division in %struct timecounter can be done with
196 #define IGB_TSYNC_SHIFT (19)
197 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
200 * The duration of one clock cycle of the NIC.
202 * @todo This hard-coded value is part of the specification and might change
203 * in future hardware revisions. Add revision check.
205 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
207 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
208 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
212 * igb_read_clock - read raw cycle counter (to be used by time counter)
214 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
216 struct igb_adapter
*adapter
=
217 container_of(tc
, struct igb_adapter
, cycles
);
218 struct e1000_hw
*hw
= &adapter
->hw
;
221 stamp
= rd32(E1000_SYSTIML
);
222 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
229 * igb_get_hw_dev_name - return device name string
230 * used by hardware layer to print debugging information
232 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
234 struct igb_adapter
*adapter
= hw
->back
;
235 return adapter
->netdev
->name
;
239 * igb_get_time_str - format current NIC and system time as string
241 static char *igb_get_time_str(struct igb_adapter
*adapter
,
244 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
245 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
247 struct timespec delta
;
248 getnstimeofday(&sys
);
250 delta
= timespec_sub(nic
, sys
);
253 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
255 (long)nic
.tv_sec
, nic
.tv_nsec
,
256 (long)sys
.tv_sec
, sys
.tv_nsec
,
257 (long)delta
.tv_sec
, delta
.tv_nsec
);
264 * igb_init_module - Driver Registration Routine
266 * igb_init_module is the first routine called when the driver is
267 * loaded. All it does is register with the PCI subsystem.
269 static int __init
igb_init_module(void)
272 printk(KERN_INFO
"%s - version %s\n",
273 igb_driver_string
, igb_driver_version
);
275 printk(KERN_INFO
"%s\n", igb_copyright
);
277 global_quad_port_a
= 0;
279 #ifdef CONFIG_IGB_DCA
280 dca_register_notify(&dca_notifier
);
283 ret
= pci_register_driver(&igb_driver
);
287 module_init(igb_init_module
);
290 * igb_exit_module - Driver Exit Cleanup Routine
292 * igb_exit_module is called just before the driver is removed
295 static void __exit
igb_exit_module(void)
297 #ifdef CONFIG_IGB_DCA
298 dca_unregister_notify(&dca_notifier
);
300 pci_unregister_driver(&igb_driver
);
303 module_exit(igb_exit_module
);
305 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
307 * igb_cache_ring_register - Descriptor ring to register mapping
308 * @adapter: board private structure to initialize
310 * Once we know the feature-set enabled for the device, we'll cache
311 * the register offset the descriptor ring is assigned to.
313 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
317 switch (adapter
->hw
.mac
.type
) {
319 /* The queues are allocated for virtualization such that VF 0
320 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
321 * In order to avoid collision we start at the first free queue
322 * and continue consuming queues in the same sequence
324 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
325 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
326 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
327 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
331 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
332 adapter
->rx_ring
[i
].reg_idx
= i
;
333 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
334 adapter
->tx_ring
[i
].reg_idx
= i
;
340 * igb_alloc_queues - Allocate memory for all rings
341 * @adapter: board private structure to initialize
343 * We allocate one ring per queue at run-time since we don't know the
344 * number of queues at compile-time.
346 static int igb_alloc_queues(struct igb_adapter
*adapter
)
350 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
351 sizeof(struct igb_ring
), GFP_KERNEL
);
352 if (!adapter
->tx_ring
)
355 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
356 sizeof(struct igb_ring
), GFP_KERNEL
);
357 if (!adapter
->rx_ring
) {
358 kfree(adapter
->tx_ring
);
362 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
364 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
365 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
366 ring
->count
= adapter
->tx_ring_count
;
367 ring
->adapter
= adapter
;
368 ring
->queue_index
= i
;
370 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
371 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
372 ring
->count
= adapter
->rx_ring_count
;
373 ring
->adapter
= adapter
;
374 ring
->queue_index
= i
;
375 ring
->itr_register
= E1000_ITR
;
377 /* set a default napi handler for each rx_ring */
378 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
381 igb_cache_ring_register(adapter
);
385 static void igb_free_queues(struct igb_adapter
*adapter
)
389 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
390 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
392 kfree(adapter
->tx_ring
);
393 kfree(adapter
->rx_ring
);
396 #define IGB_N0_QUEUE -1
397 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
398 int tx_queue
, int msix_vector
)
401 struct e1000_hw
*hw
= &adapter
->hw
;
404 switch (hw
->mac
.type
) {
406 /* The 82575 assigns vectors using a bitmask, which matches the
407 bitmask for the EICR/EIMS/EIMC registers. To assign one
408 or more queues to a vector, we write the appropriate bits
409 into the MSIXBM register for that vector. */
410 if (rx_queue
> IGB_N0_QUEUE
) {
411 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
412 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
414 if (tx_queue
> IGB_N0_QUEUE
) {
415 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
416 adapter
->tx_ring
[tx_queue
].eims_value
=
417 E1000_EICR_TX_QUEUE0
<< tx_queue
;
419 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
422 /* 82576 uses a table-based method for assigning vectors.
423 Each queue has a single entry in the table to which we write
424 a vector number along with a "valid" bit. Sadly, the layout
425 of the table is somewhat counterintuitive. */
426 if (rx_queue
> IGB_N0_QUEUE
) {
427 index
= (rx_queue
>> 1);
428 ivar
= array_rd32(E1000_IVAR0
, index
);
429 if (rx_queue
& 0x1) {
430 /* vector goes into third byte of register */
431 ivar
= ivar
& 0xFF00FFFF;
432 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
434 /* vector goes into low byte of register */
435 ivar
= ivar
& 0xFFFFFF00;
436 ivar
|= msix_vector
| E1000_IVAR_VALID
;
438 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
439 array_wr32(E1000_IVAR0
, index
, ivar
);
441 if (tx_queue
> IGB_N0_QUEUE
) {
442 index
= (tx_queue
>> 1);
443 ivar
= array_rd32(E1000_IVAR0
, index
);
444 if (tx_queue
& 0x1) {
445 /* vector goes into high byte of register */
446 ivar
= ivar
& 0x00FFFFFF;
447 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
449 /* vector goes into second byte of register */
450 ivar
= ivar
& 0xFFFF00FF;
451 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
453 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
454 array_wr32(E1000_IVAR0
, index
, ivar
);
464 * igb_configure_msix - Configure MSI-X hardware
466 * igb_configure_msix sets up the hardware to properly
467 * generate MSI-X interrupts.
469 static void igb_configure_msix(struct igb_adapter
*adapter
)
473 struct e1000_hw
*hw
= &adapter
->hw
;
475 adapter
->eims_enable_mask
= 0;
476 if (hw
->mac
.type
== e1000_82576
)
477 /* Turn on MSI-X capability first, or our settings
478 * won't stick. And it will take days to debug. */
479 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
480 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
483 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
484 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
485 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
486 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
487 if (tx_ring
->itr_val
)
488 writel(tx_ring
->itr_val
,
489 hw
->hw_addr
+ tx_ring
->itr_register
);
491 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
494 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
495 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
496 rx_ring
->buddy
= NULL
;
497 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
498 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
499 if (rx_ring
->itr_val
)
500 writel(rx_ring
->itr_val
,
501 hw
->hw_addr
+ rx_ring
->itr_register
);
503 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
507 /* set vector for other causes, i.e. link changes */
508 switch (hw
->mac
.type
) {
510 array_wr32(E1000_MSIXBM(0), vector
++,
513 tmp
= rd32(E1000_CTRL_EXT
);
514 /* enable MSI-X PBA support*/
515 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
517 /* Auto-Mask interrupts upon ICR read. */
518 tmp
|= E1000_CTRL_EXT_EIAME
;
519 tmp
|= E1000_CTRL_EXT_IRCA
;
521 wr32(E1000_CTRL_EXT
, tmp
);
522 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
523 adapter
->eims_other
= E1000_EIMS_OTHER
;
528 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
529 wr32(E1000_IVAR_MISC
, tmp
);
531 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
532 adapter
->eims_other
= 1 << (vector
- 1);
535 /* do nothing, since nothing else supports MSI-X */
537 } /* switch (hw->mac.type) */
542 * igb_request_msix - Initialize MSI-X interrupts
544 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
547 static int igb_request_msix(struct igb_adapter
*adapter
)
549 struct net_device
*netdev
= adapter
->netdev
;
550 int i
, err
= 0, vector
= 0;
554 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
555 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
556 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
557 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
558 &igb_msix_tx
, 0, ring
->name
,
559 &(adapter
->tx_ring
[i
]));
562 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
563 ring
->itr_val
= 976; /* ~4000 ints/sec */
566 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
567 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
568 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
569 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
571 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
572 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
573 &igb_msix_rx
, 0, ring
->name
,
574 &(adapter
->rx_ring
[i
]));
577 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
578 ring
->itr_val
= adapter
->itr
;
579 /* overwrite the poll routine for MSIX, we've already done
581 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
585 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
586 &igb_msix_other
, 0, netdev
->name
, netdev
);
590 igb_configure_msix(adapter
);
596 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
598 if (adapter
->msix_entries
) {
599 pci_disable_msix(adapter
->pdev
);
600 kfree(adapter
->msix_entries
);
601 adapter
->msix_entries
= NULL
;
602 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
603 pci_disable_msi(adapter
->pdev
);
609 * igb_set_interrupt_capability - set MSI or MSI-X if supported
611 * Attempt to configure interrupts using the best available
612 * capabilities of the hardware and kernel.
614 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
619 /* Number of supported queues. */
620 /* Having more queues than CPUs doesn't make sense. */
621 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
622 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
624 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
625 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
627 if (!adapter
->msix_entries
)
630 for (i
= 0; i
< numvecs
; i
++)
631 adapter
->msix_entries
[i
].entry
= i
;
633 err
= pci_enable_msix(adapter
->pdev
,
634 adapter
->msix_entries
,
639 igb_reset_interrupt_capability(adapter
);
641 /* If we can't do MSI-X, try MSI */
643 adapter
->num_rx_queues
= 1;
644 adapter
->num_tx_queues
= 1;
645 if (!pci_enable_msi(adapter
->pdev
))
646 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
648 /* Notify the stack of the (possibly) reduced Tx Queue count. */
649 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
654 * igb_request_irq - initialize interrupts
656 * Attempts to configure interrupts using the best available
657 * capabilities of the hardware and kernel.
659 static int igb_request_irq(struct igb_adapter
*adapter
)
661 struct net_device
*netdev
= adapter
->netdev
;
662 struct e1000_hw
*hw
= &adapter
->hw
;
665 if (adapter
->msix_entries
) {
666 err
= igb_request_msix(adapter
);
669 /* fall back to MSI */
670 igb_reset_interrupt_capability(adapter
);
671 if (!pci_enable_msi(adapter
->pdev
))
672 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
673 igb_free_all_tx_resources(adapter
);
674 igb_free_all_rx_resources(adapter
);
675 adapter
->num_rx_queues
= 1;
676 igb_alloc_queues(adapter
);
678 switch (hw
->mac
.type
) {
680 wr32(E1000_MSIXBM(0),
681 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
684 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
691 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
692 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
693 netdev
->name
, netdev
);
696 /* fall back to legacy interrupts */
697 igb_reset_interrupt_capability(adapter
);
698 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
701 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
702 netdev
->name
, netdev
);
705 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
712 static void igb_free_irq(struct igb_adapter
*adapter
)
714 struct net_device
*netdev
= adapter
->netdev
;
716 if (adapter
->msix_entries
) {
719 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
720 free_irq(adapter
->msix_entries
[vector
++].vector
,
721 &(adapter
->tx_ring
[i
]));
722 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
723 free_irq(adapter
->msix_entries
[vector
++].vector
,
724 &(adapter
->rx_ring
[i
]));
726 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
730 free_irq(adapter
->pdev
->irq
, netdev
);
734 * igb_irq_disable - Mask off interrupt generation on the NIC
735 * @adapter: board private structure
737 static void igb_irq_disable(struct igb_adapter
*adapter
)
739 struct e1000_hw
*hw
= &adapter
->hw
;
741 if (adapter
->msix_entries
) {
743 wr32(E1000_EIMC
, ~0);
750 synchronize_irq(adapter
->pdev
->irq
);
754 * igb_irq_enable - Enable default interrupt generation settings
755 * @adapter: board private structure
757 static void igb_irq_enable(struct igb_adapter
*adapter
)
759 struct e1000_hw
*hw
= &adapter
->hw
;
761 if (adapter
->msix_entries
) {
762 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
763 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
764 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
765 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
767 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
768 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
772 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
774 struct net_device
*netdev
= adapter
->netdev
;
775 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
776 u16 old_vid
= adapter
->mng_vlan_id
;
777 if (adapter
->vlgrp
) {
778 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
779 if (adapter
->hw
.mng_cookie
.status
&
780 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
781 igb_vlan_rx_add_vid(netdev
, vid
);
782 adapter
->mng_vlan_id
= vid
;
784 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
786 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
788 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
789 igb_vlan_rx_kill_vid(netdev
, old_vid
);
791 adapter
->mng_vlan_id
= vid
;
796 * igb_release_hw_control - release control of the h/w to f/w
797 * @adapter: address of board private structure
799 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
800 * For ASF and Pass Through versions of f/w this means that the
801 * driver is no longer loaded.
804 static void igb_release_hw_control(struct igb_adapter
*adapter
)
806 struct e1000_hw
*hw
= &adapter
->hw
;
809 /* Let firmware take over control of h/w */
810 ctrl_ext
= rd32(E1000_CTRL_EXT
);
812 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
817 * igb_get_hw_control - get control of the h/w from f/w
818 * @adapter: address of board private structure
820 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
821 * For ASF and Pass Through versions of f/w this means that
822 * the driver is loaded.
825 static void igb_get_hw_control(struct igb_adapter
*adapter
)
827 struct e1000_hw
*hw
= &adapter
->hw
;
830 /* Let firmware know the driver has taken over */
831 ctrl_ext
= rd32(E1000_CTRL_EXT
);
833 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
837 * igb_configure - configure the hardware for RX and TX
838 * @adapter: private board structure
840 static void igb_configure(struct igb_adapter
*adapter
)
842 struct net_device
*netdev
= adapter
->netdev
;
845 igb_get_hw_control(adapter
);
846 igb_set_multi(netdev
);
848 igb_restore_vlan(adapter
);
850 igb_configure_tx(adapter
);
851 igb_setup_rctl(adapter
);
852 igb_configure_rx(adapter
);
854 igb_rx_fifo_flush_82575(&adapter
->hw
);
856 /* call IGB_DESC_UNUSED which always leaves
857 * at least 1 descriptor unused to make sure
858 * next_to_use != next_to_clean */
859 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
860 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
861 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
865 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
870 * igb_up - Open the interface and prepare it to handle traffic
871 * @adapter: board private structure
874 int igb_up(struct igb_adapter
*adapter
)
876 struct e1000_hw
*hw
= &adapter
->hw
;
879 /* hardware has been reset, we need to reload some things */
880 igb_configure(adapter
);
882 clear_bit(__IGB_DOWN
, &adapter
->state
);
884 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
885 napi_enable(&adapter
->rx_ring
[i
].napi
);
886 if (adapter
->msix_entries
)
887 igb_configure_msix(adapter
);
889 /* Clear any pending interrupts. */
891 igb_irq_enable(adapter
);
893 /* Fire a link change interrupt to start the watchdog. */
894 wr32(E1000_ICS
, E1000_ICS_LSC
);
898 void igb_down(struct igb_adapter
*adapter
)
900 struct e1000_hw
*hw
= &adapter
->hw
;
901 struct net_device
*netdev
= adapter
->netdev
;
905 /* signal that we're down so the interrupt handler does not
906 * reschedule our watchdog timer */
907 set_bit(__IGB_DOWN
, &adapter
->state
);
909 /* disable receives in the hardware */
910 rctl
= rd32(E1000_RCTL
);
911 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
912 /* flush and sleep below */
914 netif_tx_stop_all_queues(netdev
);
916 /* disable transmits in the hardware */
917 tctl
= rd32(E1000_TCTL
);
918 tctl
&= ~E1000_TCTL_EN
;
919 wr32(E1000_TCTL
, tctl
);
920 /* flush both disables and wait for them to finish */
924 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
925 napi_disable(&adapter
->rx_ring
[i
].napi
);
927 igb_irq_disable(adapter
);
929 del_timer_sync(&adapter
->watchdog_timer
);
930 del_timer_sync(&adapter
->phy_info_timer
);
932 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
933 netif_carrier_off(netdev
);
935 /* record the stats before reset*/
936 igb_update_stats(adapter
);
938 adapter
->link_speed
= 0;
939 adapter
->link_duplex
= 0;
941 if (!pci_channel_offline(adapter
->pdev
))
943 igb_clean_all_tx_rings(adapter
);
944 igb_clean_all_rx_rings(adapter
);
947 void igb_reinit_locked(struct igb_adapter
*adapter
)
949 WARN_ON(in_interrupt());
950 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
954 clear_bit(__IGB_RESETTING
, &adapter
->state
);
957 void igb_reset(struct igb_adapter
*adapter
)
959 struct e1000_hw
*hw
= &adapter
->hw
;
960 struct e1000_mac_info
*mac
= &hw
->mac
;
961 struct e1000_fc_info
*fc
= &hw
->fc
;
962 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
965 /* Repartition Pba for greater than 9k mtu
966 * To take effect CTRL.RST is required.
978 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
979 (mac
->type
< e1000_82576
)) {
980 /* adjust PBA for jumbo frames */
981 wr32(E1000_PBA
, pba
);
983 /* To maintain wire speed transmits, the Tx FIFO should be
984 * large enough to accommodate two full transmit packets,
985 * rounded up to the next 1KB and expressed in KB. Likewise,
986 * the Rx FIFO should be large enough to accommodate at least
987 * one full receive packet and is similarly rounded up and
988 * expressed in KB. */
989 pba
= rd32(E1000_PBA
);
990 /* upper 16 bits has Tx packet buffer allocation size in KB */
991 tx_space
= pba
>> 16;
992 /* lower 16 bits has Rx packet buffer allocation size in KB */
994 /* the tx fifo also stores 16 bytes of information about the tx
995 * but don't include ethernet FCS because hardware appends it */
996 min_tx_space
= (adapter
->max_frame_size
+
997 sizeof(struct e1000_tx_desc
) -
999 min_tx_space
= ALIGN(min_tx_space
, 1024);
1000 min_tx_space
>>= 10;
1001 /* software strips receive CRC, so leave room for it */
1002 min_rx_space
= adapter
->max_frame_size
;
1003 min_rx_space
= ALIGN(min_rx_space
, 1024);
1004 min_rx_space
>>= 10;
1006 /* If current Tx allocation is less than the min Tx FIFO size,
1007 * and the min Tx FIFO size is less than the current Rx FIFO
1008 * allocation, take space away from current Rx allocation */
1009 if (tx_space
< min_tx_space
&&
1010 ((min_tx_space
- tx_space
) < pba
)) {
1011 pba
= pba
- (min_tx_space
- tx_space
);
1013 /* if short on rx space, rx wins and must trump tx
1015 if (pba
< min_rx_space
)
1018 wr32(E1000_PBA
, pba
);
1021 /* flow control settings */
1022 /* The high water mark must be low enough to fit one full frame
1023 * (or the size used for early receive) above it in the Rx FIFO.
1024 * Set it to the lower of:
1025 * - 90% of the Rx FIFO size, or
1026 * - the full Rx FIFO size minus one full frame */
1027 hwm
= min(((pba
<< 10) * 9 / 10),
1028 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1030 if (mac
->type
< e1000_82576
) {
1031 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1032 fc
->low_water
= fc
->high_water
- 8;
1034 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1035 fc
->low_water
= fc
->high_water
- 16;
1037 fc
->pause_time
= 0xFFFF;
1039 fc
->type
= fc
->original_type
;
1041 /* Allow time for pending master requests to run */
1042 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1045 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1046 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1048 igb_update_mng_vlan(adapter
);
1050 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1051 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1053 igb_reset_adaptive(&adapter
->hw
);
1054 igb_get_phy_info(&adapter
->hw
);
1057 static const struct net_device_ops igb_netdev_ops
= {
1058 .ndo_open
= igb_open
,
1059 .ndo_stop
= igb_close
,
1060 .ndo_start_xmit
= igb_xmit_frame_adv
,
1061 .ndo_get_stats
= igb_get_stats
,
1062 .ndo_set_multicast_list
= igb_set_multi
,
1063 .ndo_set_mac_address
= igb_set_mac
,
1064 .ndo_change_mtu
= igb_change_mtu
,
1065 .ndo_do_ioctl
= igb_ioctl
,
1066 .ndo_tx_timeout
= igb_tx_timeout
,
1067 .ndo_validate_addr
= eth_validate_addr
,
1068 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1069 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1070 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1071 #ifdef CONFIG_NET_POLL_CONTROLLER
1072 .ndo_poll_controller
= igb_netpoll
,
1077 * igb_probe - Device Initialization Routine
1078 * @pdev: PCI device information struct
1079 * @ent: entry in igb_pci_tbl
1081 * Returns 0 on success, negative on failure
1083 * igb_probe initializes an adapter identified by a pci_dev structure.
1084 * The OS initialization, configuring of the adapter private structure,
1085 * and a hardware reset occur.
1087 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1088 const struct pci_device_id
*ent
)
1090 struct net_device
*netdev
;
1091 struct igb_adapter
*adapter
;
1092 struct e1000_hw
*hw
;
1093 struct pci_dev
*us_dev
;
1094 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1095 unsigned long mmio_start
, mmio_len
;
1096 int err
, pci_using_dac
, pos
;
1097 u16 eeprom_data
= 0, state
= 0;
1098 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1101 err
= pci_enable_device_mem(pdev
);
1106 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1108 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1112 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1114 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1116 dev_err(&pdev
->dev
, "No usable DMA "
1117 "configuration, aborting\n");
1123 /* 82575 requires that the pci-e link partner disable the L0s state */
1124 switch (pdev
->device
) {
1125 case E1000_DEV_ID_82575EB_COPPER
:
1126 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1127 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1128 us_dev
= pdev
->bus
->self
;
1129 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1131 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1133 state
&= ~PCIE_LINK_STATE_L0S
;
1134 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1136 dev_info(&pdev
->dev
,
1137 "Disabling ASPM L0s upstream switch port %s\n",
1144 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1150 err
= pci_enable_pcie_error_reporting(pdev
);
1152 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1154 /* non-fatal, continue */
1157 pci_set_master(pdev
);
1158 pci_save_state(pdev
);
1161 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1163 goto err_alloc_etherdev
;
1165 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1167 pci_set_drvdata(pdev
, netdev
);
1168 adapter
= netdev_priv(netdev
);
1169 adapter
->netdev
= netdev
;
1170 adapter
->pdev
= pdev
;
1173 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1175 mmio_start
= pci_resource_start(pdev
, 0);
1176 mmio_len
= pci_resource_len(pdev
, 0);
1179 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1183 netdev
->netdev_ops
= &igb_netdev_ops
;
1184 igb_set_ethtool_ops(netdev
);
1185 netdev
->watchdog_timeo
= 5 * HZ
;
1187 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1189 netdev
->mem_start
= mmio_start
;
1190 netdev
->mem_end
= mmio_start
+ mmio_len
;
1192 /* PCI config space info */
1193 hw
->vendor_id
= pdev
->vendor
;
1194 hw
->device_id
= pdev
->device
;
1195 hw
->revision_id
= pdev
->revision
;
1196 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1197 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1199 /* setup the private structure */
1201 /* Copy the default MAC, PHY and NVM function pointers */
1202 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1203 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1204 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1205 /* Initialize skew-specific constants */
1206 err
= ei
->get_invariants(hw
);
1210 /* setup the private structure */
1211 err
= igb_sw_init(adapter
);
1215 igb_get_bus_info_pcie(hw
);
1218 switch (hw
->mac
.type
) {
1220 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1227 hw
->phy
.autoneg_wait_to_complete
= false;
1228 hw
->mac
.adaptive_ifs
= true;
1230 /* Copper options */
1231 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1232 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1233 hw
->phy
.disable_polarity_correction
= false;
1234 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1237 if (igb_check_reset_block(hw
))
1238 dev_info(&pdev
->dev
,
1239 "PHY reset is blocked due to SOL/IDER session.\n");
1241 netdev
->features
= NETIF_F_SG
|
1243 NETIF_F_HW_VLAN_TX
|
1244 NETIF_F_HW_VLAN_RX
|
1245 NETIF_F_HW_VLAN_FILTER
;
1247 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1248 netdev
->features
|= NETIF_F_TSO
;
1249 netdev
->features
|= NETIF_F_TSO6
;
1251 #ifdef CONFIG_IGB_LRO
1252 netdev
->features
|= NETIF_F_GRO
;
1255 netdev
->vlan_features
|= NETIF_F_TSO
;
1256 netdev
->vlan_features
|= NETIF_F_TSO6
;
1257 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1258 netdev
->vlan_features
|= NETIF_F_SG
;
1261 netdev
->features
|= NETIF_F_HIGHDMA
;
1263 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1265 /* before reading the NVM, reset the controller to put the device in a
1266 * known good starting state */
1267 hw
->mac
.ops
.reset_hw(hw
);
1269 /* make sure the NVM is good */
1270 if (igb_validate_nvm_checksum(hw
) < 0) {
1271 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1276 /* copy the MAC address out of the NVM */
1277 if (hw
->mac
.ops
.read_mac_addr(hw
))
1278 dev_err(&pdev
->dev
, "NVM Read Error\n");
1280 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1281 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1283 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1284 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1289 init_timer(&adapter
->watchdog_timer
);
1290 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1291 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1293 init_timer(&adapter
->phy_info_timer
);
1294 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1295 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1297 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1298 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1300 /* Initialize link properties that are user-changeable */
1301 adapter
->fc_autoneg
= true;
1302 hw
->mac
.autoneg
= true;
1303 hw
->phy
.autoneg_advertised
= 0x2f;
1305 hw
->fc
.original_type
= e1000_fc_default
;
1306 hw
->fc
.type
= e1000_fc_default
;
1308 adapter
->itr_setting
= 3;
1309 adapter
->itr
= IGB_START_ITR
;
1311 igb_validate_mdi_setting(hw
);
1313 adapter
->rx_csum
= 1;
1315 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1316 * enable the ACPI Magic Packet filter
1319 if (hw
->bus
.func
== 0 ||
1320 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1321 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1323 if (eeprom_data
& eeprom_apme_mask
)
1324 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1326 /* now that we have the eeprom settings, apply the special cases where
1327 * the eeprom may be wrong or the board simply won't support wake on
1328 * lan on a particular port */
1329 switch (pdev
->device
) {
1330 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1331 adapter
->eeprom_wol
= 0;
1333 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1334 case E1000_DEV_ID_82576_FIBER
:
1335 case E1000_DEV_ID_82576_SERDES
:
1336 /* Wake events only supported on port A for dual fiber
1337 * regardless of eeprom setting */
1338 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1339 adapter
->eeprom_wol
= 0;
1343 /* initialize the wol settings based on the eeprom settings */
1344 adapter
->wol
= adapter
->eeprom_wol
;
1345 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1347 /* reset the hardware with the new settings */
1350 /* let the f/w know that the h/w is now under the control of the
1352 igb_get_hw_control(adapter
);
1354 /* tell the stack to leave us alone until igb_open() is called */
1355 netif_carrier_off(netdev
);
1356 netif_tx_stop_all_queues(netdev
);
1358 strcpy(netdev
->name
, "eth%d");
1359 err
= register_netdev(netdev
);
1363 #ifdef CONFIG_IGB_DCA
1364 if (dca_add_requester(&pdev
->dev
) == 0) {
1365 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1366 dev_info(&pdev
->dev
, "DCA enabled\n");
1367 /* Always use CB2 mode, difference is masked
1368 * in the CB driver. */
1369 wr32(E1000_DCA_CTRL
, 2);
1370 igb_setup_dca(adapter
);
1375 * Initialize hardware timer: we keep it running just in case
1376 * that some program needs it later on.
1378 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1379 adapter
->cycles
.read
= igb_read_clock
;
1380 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1381 adapter
->cycles
.mult
= 1;
1382 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1385 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1388 * Avoid rollover while we initialize by resetting the time counter.
1390 wr32(E1000_SYSTIML
, 0x00000000);
1391 wr32(E1000_SYSTIMH
, 0x00000000);
1394 * Set registers so that rollover occurs soon to test this.
1396 wr32(E1000_SYSTIML
, 0x00000000);
1397 wr32(E1000_SYSTIMH
, 0xFF800000);
1400 timecounter_init(&adapter
->clock
,
1402 ktime_to_ns(ktime_get_real()));
1405 * Synchronize our NIC clock against system wall clock. NIC
1406 * time stamp reading requires ~3us per sample, each sample
1407 * was pretty stable even under load => only require 10
1408 * samples for each offset comparison.
1410 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1411 adapter
->compare
.source
= &adapter
->clock
;
1412 adapter
->compare
.target
= ktime_get_real
;
1413 adapter
->compare
.num_samples
= 10;
1414 timecompare_update(&adapter
->compare
, 0);
1420 "igb: %s: hw %p initialized timer\n",
1421 igb_get_time_str(adapter
, buffer
),
1426 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1427 /* print bus type/speed/width info */
1428 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1430 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1431 ? "2.5Gb/s" : "unknown"),
1432 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1433 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1434 ? "Width x1" : "unknown"),
1437 igb_read_part_num(hw
, &part_num
);
1438 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1439 (part_num
>> 8), (part_num
& 0xff));
1441 dev_info(&pdev
->dev
,
1442 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1443 adapter
->msix_entries
? "MSI-X" :
1444 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1445 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1450 igb_release_hw_control(adapter
);
1452 if (!igb_check_reset_block(hw
))
1455 if (hw
->flash_address
)
1456 iounmap(hw
->flash_address
);
1458 igb_free_queues(adapter
);
1460 iounmap(hw
->hw_addr
);
1462 free_netdev(netdev
);
1464 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1468 pci_disable_device(pdev
);
1473 * igb_remove - Device Removal Routine
1474 * @pdev: PCI device information struct
1476 * igb_remove is called by the PCI subsystem to alert the driver
1477 * that it should release a PCI device. The could be caused by a
1478 * Hot-Plug event, or because the driver is going to be removed from
1481 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1483 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1484 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1485 struct e1000_hw
*hw
= &adapter
->hw
;
1488 /* flush_scheduled work may reschedule our watchdog task, so
1489 * explicitly disable watchdog tasks from being rescheduled */
1490 set_bit(__IGB_DOWN
, &adapter
->state
);
1491 del_timer_sync(&adapter
->watchdog_timer
);
1492 del_timer_sync(&adapter
->phy_info_timer
);
1494 flush_scheduled_work();
1496 #ifdef CONFIG_IGB_DCA
1497 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1498 dev_info(&pdev
->dev
, "DCA disabled\n");
1499 dca_remove_requester(&pdev
->dev
);
1500 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1501 wr32(E1000_DCA_CTRL
, 1);
1505 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1506 * would have already happened in close and is redundant. */
1507 igb_release_hw_control(adapter
);
1509 unregister_netdev(netdev
);
1511 if (!igb_check_reset_block(&adapter
->hw
))
1512 igb_reset_phy(&adapter
->hw
);
1514 igb_reset_interrupt_capability(adapter
);
1516 igb_free_queues(adapter
);
1518 iounmap(hw
->hw_addr
);
1519 if (hw
->flash_address
)
1520 iounmap(hw
->flash_address
);
1521 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1524 free_netdev(netdev
);
1526 err
= pci_disable_pcie_error_reporting(pdev
);
1529 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1531 pci_disable_device(pdev
);
1535 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1536 * @adapter: board private structure to initialize
1538 * igb_sw_init initializes the Adapter private data structure.
1539 * Fields are initialized based on PCI device information and
1540 * OS network device settings (MTU size).
1542 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1544 struct e1000_hw
*hw
= &adapter
->hw
;
1545 struct net_device
*netdev
= adapter
->netdev
;
1546 struct pci_dev
*pdev
= adapter
->pdev
;
1548 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1550 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1551 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1552 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1553 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1554 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1555 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1557 /* This call may decrease the number of queues depending on
1558 * interrupt mode. */
1559 igb_set_interrupt_capability(adapter
);
1561 if (igb_alloc_queues(adapter
)) {
1562 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1566 /* Explicitly disable IRQ since the NIC can be in any state. */
1567 igb_irq_disable(adapter
);
1569 set_bit(__IGB_DOWN
, &adapter
->state
);
1574 * igb_open - Called when a network interface is made active
1575 * @netdev: network interface device structure
1577 * Returns 0 on success, negative value on failure
1579 * The open entry point is called when a network interface is made
1580 * active by the system (IFF_UP). At this point all resources needed
1581 * for transmit and receive operations are allocated, the interrupt
1582 * handler is registered with the OS, the watchdog timer is started,
1583 * and the stack is notified that the interface is ready.
1585 static int igb_open(struct net_device
*netdev
)
1587 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1588 struct e1000_hw
*hw
= &adapter
->hw
;
1592 /* disallow open during test */
1593 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1596 /* allocate transmit descriptors */
1597 err
= igb_setup_all_tx_resources(adapter
);
1601 /* allocate receive descriptors */
1602 err
= igb_setup_all_rx_resources(adapter
);
1606 /* e1000_power_up_phy(adapter); */
1608 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1609 if ((adapter
->hw
.mng_cookie
.status
&
1610 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1611 igb_update_mng_vlan(adapter
);
1613 /* before we allocate an interrupt, we must be ready to handle it.
1614 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1615 * as soon as we call pci_request_irq, so we have to setup our
1616 * clean_rx handler before we do so. */
1617 igb_configure(adapter
);
1619 err
= igb_request_irq(adapter
);
1623 /* From here on the code is the same as igb_up() */
1624 clear_bit(__IGB_DOWN
, &adapter
->state
);
1626 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1627 napi_enable(&adapter
->rx_ring
[i
].napi
);
1629 /* Clear any pending interrupts. */
1632 igb_irq_enable(adapter
);
1634 netif_tx_start_all_queues(netdev
);
1636 /* Fire a link status change interrupt to start the watchdog. */
1637 wr32(E1000_ICS
, E1000_ICS_LSC
);
1642 igb_release_hw_control(adapter
);
1643 /* e1000_power_down_phy(adapter); */
1644 igb_free_all_rx_resources(adapter
);
1646 igb_free_all_tx_resources(adapter
);
1654 * igb_close - Disables a network interface
1655 * @netdev: network interface device structure
1657 * Returns 0, this is not allowed to fail
1659 * The close entry point is called when an interface is de-activated
1660 * by the OS. The hardware is still under the driver's control, but
1661 * needs to be disabled. A global MAC reset is issued to stop the
1662 * hardware, and all transmit and receive resources are freed.
1664 static int igb_close(struct net_device
*netdev
)
1666 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1668 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1671 igb_free_irq(adapter
);
1673 igb_free_all_tx_resources(adapter
);
1674 igb_free_all_rx_resources(adapter
);
1676 /* kill manageability vlan ID if supported, but not if a vlan with
1677 * the same ID is registered on the host OS (let 8021q kill it) */
1678 if ((adapter
->hw
.mng_cookie
.status
&
1679 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1681 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1682 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1688 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1689 * @adapter: board private structure
1690 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1692 * Return 0 on success, negative on failure
1694 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1695 struct igb_ring
*tx_ring
)
1697 struct pci_dev
*pdev
= adapter
->pdev
;
1700 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1701 tx_ring
->buffer_info
= vmalloc(size
);
1702 if (!tx_ring
->buffer_info
)
1704 memset(tx_ring
->buffer_info
, 0, size
);
1706 /* round up to nearest 4K */
1707 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
1708 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1710 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1716 tx_ring
->adapter
= adapter
;
1717 tx_ring
->next_to_use
= 0;
1718 tx_ring
->next_to_clean
= 0;
1722 vfree(tx_ring
->buffer_info
);
1723 dev_err(&adapter
->pdev
->dev
,
1724 "Unable to allocate memory for the transmit descriptor ring\n");
1729 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1730 * (Descriptors) for all queues
1731 * @adapter: board private structure
1733 * Return 0 on success, negative on failure
1735 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1740 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1741 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1743 dev_err(&adapter
->pdev
->dev
,
1744 "Allocation for Tx Queue %u failed\n", i
);
1745 for (i
--; i
>= 0; i
--)
1746 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1751 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1752 r_idx
= i
% adapter
->num_tx_queues
;
1753 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1759 * igb_configure_tx - Configure transmit Unit after Reset
1760 * @adapter: board private structure
1762 * Configure the Tx unit of the MAC after a reset.
1764 static void igb_configure_tx(struct igb_adapter
*adapter
)
1767 struct e1000_hw
*hw
= &adapter
->hw
;
1772 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1773 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1775 wr32(E1000_TDLEN(j
),
1776 ring
->count
* sizeof(struct e1000_tx_desc
));
1778 wr32(E1000_TDBAL(j
),
1779 tdba
& 0x00000000ffffffffULL
);
1780 wr32(E1000_TDBAH(j
), tdba
>> 32);
1782 ring
->head
= E1000_TDH(j
);
1783 ring
->tail
= E1000_TDT(j
);
1784 writel(0, hw
->hw_addr
+ ring
->tail
);
1785 writel(0, hw
->hw_addr
+ ring
->head
);
1786 txdctl
= rd32(E1000_TXDCTL(j
));
1787 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1788 wr32(E1000_TXDCTL(j
), txdctl
);
1790 /* Turn off Relaxed Ordering on head write-backs. The
1791 * writebacks MUST be delivered in order or it will
1792 * completely screw up our bookeeping.
1794 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1795 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1796 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1799 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1801 /* Program the Transmit Control Register */
1803 tctl
= rd32(E1000_TCTL
);
1804 tctl
&= ~E1000_TCTL_CT
;
1805 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1806 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1808 igb_config_collision_dist(hw
);
1810 /* Setup Transmit Descriptor Settings for eop descriptor */
1811 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1813 /* Enable transmits */
1814 tctl
|= E1000_TCTL_EN
;
1816 wr32(E1000_TCTL
, tctl
);
1820 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1821 * @adapter: board private structure
1822 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1824 * Returns 0 on success, negative on failure
1826 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1827 struct igb_ring
*rx_ring
)
1829 struct pci_dev
*pdev
= adapter
->pdev
;
1832 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1833 rx_ring
->buffer_info
= vmalloc(size
);
1834 if (!rx_ring
->buffer_info
)
1836 memset(rx_ring
->buffer_info
, 0, size
);
1838 desc_len
= sizeof(union e1000_adv_rx_desc
);
1840 /* Round up to nearest 4K */
1841 rx_ring
->size
= rx_ring
->count
* desc_len
;
1842 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1844 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1850 rx_ring
->next_to_clean
= 0;
1851 rx_ring
->next_to_use
= 0;
1853 rx_ring
->adapter
= adapter
;
1858 vfree(rx_ring
->buffer_info
);
1859 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1860 "the receive descriptor ring\n");
1865 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1866 * (Descriptors) for all queues
1867 * @adapter: board private structure
1869 * Return 0 on success, negative on failure
1871 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1875 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1876 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1878 dev_err(&adapter
->pdev
->dev
,
1879 "Allocation for Rx Queue %u failed\n", i
);
1880 for (i
--; i
>= 0; i
--)
1881 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1890 * igb_setup_rctl - configure the receive control registers
1891 * @adapter: Board private structure
1893 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1895 struct e1000_hw
*hw
= &adapter
->hw
;
1900 rctl
= rd32(E1000_RCTL
);
1902 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1903 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1905 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1906 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1909 * enable stripping of CRC. It's unlikely this will break BMC
1910 * redirection as it did with e1000. Newer features require
1911 * that the HW strips the CRC.
1913 rctl
|= E1000_RCTL_SECRC
;
1916 * disable store bad packets and clear size bits.
1918 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1920 /* enable LPE when to prevent packets larger than max_frame_size */
1921 rctl
|= E1000_RCTL_LPE
;
1923 /* Setup buffer sizes */
1924 switch (adapter
->rx_buffer_len
) {
1925 case IGB_RXBUFFER_256
:
1926 rctl
|= E1000_RCTL_SZ_256
;
1928 case IGB_RXBUFFER_512
:
1929 rctl
|= E1000_RCTL_SZ_512
;
1932 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1933 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1937 /* 82575 and greater support packet-split where the protocol
1938 * header is placed in skb->data and the packet data is
1939 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1940 * In the case of a non-split, skb->data is linearly filled,
1941 * followed by the page buffers. Therefore, skb->data is
1942 * sized to hold the largest protocol header.
1944 /* allocations using alloc_page take too long for regular MTU
1945 * so only enable packet split for jumbo frames */
1946 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
1947 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1948 srrctl
|= adapter
->rx_ps_hdr_size
<<
1949 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1950 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1952 adapter
->rx_ps_hdr_size
= 0;
1953 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1956 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1957 j
= adapter
->rx_ring
[i
].reg_idx
;
1958 wr32(E1000_SRRCTL(j
), srrctl
);
1961 wr32(E1000_RCTL
, rctl
);
1965 * igb_configure_rx - Configure receive Unit after Reset
1966 * @adapter: board private structure
1968 * Configure the Rx unit of the MAC after a reset.
1970 static void igb_configure_rx(struct igb_adapter
*adapter
)
1973 struct e1000_hw
*hw
= &adapter
->hw
;
1978 /* disable receives while setting up the descriptors */
1979 rctl
= rd32(E1000_RCTL
);
1980 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1984 if (adapter
->itr_setting
> 3)
1985 wr32(E1000_ITR
, adapter
->itr
);
1987 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1988 * the Base and Length of the Rx Descriptor Ring */
1989 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1990 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
1993 wr32(E1000_RDBAL(j
),
1994 rdba
& 0x00000000ffffffffULL
);
1995 wr32(E1000_RDBAH(j
), rdba
>> 32);
1996 wr32(E1000_RDLEN(j
),
1997 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1999 ring
->head
= E1000_RDH(j
);
2000 ring
->tail
= E1000_RDT(j
);
2001 writel(0, hw
->hw_addr
+ ring
->tail
);
2002 writel(0, hw
->hw_addr
+ ring
->head
);
2004 rxdctl
= rd32(E1000_RXDCTL(j
));
2005 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2006 rxdctl
&= 0xFFF00000;
2007 rxdctl
|= IGB_RX_PTHRESH
;
2008 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2009 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2010 wr32(E1000_RXDCTL(j
), rxdctl
);
2013 if (adapter
->num_rx_queues
> 1) {
2022 get_random_bytes(&random
[0], 40);
2024 if (hw
->mac
.type
>= e1000_82576
)
2028 for (j
= 0; j
< (32 * 4); j
++) {
2030 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2033 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2035 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2037 /* Fill out hash function seeds */
2038 for (j
= 0; j
< 10; j
++)
2039 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2041 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2042 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2043 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2044 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2045 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2046 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2047 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2048 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2051 wr32(E1000_MRQC
, mrqc
);
2053 /* Multiqueue and raw packet checksumming are mutually
2054 * exclusive. Note that this not the same as TCP/IP
2055 * checksumming, which works fine. */
2056 rxcsum
= rd32(E1000_RXCSUM
);
2057 rxcsum
|= E1000_RXCSUM_PCSD
;
2058 wr32(E1000_RXCSUM
, rxcsum
);
2060 /* Enable Receive Checksum Offload for TCP and UDP */
2061 rxcsum
= rd32(E1000_RXCSUM
);
2062 if (adapter
->rx_csum
) {
2063 rxcsum
|= E1000_RXCSUM_TUOFL
;
2065 /* Enable IPv4 payload checksum for UDP fragments
2066 * Must be used in conjunction with packet-split. */
2067 if (adapter
->rx_ps_hdr_size
)
2068 rxcsum
|= E1000_RXCSUM_IPPCSE
;
2070 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
2071 /* don't need to clear IPPCSE as it defaults to 0 */
2073 wr32(E1000_RXCSUM
, rxcsum
);
2078 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
2080 wr32(E1000_RLPML
, adapter
->max_frame_size
);
2082 /* Enable Receives */
2083 wr32(E1000_RCTL
, rctl
);
2087 * igb_free_tx_resources - Free Tx Resources per Queue
2088 * @tx_ring: Tx descriptor ring for a specific queue
2090 * Free all transmit software resources
2092 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2094 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2096 igb_clean_tx_ring(tx_ring
);
2098 vfree(tx_ring
->buffer_info
);
2099 tx_ring
->buffer_info
= NULL
;
2101 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2103 tx_ring
->desc
= NULL
;
2107 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2108 * @adapter: board private structure
2110 * Free all transmit software resources
2112 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2116 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2117 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2120 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2121 struct igb_buffer
*buffer_info
)
2123 if (buffer_info
->dma
) {
2124 pci_unmap_page(adapter
->pdev
,
2126 buffer_info
->length
,
2128 buffer_info
->dma
= 0;
2130 if (buffer_info
->skb
) {
2131 dev_kfree_skb_any(buffer_info
->skb
);
2132 buffer_info
->skb
= NULL
;
2134 buffer_info
->time_stamp
= 0;
2135 buffer_info
->next_to_watch
= 0;
2136 /* buffer_info must be completely set up in the transmit path */
2140 * igb_clean_tx_ring - Free Tx Buffers
2141 * @tx_ring: ring to be cleaned
2143 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2145 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2146 struct igb_buffer
*buffer_info
;
2150 if (!tx_ring
->buffer_info
)
2152 /* Free all the Tx ring sk_buffs */
2154 for (i
= 0; i
< tx_ring
->count
; i
++) {
2155 buffer_info
= &tx_ring
->buffer_info
[i
];
2156 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2159 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2160 memset(tx_ring
->buffer_info
, 0, size
);
2162 /* Zero out the descriptor ring */
2164 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2166 tx_ring
->next_to_use
= 0;
2167 tx_ring
->next_to_clean
= 0;
2169 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2170 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2174 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2175 * @adapter: board private structure
2177 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2181 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2182 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2186 * igb_free_rx_resources - Free Rx Resources
2187 * @rx_ring: ring to clean the resources from
2189 * Free all receive software resources
2191 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2193 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2195 igb_clean_rx_ring(rx_ring
);
2197 vfree(rx_ring
->buffer_info
);
2198 rx_ring
->buffer_info
= NULL
;
2200 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2202 rx_ring
->desc
= NULL
;
2206 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2207 * @adapter: board private structure
2209 * Free all receive software resources
2211 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2215 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2216 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2220 * igb_clean_rx_ring - Free Rx Buffers per Queue
2221 * @rx_ring: ring to free buffers from
2223 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2225 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2226 struct igb_buffer
*buffer_info
;
2227 struct pci_dev
*pdev
= adapter
->pdev
;
2231 if (!rx_ring
->buffer_info
)
2233 /* Free all the Rx ring sk_buffs */
2234 for (i
= 0; i
< rx_ring
->count
; i
++) {
2235 buffer_info
= &rx_ring
->buffer_info
[i
];
2236 if (buffer_info
->dma
) {
2237 if (adapter
->rx_ps_hdr_size
)
2238 pci_unmap_single(pdev
, buffer_info
->dma
,
2239 adapter
->rx_ps_hdr_size
,
2240 PCI_DMA_FROMDEVICE
);
2242 pci_unmap_single(pdev
, buffer_info
->dma
,
2243 adapter
->rx_buffer_len
,
2244 PCI_DMA_FROMDEVICE
);
2245 buffer_info
->dma
= 0;
2248 if (buffer_info
->skb
) {
2249 dev_kfree_skb(buffer_info
->skb
);
2250 buffer_info
->skb
= NULL
;
2252 if (buffer_info
->page
) {
2253 if (buffer_info
->page_dma
)
2254 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2256 PCI_DMA_FROMDEVICE
);
2257 put_page(buffer_info
->page
);
2258 buffer_info
->page
= NULL
;
2259 buffer_info
->page_dma
= 0;
2260 buffer_info
->page_offset
= 0;
2264 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2265 memset(rx_ring
->buffer_info
, 0, size
);
2267 /* Zero out the descriptor ring */
2268 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2270 rx_ring
->next_to_clean
= 0;
2271 rx_ring
->next_to_use
= 0;
2273 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2274 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2278 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2279 * @adapter: board private structure
2281 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2285 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2286 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2290 * igb_set_mac - Change the Ethernet Address of the NIC
2291 * @netdev: network interface device structure
2292 * @p: pointer to an address structure
2294 * Returns 0 on success, negative on failure
2296 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2298 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2299 struct e1000_hw
*hw
= &adapter
->hw
;
2300 struct sockaddr
*addr
= p
;
2302 if (!is_valid_ether_addr(addr
->sa_data
))
2303 return -EADDRNOTAVAIL
;
2305 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2306 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2308 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2314 * igb_set_multi - Multicast and Promiscuous mode set
2315 * @netdev: network interface device structure
2317 * The set_multi entry point is called whenever the multicast address
2318 * list or the network interface flags are updated. This routine is
2319 * responsible for configuring the hardware for proper multicast,
2320 * promiscuous mode, and all-multi behavior.
2322 static void igb_set_multi(struct net_device
*netdev
)
2324 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2325 struct e1000_hw
*hw
= &adapter
->hw
;
2326 struct e1000_mac_info
*mac
= &hw
->mac
;
2327 struct dev_mc_list
*mc_ptr
;
2332 /* Check for Promiscuous and All Multicast modes */
2334 rctl
= rd32(E1000_RCTL
);
2336 if (netdev
->flags
& IFF_PROMISC
) {
2337 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2338 rctl
&= ~E1000_RCTL_VFE
;
2340 if (netdev
->flags
& IFF_ALLMULTI
) {
2341 rctl
|= E1000_RCTL_MPE
;
2342 rctl
&= ~E1000_RCTL_UPE
;
2344 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2345 rctl
|= E1000_RCTL_VFE
;
2347 wr32(E1000_RCTL
, rctl
);
2349 if (!netdev
->mc_count
) {
2350 /* nothing to program, so clear mc list */
2351 igb_update_mc_addr_list(hw
, NULL
, 0, 1,
2352 mac
->rar_entry_count
);
2356 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2360 /* The shared function expects a packed array of only addresses. */
2361 mc_ptr
= netdev
->mc_list
;
2363 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2366 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2367 mc_ptr
= mc_ptr
->next
;
2369 igb_update_mc_addr_list(hw
, mta_list
, i
, 1, mac
->rar_entry_count
);
2373 /* Need to wait a few seconds after link up to get diagnostic information from
2375 static void igb_update_phy_info(unsigned long data
)
2377 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2378 igb_get_phy_info(&adapter
->hw
);
2382 * igb_has_link - check shared code for link and determine up/down
2383 * @adapter: pointer to driver private info
2385 static bool igb_has_link(struct igb_adapter
*adapter
)
2387 struct e1000_hw
*hw
= &adapter
->hw
;
2388 bool link_active
= false;
2391 /* get_link_status is set on LSC (link status) interrupt or
2392 * rx sequence error interrupt. get_link_status will stay
2393 * false until the e1000_check_for_link establishes link
2394 * for copper adapters ONLY
2396 switch (hw
->phy
.media_type
) {
2397 case e1000_media_type_copper
:
2398 if (hw
->mac
.get_link_status
) {
2399 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2400 link_active
= !hw
->mac
.get_link_status
;
2405 case e1000_media_type_fiber
:
2406 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2407 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2409 case e1000_media_type_internal_serdes
:
2410 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2411 link_active
= hw
->mac
.serdes_has_link
;
2414 case e1000_media_type_unknown
:
2422 * igb_watchdog - Timer Call-back
2423 * @data: pointer to adapter cast into an unsigned long
2425 static void igb_watchdog(unsigned long data
)
2427 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2428 /* Do the rest outside of interrupt context */
2429 schedule_work(&adapter
->watchdog_task
);
2432 static void igb_watchdog_task(struct work_struct
*work
)
2434 struct igb_adapter
*adapter
= container_of(work
,
2435 struct igb_adapter
, watchdog_task
);
2436 struct e1000_hw
*hw
= &adapter
->hw
;
2437 struct net_device
*netdev
= adapter
->netdev
;
2438 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2443 link
= igb_has_link(adapter
);
2444 if ((netif_carrier_ok(netdev
)) && link
)
2448 if (!netif_carrier_ok(netdev
)) {
2450 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2451 &adapter
->link_speed
,
2452 &adapter
->link_duplex
);
2454 ctrl
= rd32(E1000_CTRL
);
2455 /* Links status message must follow this format */
2456 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2457 "Flow Control: %s\n",
2459 adapter
->link_speed
,
2460 adapter
->link_duplex
== FULL_DUPLEX
?
2461 "Full Duplex" : "Half Duplex",
2462 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2463 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2464 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2465 E1000_CTRL_TFCE
) ? "TX" : "None")));
2467 /* tweak tx_queue_len according to speed/duplex and
2468 * adjust the timeout factor */
2469 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2470 adapter
->tx_timeout_factor
= 1;
2471 switch (adapter
->link_speed
) {
2473 netdev
->tx_queue_len
= 10;
2474 adapter
->tx_timeout_factor
= 14;
2477 netdev
->tx_queue_len
= 100;
2478 /* maybe add some timeout factor ? */
2482 netif_carrier_on(netdev
);
2483 netif_tx_wake_all_queues(netdev
);
2485 /* link state has changed, schedule phy info update */
2486 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2487 mod_timer(&adapter
->phy_info_timer
,
2488 round_jiffies(jiffies
+ 2 * HZ
));
2491 if (netif_carrier_ok(netdev
)) {
2492 adapter
->link_speed
= 0;
2493 adapter
->link_duplex
= 0;
2494 /* Links status message must follow this format */
2495 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2497 netif_carrier_off(netdev
);
2498 netif_tx_stop_all_queues(netdev
);
2500 /* link state has changed, schedule phy info update */
2501 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2502 mod_timer(&adapter
->phy_info_timer
,
2503 round_jiffies(jiffies
+ 2 * HZ
));
2508 igb_update_stats(adapter
);
2510 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2511 adapter
->tpt_old
= adapter
->stats
.tpt
;
2512 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2513 adapter
->colc_old
= adapter
->stats
.colc
;
2515 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2516 adapter
->gorc_old
= adapter
->stats
.gorc
;
2517 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2518 adapter
->gotc_old
= adapter
->stats
.gotc
;
2520 igb_update_adaptive(&adapter
->hw
);
2522 if (!netif_carrier_ok(netdev
)) {
2523 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2524 /* We've lost link, so the controller stops DMA,
2525 * but we've got queued Tx work that's never going
2526 * to get done, so reset controller to flush Tx.
2527 * (Do the reset outside of interrupt context). */
2528 adapter
->tx_timeout_count
++;
2529 schedule_work(&adapter
->reset_task
);
2533 /* Cause software interrupt to ensure rx ring is cleaned */
2534 if (adapter
->msix_entries
) {
2535 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2536 eics
|= adapter
->rx_ring
[i
].eims_value
;
2537 wr32(E1000_EICS
, eics
);
2539 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2542 /* Force detection of hung controller every watchdog period */
2543 tx_ring
->detect_tx_hung
= true;
2545 /* Reset the timer */
2546 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2547 mod_timer(&adapter
->watchdog_timer
,
2548 round_jiffies(jiffies
+ 2 * HZ
));
2551 enum latency_range
{
2555 latency_invalid
= 255
2560 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2562 * Stores a new ITR value based on strictly on packet size. This
2563 * algorithm is less sophisticated than that used in igb_update_itr,
2564 * due to the difficulty of synchronizing statistics across multiple
2565 * receive rings. The divisors and thresholds used by this fuction
2566 * were determined based on theoretical maximum wire speed and testing
2567 * data, in order to minimize response time while increasing bulk
2569 * This functionality is controlled by the InterruptThrottleRate module
2570 * parameter (see igb_param.c)
2571 * NOTE: This function is called only when operating in a multiqueue
2572 * receive environment.
2573 * @rx_ring: pointer to ring
2575 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2577 int new_val
= rx_ring
->itr_val
;
2578 int avg_wire_size
= 0;
2579 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2581 if (!rx_ring
->total_packets
)
2582 goto clear_counts
; /* no packets, so don't do anything */
2584 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2585 * ints/sec - ITR timer value of 120 ticks.
2587 if (adapter
->link_speed
!= SPEED_1000
) {
2591 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2593 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2594 avg_wire_size
+= 24;
2596 /* Don't starve jumbo frames */
2597 avg_wire_size
= min(avg_wire_size
, 3000);
2599 /* Give a little boost to mid-size frames */
2600 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2601 new_val
= avg_wire_size
/ 3;
2603 new_val
= avg_wire_size
/ 2;
2606 if (new_val
!= rx_ring
->itr_val
) {
2607 rx_ring
->itr_val
= new_val
;
2608 rx_ring
->set_itr
= 1;
2611 rx_ring
->total_bytes
= 0;
2612 rx_ring
->total_packets
= 0;
2616 * igb_update_itr - update the dynamic ITR value based on statistics
2617 * Stores a new ITR value based on packets and byte
2618 * counts during the last interrupt. The advantage of per interrupt
2619 * computation is faster updates and more accurate ITR for the current
2620 * traffic pattern. Constants in this function were computed
2621 * based on theoretical maximum wire speed and thresholds were set based
2622 * on testing data as well as attempting to minimize response time
2623 * while increasing bulk throughput.
2624 * this functionality is controlled by the InterruptThrottleRate module
2625 * parameter (see igb_param.c)
2626 * NOTE: These calculations are only valid when operating in a single-
2627 * queue environment.
2628 * @adapter: pointer to adapter
2629 * @itr_setting: current adapter->itr
2630 * @packets: the number of packets during this measurement interval
2631 * @bytes: the number of bytes during this measurement interval
2633 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2634 int packets
, int bytes
)
2636 unsigned int retval
= itr_setting
;
2639 goto update_itr_done
;
2641 switch (itr_setting
) {
2642 case lowest_latency
:
2643 /* handle TSO and jumbo frames */
2644 if (bytes
/packets
> 8000)
2645 retval
= bulk_latency
;
2646 else if ((packets
< 5) && (bytes
> 512))
2647 retval
= low_latency
;
2649 case low_latency
: /* 50 usec aka 20000 ints/s */
2650 if (bytes
> 10000) {
2651 /* this if handles the TSO accounting */
2652 if (bytes
/packets
> 8000) {
2653 retval
= bulk_latency
;
2654 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2655 retval
= bulk_latency
;
2656 } else if ((packets
> 35)) {
2657 retval
= lowest_latency
;
2659 } else if (bytes
/packets
> 2000) {
2660 retval
= bulk_latency
;
2661 } else if (packets
<= 2 && bytes
< 512) {
2662 retval
= lowest_latency
;
2665 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2666 if (bytes
> 25000) {
2668 retval
= low_latency
;
2669 } else if (bytes
< 1500) {
2670 retval
= low_latency
;
2679 static void igb_set_itr(struct igb_adapter
*adapter
)
2682 u32 new_itr
= adapter
->itr
;
2684 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2685 if (adapter
->link_speed
!= SPEED_1000
) {
2691 adapter
->rx_itr
= igb_update_itr(adapter
,
2693 adapter
->rx_ring
->total_packets
,
2694 adapter
->rx_ring
->total_bytes
);
2696 if (adapter
->rx_ring
->buddy
) {
2697 adapter
->tx_itr
= igb_update_itr(adapter
,
2699 adapter
->tx_ring
->total_packets
,
2700 adapter
->tx_ring
->total_bytes
);
2701 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2703 current_itr
= adapter
->rx_itr
;
2706 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2707 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2708 current_itr
= low_latency
;
2710 switch (current_itr
) {
2711 /* counts and packets in update_itr are dependent on these numbers */
2712 case lowest_latency
:
2716 new_itr
= 20000; /* aka hwitr = ~200 */
2726 adapter
->rx_ring
->total_bytes
= 0;
2727 adapter
->rx_ring
->total_packets
= 0;
2728 if (adapter
->rx_ring
->buddy
) {
2729 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2730 adapter
->rx_ring
->buddy
->total_packets
= 0;
2733 if (new_itr
!= adapter
->itr
) {
2734 /* this attempts to bias the interrupt rate towards Bulk
2735 * by adding intermediate steps when interrupt rate is
2737 new_itr
= new_itr
> adapter
->itr
?
2738 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2740 /* Don't write the value here; it resets the adapter's
2741 * internal timer, and causes us to delay far longer than
2742 * we should between interrupts. Instead, we write the ITR
2743 * value at the beginning of the next interrupt so the timing
2744 * ends up being correct.
2746 adapter
->itr
= new_itr
;
2747 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2748 adapter
->rx_ring
->set_itr
= 1;
2755 #define IGB_TX_FLAGS_CSUM 0x00000001
2756 #define IGB_TX_FLAGS_VLAN 0x00000002
2757 #define IGB_TX_FLAGS_TSO 0x00000004
2758 #define IGB_TX_FLAGS_IPV4 0x00000008
2759 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2760 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2761 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2763 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2764 struct igb_ring
*tx_ring
,
2765 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2767 struct e1000_adv_tx_context_desc
*context_desc
;
2770 struct igb_buffer
*buffer_info
;
2771 u32 info
= 0, tu_cmd
= 0;
2772 u32 mss_l4len_idx
, l4len
;
2775 if (skb_header_cloned(skb
)) {
2776 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2781 l4len
= tcp_hdrlen(skb
);
2784 if (skb
->protocol
== htons(ETH_P_IP
)) {
2785 struct iphdr
*iph
= ip_hdr(skb
);
2788 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2792 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2793 ipv6_hdr(skb
)->payload_len
= 0;
2794 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2795 &ipv6_hdr(skb
)->daddr
,
2799 i
= tx_ring
->next_to_use
;
2801 buffer_info
= &tx_ring
->buffer_info
[i
];
2802 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2803 /* VLAN MACLEN IPLEN */
2804 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2805 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2806 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2807 *hdr_len
+= skb_network_offset(skb
);
2808 info
|= skb_network_header_len(skb
);
2809 *hdr_len
+= skb_network_header_len(skb
);
2810 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2812 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2813 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2815 if (skb
->protocol
== htons(ETH_P_IP
))
2816 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2817 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2819 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2822 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2823 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2825 /* For 82575, context index must be unique per ring. */
2826 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2827 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2829 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2830 context_desc
->seqnum_seed
= 0;
2832 buffer_info
->time_stamp
= jiffies
;
2833 buffer_info
->next_to_watch
= i
;
2834 buffer_info
->dma
= 0;
2836 if (i
== tx_ring
->count
)
2839 tx_ring
->next_to_use
= i
;
2844 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2845 struct igb_ring
*tx_ring
,
2846 struct sk_buff
*skb
, u32 tx_flags
)
2848 struct e1000_adv_tx_context_desc
*context_desc
;
2850 struct igb_buffer
*buffer_info
;
2851 u32 info
= 0, tu_cmd
= 0;
2853 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2854 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2855 i
= tx_ring
->next_to_use
;
2856 buffer_info
= &tx_ring
->buffer_info
[i
];
2857 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2859 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2860 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2861 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2862 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2863 info
|= skb_network_header_len(skb
);
2865 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2867 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2869 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2870 switch (skb
->protocol
) {
2871 case cpu_to_be16(ETH_P_IP
):
2872 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2873 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2874 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2876 case cpu_to_be16(ETH_P_IPV6
):
2877 /* XXX what about other V6 headers?? */
2878 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2879 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2882 if (unlikely(net_ratelimit()))
2883 dev_warn(&adapter
->pdev
->dev
,
2884 "partial checksum but proto=%x!\n",
2890 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2891 context_desc
->seqnum_seed
= 0;
2892 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2893 context_desc
->mss_l4len_idx
=
2894 cpu_to_le32(tx_ring
->queue_index
<< 4);
2896 context_desc
->mss_l4len_idx
= 0;
2898 buffer_info
->time_stamp
= jiffies
;
2899 buffer_info
->next_to_watch
= i
;
2900 buffer_info
->dma
= 0;
2903 if (i
== tx_ring
->count
)
2905 tx_ring
->next_to_use
= i
;
2912 #define IGB_MAX_TXD_PWR 16
2913 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2915 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2916 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2919 struct igb_buffer
*buffer_info
;
2920 unsigned int len
= skb_headlen(skb
);
2921 unsigned int count
= 0, i
;
2924 i
= tx_ring
->next_to_use
;
2926 buffer_info
= &tx_ring
->buffer_info
[i
];
2927 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2928 buffer_info
->length
= len
;
2929 /* set time_stamp *before* dma to help avoid a possible race */
2930 buffer_info
->time_stamp
= jiffies
;
2931 buffer_info
->next_to_watch
= i
;
2932 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2936 if (i
== tx_ring
->count
)
2939 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2940 struct skb_frag_struct
*frag
;
2942 frag
= &skb_shinfo(skb
)->frags
[f
];
2945 buffer_info
= &tx_ring
->buffer_info
[i
];
2946 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2947 buffer_info
->length
= len
;
2948 buffer_info
->time_stamp
= jiffies
;
2949 buffer_info
->next_to_watch
= i
;
2950 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2958 if (i
== tx_ring
->count
)
2962 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2963 tx_ring
->buffer_info
[i
].skb
= skb
;
2964 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2969 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2970 struct igb_ring
*tx_ring
,
2971 int tx_flags
, int count
, u32 paylen
,
2974 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2975 struct igb_buffer
*buffer_info
;
2976 u32 olinfo_status
= 0, cmd_type_len
;
2979 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2980 E1000_ADVTXD_DCMD_DEXT
);
2982 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2983 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2985 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
2986 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
2988 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2989 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2991 /* insert tcp checksum */
2992 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2994 /* insert ip checksum */
2995 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2996 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2998 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2999 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3002 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3003 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3004 IGB_TX_FLAGS_VLAN
)))
3005 olinfo_status
|= tx_ring
->queue_index
<< 4;
3007 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3009 i
= tx_ring
->next_to_use
;
3011 buffer_info
= &tx_ring
->buffer_info
[i
];
3012 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3013 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3014 tx_desc
->read
.cmd_type_len
=
3015 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3016 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3018 if (i
== tx_ring
->count
)
3022 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3023 /* Force memory writes to complete before letting h/w
3024 * know there are new descriptors to fetch. (Only
3025 * applicable for weak-ordered memory model archs,
3026 * such as IA-64). */
3029 tx_ring
->next_to_use
= i
;
3030 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3031 /* we need this if more than one processor can write to our tail
3032 * at a time, it syncronizes IO on IA64/Altix systems */
3036 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3037 struct igb_ring
*tx_ring
, int size
)
3039 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3041 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3043 /* Herbert's original patch had:
3044 * smp_mb__after_netif_stop_queue();
3045 * but since that doesn't exist yet, just open code it. */
3048 /* We need to check again in a case another CPU has just
3049 * made room available. */
3050 if (IGB_DESC_UNUSED(tx_ring
) < size
)
3054 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3055 ++adapter
->restart_queue
;
3059 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3060 struct igb_ring
*tx_ring
, int size
)
3062 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
3064 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3067 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
3069 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3070 struct net_device
*netdev
,
3071 struct igb_ring
*tx_ring
)
3073 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3075 unsigned int tx_flags
= 0;
3078 union skb_shared_tx
*shtx
;
3080 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3081 dev_kfree_skb_any(skb
);
3082 return NETDEV_TX_OK
;
3085 if (skb
->len
<= 0) {
3086 dev_kfree_skb_any(skb
);
3087 return NETDEV_TX_OK
;
3090 /* need: 1 descriptor per page,
3091 * + 2 desc gap to keep tail from touching head,
3092 * + 1 desc for skb->data,
3093 * + 1 desc for context descriptor,
3094 * otherwise try next time */
3095 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3096 /* this is a hard error */
3097 return NETDEV_TX_BUSY
;
3101 * TODO: check that there currently is no other packet with
3102 * time stamping in the queue
3104 * When doing time stamping, keep the connection to the socket
3105 * a while longer: it is still needed by skb_hwtstamp_tx(),
3106 * called either in igb_tx_hwtstamp() or by our caller when
3107 * doing software time stamping.
3110 if (unlikely(shtx
->hardware
)) {
3111 shtx
->in_progress
= 1;
3112 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3113 } else if (likely(!shtx
->software
)) {
3115 * TODO: can this be solved in dev.c:dev_hard_start_xmit()?
3116 * There are probably unmodified driver which do something
3117 * like this and thus don't work in combination with
3118 * SOF_TIMESTAMPING_TX_SOFTWARE.
3123 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3124 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3125 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3128 if (skb
->protocol
== htons(ETH_P_IP
))
3129 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3131 first
= tx_ring
->next_to_use
;
3132 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3136 dev_kfree_skb_any(skb
);
3137 return NETDEV_TX_OK
;
3141 tx_flags
|= IGB_TX_FLAGS_TSO
;
3142 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
))
3143 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3144 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3146 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3147 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3150 netdev
->trans_start
= jiffies
;
3152 /* Make sure there is space in the ring for the next send. */
3153 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3155 return NETDEV_TX_OK
;
3158 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3160 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3161 struct igb_ring
*tx_ring
;
3164 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3165 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3167 /* This goes back to the question of how to logically map a tx queue
3168 * to a flow. Right now, performance is impacted slightly negatively
3169 * if using multiple tx queues. If the stack breaks away from a
3170 * single qdisc implementation, we can look at this again. */
3171 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3175 * igb_tx_timeout - Respond to a Tx Hang
3176 * @netdev: network interface device structure
3178 static void igb_tx_timeout(struct net_device
*netdev
)
3180 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3181 struct e1000_hw
*hw
= &adapter
->hw
;
3183 /* Do the reset outside of interrupt context */
3184 adapter
->tx_timeout_count
++;
3185 schedule_work(&adapter
->reset_task
);
3187 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3190 static void igb_reset_task(struct work_struct
*work
)
3192 struct igb_adapter
*adapter
;
3193 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3195 igb_reinit_locked(adapter
);
3199 * igb_get_stats - Get System Network Statistics
3200 * @netdev: network interface device structure
3202 * Returns the address of the device statistics structure.
3203 * The statistics are actually updated from the timer callback.
3205 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3207 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3209 /* only return the current stats */
3210 return &adapter
->net_stats
;
3214 * igb_change_mtu - Change the Maximum Transfer Unit
3215 * @netdev: network interface device structure
3216 * @new_mtu: new value for maximum frame size
3218 * Returns 0 on success, negative on failure
3220 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3222 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3223 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3225 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3226 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3227 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3231 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3232 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3233 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3237 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3240 /* igb_down has a dependency on max_frame_size */
3241 adapter
->max_frame_size
= max_frame
;
3242 if (netif_running(netdev
))
3245 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3246 * means we reserve 2 more, this pushes us to allocate from the next
3248 * i.e. RXBUFFER_2048 --> size-4096 slab
3251 if (max_frame
<= IGB_RXBUFFER_256
)
3252 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3253 else if (max_frame
<= IGB_RXBUFFER_512
)
3254 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3255 else if (max_frame
<= IGB_RXBUFFER_1024
)
3256 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3257 else if (max_frame
<= IGB_RXBUFFER_2048
)
3258 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3260 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3261 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3263 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3265 /* adjust allocation if LPE protects us, and we aren't using SBP */
3266 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3267 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3268 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3270 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3271 netdev
->mtu
, new_mtu
);
3272 netdev
->mtu
= new_mtu
;
3274 if (netif_running(netdev
))
3279 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3285 * igb_update_stats - Update the board statistics counters
3286 * @adapter: board private structure
3289 void igb_update_stats(struct igb_adapter
*adapter
)
3291 struct e1000_hw
*hw
= &adapter
->hw
;
3292 struct pci_dev
*pdev
= adapter
->pdev
;
3295 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3298 * Prevent stats update while adapter is being reset, or if the pci
3299 * connection is down.
3301 if (adapter
->link_speed
== 0)
3303 if (pci_channel_offline(pdev
))
3306 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3307 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3308 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3309 rd32(E1000_GORCH
); /* clear GORCL */
3310 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3311 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3312 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3314 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3315 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3316 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3317 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3318 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3319 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3320 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3321 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3323 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3324 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3325 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3326 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3327 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3328 adapter
->stats
.dc
+= rd32(E1000_DC
);
3329 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3330 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3331 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3332 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3333 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3334 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3335 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3336 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3337 rd32(E1000_GOTCH
); /* clear GOTCL */
3338 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3339 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3340 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3341 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3342 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3343 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3344 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3346 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3347 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3348 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3349 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3350 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3351 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3353 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3354 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3356 /* used for adaptive IFS */
3358 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3359 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3360 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3361 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3363 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3364 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3365 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3366 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3367 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3369 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3370 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3371 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3372 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3373 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3374 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3375 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3376 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3377 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3379 /* Fill out the OS statistics structure */
3380 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3381 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3385 /* RLEC on some newer hardware can be incorrect so build
3386 * our own version based on RUC and ROC */
3387 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3388 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3389 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3390 adapter
->stats
.cexterr
;
3391 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3393 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3394 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3395 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3398 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3399 adapter
->stats
.latecol
;
3400 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3401 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3402 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3404 /* Tx Dropped needs to be maintained elsewhere */
3407 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3408 if ((adapter
->link_speed
== SPEED_1000
) &&
3409 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3410 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3411 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3415 /* Management Stats */
3416 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3417 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3418 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3421 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3423 struct net_device
*netdev
= data
;
3424 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3425 struct e1000_hw
*hw
= &adapter
->hw
;
3426 u32 icr
= rd32(E1000_ICR
);
3428 /* reading ICR causes bit 31 of EICR to be cleared */
3430 if(icr
& E1000_ICR_DOUTSYNC
) {
3431 /* HW is reporting DMA is out of sync */
3432 adapter
->stats
.doosync
++;
3434 if (!(icr
& E1000_ICR_LSC
))
3435 goto no_link_interrupt
;
3436 hw
->mac
.get_link_status
= 1;
3437 /* guard against interrupt when we're going down */
3438 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3439 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3442 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
3443 wr32(E1000_EIMS
, adapter
->eims_other
);
3448 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3450 struct igb_ring
*tx_ring
= data
;
3451 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3452 struct e1000_hw
*hw
= &adapter
->hw
;
3454 #ifdef CONFIG_IGB_DCA
3455 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3456 igb_update_tx_dca(tx_ring
);
3459 tx_ring
->total_bytes
= 0;
3460 tx_ring
->total_packets
= 0;
3462 /* auto mask will automatically reenable the interrupt when we write
3464 if (!igb_clean_tx_irq(tx_ring
))
3465 /* Ring was not completely cleaned, so fire another interrupt */
3466 wr32(E1000_EICS
, tx_ring
->eims_value
);
3468 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3473 static void igb_write_itr(struct igb_ring
*ring
)
3475 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3476 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3477 switch (hw
->mac
.type
) {
3479 wr32(ring
->itr_register
, ring
->itr_val
|
3483 wr32(ring
->itr_register
, ring
->itr_val
|
3484 (ring
->itr_val
<< 16));
3491 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3493 struct igb_ring
*rx_ring
= data
;
3495 /* Write the ITR value calculated at the end of the
3496 * previous interrupt.
3499 igb_write_itr(rx_ring
);
3501 if (napi_schedule_prep(&rx_ring
->napi
))
3502 __napi_schedule(&rx_ring
->napi
);
3504 #ifdef CONFIG_IGB_DCA
3505 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3506 igb_update_rx_dca(rx_ring
);
3511 #ifdef CONFIG_IGB_DCA
3512 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3515 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3516 struct e1000_hw
*hw
= &adapter
->hw
;
3517 int cpu
= get_cpu();
3518 int q
= rx_ring
->reg_idx
;
3520 if (rx_ring
->cpu
!= cpu
) {
3521 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3522 if (hw
->mac
.type
== e1000_82576
) {
3523 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3524 dca_rxctrl
|= dca_get_tag(cpu
) <<
3525 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3527 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3528 dca_rxctrl
|= dca_get_tag(cpu
);
3530 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3531 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3532 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3533 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3539 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3542 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3543 struct e1000_hw
*hw
= &adapter
->hw
;
3544 int cpu
= get_cpu();
3545 int q
= tx_ring
->reg_idx
;
3547 if (tx_ring
->cpu
!= cpu
) {
3548 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3549 if (hw
->mac
.type
== e1000_82576
) {
3550 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3551 dca_txctrl
|= dca_get_tag(cpu
) <<
3552 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3554 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3555 dca_txctrl
|= dca_get_tag(cpu
);
3557 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3558 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3564 static void igb_setup_dca(struct igb_adapter
*adapter
)
3568 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3571 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3572 adapter
->tx_ring
[i
].cpu
= -1;
3573 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3575 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3576 adapter
->rx_ring
[i
].cpu
= -1;
3577 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3581 static int __igb_notify_dca(struct device
*dev
, void *data
)
3583 struct net_device
*netdev
= dev_get_drvdata(dev
);
3584 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3585 struct e1000_hw
*hw
= &adapter
->hw
;
3586 unsigned long event
= *(unsigned long *)data
;
3589 case DCA_PROVIDER_ADD
:
3590 /* if already enabled, don't do it again */
3591 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3593 /* Always use CB2 mode, difference is masked
3594 * in the CB driver. */
3595 wr32(E1000_DCA_CTRL
, 2);
3596 if (dca_add_requester(dev
) == 0) {
3597 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3598 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3599 igb_setup_dca(adapter
);
3602 /* Fall Through since DCA is disabled. */
3603 case DCA_PROVIDER_REMOVE
:
3604 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3605 /* without this a class_device is left
3606 * hanging around in the sysfs model */
3607 dca_remove_requester(dev
);
3608 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3609 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3610 wr32(E1000_DCA_CTRL
, 1);
3618 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3623 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3626 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3628 #endif /* CONFIG_IGB_DCA */
3631 * igb_intr_msi - Interrupt Handler
3632 * @irq: interrupt number
3633 * @data: pointer to a network interface device structure
3635 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3637 struct net_device
*netdev
= data
;
3638 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3639 struct e1000_hw
*hw
= &adapter
->hw
;
3640 /* read ICR disables interrupts using IAM */
3641 u32 icr
= rd32(E1000_ICR
);
3643 igb_write_itr(adapter
->rx_ring
);
3645 if(icr
& E1000_ICR_DOUTSYNC
) {
3646 /* HW is reporting DMA is out of sync */
3647 adapter
->stats
.doosync
++;
3650 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3651 hw
->mac
.get_link_status
= 1;
3652 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3653 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3656 napi_schedule(&adapter
->rx_ring
[0].napi
);
3662 * igb_intr - Legacy Interrupt Handler
3663 * @irq: interrupt number
3664 * @data: pointer to a network interface device structure
3666 static irqreturn_t
igb_intr(int irq
, void *data
)
3668 struct net_device
*netdev
= data
;
3669 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3670 struct e1000_hw
*hw
= &adapter
->hw
;
3671 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3672 * need for the IMC write */
3673 u32 icr
= rd32(E1000_ICR
);
3675 return IRQ_NONE
; /* Not our interrupt */
3677 igb_write_itr(adapter
->rx_ring
);
3679 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3680 * not set, then the adapter didn't send an interrupt */
3681 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3684 if(icr
& E1000_ICR_DOUTSYNC
) {
3685 /* HW is reporting DMA is out of sync */
3686 adapter
->stats
.doosync
++;
3689 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3690 hw
->mac
.get_link_status
= 1;
3691 /* guard against interrupt when we're going down */
3692 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3693 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3696 napi_schedule(&adapter
->rx_ring
[0].napi
);
3702 * igb_poll - NAPI Rx polling callback
3703 * @napi: napi polling structure
3704 * @budget: count of how many packets we should handle
3706 static int igb_poll(struct napi_struct
*napi
, int budget
)
3708 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3709 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3710 struct net_device
*netdev
= adapter
->netdev
;
3711 int tx_clean_complete
, work_done
= 0;
3713 /* this poll routine only supports one tx and one rx queue */
3714 #ifdef CONFIG_IGB_DCA
3715 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3716 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3718 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3720 #ifdef CONFIG_IGB_DCA
3721 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3722 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3724 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3726 /* If no Tx and not enough Rx work done, exit the polling mode */
3727 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3728 !netif_running(netdev
)) {
3729 if (adapter
->itr_setting
& 3)
3730 igb_set_itr(adapter
);
3731 napi_complete(napi
);
3732 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3733 igb_irq_enable(adapter
);
3740 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3742 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3743 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3744 struct e1000_hw
*hw
= &adapter
->hw
;
3745 struct net_device
*netdev
= adapter
->netdev
;
3748 #ifdef CONFIG_IGB_DCA
3749 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3750 igb_update_rx_dca(rx_ring
);
3752 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3754 /* If not enough Rx work done, exit the polling mode */
3755 if ((work_done
== 0) || !netif_running(netdev
)) {
3756 napi_complete(napi
);
3758 if (adapter
->itr_setting
& 3) {
3759 if (adapter
->num_rx_queues
== 1)
3760 igb_set_itr(adapter
);
3762 igb_update_ring_itr(rx_ring
);
3764 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3765 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3774 * igb_hwtstamp - utility function which checks for TX time stamp
3775 * @adapter: board private structure
3776 * @skb: packet that was just sent
3778 * If we were asked to do hardware stamping and such a time stamp is
3779 * available, then it must have been for this skb here because we only
3780 * allow only one such packet into the queue.
3782 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
3784 union skb_shared_tx
*shtx
= skb_tx(skb
);
3785 struct e1000_hw
*hw
= &adapter
->hw
;
3787 if (unlikely(shtx
->hardware
)) {
3788 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
3790 u64 regval
= rd32(E1000_TXSTMPL
);
3792 struct skb_shared_hwtstamps shhwtstamps
;
3794 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
3795 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
3796 ns
= timecounter_cyc2time(&adapter
->clock
,
3798 timecompare_update(&adapter
->compare
, ns
);
3799 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
3800 shhwtstamps
.syststamp
=
3801 timecompare_transform(&adapter
->compare
, ns
);
3802 skb_tstamp_tx(skb
, &shhwtstamps
);
3805 /* delayed orphaning: skb_tstamp_tx() needs the socket */
3811 * igb_clean_tx_irq - Reclaim resources after transmit completes
3812 * @adapter: board private structure
3813 * returns true if ring is completely cleaned
3815 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3817 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3818 struct net_device
*netdev
= adapter
->netdev
;
3819 struct e1000_hw
*hw
= &adapter
->hw
;
3820 struct igb_buffer
*buffer_info
;
3821 struct sk_buff
*skb
;
3822 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3823 unsigned int total_bytes
= 0, total_packets
= 0;
3824 unsigned int i
, eop
, count
= 0;
3825 bool cleaned
= false;
3827 i
= tx_ring
->next_to_clean
;
3828 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3829 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3831 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3832 (count
< tx_ring
->count
)) {
3833 for (cleaned
= false; !cleaned
; count
++) {
3834 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3835 buffer_info
= &tx_ring
->buffer_info
[i
];
3836 cleaned
= (i
== eop
);
3837 skb
= buffer_info
->skb
;
3840 unsigned int segs
, bytecount
;
3841 /* gso_segs is currently only valid for tcp */
3842 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3843 /* multiply data chunks by size of headers */
3844 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3846 total_packets
+= segs
;
3847 total_bytes
+= bytecount
;
3849 igb_tx_hwtstamp(adapter
, skb
);
3852 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3853 tx_desc
->wb
.status
= 0;
3856 if (i
== tx_ring
->count
)
3859 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3860 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3863 tx_ring
->next_to_clean
= i
;
3865 if (unlikely(count
&&
3866 netif_carrier_ok(netdev
) &&
3867 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3868 /* Make sure that anybody stopping the queue after this
3869 * sees the new next_to_clean.
3872 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3873 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3874 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3875 ++adapter
->restart_queue
;
3879 if (tx_ring
->detect_tx_hung
) {
3880 /* Detect a transmit hang in hardware, this serializes the
3881 * check with the clearing of time_stamp and movement of i */
3882 tx_ring
->detect_tx_hung
= false;
3883 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3884 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3885 (adapter
->tx_timeout_factor
* HZ
))
3886 && !(rd32(E1000_STATUS
) &
3887 E1000_STATUS_TXOFF
)) {
3889 /* detected Tx unit hang */
3890 dev_err(&adapter
->pdev
->dev
,
3891 "Detected Tx Unit Hang\n"
3895 " next_to_use <%x>\n"
3896 " next_to_clean <%x>\n"
3897 "buffer_info[next_to_clean]\n"
3898 " time_stamp <%lx>\n"
3899 " next_to_watch <%x>\n"
3901 " desc.status <%x>\n",
3902 tx_ring
->queue_index
,
3903 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3904 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3905 tx_ring
->next_to_use
,
3906 tx_ring
->next_to_clean
,
3907 tx_ring
->buffer_info
[i
].time_stamp
,
3910 eop_desc
->wb
.status
);
3911 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3914 tx_ring
->total_bytes
+= total_bytes
;
3915 tx_ring
->total_packets
+= total_packets
;
3916 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3917 tx_ring
->tx_stats
.packets
+= total_packets
;
3918 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3919 adapter
->net_stats
.tx_packets
+= total_packets
;
3920 return (count
< tx_ring
->count
);
3924 * igb_receive_skb - helper function to handle rx indications
3925 * @ring: pointer to receive ring receving this packet
3926 * @status: descriptor status field as written by hardware
3927 * @rx_desc: receive descriptor containing vlan and type information.
3928 * @skb: pointer to sk_buff to be indicated to stack
3930 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3931 union e1000_adv_rx_desc
* rx_desc
,
3932 struct sk_buff
*skb
)
3934 struct igb_adapter
* adapter
= ring
->adapter
;
3935 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3937 skb_record_rx_queue(skb
, ring
->queue_index
);
3938 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3940 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
3941 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3944 napi_gro_receive(&ring
->napi
, skb
);
3947 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3948 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3950 netif_receive_skb(skb
);
3954 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3955 u32 status_err
, struct sk_buff
*skb
)
3957 skb
->ip_summed
= CHECKSUM_NONE
;
3959 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3960 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3962 /* TCP/UDP checksum error bit is set */
3964 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3965 /* let the stack verify checksum errors */
3966 adapter
->hw_csum_err
++;
3969 /* It must be a TCP or UDP packet with a valid checksum */
3970 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3971 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3973 adapter
->hw_csum_good
++;
3976 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3977 int *work_done
, int budget
)
3979 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3980 struct net_device
*netdev
= adapter
->netdev
;
3981 struct e1000_hw
*hw
= &adapter
->hw
;
3982 struct pci_dev
*pdev
= adapter
->pdev
;
3983 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3984 struct igb_buffer
*buffer_info
, *next_buffer
;
3985 struct sk_buff
*skb
;
3986 bool cleaned
= false;
3987 int cleaned_count
= 0;
3988 unsigned int total_bytes
= 0, total_packets
= 0;
3990 u32 length
, hlen
, staterr
;
3992 i
= rx_ring
->next_to_clean
;
3993 buffer_info
= &rx_ring
->buffer_info
[i
];
3994 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3995 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3997 while (staterr
& E1000_RXD_STAT_DD
) {
3998 if (*work_done
>= budget
)
4002 skb
= buffer_info
->skb
;
4003 prefetch(skb
->data
- NET_IP_ALIGN
);
4004 buffer_info
->skb
= NULL
;
4007 if (i
== rx_ring
->count
)
4009 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4011 next_buffer
= &rx_ring
->buffer_info
[i
];
4013 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4017 if (!adapter
->rx_ps_hdr_size
) {
4018 pci_unmap_single(pdev
, buffer_info
->dma
,
4019 adapter
->rx_buffer_len
+
4021 PCI_DMA_FROMDEVICE
);
4022 skb_put(skb
, length
);
4026 /* HW will not DMA in data larger than the given buffer, even
4027 * if it parses the (NFS, of course) header to be larger. In
4028 * that case, it fills the header buffer and spills the rest
4031 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4032 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4033 if (hlen
> adapter
->rx_ps_hdr_size
)
4034 hlen
= adapter
->rx_ps_hdr_size
;
4036 if (!skb_shinfo(skb
)->nr_frags
) {
4037 pci_unmap_single(pdev
, buffer_info
->dma
,
4038 adapter
->rx_ps_hdr_size
+ NET_IP_ALIGN
,
4039 PCI_DMA_FROMDEVICE
);
4044 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4045 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4046 buffer_info
->page_dma
= 0;
4048 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4050 buffer_info
->page_offset
,
4053 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4054 (page_count(buffer_info
->page
) != 1))
4055 buffer_info
->page
= NULL
;
4057 get_page(buffer_info
->page
);
4060 skb
->data_len
+= length
;
4062 skb
->truesize
+= length
;
4065 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4066 buffer_info
->skb
= next_buffer
->skb
;
4067 buffer_info
->dma
= next_buffer
->dma
;
4068 next_buffer
->skb
= skb
;
4069 next_buffer
->dma
= 0;
4074 * If this bit is set, then the RX registers contain
4075 * the time stamp. No other packet will be time
4076 * stamped until we read these registers, so read the
4077 * registers to make them available again. Because
4078 * only one packet can be time stamped at a time, we
4079 * know that the register values must belong to this
4080 * one here and therefore we don't need to compare
4081 * any of the additional attributes stored for it.
4083 * If nothing went wrong, then it should have a
4084 * skb_shared_tx that we can turn into a
4085 * skb_shared_hwtstamps.
4087 * TODO: can time stamping be triggered (thus locking
4088 * the registers) without the packet reaching this point
4089 * here? In that case RX time stamping would get stuck.
4091 * TODO: in "time stamp all packets" mode this bit is
4092 * not set. Need a global flag for this mode and then
4093 * always read the registers. Cannot be done without
4096 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4099 struct skb_shared_hwtstamps
*shhwtstamps
=
4102 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4103 "igb: no RX time stamp available for time stamped packet");
4104 regval
= rd32(E1000_RXSTMPL
);
4105 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4106 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4107 timecompare_update(&adapter
->compare
, ns
);
4108 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4109 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4110 shhwtstamps
->syststamp
=
4111 timecompare_transform(&adapter
->compare
, ns
);
4114 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4115 dev_kfree_skb_irq(skb
);
4119 total_bytes
+= skb
->len
;
4122 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4124 skb
->protocol
= eth_type_trans(skb
, netdev
);
4126 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4129 rx_desc
->wb
.upper
.status_error
= 0;
4131 /* return some buffers to hardware, one at a time is too slow */
4132 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4133 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4137 /* use prefetched values */
4139 buffer_info
= next_buffer
;
4140 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4143 rx_ring
->next_to_clean
= i
;
4144 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
4147 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4149 rx_ring
->total_packets
+= total_packets
;
4150 rx_ring
->total_bytes
+= total_bytes
;
4151 rx_ring
->rx_stats
.packets
+= total_packets
;
4152 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4153 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4154 adapter
->net_stats
.rx_packets
+= total_packets
;
4159 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4160 * @adapter: address of board private structure
4162 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4165 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4166 struct net_device
*netdev
= adapter
->netdev
;
4167 struct pci_dev
*pdev
= adapter
->pdev
;
4168 union e1000_adv_rx_desc
*rx_desc
;
4169 struct igb_buffer
*buffer_info
;
4170 struct sk_buff
*skb
;
4174 i
= rx_ring
->next_to_use
;
4175 buffer_info
= &rx_ring
->buffer_info
[i
];
4177 if (adapter
->rx_ps_hdr_size
)
4178 bufsz
= adapter
->rx_ps_hdr_size
;
4180 bufsz
= adapter
->rx_buffer_len
;
4181 bufsz
+= NET_IP_ALIGN
;
4183 while (cleaned_count
--) {
4184 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4186 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4187 if (!buffer_info
->page
) {
4188 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4189 if (!buffer_info
->page
) {
4190 adapter
->alloc_rx_buff_failed
++;
4193 buffer_info
->page_offset
= 0;
4195 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4197 buffer_info
->page_dma
=
4198 pci_map_page(pdev
, buffer_info
->page
,
4199 buffer_info
->page_offset
,
4201 PCI_DMA_FROMDEVICE
);
4204 if (!buffer_info
->skb
) {
4205 skb
= netdev_alloc_skb(netdev
, bufsz
);
4207 adapter
->alloc_rx_buff_failed
++;
4211 /* Make buffer alignment 2 beyond a 16 byte boundary
4212 * this will result in a 16 byte aligned IP header after
4213 * the 14 byte MAC header is removed
4215 skb_reserve(skb
, NET_IP_ALIGN
);
4217 buffer_info
->skb
= skb
;
4218 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4220 PCI_DMA_FROMDEVICE
);
4222 /* Refresh the desc even if buffer_addrs didn't change because
4223 * each write-back erases this info. */
4224 if (adapter
->rx_ps_hdr_size
) {
4225 rx_desc
->read
.pkt_addr
=
4226 cpu_to_le64(buffer_info
->page_dma
);
4227 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4229 rx_desc
->read
.pkt_addr
=
4230 cpu_to_le64(buffer_info
->dma
);
4231 rx_desc
->read
.hdr_addr
= 0;
4235 if (i
== rx_ring
->count
)
4237 buffer_info
= &rx_ring
->buffer_info
[i
];
4241 if (rx_ring
->next_to_use
!= i
) {
4242 rx_ring
->next_to_use
= i
;
4244 i
= (rx_ring
->count
- 1);
4248 /* Force memory writes to complete before letting h/w
4249 * know there are new descriptors to fetch. (Only
4250 * applicable for weak-ordered memory model archs,
4251 * such as IA-64). */
4253 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4263 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4265 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4266 struct mii_ioctl_data
*data
= if_mii(ifr
);
4268 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4273 data
->phy_id
= adapter
->hw
.phy
.addr
;
4276 if (!capable(CAP_NET_ADMIN
))
4278 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4290 * igb_hwtstamp_ioctl - control hardware time stamping
4295 * Outgoing time stamping can be enabled and disabled. Play nice and
4296 * disable it when requested, although it shouldn't case any overhead
4297 * when no packet needs it. At most one packet in the queue may be
4298 * marked for time stamping, otherwise it would be impossible to tell
4299 * for sure to which packet the hardware time stamp belongs.
4301 * Incoming time stamping has to be configured via the hardware
4302 * filters. Not all combinations are supported, in particular event
4303 * type has to be specified. Matching the kind of event packet is
4304 * not supported, with the exception of "all V2 events regardless of
4308 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4309 struct ifreq
*ifr
, int cmd
)
4311 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4312 struct e1000_hw
*hw
= &adapter
->hw
;
4313 struct hwtstamp_config config
;
4314 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4315 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4316 u32 tsync_rx_ctl_type
= 0;
4317 u32 tsync_rx_cfg
= 0;
4320 short port
= 319; /* PTP */
4323 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4326 /* reserved for future extensions */
4330 switch (config
.tx_type
) {
4331 case HWTSTAMP_TX_OFF
:
4332 tsync_tx_ctl_bit
= 0;
4334 case HWTSTAMP_TX_ON
:
4335 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4341 switch (config
.rx_filter
) {
4342 case HWTSTAMP_FILTER_NONE
:
4343 tsync_rx_ctl_bit
= 0;
4345 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4346 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4347 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4348 case HWTSTAMP_FILTER_ALL
:
4350 * register TSYNCRXCFG must be set, therefore it is not
4351 * possible to time stamp both Sync and Delay_Req messages
4352 * => fall back to time stamping all packets
4354 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4355 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4357 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4358 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4359 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4362 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4363 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4364 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4367 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4368 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4369 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4370 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4373 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4375 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4376 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4377 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4378 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4381 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4383 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4384 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4385 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4386 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4387 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4394 /* enable/disable TX */
4395 regval
= rd32(E1000_TSYNCTXCTL
);
4396 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4397 wr32(E1000_TSYNCTXCTL
, regval
);
4399 /* enable/disable RX, define which PTP packets are time stamped */
4400 regval
= rd32(E1000_TSYNCRXCTL
);
4401 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4402 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4403 wr32(E1000_TSYNCRXCTL
, regval
);
4404 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4407 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4408 * (Ethertype to filter on)
4409 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4410 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4412 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4414 /* L4 Queue Filter[0]: only filter by source and destination port */
4415 wr32(E1000_SPQF0
, htons(port
));
4416 wr32(E1000_IMIREXT(0), is_l4
?
4417 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4418 wr32(E1000_IMIR(0), is_l4
?
4420 | (0<<16) /* immediate interrupt disabled */
4421 | 0 /* (1<<17) bit cleared: do not bypass
4422 destination port check */)
4424 wr32(E1000_FTQF0
, is_l4
?
4426 | (1<<15) /* VF not compared */
4427 | (1<<27) /* Enable Timestamping */
4428 | (7<<28) /* only source port filter enabled,
4429 source/target address and protocol
4431 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4436 adapter
->hwtstamp_config
= config
;
4438 /* clear TX/RX time stamp registers, just to be sure */
4439 regval
= rd32(E1000_TXSTMPH
);
4440 regval
= rd32(E1000_RXSTMPH
);
4442 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
4452 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4458 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4460 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
4466 static void igb_vlan_rx_register(struct net_device
*netdev
,
4467 struct vlan_group
*grp
)
4469 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4470 struct e1000_hw
*hw
= &adapter
->hw
;
4473 igb_irq_disable(adapter
);
4474 adapter
->vlgrp
= grp
;
4477 /* enable VLAN tag insert/strip */
4478 ctrl
= rd32(E1000_CTRL
);
4479 ctrl
|= E1000_CTRL_VME
;
4480 wr32(E1000_CTRL
, ctrl
);
4482 /* enable VLAN receive filtering */
4483 rctl
= rd32(E1000_RCTL
);
4484 rctl
&= ~E1000_RCTL_CFIEN
;
4485 wr32(E1000_RCTL
, rctl
);
4486 igb_update_mng_vlan(adapter
);
4488 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4490 /* disable VLAN tag insert/strip */
4491 ctrl
= rd32(E1000_CTRL
);
4492 ctrl
&= ~E1000_CTRL_VME
;
4493 wr32(E1000_CTRL
, ctrl
);
4495 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4496 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4497 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4500 adapter
->max_frame_size
);
4503 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4504 igb_irq_enable(adapter
);
4507 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4509 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4510 struct e1000_hw
*hw
= &adapter
->hw
;
4513 if ((hw
->mng_cookie
.status
&
4514 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4515 (vid
== adapter
->mng_vlan_id
))
4517 /* add VID to filter table */
4518 index
= (vid
>> 5) & 0x7F;
4519 vfta
= array_rd32(E1000_VFTA
, index
);
4520 vfta
|= (1 << (vid
& 0x1F));
4521 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4524 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4526 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4527 struct e1000_hw
*hw
= &adapter
->hw
;
4530 igb_irq_disable(adapter
);
4531 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4533 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4534 igb_irq_enable(adapter
);
4536 if ((adapter
->hw
.mng_cookie
.status
&
4537 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4538 (vid
== adapter
->mng_vlan_id
)) {
4539 /* release control to f/w */
4540 igb_release_hw_control(adapter
);
4544 /* remove VID from filter table */
4545 index
= (vid
>> 5) & 0x7F;
4546 vfta
= array_rd32(E1000_VFTA
, index
);
4547 vfta
&= ~(1 << (vid
& 0x1F));
4548 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4551 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4553 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4555 if (adapter
->vlgrp
) {
4557 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4558 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4560 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4565 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4567 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4571 /* Fiber NICs only allow 1000 gbps Full duplex */
4572 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4573 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4574 dev_err(&adapter
->pdev
->dev
,
4575 "Unsupported Speed/Duplex configuration\n");
4580 case SPEED_10
+ DUPLEX_HALF
:
4581 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4583 case SPEED_10
+ DUPLEX_FULL
:
4584 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4586 case SPEED_100
+ DUPLEX_HALF
:
4587 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4589 case SPEED_100
+ DUPLEX_FULL
:
4590 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4592 case SPEED_1000
+ DUPLEX_FULL
:
4594 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4596 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4598 dev_err(&adapter
->pdev
->dev
,
4599 "Unsupported Speed/Duplex configuration\n");
4605 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4607 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4608 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4609 struct e1000_hw
*hw
= &adapter
->hw
;
4610 u32 ctrl
, rctl
, status
;
4611 u32 wufc
= adapter
->wol
;
4616 netif_device_detach(netdev
);
4618 if (netif_running(netdev
))
4621 igb_reset_interrupt_capability(adapter
);
4623 igb_free_queues(adapter
);
4626 retval
= pci_save_state(pdev
);
4631 status
= rd32(E1000_STATUS
);
4632 if (status
& E1000_STATUS_LU
)
4633 wufc
&= ~E1000_WUFC_LNKC
;
4636 igb_setup_rctl(adapter
);
4637 igb_set_multi(netdev
);
4639 /* turn on all-multi mode if wake on multicast is enabled */
4640 if (wufc
& E1000_WUFC_MC
) {
4641 rctl
= rd32(E1000_RCTL
);
4642 rctl
|= E1000_RCTL_MPE
;
4643 wr32(E1000_RCTL
, rctl
);
4646 ctrl
= rd32(E1000_CTRL
);
4647 /* advertise wake from D3Cold */
4648 #define E1000_CTRL_ADVD3WUC 0x00100000
4649 /* phy power management enable */
4650 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4651 ctrl
|= E1000_CTRL_ADVD3WUC
;
4652 wr32(E1000_CTRL
, ctrl
);
4654 /* Allow time for pending master requests to run */
4655 igb_disable_pcie_master(&adapter
->hw
);
4657 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4658 wr32(E1000_WUFC
, wufc
);
4661 wr32(E1000_WUFC
, 0);
4664 /* make sure adapter isn't asleep if manageability/wol is enabled */
4665 if (wufc
|| adapter
->en_mng_pt
) {
4666 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4667 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4669 igb_shutdown_fiber_serdes_link_82575(hw
);
4670 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4671 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4674 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4675 * would have already happened in close and is redundant. */
4676 igb_release_hw_control(adapter
);
4678 pci_disable_device(pdev
);
4680 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4686 static int igb_resume(struct pci_dev
*pdev
)
4688 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4689 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4690 struct e1000_hw
*hw
= &adapter
->hw
;
4693 pci_set_power_state(pdev
, PCI_D0
);
4694 pci_restore_state(pdev
);
4696 err
= pci_enable_device_mem(pdev
);
4699 "igb: Cannot enable PCI device from suspend\n");
4702 pci_set_master(pdev
);
4704 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4705 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4707 igb_set_interrupt_capability(adapter
);
4709 if (igb_alloc_queues(adapter
)) {
4710 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4714 /* e1000_power_up_phy(adapter); */
4718 /* let the f/w know that the h/w is now under the control of the
4720 igb_get_hw_control(adapter
);
4722 wr32(E1000_WUS
, ~0);
4724 if (netif_running(netdev
)) {
4725 err
= igb_open(netdev
);
4730 netif_device_attach(netdev
);
4736 static void igb_shutdown(struct pci_dev
*pdev
)
4738 igb_suspend(pdev
, PMSG_SUSPEND
);
4741 #ifdef CONFIG_NET_POLL_CONTROLLER
4743 * Polling 'interrupt' - used by things like netconsole to send skbs
4744 * without having to re-enable interrupts. It's not called while
4745 * the interrupt routine is executing.
4747 static void igb_netpoll(struct net_device
*netdev
)
4749 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4750 struct e1000_hw
*hw
= &adapter
->hw
;
4753 if (!adapter
->msix_entries
) {
4754 igb_irq_disable(adapter
);
4755 napi_schedule(&adapter
->rx_ring
[0].napi
);
4759 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4760 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
4761 wr32(E1000_EIMC
, tx_ring
->eims_value
);
4762 igb_clean_tx_irq(tx_ring
);
4763 wr32(E1000_EIMS
, tx_ring
->eims_value
);
4766 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4767 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
4768 wr32(E1000_EIMC
, rx_ring
->eims_value
);
4769 napi_schedule(&rx_ring
->napi
);
4772 #endif /* CONFIG_NET_POLL_CONTROLLER */
4775 * igb_io_error_detected - called when PCI error is detected
4776 * @pdev: Pointer to PCI device
4777 * @state: The current pci connection state
4779 * This function is called after a PCI bus error affecting
4780 * this device has been detected.
4782 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4783 pci_channel_state_t state
)
4785 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4786 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4788 netif_device_detach(netdev
);
4790 if (netif_running(netdev
))
4792 pci_disable_device(pdev
);
4794 /* Request a slot slot reset. */
4795 return PCI_ERS_RESULT_NEED_RESET
;
4799 * igb_io_slot_reset - called after the pci bus has been reset.
4800 * @pdev: Pointer to PCI device
4802 * Restart the card from scratch, as if from a cold-boot. Implementation
4803 * resembles the first-half of the igb_resume routine.
4805 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4807 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4808 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4809 struct e1000_hw
*hw
= &adapter
->hw
;
4810 pci_ers_result_t result
;
4813 if (pci_enable_device_mem(pdev
)) {
4815 "Cannot re-enable PCI device after reset.\n");
4816 result
= PCI_ERS_RESULT_DISCONNECT
;
4818 pci_set_master(pdev
);
4819 pci_restore_state(pdev
);
4821 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4822 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4825 wr32(E1000_WUS
, ~0);
4826 result
= PCI_ERS_RESULT_RECOVERED
;
4829 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4831 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4832 "failed 0x%0x\n", err
);
4833 /* non-fatal, continue */
4840 * igb_io_resume - called when traffic can start flowing again.
4841 * @pdev: Pointer to PCI device
4843 * This callback is called when the error recovery driver tells us that
4844 * its OK to resume normal operation. Implementation resembles the
4845 * second-half of the igb_resume routine.
4847 static void igb_io_resume(struct pci_dev
*pdev
)
4849 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4850 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4852 if (netif_running(netdev
)) {
4853 if (igb_up(adapter
)) {
4854 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4859 netif_device_attach(netdev
);
4861 /* let the f/w know that the h/w is now under the control of the
4863 igb_get_hw_control(adapter
);