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[PATCH] I2C: Kill i2c_algorithm.id (4/7)
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / i2c / busses / i2c-keywest.c
blob5254d2db282c395c5b0257b6aa49f2bd350f9a61
1 /*
2 i2c Support for Apple Keywest I2C Bus Controller
3
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5
6 Original work by
7
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 Changes:
25
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
32
33 My understanding of the various modes supported by keywest are:
34
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
42
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
47 */
48
49 #include <linux/module.h>
50 #include <linux/kernel.h>
51 #include <linux/ioport.h>
52 #include <linux/pci.h>
53 #include <linux/types.h>
54 #include <linux/delay.h>
55 #include <linux/i2c.h>
56 #include <linux/init.h>
57 #include <linux/mm.h>
58 #include <linux/timer.h>
59 #include <linux/spinlock.h>
60 #include <linux/completion.h>
61 #include <linux/interrupt.h>
62
63 #include <asm/io.h>
64 #include <asm/prom.h>
65 #include <asm/machdep.h>
66 #include <asm/pmac_feature.h>
67 #include <asm/pmac_low_i2c.h>
68
69 #include "i2c-keywest.h"
70
71 #undef POLLED_MODE
72
73 /* Some debug macros */
74 #define WRONG_STATE(name) do {\
75 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
76 name, __kw_state_names[iface->state], isr); \
77 } while(0)
78
79 #ifdef DEBUG
80 static const char *__kw_state_names[] = {
81 "state_idle",
82 "state_addr",
83 "state_read",
84 "state_write",
85 "state_stop",
86 "state_dead"
87 };
88 #endif /* DEBUG */
89
90 static int probe;
91
92 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
93 MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
94 MODULE_LICENSE("GPL");
95 module_param(probe, bool, 0);
96
97 #ifdef POLLED_MODE
98 /* Don't schedule, the g5 fan controller is too
99 * timing sensitive
100 */
101 static u8
102 wait_interrupt(struct keywest_iface* iface)
103 {
104 int i;
105 u8 isr;
106
107 for (i = 0; i < 200000; i++) {
108 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
109 if (isr != 0)
110 return isr;
111 udelay(10);
112 }
113 return isr;
114 }
115 #endif /* POLLED_MODE */
116
117 static void
118 do_stop(struct keywest_iface* iface, int result)
119 {
120 write_reg(reg_control, KW_I2C_CTL_STOP);
121 iface->state = state_stop;
122 iface->result = result;
123 }
124
125 /* Main state machine for standard & standard sub mode */
126 static void
127 handle_interrupt(struct keywest_iface *iface, u8 isr)
128 {
129 int ack;
130
131 if (isr == 0) {
132 if (iface->state != state_stop) {
133 pr_debug("KW: Timeout !\n");
134 do_stop(iface, -EIO);
135 }
136 if (iface->state == state_stop) {
137 ack = read_reg(reg_status);
138 if (!(ack & KW_I2C_STAT_BUSY)) {
139 iface->state = state_idle;
140 write_reg(reg_ier, 0x00);
141 #ifndef POLLED_MODE
142 complete(&iface->complete);
143 #endif /* POLLED_MODE */
144 }
145 }
146 return;
147 }
148
149 if (isr & KW_I2C_IRQ_ADDR) {
150 ack = read_reg(reg_status);
151 if (iface->state != state_addr) {
152 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
153 WRONG_STATE("KW_I2C_IRQ_ADDR");
154 do_stop(iface, -EIO);
155 return;
156 }
157 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
158 iface->state = state_stop;
159 iface->result = -ENODEV;
160 pr_debug("KW: NAK on address\n");
161 } else {
162 /* Handle rw "quick" mode */
163 if (iface->datalen == 0) {
164 do_stop(iface, 0);
165 } else if (iface->read_write == I2C_SMBUS_READ) {
166 iface->state = state_read;
167 if (iface->datalen > 1)
168 write_reg(reg_control, KW_I2C_CTL_AAK);
169 } else {
170 iface->state = state_write;
171 write_reg(reg_data, *(iface->data++));
172 iface->datalen--;
173 }
174 }
175 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
176 }
177
178 if (isr & KW_I2C_IRQ_DATA) {
179 if (iface->state == state_read) {
180 *(iface->data++) = read_reg(reg_data);
181 write_reg(reg_isr, KW_I2C_IRQ_DATA);
182 iface->datalen--;
183 if (iface->datalen == 0)
184 iface->state = state_stop;
185 else if (iface->datalen == 1)
186 write_reg(reg_control, 0);
187 } else if (iface->state == state_write) {
188 /* Check ack status */
189 ack = read_reg(reg_status);
190 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
191 pr_debug("KW: nack on data write (%x): %x\n",
192 iface->data[-1], ack);
193 do_stop(iface, -EIO);
194 } else if (iface->datalen) {
195 write_reg(reg_data, *(iface->data++));
196 iface->datalen--;
197 } else {
198 write_reg(reg_control, KW_I2C_CTL_STOP);
199 iface->state = state_stop;
200 iface->result = 0;
201 }
202 write_reg(reg_isr, KW_I2C_IRQ_DATA);
203 } else {
204 write_reg(reg_isr, KW_I2C_IRQ_DATA);
205 WRONG_STATE("KW_I2C_IRQ_DATA");
206 if (iface->state != state_stop)
207 do_stop(iface, -EIO);
208 }
209 }
210
211 if (isr & KW_I2C_IRQ_STOP) {
212 write_reg(reg_isr, KW_I2C_IRQ_STOP);
213 if (iface->state != state_stop) {
214 WRONG_STATE("KW_I2C_IRQ_STOP");
215 iface->result = -EIO;
216 }
217 iface->state = state_idle;
218 write_reg(reg_ier, 0x00);
219 #ifndef POLLED_MODE
220 complete(&iface->complete);
221 #endif /* POLLED_MODE */
222 }
223
224 if (isr & KW_I2C_IRQ_START)
225 write_reg(reg_isr, KW_I2C_IRQ_START);
226 }
227
228 #ifndef POLLED_MODE
229
230 /* Interrupt handler */
231 static irqreturn_t
232 keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
233 {
234 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
235 unsigned long flags;
236
237 spin_lock_irqsave(&iface->lock, flags);
238 del_timer(&iface->timeout_timer);
239 handle_interrupt(iface, read_reg(reg_isr));
240 if (iface->state != state_idle) {
241 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
242 add_timer(&iface->timeout_timer);
243 }
244 spin_unlock_irqrestore(&iface->lock, flags);
245 return IRQ_HANDLED;
246 }
247
248 static void
249 keywest_timeout(unsigned long data)
250 {
251 struct keywest_iface *iface = (struct keywest_iface *)data;
252 unsigned long flags;
253
254 pr_debug("timeout !\n");
255 spin_lock_irqsave(&iface->lock, flags);
256 handle_interrupt(iface, read_reg(reg_isr));
257 if (iface->state != state_idle) {
258 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
259 add_timer(&iface->timeout_timer);
260 }
261 spin_unlock_irqrestore(&iface->lock, flags);
262 }
263
264 #endif /* POLLED_MODE */
265
266 /*
267 * SMBUS-type transfer entrypoint
268 */
269 static s32
270 keywest_smbus_xfer( struct i2c_adapter* adap,
271 u16 addr,
272 unsigned short flags,
273 char read_write,
274 u8 command,
275 int size,
276 union i2c_smbus_data* data)
277 {
278 struct keywest_chan* chan = i2c_get_adapdata(adap);
279 struct keywest_iface* iface = chan->iface;
280 int len;
281 u8* buffer;
282 u16 cur_word;
283 int rc = 0;
284
285 if (iface->state == state_dead)
286 return -ENXIO;
287
288 /* Prepare datas & select mode */
289 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
290 switch (size) {
291 case I2C_SMBUS_QUICK:
292 len = 0;
293 buffer = NULL;
294 iface->cur_mode |= KW_I2C_MODE_STANDARD;
295 break;
296 case I2C_SMBUS_BYTE:
297 len = 1;
298 buffer = &data->byte;
299 iface->cur_mode |= KW_I2C_MODE_STANDARD;
300 break;
301 case I2C_SMBUS_BYTE_DATA:
302 len = 1;
303 buffer = &data->byte;
304 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
305 break;
306 case I2C_SMBUS_WORD_DATA:
307 len = 2;
308 cur_word = cpu_to_le16(data->word);
309 buffer = (u8 *)&cur_word;
310 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
311 break;
312 case I2C_SMBUS_BLOCK_DATA:
313 len = data->block[0];
314 buffer = &data->block[1];
315 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
316 break;
317 default:
318 return -1;
319 }
320
321 /* Turn a standardsub read into a combined mode access */
322 if (read_write == I2C_SMBUS_READ
323 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
324 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
325 iface->cur_mode |= KW_I2C_MODE_COMBINED;
326 }
327
328 /* Original driver had this limitation */
329 if (len > 32)
330 len = 32;
331
332 if (pmac_low_i2c_lock(iface->node))
333 return -ENXIO;
334
335 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
336 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
337
338 iface->data = buffer;
339 iface->datalen = len;
340 iface->state = state_addr;
341 iface->result = 0;
342 iface->read_write = read_write;
343
344 /* Setup channel & clear pending irqs */
345 write_reg(reg_isr, read_reg(reg_isr));
346 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
347 write_reg(reg_status, 0);
348
349 /* Set up address and r/w bit */
350 write_reg(reg_addr,
351 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
352
353 /* Set up the sub address */
354 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
355 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
356 write_reg(reg_subaddr, command);
357
358 #ifndef POLLED_MODE
359 /* Arm timeout */
360 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
361 add_timer(&iface->timeout_timer);
362 #endif
363
364 /* Start sending address & enable interrupt*/
365 write_reg(reg_control, KW_I2C_CTL_XADDR);
366 write_reg(reg_ier, KW_I2C_IRQ_MASK);
367
368 #ifdef POLLED_MODE
369 pr_debug("using polled mode...\n");
370 /* State machine, to turn into an interrupt handler */
371 while(iface->state != state_idle) {
372 unsigned long flags;
373
374 u8 isr = wait_interrupt(iface);
375 spin_lock_irqsave(&iface->lock, flags);
376 handle_interrupt(iface, isr);
377 spin_unlock_irqrestore(&iface->lock, flags);
378 }
379 #else /* POLLED_MODE */
380 pr_debug("using interrupt mode...\n");
381 wait_for_completion(&iface->complete);
382 #endif /* POLLED_MODE */
383
384 rc = iface->result;
385 pr_debug("transfer done, result: %d\n", rc);
386
387 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
388 data->word = le16_to_cpu(cur_word);
389
390 /* Release sem */
391 pmac_low_i2c_unlock(iface->node);
392
393 return rc;
394 }
395
396 /*
397 * Generic i2c master transfer entrypoint
398 */
399 static int
400 keywest_xfer( struct i2c_adapter *adap,
401 struct i2c_msg *msgs,
402 int num)
403 {
404 struct keywest_chan* chan = i2c_get_adapdata(adap);
405 struct keywest_iface* iface = chan->iface;
406 struct i2c_msg *pmsg;
407 int i, completed;
408 int rc = 0;
409
410 if (iface->state == state_dead)
411 return -ENXIO;
412
413 if (pmac_low_i2c_lock(iface->node))
414 return -ENXIO;
415
416 /* Set adapter to standard mode */
417 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
418 iface->cur_mode |= KW_I2C_MODE_STANDARD;
419
420 completed = 0;
421 for (i = 0; rc >= 0 && i < num;) {
422 u8 addr;
423
424 pmsg = &msgs[i++];
425 addr = pmsg->addr;
426 if (pmsg->flags & I2C_M_TEN) {
427 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
428 rc = -EINVAL;
429 break;
430 }
431 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
432 chan->chan_no,
433 pmsg->flags & I2C_M_RD ? "read" : "write",
434 pmsg->len, addr, i, num);
435
436 /* Setup channel & clear pending irqs */
437 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
438 write_reg(reg_isr, read_reg(reg_isr));
439 write_reg(reg_status, 0);
440
441 iface->data = pmsg->buf;
442 iface->datalen = pmsg->len;
443 iface->state = state_addr;
444 iface->result = 0;
445 if (pmsg->flags & I2C_M_RD)
446 iface->read_write = I2C_SMBUS_READ;
447 else
448 iface->read_write = I2C_SMBUS_WRITE;
449
450 /* Set up address and r/w bit */
451 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
452 addr ^= 1;
453 write_reg(reg_addr,
454 (addr << 1) |
455 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
456
457 #ifndef POLLED_MODE
458 /* Arm timeout */
459 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
460 add_timer(&iface->timeout_timer);
461 #endif
462
463 /* Start sending address & enable interrupt*/
464 write_reg(reg_ier, KW_I2C_IRQ_MASK);
465 write_reg(reg_control, KW_I2C_CTL_XADDR);
466
467 #ifdef POLLED_MODE
468 pr_debug("using polled mode...\n");
469 /* State machine, to turn into an interrupt handler */
470 while(iface->state != state_idle) {
471 u8 isr = wait_interrupt(iface);
472 handle_interrupt(iface, isr);
473 }
474 #else /* POLLED_MODE */
475 pr_debug("using interrupt mode...\n");
476 wait_for_completion(&iface->complete);
477 #endif /* POLLED_MODE */
478
479 rc = iface->result;
480 if (rc == 0)
481 completed++;
482 pr_debug("transfer done, result: %d\n", rc);
483 }
484
485 /* Release sem */
486 pmac_low_i2c_unlock(iface->node);
487
488 return completed;
489 }
490
491 static u32
492 keywest_func(struct i2c_adapter * adapter)
493 {
494 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
495 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
496 I2C_FUNC_SMBUS_BLOCK_DATA;
497 }
498
499 /* For now, we only handle combined mode (smbus) */
500 static struct i2c_algorithm keywest_algorithm = {
501 .smbus_xfer = keywest_smbus_xfer,
502 .master_xfer = keywest_xfer,
503 .functionality = keywest_func,
504 };
505
506
507 static int
508 create_iface(struct device_node *np, struct device *dev)
509 {
510 unsigned long steps;
511 unsigned bsteps, tsize, i, nchan, addroffset;
512 struct keywest_iface* iface;
513 u32 *psteps, *prate;
514 int rc;
515
516 if (np->n_intrs < 1 || np->n_addrs < 1) {
517 printk(KERN_ERR "%s: Missing interrupt or address !\n",
518 np->full_name);
519 return -ENODEV;
520 }
521 if (pmac_low_i2c_lock(np))
522 return -ENODEV;
523
524 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
525 steps = psteps ? (*psteps) : 0x10;
526
527 /* Hrm... maybe we can be smarter here */
528 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
529 steps >>= 1;
530
531 if (np->parent->name[0] == 'u') {
532 nchan = 2;
533 addroffset = 3;
534 } else {
535 addroffset = 0;
536 nchan = 1;
537 }
538
539 tsize = sizeof(struct keywest_iface) +
540 (sizeof(struct keywest_chan) + 4) * nchan;
541 iface = (struct keywest_iface *) kmalloc(tsize, GFP_KERNEL);
542 if (iface == NULL) {
543 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
544 pmac_low_i2c_unlock(np);
545 return -ENOMEM;
546 }
547 memset(iface, 0, tsize);
548 spin_lock_init(&iface->lock);
549 init_completion(&iface->complete);
550 iface->node = of_node_get(np);
551 iface->bsteps = bsteps;
552 iface->chan_count = nchan;
553 iface->state = state_idle;
554 iface->irq = np->intrs[0].line;
555 iface->channels = (struct keywest_chan *)
556 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
557 iface->base = ioremap(np->addrs[0].address + addroffset,
558 np->addrs[0].size);
559 if (!iface->base) {
560 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
561 kfree(iface);
562 pmac_low_i2c_unlock(np);
563 return -ENOMEM;
564 }
565
566 #ifndef POLLED_MODE
567 init_timer(&iface->timeout_timer);
568 iface->timeout_timer.function = keywest_timeout;
569 iface->timeout_timer.data = (unsigned long)iface;
570 #endif
571
572 /* Select interface rate */
573 iface->cur_mode = KW_I2C_MODE_100KHZ;
574 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
575 if (prate) switch(*prate) {
576 case 100:
577 iface->cur_mode = KW_I2C_MODE_100KHZ;
578 break;
579 case 50:
580 iface->cur_mode = KW_I2C_MODE_50KHZ;
581 break;
582 case 25:
583 iface->cur_mode = KW_I2C_MODE_25KHZ;
584 break;
585 default:
586 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
587 (long)*prate);
588 }
589
590 /* Select standard mode by default */
591 iface->cur_mode |= KW_I2C_MODE_STANDARD;
592
593 /* Write mode */
594 write_reg(reg_mode, iface->cur_mode);
595
596 /* Switch interrupts off & clear them*/
597 write_reg(reg_ier, 0x00);
598 write_reg(reg_isr, KW_I2C_IRQ_MASK);
599
600 #ifndef POLLED_MODE
601 /* Request chip interrupt */
602 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
603 if (rc) {
604 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
605 iounmap(iface->base);
606 kfree(iface);
607 pmac_low_i2c_unlock(np);
608 return -ENODEV;
609 }
610 #endif /* POLLED_MODE */
611
612 pmac_low_i2c_unlock(np);
613 dev_set_drvdata(dev, iface);
614
615 for (i=0; i<nchan; i++) {
616 struct keywest_chan* chan = &iface->channels[i];
617 u8 addr;
618
619 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
620 chan->iface = iface;
621 chan->chan_no = i;
622 chan->adapter.id = I2C_ALGO_SMBUS;
623 chan->adapter.algo = &keywest_algorithm;
624 chan->adapter.algo_data = NULL;
625 chan->adapter.client_register = NULL;
626 chan->adapter.client_unregister = NULL;
627 i2c_set_adapdata(&chan->adapter, chan);
628 chan->adapter.dev.parent = dev;
629
630 rc = i2c_add_adapter(&chan->adapter);
631 if (rc) {
632 printk("i2c-keywest.c: Adapter %s registration failed\n",
633 chan->adapter.name);
634 i2c_set_adapdata(&chan->adapter, NULL);
635 }
636 if (probe) {
637 printk("Probe: ");
638 for (addr = 0x00; addr <= 0x7f; addr++) {
639 if (i2c_smbus_xfer(&chan->adapter,addr,
640 0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
641 printk("%02x ", addr);
642 }
643 printk("\n");
644 }
645 }
646
647 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
648 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
649
650 return 0;
651 }
652
653 static int
654 dispose_iface(struct device *dev)
655 {
656 struct keywest_iface *iface = dev_get_drvdata(dev);
657 int i, rc;
658
659 /* Make sure we stop all activity */
660 if (pmac_low_i2c_lock(iface->node))
661 return -ENODEV;
662
663 #ifndef POLLED_MODE
664 spin_lock_irq(&iface->lock);
665 while (iface->state != state_idle) {
666 spin_unlock_irq(&iface->lock);
667 msleep(100);
668 spin_lock_irq(&iface->lock);
669 }
670 #endif /* POLLED_MODE */
671 iface->state = state_dead;
672 #ifndef POLLED_MODE
673 spin_unlock_irq(&iface->lock);
674 free_irq(iface->irq, iface);
675 #endif /* POLLED_MODE */
676
677 pmac_low_i2c_unlock(iface->node);
678
679 /* Release all channels */
680 for (i=0; i<iface->chan_count; i++) {
681 struct keywest_chan* chan = &iface->channels[i];
682 if (i2c_get_adapdata(&chan->adapter) == NULL)
683 continue;
684 rc = i2c_del_adapter(&chan->adapter);
685 i2c_set_adapdata(&chan->adapter, NULL);
686 /* We aren't that prepared to deal with this... */
687 if (rc)
688 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
689 }
690 iounmap(iface->base);
691 dev_set_drvdata(dev, NULL);
692 of_node_put(iface->node);
693 kfree(iface);
694
695 return 0;
696 }
697
698 static int
699 create_iface_macio(struct macio_dev* dev, const struct of_device_id *match)
700 {
701 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
702 }
703
704 static int
705 dispose_iface_macio(struct macio_dev* dev)
706 {
707 return dispose_iface(&dev->ofdev.dev);
708 }
709
710 static int
711 create_iface_of_platform(struct of_device* dev, const struct of_device_id *match)
712 {
713 return create_iface(dev->node, &dev->dev);
714 }
715
716 static int
717 dispose_iface_of_platform(struct of_device* dev)
718 {
719 return dispose_iface(&dev->dev);
720 }
721
722 static struct of_device_id i2c_keywest_match[] =
723 {
724 {
725 .type = "i2c",
726 .compatible = "keywest"
727 },
728 {},
729 };
730
731 static struct macio_driver i2c_keywest_macio_driver =
732 {
733 .name = "i2c-keywest",
734 .match_table = i2c_keywest_match,
735 .probe = create_iface_macio,
736 .remove = dispose_iface_macio
737 };
738
739 static struct of_platform_driver i2c_keywest_of_platform_driver =
740 {
741 .name = "i2c-keywest",
742 .match_table = i2c_keywest_match,
743 .probe = create_iface_of_platform,
744 .remove = dispose_iface_of_platform
745 };
746
747 static int __init
748 i2c_keywest_init(void)
749 {
750 of_register_driver(&i2c_keywest_of_platform_driver);
751 macio_register_driver(&i2c_keywest_macio_driver);
752
753 return 0;
754 }
755
756 static void __exit
757 i2c_keywest_cleanup(void)
758 {
759 of_unregister_driver(&i2c_keywest_of_platform_driver);
760 macio_unregister_driver(&i2c_keywest_macio_driver);
761 }
762
763 module_init(i2c_keywest_init);
764 module_exit(i2c_keywest_cleanup);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree